MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_adc.c@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**************************************************************************//**
sahilmgandhi 18:6a4db94011d3 2 * @file adc.c
sahilmgandhi 18:6a4db94011d3 3 * @version V1.00
sahilmgandhi 18:6a4db94011d3 4 * $Revision: 13 $
sahilmgandhi 18:6a4db94011d3 5 * $Date: 14/05/29 1:13p $
sahilmgandhi 18:6a4db94011d3 6 * @brief NUC472/NUC442 ADC driver source file
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * @note
sahilmgandhi 18:6a4db94011d3 9 * Copyright (C) 2013 Nuvoton Technology Corp. All rights reserved.
sahilmgandhi 18:6a4db94011d3 10 *****************************************************************************/
sahilmgandhi 18:6a4db94011d3 11 #include "NUC472_442.h"
sahilmgandhi 18:6a4db94011d3 12
sahilmgandhi 18:6a4db94011d3 13 /** @addtogroup NUC472_442_Device_Driver NUC472/NUC442 Device Driver
sahilmgandhi 18:6a4db94011d3 14 @{
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16
sahilmgandhi 18:6a4db94011d3 17 /** @addtogroup NUC472_442_ADC_Driver ADC Driver
sahilmgandhi 18:6a4db94011d3 18 @{
sahilmgandhi 18:6a4db94011d3 19 */
sahilmgandhi 18:6a4db94011d3 20
sahilmgandhi 18:6a4db94011d3 21
sahilmgandhi 18:6a4db94011d3 22 /** @addtogroup NUC472_442_ADC_EXPORTED_FUNCTIONS ADC Exported Functions
sahilmgandhi 18:6a4db94011d3 23 @{
sahilmgandhi 18:6a4db94011d3 24 */
sahilmgandhi 18:6a4db94011d3 25
sahilmgandhi 18:6a4db94011d3 26 /**
sahilmgandhi 18:6a4db94011d3 27 * @brief This API configures ADC module to be ready for convert the input from selected channel
sahilmgandhi 18:6a4db94011d3 28 * @param[in] adc Base address of ADC module
sahilmgandhi 18:6a4db94011d3 29 * @param[in] u32InputMode Input mode (single-end/differential). Valid values are:
sahilmgandhi 18:6a4db94011d3 30 * - \ref ADC_INPUT_MODE_SINGLE_END
sahilmgandhi 18:6a4db94011d3 31 * - \ref ADC_INPUT_MODE_DIFFERENTIAL
sahilmgandhi 18:6a4db94011d3 32 * @param[in] u32OpMode Operation mode (single/single cycle/continuous). Valid values are:
sahilmgandhi 18:6a4db94011d3 33 * - \ref ADC_OPERATION_MODE_SINGLE
sahilmgandhi 18:6a4db94011d3 34 * - \ref ADC_OPERATION_MODE_SINGLE_CYCLE
sahilmgandhi 18:6a4db94011d3 35 * - \ref ADC_OPERATION_MODE_CONTINUOUS
sahilmgandhi 18:6a4db94011d3 36 * @param[in] u32ChMask Channel enable bit. Valid values are:
sahilmgandhi 18:6a4db94011d3 37 * - \ref ADC_CH_0_MASK
sahilmgandhi 18:6a4db94011d3 38 * - \ref ADC_CH_1_MASK
sahilmgandhi 18:6a4db94011d3 39 * - \ref ADC_CH_2_MASK
sahilmgandhi 18:6a4db94011d3 40 * - \ref ADC_CH_3_MASK
sahilmgandhi 18:6a4db94011d3 41 * - \ref ADC_CH_4_MASK
sahilmgandhi 18:6a4db94011d3 42 * - \ref ADC_CH_5_MASK
sahilmgandhi 18:6a4db94011d3 43 * - \ref ADC_CH_6_MASK
sahilmgandhi 18:6a4db94011d3 44 * - \ref ADC_CH_7_MASK
sahilmgandhi 18:6a4db94011d3 45 * - \ref ADC_CH_8_MASK
sahilmgandhi 18:6a4db94011d3 46 * - \ref ADC_CH_9_MASK
sahilmgandhi 18:6a4db94011d3 47 * - \ref ADC_CH_10_MASK
sahilmgandhi 18:6a4db94011d3 48 * - \ref ADC_CH_11_MASK
sahilmgandhi 18:6a4db94011d3 49 * - \ref ADC_CH_TS_MASK
sahilmgandhi 18:6a4db94011d3 50 * - \ref ADC_CH_BG_MASK
sahilmgandhi 18:6a4db94011d3 51 * @return None
sahilmgandhi 18:6a4db94011d3 52 * @note This API does not turn on ADC power nor does trigger ADC conversion
sahilmgandhi 18:6a4db94011d3 53 */
sahilmgandhi 18:6a4db94011d3 54 void ADC_Open(ADC_T *adc,
sahilmgandhi 18:6a4db94011d3 55 uint32_t u32InputMode,
sahilmgandhi 18:6a4db94011d3 56 uint32_t u32OpMode,
sahilmgandhi 18:6a4db94011d3 57 uint32_t u32ChMask)
sahilmgandhi 18:6a4db94011d3 58 {
sahilmgandhi 18:6a4db94011d3 59
sahilmgandhi 18:6a4db94011d3 60 ADC->CTL |= u32InputMode;
sahilmgandhi 18:6a4db94011d3 61 ADC->CTL |= u32OpMode;
sahilmgandhi 18:6a4db94011d3 62 ADC->CHEN = (ADC->CHEN & ~(ADC_CHEN_CHEN_Msk | ADC_CHEN_ADBGEN_Msk | ADC_CHEN_ADTSEN_Msk)) | u32ChMask;
sahilmgandhi 18:6a4db94011d3 63 return;
sahilmgandhi 18:6a4db94011d3 64 }
sahilmgandhi 18:6a4db94011d3 65
sahilmgandhi 18:6a4db94011d3 66 /**
sahilmgandhi 18:6a4db94011d3 67 * @brief Disable ADC module
sahilmgandhi 18:6a4db94011d3 68 * @param[in] adc Base address of ADC module
sahilmgandhi 18:6a4db94011d3 69 * @return None
sahilmgandhi 18:6a4db94011d3 70 */
sahilmgandhi 18:6a4db94011d3 71 void ADC_Close(ADC_T *adc)
sahilmgandhi 18:6a4db94011d3 72 {
sahilmgandhi 18:6a4db94011d3 73 SYS->IPRST1 |= SYS_IPRST1_ADCRST_Msk;
sahilmgandhi 18:6a4db94011d3 74 SYS->IPRST1 &= ~SYS_IPRST1_ADCRST_Msk;
sahilmgandhi 18:6a4db94011d3 75 return;
sahilmgandhi 18:6a4db94011d3 76
sahilmgandhi 18:6a4db94011d3 77 }
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 /**
sahilmgandhi 18:6a4db94011d3 80 * @brief Configure the hardware trigger condition and enable hardware trigger
sahilmgandhi 18:6a4db94011d3 81 * @param[in] adc Base address of ADC module
sahilmgandhi 18:6a4db94011d3 82 * @param[in] u32Source Decides the hardware trigger source. Valid values are:
sahilmgandhi 18:6a4db94011d3 83 * - \ref ADC_TRIGGER_BY_EXT_PIN
sahilmgandhi 18:6a4db94011d3 84 * - \ref ADC_TRIGGER_BY_PWM
sahilmgandhi 18:6a4db94011d3 85 * @param[in] u32Param While ADC trigger by PWM, this parameter is used to set the delay between PWM
sahilmgandhi 18:6a4db94011d3 86 * trigger and ADC conversion. Valid values are from 0 ~ 0xFF, and actual delay
sahilmgandhi 18:6a4db94011d3 87 * time is (4 * u32Param * HCLK). While ADC trigger by external pin, this parameter
sahilmgandhi 18:6a4db94011d3 88 * is used to set trigger condition. Valid values are:
sahilmgandhi 18:6a4db94011d3 89 * - \ref ADC_LOW_LEVEL_TRIGGER
sahilmgandhi 18:6a4db94011d3 90 * - \ref ADC_HIGH_LEVEL_TRIGGER
sahilmgandhi 18:6a4db94011d3 91 * - \ref ADC_FALLING_EDGE_TRIGGER
sahilmgandhi 18:6a4db94011d3 92 * - \ref ADC_RISING_EDGE_TRIGGER
sahilmgandhi 18:6a4db94011d3 93 * @return None
sahilmgandhi 18:6a4db94011d3 94 */
sahilmgandhi 18:6a4db94011d3 95 void ADC_EnableHWTrigger(ADC_T *adc,
sahilmgandhi 18:6a4db94011d3 96 uint32_t u32Source,
sahilmgandhi 18:6a4db94011d3 97 uint32_t u32Param)
sahilmgandhi 18:6a4db94011d3 98 {
sahilmgandhi 18:6a4db94011d3 99 ADC->CTL &= ~(ADC_TRIGGER_BY_PWM | ADC_RISING_EDGE_TRIGGER | ADC_CTL_HWTRGEN_Msk);
sahilmgandhi 18:6a4db94011d3 100 if(u32Source == ADC_TRIGGER_BY_EXT_PIN) {
sahilmgandhi 18:6a4db94011d3 101 ADC->CTL &= ~(ADC_CTL_HWTRGSEL_Msk | ADC_CTL_HWTRGCOND_Msk);
sahilmgandhi 18:6a4db94011d3 102 ADC->CTL |= u32Source | u32Param | ADC_CTL_HWTRGEN_Msk;
sahilmgandhi 18:6a4db94011d3 103 } else {
sahilmgandhi 18:6a4db94011d3 104 ADC->CTL &= ~(ADC_CTL_HWTRGSEL_Msk | ADC_CTL_PWMTRGDLY_Msk);
sahilmgandhi 18:6a4db94011d3 105 ADC->CTL |= u32Source | (u32Param << ADC_CTL_PWMTRGDLY_Pos) | ADC_CTL_HWTRGEN_Msk;
sahilmgandhi 18:6a4db94011d3 106 }
sahilmgandhi 18:6a4db94011d3 107
sahilmgandhi 18:6a4db94011d3 108 return;
sahilmgandhi 18:6a4db94011d3 109 }
sahilmgandhi 18:6a4db94011d3 110
sahilmgandhi 18:6a4db94011d3 111 /**
sahilmgandhi 18:6a4db94011d3 112 * @brief Disable hardware trigger ADC function.
sahilmgandhi 18:6a4db94011d3 113 * @param[in] adc Base address of ADC module
sahilmgandhi 18:6a4db94011d3 114 * @return None
sahilmgandhi 18:6a4db94011d3 115 */
sahilmgandhi 18:6a4db94011d3 116 void ADC_DisableHWTrigger(ADC_T *adc)
sahilmgandhi 18:6a4db94011d3 117 {
sahilmgandhi 18:6a4db94011d3 118 ADC->CTL &= ~(ADC_TRIGGER_BY_PWM | ADC_RISING_EDGE_TRIGGER | ADC_CTL_HWTRGEN_Msk);
sahilmgandhi 18:6a4db94011d3 119 return;
sahilmgandhi 18:6a4db94011d3 120 }
sahilmgandhi 18:6a4db94011d3 121
sahilmgandhi 18:6a4db94011d3 122 /**
sahilmgandhi 18:6a4db94011d3 123 * @brief Enable the interrupt(s) selected by u32Mask parameter.
sahilmgandhi 18:6a4db94011d3 124 * @param[in] adc Base address of ADC module
sahilmgandhi 18:6a4db94011d3 125 * @param[in] u32Mask The combination of interrupt status bits listed below. Each bit
sahilmgandhi 18:6a4db94011d3 126 * corresponds to a interrupt status. This parameter decides which
sahilmgandhi 18:6a4db94011d3 127 * interrupts will be enabled.
sahilmgandhi 18:6a4db94011d3 128 * - \ref ADC_ADF_INT
sahilmgandhi 18:6a4db94011d3 129 * - \ref ADC_CMP0_INT
sahilmgandhi 18:6a4db94011d3 130 * - \ref ADC_CMP1_INT
sahilmgandhi 18:6a4db94011d3 131 * @return None
sahilmgandhi 18:6a4db94011d3 132 */
sahilmgandhi 18:6a4db94011d3 133 void ADC_EnableInt(ADC_T *adc, uint32_t u32Mask)
sahilmgandhi 18:6a4db94011d3 134 {
sahilmgandhi 18:6a4db94011d3 135 if(u32Mask & ADC_ADF_INT)
sahilmgandhi 18:6a4db94011d3 136 ADC->CTL |= ADC_CTL_ADCIEN_Msk;
sahilmgandhi 18:6a4db94011d3 137 if(u32Mask & ADC_CMP0_INT)
sahilmgandhi 18:6a4db94011d3 138 ADC->CMP[0] |= ADC_CMP0_ADCMPIE_Msk;
sahilmgandhi 18:6a4db94011d3 139 if(u32Mask & ADC_CMP1_INT)
sahilmgandhi 18:6a4db94011d3 140 ADC->CMP[1] |= ADC_CMP1_ADCMPIE_Msk;
sahilmgandhi 18:6a4db94011d3 141
sahilmgandhi 18:6a4db94011d3 142 return;
sahilmgandhi 18:6a4db94011d3 143 }
sahilmgandhi 18:6a4db94011d3 144
sahilmgandhi 18:6a4db94011d3 145 /**
sahilmgandhi 18:6a4db94011d3 146 * @brief Disable the interrupt(s) selected by u32Mask parameter.
sahilmgandhi 18:6a4db94011d3 147 * @param[in] adc Base address of ADC module
sahilmgandhi 18:6a4db94011d3 148 * @param[in] u32Mask The combination of interrupt status bits listed below. Each bit
sahilmgandhi 18:6a4db94011d3 149 * corresponds to a interrupt status. This parameter decides which
sahilmgandhi 18:6a4db94011d3 150 * interrupts will be disabled.
sahilmgandhi 18:6a4db94011d3 151 * - \ref ADC_ADF_INT
sahilmgandhi 18:6a4db94011d3 152 * - \ref ADC_CMP0_INT
sahilmgandhi 18:6a4db94011d3 153 * - \ref ADC_CMP1_INT
sahilmgandhi 18:6a4db94011d3 154 * @return None
sahilmgandhi 18:6a4db94011d3 155 */
sahilmgandhi 18:6a4db94011d3 156 void ADC_DisableInt(ADC_T *adc, uint32_t u32Mask)
sahilmgandhi 18:6a4db94011d3 157 {
sahilmgandhi 18:6a4db94011d3 158 if(u32Mask & ADC_ADF_INT)
sahilmgandhi 18:6a4db94011d3 159 ADC->CTL &= ~ADC_CTL_ADCIEN_Msk;
sahilmgandhi 18:6a4db94011d3 160 if(u32Mask & ADC_CMP0_INT)
sahilmgandhi 18:6a4db94011d3 161 ADC->CMP[0] &= ~ADC_CMP0_ADCMPIE_Msk;
sahilmgandhi 18:6a4db94011d3 162 if(u32Mask & ADC_CMP1_INT)
sahilmgandhi 18:6a4db94011d3 163 ADC->CMP[1] &= ~ADC_CMP1_ADCMPIE_Msk;
sahilmgandhi 18:6a4db94011d3 164
sahilmgandhi 18:6a4db94011d3 165 return;
sahilmgandhi 18:6a4db94011d3 166 }
sahilmgandhi 18:6a4db94011d3 167
sahilmgandhi 18:6a4db94011d3 168
sahilmgandhi 18:6a4db94011d3 169
sahilmgandhi 18:6a4db94011d3 170 /*@}*/ /* end of group NUC472_442_ADC_EXPORTED_FUNCTIONS */
sahilmgandhi 18:6a4db94011d3 171
sahilmgandhi 18:6a4db94011d3 172 /*@}*/ /* end of group NUC472_442_ADC_Driver */
sahilmgandhi 18:6a4db94011d3 173
sahilmgandhi 18:6a4db94011d3 174 /*@}*/ /* end of group NUC472_442_Device_Driver */
sahilmgandhi 18:6a4db94011d3 175
sahilmgandhi 18:6a4db94011d3 176 /*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/