MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NUVOTON/TARGET_M451/device/StdDriver/m451_uart.h@18:6a4db94011d3, 2017-05-14 (annotated)

Committer:
sahilmgandhi
Date:
Sun May 14 23:18:57 2017 +0000
Revision:
18:6a4db94011d3
Publishing again

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sahilmgandhi 18:6a4db94011d3 1 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 2 * @file uart.h
sahilmgandhi 18:6a4db94011d3 3 * @version V3.00
sahilmgandhi 18:6a4db94011d3 4 * $Revision: 36 $
sahilmgandhi 18:6a4db94011d3 5 * $Date: 15/08/11 10:26a $
sahilmgandhi 18:6a4db94011d3 6 * @brief M451 series UART driver header file
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * @note
sahilmgandhi 18:6a4db94011d3 9 * Copyright (C) 2013~2015 Nuvoton Technology Corp. All rights reserved.
sahilmgandhi 18:6a4db94011d3 10 *****************************************************************************/
sahilmgandhi 18:6a4db94011d3 11 #ifndef __UART_H__
sahilmgandhi 18:6a4db94011d3 12 #define __UART_H__
sahilmgandhi 18:6a4db94011d3 13
sahilmgandhi 18:6a4db94011d3 14
sahilmgandhi 18:6a4db94011d3 15 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 16 extern "C"
sahilmgandhi 18:6a4db94011d3 17 {
sahilmgandhi 18:6a4db94011d3 18 #endif
sahilmgandhi 18:6a4db94011d3 19
sahilmgandhi 18:6a4db94011d3 20
sahilmgandhi 18:6a4db94011d3 21 /** @addtogroup Standard_Driver Standard Driver
sahilmgandhi 18:6a4db94011d3 22 @{
sahilmgandhi 18:6a4db94011d3 23 */
sahilmgandhi 18:6a4db94011d3 24
sahilmgandhi 18:6a4db94011d3 25 /** @addtogroup UART_Driver UART Driver
sahilmgandhi 18:6a4db94011d3 26 @{
sahilmgandhi 18:6a4db94011d3 27 */
sahilmgandhi 18:6a4db94011d3 28
sahilmgandhi 18:6a4db94011d3 29 /** @addtogroup UART_EXPORTED_CONSTANTS UART Exported Constants
sahilmgandhi 18:6a4db94011d3 30 @{
sahilmgandhi 18:6a4db94011d3 31 */
sahilmgandhi 18:6a4db94011d3 32
sahilmgandhi 18:6a4db94011d3 33 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 34 /* UART FIFO size constants definitions */
sahilmgandhi 18:6a4db94011d3 35 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 36
sahilmgandhi 18:6a4db94011d3 37 #define UART0_FIFO_SIZE 16 /*!< UART0 supports separated receive/transmit 16/16 bytes entry FIFO */
sahilmgandhi 18:6a4db94011d3 38 #define UART1_FIFO_SIZE 16 /*!< UART1 supports separated receive/transmit 16/16 bytes entry FIFO */
sahilmgandhi 18:6a4db94011d3 39 #define UART2_FIFO_SIZE 16 /*!< UART2 supports separated receive/transmit 16/16 bytes entry FIFO */
sahilmgandhi 18:6a4db94011d3 40 #define UART3_FIFO_SIZE 16 /*!< UART3 supports separated receive/transmit 16/16 bytes entry FIFO */
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 43 /* UART_FIFO constants definitions */
sahilmgandhi 18:6a4db94011d3 44 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 #define UART_FIFO_RFITL_1BYTE (0x0 << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 1 byte */
sahilmgandhi 18:6a4db94011d3 47 #define UART_FIFO_RFITL_4BYTES (0x1 << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 4 bytes */
sahilmgandhi 18:6a4db94011d3 48 #define UART_FIFO_RFITL_8BYTES (0x2 << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 8 bytes */
sahilmgandhi 18:6a4db94011d3 49 #define UART_FIFO_RFITL_14BYTES (0x3 << UART_FIFO_RFITL_Pos) /*!< UART_FIFO setting to set RX FIFO Trigger Level to 14 bytes */
sahilmgandhi 18:6a4db94011d3 50
sahilmgandhi 18:6a4db94011d3 51 #define UART_FIFO_RTSTRGLV_1BYTE (0x0 << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 1 byte */
sahilmgandhi 18:6a4db94011d3 52 #define UART_FIFO_RTSTRGLV_4BYTES (0x1 << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 4 bytes */
sahilmgandhi 18:6a4db94011d3 53 #define UART_FIFO_RTSTRGLV_8BYTES (0x2 << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 8 bytes */
sahilmgandhi 18:6a4db94011d3 54 #define UART_FIFO_RTSTRGLV_14BYTES (0x3 << UART_FIFO_RTSTRGLV_Pos) /*!< UART_FIFO setting to set RTS Trigger Level to 14 bytes */
sahilmgandhi 18:6a4db94011d3 55
sahilmgandhi 18:6a4db94011d3 56 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 57 /* UART_LINE constants definitions */
sahilmgandhi 18:6a4db94011d3 58 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 59 #define UART_WORD_LEN_5 (0) /*!< UART_LINE setting to set UART word length to 5 bits */
sahilmgandhi 18:6a4db94011d3 60 #define UART_WORD_LEN_6 (1) /*!< UART_LINE setting to set UART word length to 6 bits */
sahilmgandhi 18:6a4db94011d3 61 #define UART_WORD_LEN_7 (2) /*!< UART_LINE setting to set UART word length to 7 bits */
sahilmgandhi 18:6a4db94011d3 62 #define UART_WORD_LEN_8 (3) /*!< UART_LINE setting to set UART word length to 8 bits */
sahilmgandhi 18:6a4db94011d3 63
sahilmgandhi 18:6a4db94011d3 64 #define UART_PARITY_NONE (0x0 << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as no parity */
sahilmgandhi 18:6a4db94011d3 65 #define UART_PARITY_ODD (0x1 << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as odd parity */
sahilmgandhi 18:6a4db94011d3 66 #define UART_PARITY_EVEN (0x3 << UART_LINE_PBE_Pos) /*!< UART_LINE setting to set UART as even parity */
sahilmgandhi 18:6a4db94011d3 67 #define UART_PARITY_MARK (0x5 << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '1' */
sahilmgandhi 18:6a4db94011d3 68 #define UART_PARITY_SPACE (0x7 << UART_LINE_PBE_Pos) /*!< UART_LINE setting to keep parity bit as '0' */
sahilmgandhi 18:6a4db94011d3 69
sahilmgandhi 18:6a4db94011d3 70 #define UART_STOP_BIT_1 (0x0 << UART_LINE_NSB_Pos) /*!< UART_LINE setting for one stop bit */
sahilmgandhi 18:6a4db94011d3 71 #define UART_STOP_BIT_1_5 (0x1 << UART_LINE_NSB_Pos) /*!< UART_LINE setting for 1.5 stop bit when 5-bit word length */
sahilmgandhi 18:6a4db94011d3 72 #define UART_STOP_BIT_2 (0x1 << UART_LINE_NSB_Pos) /*!< UART_LINE setting for two stop bit when 6, 7, 8-bit word length */
sahilmgandhi 18:6a4db94011d3 73
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 76 /* UART RTS ACTIVE LEVEL constants definitions */
sahilmgandhi 18:6a4db94011d3 77 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 78 #define UART_RTS_IS_LOW_LEV_ACTIVE (0x1 << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is Low Level Active */
sahilmgandhi 18:6a4db94011d3 79 #define UART_RTS_IS_HIGH_LEV_ACTIVE (0x0 << UART_MODEM_RTSACTLV_Pos) /*!< Set RTS is High Level Active */
sahilmgandhi 18:6a4db94011d3 80
sahilmgandhi 18:6a4db94011d3 81
sahilmgandhi 18:6a4db94011d3 82 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 83 /* UART_IRDA constants definitions */
sahilmgandhi 18:6a4db94011d3 84 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 85 #define UART_IRDA_TXEN (0x1 << UART_IRDA_TXEN_Pos) /*!< Set IrDA function Tx mode */
sahilmgandhi 18:6a4db94011d3 86 #define UART_IRDA_RXEN (0x0 << UART_IRDA_TXEN_Pos) /*!< Set IrDA function Rx mode */
sahilmgandhi 18:6a4db94011d3 87
sahilmgandhi 18:6a4db94011d3 88
sahilmgandhi 18:6a4db94011d3 89 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 90 /* UART_FUNCSEL constants definitions */
sahilmgandhi 18:6a4db94011d3 91 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 92 #define UART_FUNCSEL_UART (0x0 << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set UART Function (Default) */
sahilmgandhi 18:6a4db94011d3 93 #define UART_FUNCSEL_LIN (0x1 << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set LIN Function */
sahilmgandhi 18:6a4db94011d3 94 #define UART_FUNCSEL_IrDA (0x2 << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set IrDA Function */
sahilmgandhi 18:6a4db94011d3 95 #define UART_FUNCSEL_RS485 (0x3 << UART_FUNCSEL_FUNCSEL_Pos) /*!< UART_FUNCSEL setting to set RS485 Function */
sahilmgandhi 18:6a4db94011d3 96
sahilmgandhi 18:6a4db94011d3 97
sahilmgandhi 18:6a4db94011d3 98 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 99 /* UART_LINCTL constants definitions */
sahilmgandhi 18:6a4db94011d3 100 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 101 #define UART_LINCTL_BRKFL(x) (((x)-1) << UART_LINCTL_BRKFL_Pos) /*!< UART_LINCTL setting to set LIN Break Field Length, x = 10 ~ 15, default value is 12 */
sahilmgandhi 18:6a4db94011d3 102 #define UART_LINCTL_BSL(x) (((x)-1) << UART_LINCTL_BSL_Pos) /*!< UART_LINCTL setting to set LIN Break/Sync Delimiter Length, x = 1 ~ 4 */
sahilmgandhi 18:6a4db94011d3 103 #define UART_LINCTL_HSEL_BREAK (0x0UL << UART_LINCTL_HSEL_Pos) /*!< UART_LINCTL setting to set LIN Header Select to break field */
sahilmgandhi 18:6a4db94011d3 104 #define UART_LINCTL_HSEL_BREAK_SYNC (0x1UL << UART_LINCTL_HSEL_Pos) /*!< UART_LINCTL setting to set LIN Header Select to break field and sync field */
sahilmgandhi 18:6a4db94011d3 105 #define UART_LINCTL_HSEL_BREAK_SYNC_ID (0x2UL << UART_LINCTL_HSEL_Pos) /*!< UART_LINCTL setting to set LIN Header Select to break field, sync field and ID field*/
sahilmgandhi 18:6a4db94011d3 106 #define UART_LINCTL_PID(x) ((x) << UART_LINCTL_PID_Pos) /*!< UART_LINCTL setting to set LIN PID value */
sahilmgandhi 18:6a4db94011d3 107
sahilmgandhi 18:6a4db94011d3 108
sahilmgandhi 18:6a4db94011d3 109 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 110 /* UART BAUDRATE MODE constants definitions */
sahilmgandhi 18:6a4db94011d3 111 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 112 #define UART_BAUD_MODE0 (0) /*!< Set UART Baudrate Mode is Mode0 */
sahilmgandhi 18:6a4db94011d3 113 #define UART_BAUD_MODE2 (UART_BAUD_BAUDM1_Msk | UART_BAUD_BAUDM0_Msk) /*!< Set UART Baudrate Mode is Mode2 */
sahilmgandhi 18:6a4db94011d3 114
sahilmgandhi 18:6a4db94011d3 115
sahilmgandhi 18:6a4db94011d3 116 /*@}*/ /* end of group UART_EXPORTED_CONSTANTS */
sahilmgandhi 18:6a4db94011d3 117
sahilmgandhi 18:6a4db94011d3 118
sahilmgandhi 18:6a4db94011d3 119 /** @addtogroup UART_EXPORTED_FUNCTIONS UART Exported Functions
sahilmgandhi 18:6a4db94011d3 120 @{
sahilmgandhi 18:6a4db94011d3 121 */
sahilmgandhi 18:6a4db94011d3 122
sahilmgandhi 18:6a4db94011d3 123
sahilmgandhi 18:6a4db94011d3 124 /**
sahilmgandhi 18:6a4db94011d3 125 * @brief Calculate UART baudrate mode0 divider
sahilmgandhi 18:6a4db94011d3 126 *
sahilmgandhi 18:6a4db94011d3 127 * @param[in] u32SrcFreq UART clock frequency
sahilmgandhi 18:6a4db94011d3 128 * @param[in] u32BaudRate Baudrate of UART module
sahilmgandhi 18:6a4db94011d3 129 *
sahilmgandhi 18:6a4db94011d3 130 * @return UART baudrate mode0 divider
sahilmgandhi 18:6a4db94011d3 131 *
sahilmgandhi 18:6a4db94011d3 132 * @details This macro calculate UART baudrate mode0 divider.
sahilmgandhi 18:6a4db94011d3 133 */
sahilmgandhi 18:6a4db94011d3 134 #define UART_BAUD_MODE0_DIVIDER(u32SrcFreq, u32BaudRate) ((((u32SrcFreq) + ((u32BaudRate)*8)) / (u32BaudRate) >> 4)-2)
sahilmgandhi 18:6a4db94011d3 135
sahilmgandhi 18:6a4db94011d3 136
sahilmgandhi 18:6a4db94011d3 137 /**
sahilmgandhi 18:6a4db94011d3 138 * @brief Calculate UART baudrate mode2 divider
sahilmgandhi 18:6a4db94011d3 139 *
sahilmgandhi 18:6a4db94011d3 140 * @param[in] u32SrcFreq UART clock frequency
sahilmgandhi 18:6a4db94011d3 141 * @param[in] u32BaudRate Baudrate of UART module
sahilmgandhi 18:6a4db94011d3 142 *
sahilmgandhi 18:6a4db94011d3 143 * @return UART baudrate mode2 divider
sahilmgandhi 18:6a4db94011d3 144 *
sahilmgandhi 18:6a4db94011d3 145 * @details This macro calculate UART baudrate mode2 divider.
sahilmgandhi 18:6a4db94011d3 146 */
sahilmgandhi 18:6a4db94011d3 147 #define UART_BAUD_MODE2_DIVIDER(u32SrcFreq, u32BaudRate) ((((u32SrcFreq) + ((u32BaudRate)/2)) / (u32BaudRate))-2)
sahilmgandhi 18:6a4db94011d3 148
sahilmgandhi 18:6a4db94011d3 149
sahilmgandhi 18:6a4db94011d3 150 /**
sahilmgandhi 18:6a4db94011d3 151 * @brief Write UART data
sahilmgandhi 18:6a4db94011d3 152 *
sahilmgandhi 18:6a4db94011d3 153 * @param[in] uart The pointer of the specified UART module
sahilmgandhi 18:6a4db94011d3 154 * @param[in] u8Data Data byte to transmit.
sahilmgandhi 18:6a4db94011d3 155 *
sahilmgandhi 18:6a4db94011d3 156 * @return None
sahilmgandhi 18:6a4db94011d3 157 *
sahilmgandhi 18:6a4db94011d3 158 * @details This macro write Data to Tx data register.
sahilmgandhi 18:6a4db94011d3 159 */
sahilmgandhi 18:6a4db94011d3 160 #define UART_WRITE(uart, u8Data) ((uart)->DAT = (u8Data))
sahilmgandhi 18:6a4db94011d3 161
sahilmgandhi 18:6a4db94011d3 162
sahilmgandhi 18:6a4db94011d3 163 /**
sahilmgandhi 18:6a4db94011d3 164 * @brief Read UART data
sahilmgandhi 18:6a4db94011d3 165 *
sahilmgandhi 18:6a4db94011d3 166 * @param[in] uart The pointer of the specified UART module
sahilmgandhi 18:6a4db94011d3 167 *
sahilmgandhi 18:6a4db94011d3 168 * @return The oldest data byte in RX FIFO.
sahilmgandhi 18:6a4db94011d3 169 *
sahilmgandhi 18:6a4db94011d3 170 * @details This macro read Rx data register.
sahilmgandhi 18:6a4db94011d3 171 */
sahilmgandhi 18:6a4db94011d3 172 #define UART_READ(uart) ((uart)->DAT)
sahilmgandhi 18:6a4db94011d3 173
sahilmgandhi 18:6a4db94011d3 174
sahilmgandhi 18:6a4db94011d3 175 /**
sahilmgandhi 18:6a4db94011d3 176 * @brief Get Tx empty
sahilmgandhi 18:6a4db94011d3 177 *
sahilmgandhi 18:6a4db94011d3 178 * @param[in] uart The pointer of the specified UART module
sahilmgandhi 18:6a4db94011d3 179 *
sahilmgandhi 18:6a4db94011d3 180 * @retval 0 Tx FIFO is not empty
sahilmgandhi 18:6a4db94011d3 181 * @retval >=1 Tx FIFO is empty
sahilmgandhi 18:6a4db94011d3 182 *
sahilmgandhi 18:6a4db94011d3 183 * @details This macro get Transmitter FIFO empty register value.
sahilmgandhi 18:6a4db94011d3 184 */
sahilmgandhi 18:6a4db94011d3 185 #define UART_GET_TX_EMPTY(uart) ((uart)->FIFOSTS & UART_FIFOSTS_TXEMPTY_Msk)
sahilmgandhi 18:6a4db94011d3 186
sahilmgandhi 18:6a4db94011d3 187
sahilmgandhi 18:6a4db94011d3 188 /**
sahilmgandhi 18:6a4db94011d3 189 * @brief Get Rx empty
sahilmgandhi 18:6a4db94011d3 190 *
sahilmgandhi 18:6a4db94011d3 191 * @param[in] uart The pointer of the specified UART module
sahilmgandhi 18:6a4db94011d3 192 *
sahilmgandhi 18:6a4db94011d3 193 * @retval 0 Rx FIFO is not empty
sahilmgandhi 18:6a4db94011d3 194 * @retval >=1 Rx FIFO is empty
sahilmgandhi 18:6a4db94011d3 195 *
sahilmgandhi 18:6a4db94011d3 196 * @details This macro get Receiver FIFO empty register value.
sahilmgandhi 18:6a4db94011d3 197 */
sahilmgandhi 18:6a4db94011d3 198 #define UART_GET_RX_EMPTY(uart) ((uart)->FIFOSTS & UART_FIFOSTS_RXEMPTY_Msk)
sahilmgandhi 18:6a4db94011d3 199
sahilmgandhi 18:6a4db94011d3 200
sahilmgandhi 18:6a4db94011d3 201 /**
sahilmgandhi 18:6a4db94011d3 202 * @brief Check specified uart port transmission is over.
sahilmgandhi 18:6a4db94011d3 203 *
sahilmgandhi 18:6a4db94011d3 204 * @param[in] uart The pointer of the specified UART module
sahilmgandhi 18:6a4db94011d3 205 *
sahilmgandhi 18:6a4db94011d3 206 * @retval 0 Tx transmission is not over
sahilmgandhi 18:6a4db94011d3 207 * @retval 1 Tx transmission is over
sahilmgandhi 18:6a4db94011d3 208 *
sahilmgandhi 18:6a4db94011d3 209 * @details This macro return Transmitter Empty Flag register bit value.
sahilmgandhi 18:6a4db94011d3 210 * It indicates if specified uart port transmission is over nor not.
sahilmgandhi 18:6a4db94011d3 211 */
sahilmgandhi 18:6a4db94011d3 212 #define UART_IS_TX_EMPTY(uart) (((uart)->FIFOSTS & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos)
sahilmgandhi 18:6a4db94011d3 213
sahilmgandhi 18:6a4db94011d3 214
sahilmgandhi 18:6a4db94011d3 215 /**
sahilmgandhi 18:6a4db94011d3 216 * @brief Wait specified uart port transmission is over
sahilmgandhi 18:6a4db94011d3 217 *
sahilmgandhi 18:6a4db94011d3 218 * @param[in] uart The pointer of the specified UART module
sahilmgandhi 18:6a4db94011d3 219 *
sahilmgandhi 18:6a4db94011d3 220 * @return None
sahilmgandhi 18:6a4db94011d3 221 *
sahilmgandhi 18:6a4db94011d3 222 * @details This macro wait specified uart port transmission is over.
sahilmgandhi 18:6a4db94011d3 223 */
sahilmgandhi 18:6a4db94011d3 224 #define UART_WAIT_TX_EMPTY(uart) while(!((((uart)->FIFOSTS) & UART_FIFOSTS_TXEMPTYF_Msk) >> UART_FIFOSTS_TXEMPTYF_Pos))
sahilmgandhi 18:6a4db94011d3 225
sahilmgandhi 18:6a4db94011d3 226
sahilmgandhi 18:6a4db94011d3 227 /**
sahilmgandhi 18:6a4db94011d3 228 * @brief Check RX is ready or not
sahilmgandhi 18:6a4db94011d3 229 *
sahilmgandhi 18:6a4db94011d3 230 * @param[in] uart The pointer of the specified UART module
sahilmgandhi 18:6a4db94011d3 231 *
sahilmgandhi 18:6a4db94011d3 232 * @retval 0 The number of bytes in the RX FIFO is less than the RFITL
sahilmgandhi 18:6a4db94011d3 233 * @retval 1 The number of bytes in the RX FIFO equals or larger than RFITL
sahilmgandhi 18:6a4db94011d3 234 *
sahilmgandhi 18:6a4db94011d3 235 * @details This macro check receive data available interrupt flag is set or not.
sahilmgandhi 18:6a4db94011d3 236 */
sahilmgandhi 18:6a4db94011d3 237 #define UART_IS_RX_READY(uart) (((uart)->INTSTS & UART_INTSTS_RDAIF_Msk)>>UART_INTSTS_RDAIF_Pos)
sahilmgandhi 18:6a4db94011d3 238
sahilmgandhi 18:6a4db94011d3 239
sahilmgandhi 18:6a4db94011d3 240 /**
sahilmgandhi 18:6a4db94011d3 241 * @brief Check TX FIFO is full or not
sahilmgandhi 18:6a4db94011d3 242 *
sahilmgandhi 18:6a4db94011d3 243 * @param[in] uart The pointer of the specified UART module
sahilmgandhi 18:6a4db94011d3 244 *
sahilmgandhi 18:6a4db94011d3 245 * @retval 1 TX FIFO is full
sahilmgandhi 18:6a4db94011d3 246 * @retval 0 TX FIFO is not full
sahilmgandhi 18:6a4db94011d3 247 *
sahilmgandhi 18:6a4db94011d3 248 * @details This macro check TX FIFO is full or not.
sahilmgandhi 18:6a4db94011d3 249 */
sahilmgandhi 18:6a4db94011d3 250 #define UART_IS_TX_FULL(uart) (((uart)->FIFOSTS & UART_FIFOSTS_TXFULL_Msk)>>UART_FIFOSTS_TXFULL_Pos)
sahilmgandhi 18:6a4db94011d3 251
sahilmgandhi 18:6a4db94011d3 252
sahilmgandhi 18:6a4db94011d3 253 /**
sahilmgandhi 18:6a4db94011d3 254 * @brief Check RX FIFO is full or not
sahilmgandhi 18:6a4db94011d3 255 *
sahilmgandhi 18:6a4db94011d3 256 * @param[in] uart The pointer of the specified UART module
sahilmgandhi 18:6a4db94011d3 257 *
sahilmgandhi 18:6a4db94011d3 258 * @retval 1 RX FIFO is full
sahilmgandhi 18:6a4db94011d3 259 * @retval 0 RX FIFO is not full
sahilmgandhi 18:6a4db94011d3 260 *
sahilmgandhi 18:6a4db94011d3 261 * @details This macro check RX FIFO is full or not.
sahilmgandhi 18:6a4db94011d3 262 */
sahilmgandhi 18:6a4db94011d3 263 #define UART_IS_RX_FULL(uart) (((uart)->FIFOSTS & UART_FIFOSTS_RXFULL_Msk)>>UART_FIFOSTS_RXFULL_Pos)
sahilmgandhi 18:6a4db94011d3 264
sahilmgandhi 18:6a4db94011d3 265
sahilmgandhi 18:6a4db94011d3 266 /**
sahilmgandhi 18:6a4db94011d3 267 * @brief Get Tx full register value
sahilmgandhi 18:6a4db94011d3 268 *
sahilmgandhi 18:6a4db94011d3 269 * @param[in] uart The pointer of the specified UART module
sahilmgandhi 18:6a4db94011d3 270 *
sahilmgandhi 18:6a4db94011d3 271 * @retval 0 Tx FIFO is not full.
sahilmgandhi 18:6a4db94011d3 272 * @retval >=1 Tx FIFO is full.
sahilmgandhi 18:6a4db94011d3 273 *
sahilmgandhi 18:6a4db94011d3 274 * @details This macro get Tx full register value.
sahilmgandhi 18:6a4db94011d3 275 */
sahilmgandhi 18:6a4db94011d3 276 #define UART_GET_TX_FULL(uart) ((uart)->FIFOSTS & UART_FIFOSTS_TXFULL_Msk)
sahilmgandhi 18:6a4db94011d3 277
sahilmgandhi 18:6a4db94011d3 278
sahilmgandhi 18:6a4db94011d3 279 /**
sahilmgandhi 18:6a4db94011d3 280 * @brief Get Rx full register value
sahilmgandhi 18:6a4db94011d3 281 *
sahilmgandhi 18:6a4db94011d3 282 * @param[in] uart The pointer of the specified UART module
sahilmgandhi 18:6a4db94011d3 283 *
sahilmgandhi 18:6a4db94011d3 284 * @retval 0 Rx FIFO is not full.
sahilmgandhi 18:6a4db94011d3 285 * @retval >=1 Rx FIFO is full.
sahilmgandhi 18:6a4db94011d3 286 *
sahilmgandhi 18:6a4db94011d3 287 * @details This macro get Rx full register value.
sahilmgandhi 18:6a4db94011d3 288 */
sahilmgandhi 18:6a4db94011d3 289 #define UART_GET_RX_FULL(uart) ((uart)->FIFOSTS & UART_FIFOSTS_RXFULL_Msk)
sahilmgandhi 18:6a4db94011d3 290
sahilmgandhi 18:6a4db94011d3 291
sahilmgandhi 18:6a4db94011d3 292 /**
sahilmgandhi 18:6a4db94011d3 293 * @brief Enable specified UART interrupt
sahilmgandhi 18:6a4db94011d3 294 *
sahilmgandhi 18:6a4db94011d3 295 * @param[in] uart The pointer of the specified UART module
sahilmgandhi 18:6a4db94011d3 296 * @param[in] u32eIntSel Interrupt type select
sahilmgandhi 18:6a4db94011d3 297 * - \ref UART_INTEN_ABRIEN_Msk : Auto baud rate interrupt
sahilmgandhi 18:6a4db94011d3 298 * - \ref UART_INTEN_WKCTSIEN_Msk : CTS wakeup interrupt
sahilmgandhi 18:6a4db94011d3 299 * - \ref UART_INTEN_WKDATIEN_Msk : Data wakeup interrupt
sahilmgandhi 18:6a4db94011d3 300 * - \ref UART_INTEN_LINIEN_Msk : Lin bus interrupt
sahilmgandhi 18:6a4db94011d3 301 * - \ref UART_INTEN_BUFERRIEN_Msk : Buffer Error interrupt
sahilmgandhi 18:6a4db94011d3 302 * - \ref UART_INTEN_RXTOIEN_Msk : Rx time-out interrupt
sahilmgandhi 18:6a4db94011d3 303 * - \ref UART_INTEN_MODEMIEN_Msk : Modem interrupt
sahilmgandhi 18:6a4db94011d3 304 * - \ref UART_INTEN_RLSIEN_Msk : Rx Line status interrupt
sahilmgandhi 18:6a4db94011d3 305 * - \ref UART_INTEN_THREIEN_Msk : Tx empty interrupt
sahilmgandhi 18:6a4db94011d3 306 * - \ref UART_INTEN_RDAIEN_Msk : Rx ready interrupt
sahilmgandhi 18:6a4db94011d3 307 *
sahilmgandhi 18:6a4db94011d3 308 * @return None
sahilmgandhi 18:6a4db94011d3 309 *
sahilmgandhi 18:6a4db94011d3 310 * @details This macro enable specified UART interrupt.
sahilmgandhi 18:6a4db94011d3 311 */
sahilmgandhi 18:6a4db94011d3 312 #define UART_ENABLE_INT(uart, u32eIntSel) ((uart)->INTEN |= (u32eIntSel))
sahilmgandhi 18:6a4db94011d3 313
sahilmgandhi 18:6a4db94011d3 314
sahilmgandhi 18:6a4db94011d3 315 /**
sahilmgandhi 18:6a4db94011d3 316 * @brief Disable specified UART interrupt
sahilmgandhi 18:6a4db94011d3 317 *
sahilmgandhi 18:6a4db94011d3 318 * @param[in] uart The pointer of the specified UART module
sahilmgandhi 18:6a4db94011d3 319 * @param[in] u32eIntSel Interrupt type select
sahilmgandhi 18:6a4db94011d3 320 * - \ref UART_INTEN_ABRIEN_Msk : Auto baud rate interrupt
sahilmgandhi 18:6a4db94011d3 321 * - \ref UART_INTEN_WKCTSIEN_Msk : CTS wakeup interrupt
sahilmgandhi 18:6a4db94011d3 322 * - \ref UART_INTEN_WKDATIEN_Msk : Data wakeup interrupt
sahilmgandhi 18:6a4db94011d3 323 * - \ref UART_INTEN_LINIEN_Msk : Lin bus interrupt
sahilmgandhi 18:6a4db94011d3 324 * - \ref UART_INTEN_BUFERRIEN_Msk : Buffer Error interrupt
sahilmgandhi 18:6a4db94011d3 325 * - \ref UART_INTEN_RXTOIEN_Msk : Rx time-out interrupt
sahilmgandhi 18:6a4db94011d3 326 * - \ref UART_INTEN_MODEMIEN_Msk : Modem status interrupt
sahilmgandhi 18:6a4db94011d3 327 * - \ref UART_INTEN_RLSIEN_Msk : Receive Line status interrupt
sahilmgandhi 18:6a4db94011d3 328 * - \ref UART_INTEN_THREIEN_Msk : Tx empty interrupt
sahilmgandhi 18:6a4db94011d3 329 * - \ref UART_INTEN_RDAIEN_Msk : Rx ready interrupt
sahilmgandhi 18:6a4db94011d3 330 *
sahilmgandhi 18:6a4db94011d3 331 * @return None
sahilmgandhi 18:6a4db94011d3 332 *
sahilmgandhi 18:6a4db94011d3 333 * @details This macro enable specified UART interrupt.
sahilmgandhi 18:6a4db94011d3 334 */
sahilmgandhi 18:6a4db94011d3 335 #define UART_DISABLE_INT(uart, u32eIntSel) ((uart)->INTEN &= ~ (u32eIntSel))
sahilmgandhi 18:6a4db94011d3 336
sahilmgandhi 18:6a4db94011d3 337
sahilmgandhi 18:6a4db94011d3 338 /**
sahilmgandhi 18:6a4db94011d3 339 * @brief Get specified interrupt flag/status
sahilmgandhi 18:6a4db94011d3 340 *
sahilmgandhi 18:6a4db94011d3 341 * @param[in] uart The pointer of the specified UART module
sahilmgandhi 18:6a4db94011d3 342 * @param[in] u32eIntTypeFlag Interrupt Type Flag, should be
sahilmgandhi 18:6a4db94011d3 343 * - \ref UART_INTSTS_HWBUFEINT_Msk : In DMA Mode, Buffer Error Interrupt Indicator
sahilmgandhi 18:6a4db94011d3 344 * - \ref UART_INTSTS_HWTOINT_Msk : In DMA Mode, Time-out Interrupt Indicator
sahilmgandhi 18:6a4db94011d3 345 * - \ref UART_INTSTS_HWMODINT_Msk : In DMA Mode, MODEM Status Interrupt Indicator
sahilmgandhi 18:6a4db94011d3 346 * - \ref UART_INTSTS_HWRLSINT_Msk : In DMA Mode, Receive Line Status Interrupt Indicator
sahilmgandhi 18:6a4db94011d3 347 * - \ref UART_INTSTS_HWBUFEIF_Msk : In DMA Mode, Buffer Error Interrupt Flag
sahilmgandhi 18:6a4db94011d3 348 * - \ref UART_INTSTS_HWTOIF_Msk : In DMA Mode, Time-out Interrupt Flag
sahilmgandhi 18:6a4db94011d3 349 * - \ref UART_INTSTS_HWMODIF_Msk : In DMA Mode, MODEM Interrupt Flag
sahilmgandhi 18:6a4db94011d3 350 * - \ref UART_INTSTS_HWRLSIF_Msk : In DMA Mode, Receive Line Status Flag
sahilmgandhi 18:6a4db94011d3 351 * - \ref UART_INTSTS_LININT_Msk : LIN Bus Interrupt Indicator
sahilmgandhi 18:6a4db94011d3 352 * - \ref UART_INTSTS_BUFERRINT_Msk : Buffer Error Interrupt Indicator
sahilmgandhi 18:6a4db94011d3 353 * - \ref UART_INTSTS_RXTOINT_Msk : Time-out Interrupt Indicator
sahilmgandhi 18:6a4db94011d3 354 * - \ref UART_INTSTS_MODEMINT_Msk : Modem Status Interrupt Indicator
sahilmgandhi 18:6a4db94011d3 355 * - \ref UART_INTSTS_RLSINT_Msk : Receive Line Status Interrupt Indicator
sahilmgandhi 18:6a4db94011d3 356 * - \ref UART_INTSTS_THREINT_Msk : Transmit Holding Register Empty Interrupt Indicator
sahilmgandhi 18:6a4db94011d3 357 * - \ref UART_INTSTS_RDAINT_Msk : Receive Data Available Interrupt Indicator
sahilmgandhi 18:6a4db94011d3 358 * - \ref UART_INTSTS_LINIF_Msk : LIN Bus Flag
sahilmgandhi 18:6a4db94011d3 359 * - \ref UART_INTSTS_BUFERRIF_Msk : Buffer Error Interrupt Flag
sahilmgandhi 18:6a4db94011d3 360 * - \ref UART_INTSTS_RXTOIF_Msk : Rx Time-out Interrupt Flag
sahilmgandhi 18:6a4db94011d3 361 * - \ref UART_INTSTS_MODEMIF_Msk : Modem Interrupt Flag
sahilmgandhi 18:6a4db94011d3 362 * - \ref UART_INTSTS_RLSIF_Msk : Receive Line Status Interrupt Flag
sahilmgandhi 18:6a4db94011d3 363 * - \ref UART_INTSTS_THREIF_Msk : Tx Empty Interrupt Flag
sahilmgandhi 18:6a4db94011d3 364 * - \ref UART_INTSTS_RDAIF_Msk : Rx Ready Interrupt Flag
sahilmgandhi 18:6a4db94011d3 365 *
sahilmgandhi 18:6a4db94011d3 366 * @retval 0 The specified interrupt is not happened.
sahilmgandhi 18:6a4db94011d3 367 * 1 The specified interrupt is happened.
sahilmgandhi 18:6a4db94011d3 368 *
sahilmgandhi 18:6a4db94011d3 369 * @details This macro get specified interrupt flag or interrupt indicator status.
sahilmgandhi 18:6a4db94011d3 370 */
sahilmgandhi 18:6a4db94011d3 371 #define UART_GET_INT_FLAG(uart,u32eIntTypeFlag) (((uart)->INTSTS & (u32eIntTypeFlag))?1:0)
sahilmgandhi 18:6a4db94011d3 372
sahilmgandhi 18:6a4db94011d3 373
sahilmgandhi 18:6a4db94011d3 374 /**
sahilmgandhi 18:6a4db94011d3 375 * @brief Set RTS pin to low
sahilmgandhi 18:6a4db94011d3 376 *
sahilmgandhi 18:6a4db94011d3 377 * @param[in] uart The pointer of the specified UART module
sahilmgandhi 18:6a4db94011d3 378 *
sahilmgandhi 18:6a4db94011d3 379 * @return None
sahilmgandhi 18:6a4db94011d3 380 *
sahilmgandhi 18:6a4db94011d3 381 * @details This macro set RTS pin to low.
sahilmgandhi 18:6a4db94011d3 382 */
sahilmgandhi 18:6a4db94011d3 383 __STATIC_INLINE void UART_CLEAR_RTS(UART_T* uart)
sahilmgandhi 18:6a4db94011d3 384 {
sahilmgandhi 18:6a4db94011d3 385 uart->MODEM |= UART_MODEM_RTSACTLV_Msk;
sahilmgandhi 18:6a4db94011d3 386 uart->MODEM &= ~UART_MODEM_RTS_Msk;
sahilmgandhi 18:6a4db94011d3 387 }
sahilmgandhi 18:6a4db94011d3 388
sahilmgandhi 18:6a4db94011d3 389
sahilmgandhi 18:6a4db94011d3 390 /**
sahilmgandhi 18:6a4db94011d3 391 * @brief Set RTS pin to high
sahilmgandhi 18:6a4db94011d3 392 *
sahilmgandhi 18:6a4db94011d3 393 * @param[in] uart The pointer of the specified UART module
sahilmgandhi 18:6a4db94011d3 394 *
sahilmgandhi 18:6a4db94011d3 395 * @return None
sahilmgandhi 18:6a4db94011d3 396 *
sahilmgandhi 18:6a4db94011d3 397 * @details This macro set RTS pin to high.
sahilmgandhi 18:6a4db94011d3 398 */
sahilmgandhi 18:6a4db94011d3 399 __STATIC_INLINE void UART_SET_RTS(UART_T* uart)
sahilmgandhi 18:6a4db94011d3 400 {
sahilmgandhi 18:6a4db94011d3 401 uart->MODEM |= UART_MODEM_RTSACTLV_Msk | UART_MODEM_RTS_Msk;
sahilmgandhi 18:6a4db94011d3 402 }
sahilmgandhi 18:6a4db94011d3 403
sahilmgandhi 18:6a4db94011d3 404
sahilmgandhi 18:6a4db94011d3 405 /**
sahilmgandhi 18:6a4db94011d3 406 * @brief Clear RS-485 Address Byte Detection Flag
sahilmgandhi 18:6a4db94011d3 407 *
sahilmgandhi 18:6a4db94011d3 408 * @param[in] uart The pointer of the specified UART module
sahilmgandhi 18:6a4db94011d3 409 *
sahilmgandhi 18:6a4db94011d3 410 * @return None
sahilmgandhi 18:6a4db94011d3 411 *
sahilmgandhi 18:6a4db94011d3 412 * @details This macro clear RS-485 address byte detection flag.
sahilmgandhi 18:6a4db94011d3 413 */
sahilmgandhi 18:6a4db94011d3 414 #define UART_RS485_CLEAR_ADDR_FLAG(uart) ((uart)->FIFOSTS = UART_FIFOSTS_ADDRDETF_Msk)
sahilmgandhi 18:6a4db94011d3 415
sahilmgandhi 18:6a4db94011d3 416
sahilmgandhi 18:6a4db94011d3 417 /**
sahilmgandhi 18:6a4db94011d3 418 * @brief Get RS-485 Address Byte Detection Flag
sahilmgandhi 18:6a4db94011d3 419 *
sahilmgandhi 18:6a4db94011d3 420 * @param[in] uart The pointer of the specified UART module
sahilmgandhi 18:6a4db94011d3 421 *
sahilmgandhi 18:6a4db94011d3 422 * @retval 0 Receiver detects a data that is not an address bit.
sahilmgandhi 18:6a4db94011d3 423 * @retval 1 Receiver detects a data that is an address bit.
sahilmgandhi 18:6a4db94011d3 424 *
sahilmgandhi 18:6a4db94011d3 425 * @details This macro get RS-485 address byte detection flag.
sahilmgandhi 18:6a4db94011d3 426 */
sahilmgandhi 18:6a4db94011d3 427 #define UART_RS485_GET_ADDR_FLAG(uart) (((uart)->FIFOSTS & UART_FIFOSTS_ADDRDETF_Msk) >> UART_FIFOSTS_ADDRDETF_Pos)
sahilmgandhi 18:6a4db94011d3 428
sahilmgandhi 18:6a4db94011d3 429
sahilmgandhi 18:6a4db94011d3 430 void UART_ClearIntFlag(UART_T* uart , uint32_t u32InterruptFlag);
sahilmgandhi 18:6a4db94011d3 431 void UART_Close(UART_T* uart);
sahilmgandhi 18:6a4db94011d3 432 void UART_DisableFlowCtrl(UART_T* uart);
sahilmgandhi 18:6a4db94011d3 433 void UART_DisableInt(UART_T* uart, uint32_t u32InterruptFlag);
sahilmgandhi 18:6a4db94011d3 434 void UART_EnableFlowCtrl(UART_T* uart);
sahilmgandhi 18:6a4db94011d3 435 void UART_EnableInt(UART_T* uart, uint32_t u32InterruptFlag);
sahilmgandhi 18:6a4db94011d3 436 void UART_Open(UART_T* uart, uint32_t u32baudrate);
sahilmgandhi 18:6a4db94011d3 437 uint32_t UART_Read(UART_T* uart, uint8_t *pu8RxBuf, uint32_t u32ReadBytes);
sahilmgandhi 18:6a4db94011d3 438 void UART_SetLine_Config(UART_T* uart, uint32_t u32baudrate, uint32_t u32data_width, uint32_t u32parity, uint32_t u32stop_bits);
sahilmgandhi 18:6a4db94011d3 439 void UART_SetTimeoutCnt(UART_T* uart, uint32_t u32TOC);
sahilmgandhi 18:6a4db94011d3 440 void UART_SelectIrDAMode(UART_T* uart, uint32_t u32Buadrate, uint32_t u32Direction);
sahilmgandhi 18:6a4db94011d3 441 void UART_SelectRS485Mode(UART_T* uart, uint32_t u32Mode, uint32_t u32Addr);
sahilmgandhi 18:6a4db94011d3 442 void UART_SelectLINMode(UART_T* uart, uint32_t u32Mode, uint32_t u32BreakLength);
sahilmgandhi 18:6a4db94011d3 443 uint32_t UART_Write(UART_T* uart, uint8_t *pu8TxBuf, uint32_t u32WriteBytes);
sahilmgandhi 18:6a4db94011d3 444
sahilmgandhi 18:6a4db94011d3 445
sahilmgandhi 18:6a4db94011d3 446
sahilmgandhi 18:6a4db94011d3 447
sahilmgandhi 18:6a4db94011d3 448 /*@}*/ /* end of group UART_EXPORTED_FUNCTIONS */
sahilmgandhi 18:6a4db94011d3 449
sahilmgandhi 18:6a4db94011d3 450 /*@}*/ /* end of group UART_Driver */
sahilmgandhi 18:6a4db94011d3 451
sahilmgandhi 18:6a4db94011d3 452 /*@}*/ /* end of group Standard_Driver */
sahilmgandhi 18:6a4db94011d3 453
sahilmgandhi 18:6a4db94011d3 454 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 455 }
sahilmgandhi 18:6a4db94011d3 456 #endif
sahilmgandhi 18:6a4db94011d3 457
sahilmgandhi 18:6a4db94011d3 458 #endif //__UART_H__
sahilmgandhi 18:6a4db94011d3 459
sahilmgandhi 18:6a4db94011d3 460 /*** (C) COPYRIGHT 2013~2015 Nuvoton Technology Corp. ***/