Mouse code for the MacroRat
mbed-dev/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/drivers/adc/adc.h@18:6a4db94011d3, 2017-05-14 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sun May 14 23:18:57 2017 +0000
- Revision:
- 18:6a4db94011d3
Publishing again
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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sahilmgandhi | 18:6a4db94011d3 | 1 | /** |
sahilmgandhi | 18:6a4db94011d3 | 2 | * \file |
sahilmgandhi | 18:6a4db94011d3 | 3 | * |
sahilmgandhi | 18:6a4db94011d3 | 4 | * \brief SAM Peripheral Analog-to-Digital Converter Driver |
sahilmgandhi | 18:6a4db94011d3 | 5 | * |
sahilmgandhi | 18:6a4db94011d3 | 6 | * Copyright (C) 2012-2015 Atmel Corporation. All rights reserved. |
sahilmgandhi | 18:6a4db94011d3 | 7 | * |
sahilmgandhi | 18:6a4db94011d3 | 8 | * \asf_license_start |
sahilmgandhi | 18:6a4db94011d3 | 9 | * |
sahilmgandhi | 18:6a4db94011d3 | 10 | * \page License |
sahilmgandhi | 18:6a4db94011d3 | 11 | * |
sahilmgandhi | 18:6a4db94011d3 | 12 | * Redistribution and use in source and binary forms, with or without |
sahilmgandhi | 18:6a4db94011d3 | 13 | * modification, are permitted provided that the following conditions are met: |
sahilmgandhi | 18:6a4db94011d3 | 14 | * |
sahilmgandhi | 18:6a4db94011d3 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
sahilmgandhi | 18:6a4db94011d3 | 16 | * this list of conditions and the following disclaimer. |
sahilmgandhi | 18:6a4db94011d3 | 17 | * |
sahilmgandhi | 18:6a4db94011d3 | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
sahilmgandhi | 18:6a4db94011d3 | 19 | * this list of conditions and the following disclaimer in the documentation |
sahilmgandhi | 18:6a4db94011d3 | 20 | * and/or other materials provided with the distribution. |
sahilmgandhi | 18:6a4db94011d3 | 21 | * |
sahilmgandhi | 18:6a4db94011d3 | 22 | * 3. The name of Atmel may not be used to endorse or promote products derived |
sahilmgandhi | 18:6a4db94011d3 | 23 | * from this software without specific prior written permission. |
sahilmgandhi | 18:6a4db94011d3 | 24 | * |
sahilmgandhi | 18:6a4db94011d3 | 25 | * 4. This software may only be redistributed and used in connection with an |
sahilmgandhi | 18:6a4db94011d3 | 26 | * Atmel microcontroller product. |
sahilmgandhi | 18:6a4db94011d3 | 27 | * |
sahilmgandhi | 18:6a4db94011d3 | 28 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED |
sahilmgandhi | 18:6a4db94011d3 | 29 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
sahilmgandhi | 18:6a4db94011d3 | 30 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE |
sahilmgandhi | 18:6a4db94011d3 | 31 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR |
sahilmgandhi | 18:6a4db94011d3 | 32 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
sahilmgandhi | 18:6a4db94011d3 | 33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
sahilmgandhi | 18:6a4db94011d3 | 34 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
sahilmgandhi | 18:6a4db94011d3 | 35 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
sahilmgandhi | 18:6a4db94011d3 | 36 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
sahilmgandhi | 18:6a4db94011d3 | 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
sahilmgandhi | 18:6a4db94011d3 | 38 | * POSSIBILITY OF SUCH DAMAGE. |
sahilmgandhi | 18:6a4db94011d3 | 39 | * |
sahilmgandhi | 18:6a4db94011d3 | 40 | * \asf_license_stop |
sahilmgandhi | 18:6a4db94011d3 | 41 | * |
sahilmgandhi | 18:6a4db94011d3 | 42 | */ |
sahilmgandhi | 18:6a4db94011d3 | 43 | /* |
sahilmgandhi | 18:6a4db94011d3 | 44 | * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a> |
sahilmgandhi | 18:6a4db94011d3 | 45 | */ |
sahilmgandhi | 18:6a4db94011d3 | 46 | |
sahilmgandhi | 18:6a4db94011d3 | 47 | #ifndef ADC_H_INCLUDED |
sahilmgandhi | 18:6a4db94011d3 | 48 | #define ADC_H_INCLUDED |
sahilmgandhi | 18:6a4db94011d3 | 49 | |
sahilmgandhi | 18:6a4db94011d3 | 50 | /** |
sahilmgandhi | 18:6a4db94011d3 | 51 | * \defgroup asfdoc_sam0_adc_group SAM Analog-to-Digital Converter (ADC) Driver |
sahilmgandhi | 18:6a4db94011d3 | 52 | * |
sahilmgandhi | 18:6a4db94011d3 | 53 | * This driver for Atmel® | SMART ARM®-based microcontrollers provides an interface for the configuration |
sahilmgandhi | 18:6a4db94011d3 | 54 | * and management of the device's Analog-to-Digital Converter functionality, for |
sahilmgandhi | 18:6a4db94011d3 | 55 | * the conversion of analog voltages into a corresponding digital form. |
sahilmgandhi | 18:6a4db94011d3 | 56 | * The following driver Application Programming Interface (API) modes are covered by this manual: |
sahilmgandhi | 18:6a4db94011d3 | 57 | * - Polled APIs |
sahilmgandhi | 18:6a4db94011d3 | 58 | * \if ADC_CALLBACK_MODE |
sahilmgandhi | 18:6a4db94011d3 | 59 | * - Callback APIs |
sahilmgandhi | 18:6a4db94011d3 | 60 | * \endif |
sahilmgandhi | 18:6a4db94011d3 | 61 | * |
sahilmgandhi | 18:6a4db94011d3 | 62 | * The following peripheral is used by this module: |
sahilmgandhi | 18:6a4db94011d3 | 63 | * - ADC (Analog-to-Digital Converter) |
sahilmgandhi | 18:6a4db94011d3 | 64 | * |
sahilmgandhi | 18:6a4db94011d3 | 65 | * The following devices can use this module: |
sahilmgandhi | 18:6a4db94011d3 | 66 | * \if DEVICE_SAML21_SUPPORT |
sahilmgandhi | 18:6a4db94011d3 | 67 | * - Atmel | SMART SAM L21 |
sahilmgandhi | 18:6a4db94011d3 | 68 | * - Atmel | SMART SAM C20/C21 |
sahilmgandhi | 18:6a4db94011d3 | 69 | * \else |
sahilmgandhi | 18:6a4db94011d3 | 70 | * - Atmel | SMART SAM D20/D21 |
sahilmgandhi | 18:6a4db94011d3 | 71 | * - Atmel | SMART SAM R21 |
sahilmgandhi | 18:6a4db94011d3 | 72 | * - Atmel | SMART SAM D10/D11 |
sahilmgandhi | 18:6a4db94011d3 | 73 | * - Atmel | SMART SAM DA0/DA1 |
sahilmgandhi | 18:6a4db94011d3 | 74 | * \endif |
sahilmgandhi | 18:6a4db94011d3 | 75 | * |
sahilmgandhi | 18:6a4db94011d3 | 76 | * The outline of this documentation is as follows: |
sahilmgandhi | 18:6a4db94011d3 | 77 | * - \ref asfdoc_sam0_adc_prerequisites |
sahilmgandhi | 18:6a4db94011d3 | 78 | * - \ref asfdoc_sam0_adc_module_overview |
sahilmgandhi | 18:6a4db94011d3 | 79 | * - \ref asfdoc_sam0_adc_special_considerations |
sahilmgandhi | 18:6a4db94011d3 | 80 | * - \ref asfdoc_sam0_adc_extra_info |
sahilmgandhi | 18:6a4db94011d3 | 81 | * - \ref asfdoc_sam0_adc_examples |
sahilmgandhi | 18:6a4db94011d3 | 82 | * - \ref asfdoc_sam0_adc_api_overview |
sahilmgandhi | 18:6a4db94011d3 | 83 | * |
sahilmgandhi | 18:6a4db94011d3 | 84 | * |
sahilmgandhi | 18:6a4db94011d3 | 85 | * \section asfdoc_sam0_adc_prerequisites Prerequisites |
sahilmgandhi | 18:6a4db94011d3 | 86 | * |
sahilmgandhi | 18:6a4db94011d3 | 87 | * There are no prerequisites for this module. |
sahilmgandhi | 18:6a4db94011d3 | 88 | * |
sahilmgandhi | 18:6a4db94011d3 | 89 | * |
sahilmgandhi | 18:6a4db94011d3 | 90 | * \section asfdoc_sam0_adc_module_overview Module Overview |
sahilmgandhi | 18:6a4db94011d3 | 91 | * |
sahilmgandhi | 18:6a4db94011d3 | 92 | * This driver provides an interface for the Analog-to-Digital conversion |
sahilmgandhi | 18:6a4db94011d3 | 93 | * functions on the device, to convert analog voltages to a corresponding |
sahilmgandhi | 18:6a4db94011d3 | 94 | * digital value. The ADC has up to 12-bit resolution, and is capable of |
sahilmgandhi | 18:6a4db94011d3 | 95 | * \if DEVICE_SAML21_SUPPORT |
sahilmgandhi | 18:6a4db94011d3 | 96 | * converting up to 1,000,000 samples per second (MSPS). |
sahilmgandhi | 18:6a4db94011d3 | 97 | * \else |
sahilmgandhi | 18:6a4db94011d3 | 98 | * converting up to 500K samples per second (KSPS). |
sahilmgandhi | 18:6a4db94011d3 | 99 | * \endif |
sahilmgandhi | 18:6a4db94011d3 | 100 | * |
sahilmgandhi | 18:6a4db94011d3 | 101 | * The ADC has a compare function for accurate monitoring of user defined |
sahilmgandhi | 18:6a4db94011d3 | 102 | * thresholds with minimum software intervention required. |
sahilmgandhi | 18:6a4db94011d3 | 103 | * The ADC may be configured for 8-, 10-, or 12-bit result, reducing the |
sahilmgandhi | 18:6a4db94011d3 | 104 | * conversion time. ADC conversion results are provided left or right adjusted |
sahilmgandhi | 18:6a4db94011d3 | 105 | * which eases calculation when the result is represented as a signed integer. |
sahilmgandhi | 18:6a4db94011d3 | 106 | * |
sahilmgandhi | 18:6a4db94011d3 | 107 | * The input selection is flexible, and both single-ended and differential |
sahilmgandhi | 18:6a4db94011d3 | 108 | * measurements can be made. For differential measurements, an optional gain |
sahilmgandhi | 18:6a4db94011d3 | 109 | * stage is available to increase the dynamic range. In addition, several |
sahilmgandhi | 18:6a4db94011d3 | 110 | * internal signal inputs are available. The ADC can provide both signed and |
sahilmgandhi | 18:6a4db94011d3 | 111 | * unsigned results. |
sahilmgandhi | 18:6a4db94011d3 | 112 | * |
sahilmgandhi | 18:6a4db94011d3 | 113 | * The ADC measurements can either be started by application software or an |
sahilmgandhi | 18:6a4db94011d3 | 114 | * incoming event from another peripheral in the device, and both internal and |
sahilmgandhi | 18:6a4db94011d3 | 115 | * external reference voltages can be selected. |
sahilmgandhi | 18:6a4db94011d3 | 116 | * |
sahilmgandhi | 18:6a4db94011d3 | 117 | * \note Internal references will be enabled by the driver, but not disabled. |
sahilmgandhi | 18:6a4db94011d3 | 118 | * Any reference not used by the application should be disabled by the application. |
sahilmgandhi | 18:6a4db94011d3 | 119 | * |
sahilmgandhi | 18:6a4db94011d3 | 120 | * A simplified block diagram of the ADC can be seen in |
sahilmgandhi | 18:6a4db94011d3 | 121 | * \ref asfdoc_sam0_adc_module_block_diagram "the figure below". |
sahilmgandhi | 18:6a4db94011d3 | 122 | * |
sahilmgandhi | 18:6a4db94011d3 | 123 | * \anchor asfdoc_sam0_adc_module_block_diagram |
sahilmgandhi | 18:6a4db94011d3 | 124 | * \dot |
sahilmgandhi | 18:6a4db94011d3 | 125 | * digraph overview { |
sahilmgandhi | 18:6a4db94011d3 | 126 | * splines = false; |
sahilmgandhi | 18:6a4db94011d3 | 127 | * rankdir=LR; |
sahilmgandhi | 18:6a4db94011d3 | 128 | * |
sahilmgandhi | 18:6a4db94011d3 | 129 | * mux1 [label="Positive input", shape=box]; |
sahilmgandhi | 18:6a4db94011d3 | 130 | * mux2 [label="Negative input", shape=box]; |
sahilmgandhi | 18:6a4db94011d3 | 131 | * |
sahilmgandhi | 18:6a4db94011d3 | 132 | * |
sahilmgandhi | 18:6a4db94011d3 | 133 | * mux3 [label="Reference", shape=box]; |
sahilmgandhi | 18:6a4db94011d3 | 134 | * |
sahilmgandhi | 18:6a4db94011d3 | 135 | * adc [label="ADC", shape=polygon, sides=5, orientation=90, distortion=-0.6, style=filled, fillcolor=darkolivegreen1, height=1, width=1]; |
sahilmgandhi | 18:6a4db94011d3 | 136 | * prescaler [label="PRESCALER", shape=box, style=filled, fillcolor=lightblue]; |
sahilmgandhi | 18:6a4db94011d3 | 137 | * |
sahilmgandhi | 18:6a4db94011d3 | 138 | * mux1 -> adc; |
sahilmgandhi | 18:6a4db94011d3 | 139 | * mux2 -> adc; |
sahilmgandhi | 18:6a4db94011d3 | 140 | * mux3 -> adc:sw; |
sahilmgandhi | 18:6a4db94011d3 | 141 | * prescaler -> adc; |
sahilmgandhi | 18:6a4db94011d3 | 142 | * |
sahilmgandhi | 18:6a4db94011d3 | 143 | * postproc [label="Post processing", shape=box]; |
sahilmgandhi | 18:6a4db94011d3 | 144 | * result [label="RESULT", shape=box, style=filled, fillcolor=lightblue]; |
sahilmgandhi | 18:6a4db94011d3 | 145 | * |
sahilmgandhi | 18:6a4db94011d3 | 146 | * adc:e -> postproc:w; |
sahilmgandhi | 18:6a4db94011d3 | 147 | * postproc:e -> result:w; |
sahilmgandhi | 18:6a4db94011d3 | 148 | * |
sahilmgandhi | 18:6a4db94011d3 | 149 | * {rank=same; mux1 mux2} |
sahilmgandhi | 18:6a4db94011d3 | 150 | * {rank=same; prescaler adc} |
sahilmgandhi | 18:6a4db94011d3 | 151 | * |
sahilmgandhi | 18:6a4db94011d3 | 152 | * } |
sahilmgandhi | 18:6a4db94011d3 | 153 | * \enddot |
sahilmgandhi | 18:6a4db94011d3 | 154 | * |
sahilmgandhi | 18:6a4db94011d3 | 155 | * |
sahilmgandhi | 18:6a4db94011d3 | 156 | * \subsection asfdoc_sam0_adc_module_overview_prescaler Sample Clock Prescaler |
sahilmgandhi | 18:6a4db94011d3 | 157 | * The ADC features a prescaler, which enables conversion at lower clock rates |
sahilmgandhi | 18:6a4db94011d3 | 158 | * than the input Generic Clock to the ADC module. This feature can be used to |
sahilmgandhi | 18:6a4db94011d3 | 159 | * lower the synchronization time of the digital interface to the ADC module |
sahilmgandhi | 18:6a4db94011d3 | 160 | * via a high speed Generic Clock frequency, while still allowing the ADC |
sahilmgandhi | 18:6a4db94011d3 | 161 | * sampling rate to be reduced. |
sahilmgandhi | 18:6a4db94011d3 | 162 | * |
sahilmgandhi | 18:6a4db94011d3 | 163 | * \subsection asfdoc_sam0_adc_module_overview_resolution ADC Resolution |
sahilmgandhi | 18:6a4db94011d3 | 164 | * The ADC supports full 8-, 10-, or 12-bit resolution. Hardware |
sahilmgandhi | 18:6a4db94011d3 | 165 | * oversampling and decimation can be used to increase the |
sahilmgandhi | 18:6a4db94011d3 | 166 | * effective resolution at the expense of throughput. Using oversampling and |
sahilmgandhi | 18:6a4db94011d3 | 167 | * decimation mode the ADC resolution is increased from 12-bit to an effective |
sahilmgandhi | 18:6a4db94011d3 | 168 | * 13-, 14-, 15-, or 16-bit. In these modes the conversion rate is reduced, as |
sahilmgandhi | 18:6a4db94011d3 | 169 | * a greater number of samples is used to achieve the increased resolution. The |
sahilmgandhi | 18:6a4db94011d3 | 170 | * available resolutions and effective conversion rate is listed in |
sahilmgandhi | 18:6a4db94011d3 | 171 | * \ref asfdoc_sam0_adc_module_conversion_rate "the table below". |
sahilmgandhi | 18:6a4db94011d3 | 172 | * |
sahilmgandhi | 18:6a4db94011d3 | 173 | * \anchor asfdoc_sam0_adc_module_conversion_rate |
sahilmgandhi | 18:6a4db94011d3 | 174 | * <table> |
sahilmgandhi | 18:6a4db94011d3 | 175 | * <caption>Effective ADC Conversion Speed Using Oversampling</caption> |
sahilmgandhi | 18:6a4db94011d3 | 176 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 177 | * <th>Resolution</th> |
sahilmgandhi | 18:6a4db94011d3 | 178 | * <th>Effective conversion rate</th> |
sahilmgandhi | 18:6a4db94011d3 | 179 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 180 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 181 | * <td>13-bit</td> |
sahilmgandhi | 18:6a4db94011d3 | 182 | * <td>Conversion rate divided by 4</td> |
sahilmgandhi | 18:6a4db94011d3 | 183 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 184 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 185 | * <td>14-bit</td> |
sahilmgandhi | 18:6a4db94011d3 | 186 | * <td>Conversion rate divided by 16</td> |
sahilmgandhi | 18:6a4db94011d3 | 187 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 188 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 189 | * <td>15-bit</td> |
sahilmgandhi | 18:6a4db94011d3 | 190 | * <td>Conversion rate divided by 64</td> |
sahilmgandhi | 18:6a4db94011d3 | 191 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 192 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 193 | * <td>16-bit</td> |
sahilmgandhi | 18:6a4db94011d3 | 194 | * <td>Conversion rate divided by 256</td> |
sahilmgandhi | 18:6a4db94011d3 | 195 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 196 | * </table> |
sahilmgandhi | 18:6a4db94011d3 | 197 | * |
sahilmgandhi | 18:6a4db94011d3 | 198 | * \subsection asfdoc_sam0_adc_module_overview_conversion Conversion Modes |
sahilmgandhi | 18:6a4db94011d3 | 199 | * ADC conversions can be software triggered on demand by the user application, |
sahilmgandhi | 18:6a4db94011d3 | 200 | * if continuous sampling is not required. It is also possible to configure the |
sahilmgandhi | 18:6a4db94011d3 | 201 | * ADC in free running mode, where new conversions are started as soon as the |
sahilmgandhi | 18:6a4db94011d3 | 202 | * previous conversion is completed, or configure the ADC to scan across a |
sahilmgandhi | 18:6a4db94011d3 | 203 | * number of input pins (see \ref asfdoc_sam0_adc_module_overview_pin_scan). |
sahilmgandhi | 18:6a4db94011d3 | 204 | * |
sahilmgandhi | 18:6a4db94011d3 | 205 | * \subsection asfdoc_sam0_adc_module_overview_diff_mode Differential and Single-ended Conversion |
sahilmgandhi | 18:6a4db94011d3 | 206 | * The ADC has two conversion modes; differential and single-ended. When |
sahilmgandhi | 18:6a4db94011d3 | 207 | * measuring signals where the positive input pin is always at a higher voltage |
sahilmgandhi | 18:6a4db94011d3 | 208 | * than the negative input pin, the single-ended conversion mode should be used |
sahilmgandhi | 18:6a4db94011d3 | 209 | * in order to achieve a full 12-bit output resolution. |
sahilmgandhi | 18:6a4db94011d3 | 210 | * |
sahilmgandhi | 18:6a4db94011d3 | 211 | * If however the positive input pin voltage may drop below the negative input |
sahilmgandhi | 18:6a4db94011d3 | 212 | * pin the signed differential mode should be used. |
sahilmgandhi | 18:6a4db94011d3 | 213 | * |
sahilmgandhi | 18:6a4db94011d3 | 214 | * \subsection asfdoc_sam0_adc_module_overview_sample_time Sample Time |
sahilmgandhi | 18:6a4db94011d3 | 215 | * The sample time for each ADC conversion is configurable as a number of half |
sahilmgandhi | 18:6a4db94011d3 | 216 | * prescaled ADC clock cycles (depending on the prescaler value), allowing the |
sahilmgandhi | 18:6a4db94011d3 | 217 | * user application to achieve faster or slower sampling depending on the |
sahilmgandhi | 18:6a4db94011d3 | 218 | * source impedance of the ADC input channels. For applications with high |
sahilmgandhi | 18:6a4db94011d3 | 219 | * impedance inputs the sample time can be increased to give the ADC an adequate |
sahilmgandhi | 18:6a4db94011d3 | 220 | * time to sample and convert the input channel. |
sahilmgandhi | 18:6a4db94011d3 | 221 | * |
sahilmgandhi | 18:6a4db94011d3 | 222 | * The resulting sampling time is given by the following equation: |
sahilmgandhi | 18:6a4db94011d3 | 223 | * \f[ |
sahilmgandhi | 18:6a4db94011d3 | 224 | * t_{SAMPLE} = (sample\_length+1) \times \frac{ADC_{CLK}} {2} |
sahilmgandhi | 18:6a4db94011d3 | 225 | * \f] |
sahilmgandhi | 18:6a4db94011d3 | 226 | * |
sahilmgandhi | 18:6a4db94011d3 | 227 | * \subsection asfdoc_sam0_adc_module_overview_averaging Averaging |
sahilmgandhi | 18:6a4db94011d3 | 228 | * The ADC can be configured to trade conversion speed for accuracy by averaging |
sahilmgandhi | 18:6a4db94011d3 | 229 | * multiple samples in hardware. This feature is suitable when operating in |
sahilmgandhi | 18:6a4db94011d3 | 230 | * noisy conditions. |
sahilmgandhi | 18:6a4db94011d3 | 231 | * |
sahilmgandhi | 18:6a4db94011d3 | 232 | * You can specify any number of samples to accumulate (up to 1024) and the |
sahilmgandhi | 18:6a4db94011d3 | 233 | * divide ratio to use (up to divide by 128). To modify these settings the |
sahilmgandhi | 18:6a4db94011d3 | 234 | * ADC_RESOLUTION_CUSTOM needs to be set as the resolution. When this is set |
sahilmgandhi | 18:6a4db94011d3 | 235 | * the number of samples to accumulate and the division ratio can be set by |
sahilmgandhi | 18:6a4db94011d3 | 236 | * the configuration struct members \ref adc_config.accumulate_samples and |
sahilmgandhi | 18:6a4db94011d3 | 237 | * \ref adc_config.divide_result. When using this mode the ADC result register |
sahilmgandhi | 18:6a4db94011d3 | 238 | * will be set to be 16-bit wide to accommodate the larger result sizes |
sahilmgandhi | 18:6a4db94011d3 | 239 | * produced by the accumulator. |
sahilmgandhi | 18:6a4db94011d3 | 240 | * |
sahilmgandhi | 18:6a4db94011d3 | 241 | * The effective ADC conversion rate will be reduced by a factor of the number |
sahilmgandhi | 18:6a4db94011d3 | 242 | * of accumulated samples; |
sahilmgandhi | 18:6a4db94011d3 | 243 | * however, the effective resolution will be increased according to |
sahilmgandhi | 18:6a4db94011d3 | 244 | * \ref asfdoc_sam0_adc_module_hw_av_resolution "the table below". |
sahilmgandhi | 18:6a4db94011d3 | 245 | * |
sahilmgandhi | 18:6a4db94011d3 | 246 | * \anchor asfdoc_sam0_adc_module_hw_av_resolution |
sahilmgandhi | 18:6a4db94011d3 | 247 | * <table> |
sahilmgandhi | 18:6a4db94011d3 | 248 | * <caption>Effective ADC Resolution From Various Hardware Averaging Modes</caption> |
sahilmgandhi | 18:6a4db94011d3 | 249 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 250 | * <th>Number of samples</tr> |
sahilmgandhi | 18:6a4db94011d3 | 251 | * <th>Final result</tr> |
sahilmgandhi | 18:6a4db94011d3 | 252 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 253 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 254 | * <td>1</td> |
sahilmgandhi | 18:6a4db94011d3 | 255 | * <td>12-bit</td> |
sahilmgandhi | 18:6a4db94011d3 | 256 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 257 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 258 | * <td>2</td> |
sahilmgandhi | 18:6a4db94011d3 | 259 | * <td>13-bit</td> |
sahilmgandhi | 18:6a4db94011d3 | 260 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 261 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 262 | * <td>4</td> |
sahilmgandhi | 18:6a4db94011d3 | 263 | * <td>14-bit</td> |
sahilmgandhi | 18:6a4db94011d3 | 264 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 265 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 266 | * <td>8</td> |
sahilmgandhi | 18:6a4db94011d3 | 267 | * <td>15-bit</td> |
sahilmgandhi | 18:6a4db94011d3 | 268 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 269 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 270 | * <td>16</td> |
sahilmgandhi | 18:6a4db94011d3 | 271 | * <td>16-bit</td> |
sahilmgandhi | 18:6a4db94011d3 | 272 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 273 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 274 | * <td>32</td> |
sahilmgandhi | 18:6a4db94011d3 | 275 | * <td>16-bit</td> |
sahilmgandhi | 18:6a4db94011d3 | 276 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 277 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 278 | * <td>64</td> |
sahilmgandhi | 18:6a4db94011d3 | 279 | * <td>16-bit</td> |
sahilmgandhi | 18:6a4db94011d3 | 280 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 281 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 282 | * <td>128</td> |
sahilmgandhi | 18:6a4db94011d3 | 283 | * <td>16-bit</td> |
sahilmgandhi | 18:6a4db94011d3 | 284 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 285 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 286 | * <td>256</td> |
sahilmgandhi | 18:6a4db94011d3 | 287 | * <td>16-bit</td> |
sahilmgandhi | 18:6a4db94011d3 | 288 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 289 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 290 | * <td>512</td> |
sahilmgandhi | 18:6a4db94011d3 | 291 | * <td>16-bit</td> |
sahilmgandhi | 18:6a4db94011d3 | 292 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 293 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 294 | * <td>1024</td> |
sahilmgandhi | 18:6a4db94011d3 | 295 | * <td>16-bit</td> |
sahilmgandhi | 18:6a4db94011d3 | 296 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 297 | * </table> |
sahilmgandhi | 18:6a4db94011d3 | 298 | * |
sahilmgandhi | 18:6a4db94011d3 | 299 | * |
sahilmgandhi | 18:6a4db94011d3 | 300 | * \subsection asfdoc_sam0_adc_module_overview_offset_corr Offset and Gain Correction |
sahilmgandhi | 18:6a4db94011d3 | 301 | * Inherent gain and offset errors affect the absolute accuracy of the ADC. |
sahilmgandhi | 18:6a4db94011d3 | 302 | * |
sahilmgandhi | 18:6a4db94011d3 | 303 | * The offset error is defined as the deviation of the ADC's actual transfer |
sahilmgandhi | 18:6a4db94011d3 | 304 | * function from ideal straight line at zero input voltage. |
sahilmgandhi | 18:6a4db94011d3 | 305 | * |
sahilmgandhi | 18:6a4db94011d3 | 306 | * The gain error is defined as the deviation of the last output step's |
sahilmgandhi | 18:6a4db94011d3 | 307 | * midpoint from the ideal straight line, after compensating for offset error. |
sahilmgandhi | 18:6a4db94011d3 | 308 | * |
sahilmgandhi | 18:6a4db94011d3 | 309 | * The offset correction value is subtracted from the converted data before the |
sahilmgandhi | 18:6a4db94011d3 | 310 | * result is ready. The gain correction value is multiplied with the offset |
sahilmgandhi | 18:6a4db94011d3 | 311 | * corrected value. |
sahilmgandhi | 18:6a4db94011d3 | 312 | * |
sahilmgandhi | 18:6a4db94011d3 | 313 | * The equation for both offset and gain error compensation is shown below: |
sahilmgandhi | 18:6a4db94011d3 | 314 | * \f[ |
sahilmgandhi | 18:6a4db94011d3 | 315 | * ADC_{RESULT} = (VALUE_{CONV} + CORR_{OFFSET}) \times CORR_{GAIN} |
sahilmgandhi | 18:6a4db94011d3 | 316 | * \f] |
sahilmgandhi | 18:6a4db94011d3 | 317 | * |
sahilmgandhi | 18:6a4db94011d3 | 318 | * When enabled, a given set of offset and gain correction values can be applied |
sahilmgandhi | 18:6a4db94011d3 | 319 | * to the sampled data in hardware, giving a corrected stream of sample data to |
sahilmgandhi | 18:6a4db94011d3 | 320 | * the user application at the cost of an increased sample latency. |
sahilmgandhi | 18:6a4db94011d3 | 321 | * |
sahilmgandhi | 18:6a4db94011d3 | 322 | * In single conversion, a latency of 13 ADC Generic Clock cycles is added for |
sahilmgandhi | 18:6a4db94011d3 | 323 | * the final sample result availability. As the correction time is always less |
sahilmgandhi | 18:6a4db94011d3 | 324 | * than the propagation delay, in free running mode this latency appears only |
sahilmgandhi | 18:6a4db94011d3 | 325 | * during the first conversion. After the first conversion is complete, future |
sahilmgandhi | 18:6a4db94011d3 | 326 | * conversion results are available at the defined sampling rate. |
sahilmgandhi | 18:6a4db94011d3 | 327 | * |
sahilmgandhi | 18:6a4db94011d3 | 328 | * \subsection asfdoc_sam0_adc_module_overview_pin_scan Pin Scan |
sahilmgandhi | 18:6a4db94011d3 | 329 | * In pin scan mode, the first ADC conversion will begin from the configured |
sahilmgandhi | 18:6a4db94011d3 | 330 | * positive channel, plus the requested starting offset. When the first |
sahilmgandhi | 18:6a4db94011d3 | 331 | * conversion is completed, the next conversion will start at the next positive |
sahilmgandhi | 18:6a4db94011d3 | 332 | * input channel and so on, until all requested pins to scan have been sampled |
sahilmgandhi | 18:6a4db94011d3 | 333 | * and converted. |
sahilmgandhi | 18:6a4db94011d3 | 334 | * SAM L21 has automatic sequences feature instead of pin scan mode. In automatic |
sahilmgandhi | 18:6a4db94011d3 | 335 | * sequence mode, all of 32 positives inputs can be included in a sequence. The |
sahilmgandhi | 18:6a4db94011d3 | 336 | * sequence starts from the lowest input, and go to the next enabled input |
sahilmgandhi | 18:6a4db94011d3 | 337 | * automatically. |
sahilmgandhi | 18:6a4db94011d3 | 338 | * |
sahilmgandhi | 18:6a4db94011d3 | 339 | * Pin scanning gives a simple mechanism to sample a large number of physical |
sahilmgandhi | 18:6a4db94011d3 | 340 | * input channel samples, using a single physical ADC channel. |
sahilmgandhi | 18:6a4db94011d3 | 341 | * |
sahilmgandhi | 18:6a4db94011d3 | 342 | * \subsection asfdoc_sam0_adc_module_overview_window_monitor Window Monitor |
sahilmgandhi | 18:6a4db94011d3 | 343 | * The ADC module window monitor function can be used to automatically compare |
sahilmgandhi | 18:6a4db94011d3 | 344 | * the conversion result against a preconfigured pair of upper and lower |
sahilmgandhi | 18:6a4db94011d3 | 345 | * threshold values. |
sahilmgandhi | 18:6a4db94011d3 | 346 | * |
sahilmgandhi | 18:6a4db94011d3 | 347 | * The threshold values are evaluated differently, depending on whether |
sahilmgandhi | 18:6a4db94011d3 | 348 | * differential or single-ended mode is selected. In differential mode, the |
sahilmgandhi | 18:6a4db94011d3 | 349 | * upper and lower thresholds are evaluated as signed values for the comparison, |
sahilmgandhi | 18:6a4db94011d3 | 350 | * while in single-ended mode the comparisons are made as a set of unsigned |
sahilmgandhi | 18:6a4db94011d3 | 351 | * values. |
sahilmgandhi | 18:6a4db94011d3 | 352 | * |
sahilmgandhi | 18:6a4db94011d3 | 353 | * The significant bits of the lower window monitor threshold and upper window |
sahilmgandhi | 18:6a4db94011d3 | 354 | * monitor threshold values are user-configurable, and follow the overall ADC |
sahilmgandhi | 18:6a4db94011d3 | 355 | * sampling bit precision set when the ADC is configured by the user application. |
sahilmgandhi | 18:6a4db94011d3 | 356 | * For example, only the eight lower bits of the window threshold values will be |
sahilmgandhi | 18:6a4db94011d3 | 357 | * compared to the sampled data whilst the ADC is configured in 8-bit mode. |
sahilmgandhi | 18:6a4db94011d3 | 358 | * In addition, if using differential mode, the 8<SUP>th</SUP> bit will be considered as |
sahilmgandhi | 18:6a4db94011d3 | 359 | * the sign bit even if bit 9 is zero. |
sahilmgandhi | 18:6a4db94011d3 | 360 | * |
sahilmgandhi | 18:6a4db94011d3 | 361 | * \subsection asfdoc_sam0_adc_module_overview_events Events |
sahilmgandhi | 18:6a4db94011d3 | 362 | * Event generation and event actions are configurable in the ADC. |
sahilmgandhi | 18:6a4db94011d3 | 363 | * |
sahilmgandhi | 18:6a4db94011d3 | 364 | * The ADC has two actions that can be triggered upon event reception: |
sahilmgandhi | 18:6a4db94011d3 | 365 | * \li Start conversion |
sahilmgandhi | 18:6a4db94011d3 | 366 | * \li Flush pipeline and start conversion |
sahilmgandhi | 18:6a4db94011d3 | 367 | * |
sahilmgandhi | 18:6a4db94011d3 | 368 | * The ADC can generate two events: |
sahilmgandhi | 18:6a4db94011d3 | 369 | * \li Window monitor |
sahilmgandhi | 18:6a4db94011d3 | 370 | * \li Result ready |
sahilmgandhi | 18:6a4db94011d3 | 371 | * |
sahilmgandhi | 18:6a4db94011d3 | 372 | * If the event actions are enabled in the configuration, any incoming event |
sahilmgandhi | 18:6a4db94011d3 | 373 | * will trigger the action. |
sahilmgandhi | 18:6a4db94011d3 | 374 | * |
sahilmgandhi | 18:6a4db94011d3 | 375 | * If the window monitor event is enabled, an event will be generated |
sahilmgandhi | 18:6a4db94011d3 | 376 | * when the configured window condition is detected. |
sahilmgandhi | 18:6a4db94011d3 | 377 | * |
sahilmgandhi | 18:6a4db94011d3 | 378 | * If the result ready event is enabled, an event will be generated when a |
sahilmgandhi | 18:6a4db94011d3 | 379 | * conversion is completed. |
sahilmgandhi | 18:6a4db94011d3 | 380 | * |
sahilmgandhi | 18:6a4db94011d3 | 381 | * \note The connection of events between modules requires the use of the |
sahilmgandhi | 18:6a4db94011d3 | 382 | * \ref asfdoc_sam0_events_group "SAM Event System Driver (EVENTS)" |
sahilmgandhi | 18:6a4db94011d3 | 383 | * to route output event of one module to the the input event of another. |
sahilmgandhi | 18:6a4db94011d3 | 384 | * For more information on event routing, refer to the event driver |
sahilmgandhi | 18:6a4db94011d3 | 385 | * documentation. |
sahilmgandhi | 18:6a4db94011d3 | 386 | * |
sahilmgandhi | 18:6a4db94011d3 | 387 | * |
sahilmgandhi | 18:6a4db94011d3 | 388 | * \section asfdoc_sam0_adc_special_considerations Special Considerations |
sahilmgandhi | 18:6a4db94011d3 | 389 | * |
sahilmgandhi | 18:6a4db94011d3 | 390 | * An integrated analog temperature sensor is available for use with the ADC. |
sahilmgandhi | 18:6a4db94011d3 | 391 | * The bandgap voltage, as well as the scaled I/O and core voltages can also be |
sahilmgandhi | 18:6a4db94011d3 | 392 | * measured by the ADC. For internal ADC inputs, the internal source(s) may need |
sahilmgandhi | 18:6a4db94011d3 | 393 | * to be manually enabled by the user application before they can be measured. |
sahilmgandhi | 18:6a4db94011d3 | 394 | * |
sahilmgandhi | 18:6a4db94011d3 | 395 | * |
sahilmgandhi | 18:6a4db94011d3 | 396 | * \section asfdoc_sam0_adc_extra_info Extra Information |
sahilmgandhi | 18:6a4db94011d3 | 397 | * |
sahilmgandhi | 18:6a4db94011d3 | 398 | * For extra information, see \ref asfdoc_sam0_adc_extra. This includes: |
sahilmgandhi | 18:6a4db94011d3 | 399 | * - \ref asfdoc_sam0_adc_extra_acronyms |
sahilmgandhi | 18:6a4db94011d3 | 400 | * - \ref asfdoc_sam0_adc_extra_dependencies |
sahilmgandhi | 18:6a4db94011d3 | 401 | * - \ref asfdoc_sam0_adc_extra_errata |
sahilmgandhi | 18:6a4db94011d3 | 402 | * - \ref asfdoc_sam0_adc_extra_history |
sahilmgandhi | 18:6a4db94011d3 | 403 | * |
sahilmgandhi | 18:6a4db94011d3 | 404 | * |
sahilmgandhi | 18:6a4db94011d3 | 405 | * \section asfdoc_sam0_adc_examples Examples |
sahilmgandhi | 18:6a4db94011d3 | 406 | * |
sahilmgandhi | 18:6a4db94011d3 | 407 | * For a list of examples related to this driver, see |
sahilmgandhi | 18:6a4db94011d3 | 408 | * \ref asfdoc_sam0_adc_exqsg. |
sahilmgandhi | 18:6a4db94011d3 | 409 | * |
sahilmgandhi | 18:6a4db94011d3 | 410 | * |
sahilmgandhi | 18:6a4db94011d3 | 411 | * \section asfdoc_sam0_adc_api_overview API Overview |
sahilmgandhi | 18:6a4db94011d3 | 412 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 413 | */ |
sahilmgandhi | 18:6a4db94011d3 | 414 | |
sahilmgandhi | 18:6a4db94011d3 | 415 | #ifdef __cplusplus |
sahilmgandhi | 18:6a4db94011d3 | 416 | extern "C" { |
sahilmgandhi | 18:6a4db94011d3 | 417 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 418 | |
sahilmgandhi | 18:6a4db94011d3 | 419 | #include <compiler.h> |
sahilmgandhi | 18:6a4db94011d3 | 420 | #include <system.h> |
sahilmgandhi | 18:6a4db94011d3 | 421 | #include <adc_feature.h> |
sahilmgandhi | 18:6a4db94011d3 | 422 | |
sahilmgandhi | 18:6a4db94011d3 | 423 | /** |
sahilmgandhi | 18:6a4db94011d3 | 424 | * \name Module Status Flags |
sahilmgandhi | 18:6a4db94011d3 | 425 | * |
sahilmgandhi | 18:6a4db94011d3 | 426 | * ADC status flags, returned by \ref adc_get_status() and cleared by |
sahilmgandhi | 18:6a4db94011d3 | 427 | * \ref adc_clear_status(). |
sahilmgandhi | 18:6a4db94011d3 | 428 | * |
sahilmgandhi | 18:6a4db94011d3 | 429 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 430 | */ |
sahilmgandhi | 18:6a4db94011d3 | 431 | |
sahilmgandhi | 18:6a4db94011d3 | 432 | /** ADC result ready. */ |
sahilmgandhi | 18:6a4db94011d3 | 433 | #define ADC_STATUS_RESULT_READY (1UL << 0) |
sahilmgandhi | 18:6a4db94011d3 | 434 | /** Window monitor match. */ |
sahilmgandhi | 18:6a4db94011d3 | 435 | #define ADC_STATUS_WINDOW (1UL << 1) |
sahilmgandhi | 18:6a4db94011d3 | 436 | /** ADC result overwritten before read. */ |
sahilmgandhi | 18:6a4db94011d3 | 437 | #define ADC_STATUS_OVERRUN (1UL << 2) |
sahilmgandhi | 18:6a4db94011d3 | 438 | |
sahilmgandhi | 18:6a4db94011d3 | 439 | /** @} */ |
sahilmgandhi | 18:6a4db94011d3 | 440 | |
sahilmgandhi | 18:6a4db94011d3 | 441 | #if ADC_CALLBACK_MODE == true |
sahilmgandhi | 18:6a4db94011d3 | 442 | # if (ADC_INST_NUM > 1) |
sahilmgandhi | 18:6a4db94011d3 | 443 | # define _ADC_INTERRUPT_VECT_NUM(n, unused) \ |
sahilmgandhi | 18:6a4db94011d3 | 444 | SYSTEM_INTERRUPT_MODULE_ADC##n, |
sahilmgandhi | 18:6a4db94011d3 | 445 | /** |
sahilmgandhi | 18:6a4db94011d3 | 446 | * \internal Get the interrupt vector for the given device instance |
sahilmgandhi | 18:6a4db94011d3 | 447 | * |
sahilmgandhi | 18:6a4db94011d3 | 448 | * \param[in] The ADC module instance number |
sahilmgandhi | 18:6a4db94011d3 | 449 | * |
sahilmgandhi | 18:6a4db94011d3 | 450 | * \return Interrupt vector for of the given ADC module instance. |
sahilmgandhi | 18:6a4db94011d3 | 451 | */ |
sahilmgandhi | 18:6a4db94011d3 | 452 | static enum system_interrupt_vector _adc_interrupt_get_interrupt_vector( |
sahilmgandhi | 18:6a4db94011d3 | 453 | uint32_t inst_num) |
sahilmgandhi | 18:6a4db94011d3 | 454 | { |
sahilmgandhi | 18:6a4db94011d3 | 455 | static uint8_t adc_interrupt_vectors[ADC_INST_NUM] = { |
sahilmgandhi | 18:6a4db94011d3 | 456 | MREPEAT(ADC_INST_NUM, _ADC_INTERRUPT_VECT_NUM, 0) |
sahilmgandhi | 18:6a4db94011d3 | 457 | }; |
sahilmgandhi | 18:6a4db94011d3 | 458 | |
sahilmgandhi | 18:6a4db94011d3 | 459 | return (enum system_interrupt_vector)adc_interrupt_vectors[inst_num]; |
sahilmgandhi | 18:6a4db94011d3 | 460 | } |
sahilmgandhi | 18:6a4db94011d3 | 461 | # endif |
sahilmgandhi | 18:6a4db94011d3 | 462 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 463 | |
sahilmgandhi | 18:6a4db94011d3 | 464 | #if !defined(__DOXYGEN__) |
sahilmgandhi | 18:6a4db94011d3 | 465 | uint8_t _adc_get_inst_index( |
sahilmgandhi | 18:6a4db94011d3 | 466 | Adc *const hw); |
sahilmgandhi | 18:6a4db94011d3 | 467 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 468 | |
sahilmgandhi | 18:6a4db94011d3 | 469 | /** |
sahilmgandhi | 18:6a4db94011d3 | 470 | * \name Driver Initialization and Configuration |
sahilmgandhi | 18:6a4db94011d3 | 471 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 472 | */ |
sahilmgandhi | 18:6a4db94011d3 | 473 | enum status_code adc_init( |
sahilmgandhi | 18:6a4db94011d3 | 474 | struct adc_module *const module_inst, |
sahilmgandhi | 18:6a4db94011d3 | 475 | Adc *hw, |
sahilmgandhi | 18:6a4db94011d3 | 476 | struct adc_config *config); |
sahilmgandhi | 18:6a4db94011d3 | 477 | |
sahilmgandhi | 18:6a4db94011d3 | 478 | void adc_get_config_defaults( |
sahilmgandhi | 18:6a4db94011d3 | 479 | struct adc_config *const config); |
sahilmgandhi | 18:6a4db94011d3 | 480 | |
sahilmgandhi | 18:6a4db94011d3 | 481 | #if (SAMD) || (SAMR21) |
sahilmgandhi | 18:6a4db94011d3 | 482 | void adc_regular_ain_channel( |
sahilmgandhi | 18:6a4db94011d3 | 483 | uint32_t *pin_array, uint8_t size); |
sahilmgandhi | 18:6a4db94011d3 | 484 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 485 | |
sahilmgandhi | 18:6a4db94011d3 | 486 | /** @} */ |
sahilmgandhi | 18:6a4db94011d3 | 487 | |
sahilmgandhi | 18:6a4db94011d3 | 488 | /** |
sahilmgandhi | 18:6a4db94011d3 | 489 | * \name Status Management |
sahilmgandhi | 18:6a4db94011d3 | 490 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 491 | */ |
sahilmgandhi | 18:6a4db94011d3 | 492 | |
sahilmgandhi | 18:6a4db94011d3 | 493 | /** |
sahilmgandhi | 18:6a4db94011d3 | 494 | * \brief Retrieves the current module status. |
sahilmgandhi | 18:6a4db94011d3 | 495 | * |
sahilmgandhi | 18:6a4db94011d3 | 496 | * Retrieves the status of the module, giving overall state information. |
sahilmgandhi | 18:6a4db94011d3 | 497 | * |
sahilmgandhi | 18:6a4db94011d3 | 498 | * \param[in] module_inst Pointer to the ADC software instance struct |
sahilmgandhi | 18:6a4db94011d3 | 499 | * |
sahilmgandhi | 18:6a4db94011d3 | 500 | * \return Bitmask of \c ADC_STATUS_* flags. |
sahilmgandhi | 18:6a4db94011d3 | 501 | * |
sahilmgandhi | 18:6a4db94011d3 | 502 | * \retval ADC_STATUS_RESULT_READY ADC result is ready to be read |
sahilmgandhi | 18:6a4db94011d3 | 503 | * \retval ADC_STATUS_WINDOW ADC has detected a value inside the set |
sahilmgandhi | 18:6a4db94011d3 | 504 | * window range |
sahilmgandhi | 18:6a4db94011d3 | 505 | * \retval ADC_STATUS_OVERRUN ADC result has overrun |
sahilmgandhi | 18:6a4db94011d3 | 506 | */ |
sahilmgandhi | 18:6a4db94011d3 | 507 | static inline uint32_t adc_get_status( |
sahilmgandhi | 18:6a4db94011d3 | 508 | struct adc_module *const module_inst) |
sahilmgandhi | 18:6a4db94011d3 | 509 | { |
sahilmgandhi | 18:6a4db94011d3 | 510 | /* Sanity check arguments */ |
sahilmgandhi | 18:6a4db94011d3 | 511 | Assert(module_inst); |
sahilmgandhi | 18:6a4db94011d3 | 512 | Assert(module_inst->hw); |
sahilmgandhi | 18:6a4db94011d3 | 513 | |
sahilmgandhi | 18:6a4db94011d3 | 514 | Adc *const adc_module = module_inst->hw; |
sahilmgandhi | 18:6a4db94011d3 | 515 | |
sahilmgandhi | 18:6a4db94011d3 | 516 | uint32_t int_flags = adc_module->INTFLAG.reg; |
sahilmgandhi | 18:6a4db94011d3 | 517 | |
sahilmgandhi | 18:6a4db94011d3 | 518 | uint32_t status_flags = 0; |
sahilmgandhi | 18:6a4db94011d3 | 519 | |
sahilmgandhi | 18:6a4db94011d3 | 520 | /* Check for ADC Result Ready */ |
sahilmgandhi | 18:6a4db94011d3 | 521 | if (int_flags & ADC_INTFLAG_RESRDY) { |
sahilmgandhi | 18:6a4db94011d3 | 522 | status_flags |= ADC_STATUS_RESULT_READY; |
sahilmgandhi | 18:6a4db94011d3 | 523 | } |
sahilmgandhi | 18:6a4db94011d3 | 524 | |
sahilmgandhi | 18:6a4db94011d3 | 525 | /* Check for ADC Window Match */ |
sahilmgandhi | 18:6a4db94011d3 | 526 | if (int_flags & ADC_INTFLAG_WINMON) { |
sahilmgandhi | 18:6a4db94011d3 | 527 | status_flags |= ADC_STATUS_WINDOW; |
sahilmgandhi | 18:6a4db94011d3 | 528 | } |
sahilmgandhi | 18:6a4db94011d3 | 529 | |
sahilmgandhi | 18:6a4db94011d3 | 530 | /* Check for ADC Overrun */ |
sahilmgandhi | 18:6a4db94011d3 | 531 | if (int_flags & ADC_INTFLAG_OVERRUN) { |
sahilmgandhi | 18:6a4db94011d3 | 532 | status_flags |= ADC_STATUS_OVERRUN; |
sahilmgandhi | 18:6a4db94011d3 | 533 | } |
sahilmgandhi | 18:6a4db94011d3 | 534 | |
sahilmgandhi | 18:6a4db94011d3 | 535 | return status_flags; |
sahilmgandhi | 18:6a4db94011d3 | 536 | } |
sahilmgandhi | 18:6a4db94011d3 | 537 | |
sahilmgandhi | 18:6a4db94011d3 | 538 | /** |
sahilmgandhi | 18:6a4db94011d3 | 539 | * \brief Clears a module status flag. |
sahilmgandhi | 18:6a4db94011d3 | 540 | * |
sahilmgandhi | 18:6a4db94011d3 | 541 | * Clears the given status flag of the module. |
sahilmgandhi | 18:6a4db94011d3 | 542 | * |
sahilmgandhi | 18:6a4db94011d3 | 543 | * \param[in] module_inst Pointer to the ADC software instance struct |
sahilmgandhi | 18:6a4db94011d3 | 544 | * \param[in] status_flags Bitmask of \c ADC_STATUS_* flags to clear |
sahilmgandhi | 18:6a4db94011d3 | 545 | */ |
sahilmgandhi | 18:6a4db94011d3 | 546 | static inline void adc_clear_status( |
sahilmgandhi | 18:6a4db94011d3 | 547 | struct adc_module *const module_inst, |
sahilmgandhi | 18:6a4db94011d3 | 548 | const uint32_t status_flags) |
sahilmgandhi | 18:6a4db94011d3 | 549 | { |
sahilmgandhi | 18:6a4db94011d3 | 550 | /* Sanity check arguments */ |
sahilmgandhi | 18:6a4db94011d3 | 551 | Assert(module_inst); |
sahilmgandhi | 18:6a4db94011d3 | 552 | Assert(module_inst->hw); |
sahilmgandhi | 18:6a4db94011d3 | 553 | |
sahilmgandhi | 18:6a4db94011d3 | 554 | Adc *const adc_module = module_inst->hw; |
sahilmgandhi | 18:6a4db94011d3 | 555 | |
sahilmgandhi | 18:6a4db94011d3 | 556 | uint32_t int_flags = 0; |
sahilmgandhi | 18:6a4db94011d3 | 557 | |
sahilmgandhi | 18:6a4db94011d3 | 558 | /* Check for ADC Result Ready */ |
sahilmgandhi | 18:6a4db94011d3 | 559 | if (status_flags & ADC_STATUS_RESULT_READY) { |
sahilmgandhi | 18:6a4db94011d3 | 560 | int_flags |= ADC_INTFLAG_RESRDY; |
sahilmgandhi | 18:6a4db94011d3 | 561 | } |
sahilmgandhi | 18:6a4db94011d3 | 562 | |
sahilmgandhi | 18:6a4db94011d3 | 563 | /* Check for ADC Window Match */ |
sahilmgandhi | 18:6a4db94011d3 | 564 | if (status_flags & ADC_STATUS_WINDOW) { |
sahilmgandhi | 18:6a4db94011d3 | 565 | int_flags |= ADC_INTFLAG_WINMON; |
sahilmgandhi | 18:6a4db94011d3 | 566 | } |
sahilmgandhi | 18:6a4db94011d3 | 567 | |
sahilmgandhi | 18:6a4db94011d3 | 568 | /* Check for ADC Overrun */ |
sahilmgandhi | 18:6a4db94011d3 | 569 | if (status_flags & ADC_STATUS_OVERRUN) { |
sahilmgandhi | 18:6a4db94011d3 | 570 | int_flags |= ADC_INTFLAG_OVERRUN; |
sahilmgandhi | 18:6a4db94011d3 | 571 | } |
sahilmgandhi | 18:6a4db94011d3 | 572 | |
sahilmgandhi | 18:6a4db94011d3 | 573 | /* Clear interrupt flag */ |
sahilmgandhi | 18:6a4db94011d3 | 574 | adc_module->INTFLAG.reg = int_flags; |
sahilmgandhi | 18:6a4db94011d3 | 575 | } |
sahilmgandhi | 18:6a4db94011d3 | 576 | /** @} */ |
sahilmgandhi | 18:6a4db94011d3 | 577 | |
sahilmgandhi | 18:6a4db94011d3 | 578 | /** |
sahilmgandhi | 18:6a4db94011d3 | 579 | * \name Enable, Disable, and Reset ADC Module, Start Conversion and Read Result |
sahilmgandhi | 18:6a4db94011d3 | 580 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 581 | */ |
sahilmgandhi | 18:6a4db94011d3 | 582 | |
sahilmgandhi | 18:6a4db94011d3 | 583 | /** |
sahilmgandhi | 18:6a4db94011d3 | 584 | * \brief Enables the ADC module. |
sahilmgandhi | 18:6a4db94011d3 | 585 | * |
sahilmgandhi | 18:6a4db94011d3 | 586 | * Enables an ADC module that has previously been configured. If any internal reference |
sahilmgandhi | 18:6a4db94011d3 | 587 | * is selected it will be enabled. |
sahilmgandhi | 18:6a4db94011d3 | 588 | * |
sahilmgandhi | 18:6a4db94011d3 | 589 | * \param[in] module_inst Pointer to the ADC software instance struct |
sahilmgandhi | 18:6a4db94011d3 | 590 | */ |
sahilmgandhi | 18:6a4db94011d3 | 591 | static inline enum status_code adc_enable( |
sahilmgandhi | 18:6a4db94011d3 | 592 | struct adc_module *const module_inst) |
sahilmgandhi | 18:6a4db94011d3 | 593 | { |
sahilmgandhi | 18:6a4db94011d3 | 594 | Assert(module_inst); |
sahilmgandhi | 18:6a4db94011d3 | 595 | Assert(module_inst->hw); |
sahilmgandhi | 18:6a4db94011d3 | 596 | |
sahilmgandhi | 18:6a4db94011d3 | 597 | Adc *const adc_module = module_inst->hw; |
sahilmgandhi | 18:6a4db94011d3 | 598 | |
sahilmgandhi | 18:6a4db94011d3 | 599 | while (adc_is_syncing(module_inst)) { |
sahilmgandhi | 18:6a4db94011d3 | 600 | /* Wait for synchronization */ |
sahilmgandhi | 18:6a4db94011d3 | 601 | } |
sahilmgandhi | 18:6a4db94011d3 | 602 | |
sahilmgandhi | 18:6a4db94011d3 | 603 | #if ADC_CALLBACK_MODE == true |
sahilmgandhi | 18:6a4db94011d3 | 604 | # if (ADC_INST_NUM > 1) |
sahilmgandhi | 18:6a4db94011d3 | 605 | system_interrupt_enable(_adc_interrupt_get_interrupt_vector( |
sahilmgandhi | 18:6a4db94011d3 | 606 | _adc_get_inst_index(adc_module))); |
sahilmgandhi | 18:6a4db94011d3 | 607 | # elif (SAMC20) |
sahilmgandhi | 18:6a4db94011d3 | 608 | system_interrupt_enable(SYSTEM_INTERRUPT_MODULE_ADC0); |
sahilmgandhi | 18:6a4db94011d3 | 609 | # else |
sahilmgandhi | 18:6a4db94011d3 | 610 | system_interrupt_enable(SYSTEM_INTERRUPT_MODULE_ADC); |
sahilmgandhi | 18:6a4db94011d3 | 611 | # endif |
sahilmgandhi | 18:6a4db94011d3 | 612 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 613 | |
sahilmgandhi | 18:6a4db94011d3 | 614 | adc_module->CTRLA.reg |= ADC_CTRLA_ENABLE; |
sahilmgandhi | 18:6a4db94011d3 | 615 | |
sahilmgandhi | 18:6a4db94011d3 | 616 | while (adc_is_syncing(module_inst)) { |
sahilmgandhi | 18:6a4db94011d3 | 617 | /* Wait for synchronization */ |
sahilmgandhi | 18:6a4db94011d3 | 618 | } |
sahilmgandhi | 18:6a4db94011d3 | 619 | return STATUS_OK; |
sahilmgandhi | 18:6a4db94011d3 | 620 | } |
sahilmgandhi | 18:6a4db94011d3 | 621 | |
sahilmgandhi | 18:6a4db94011d3 | 622 | /** |
sahilmgandhi | 18:6a4db94011d3 | 623 | * \brief Disables the ADC module. |
sahilmgandhi | 18:6a4db94011d3 | 624 | * |
sahilmgandhi | 18:6a4db94011d3 | 625 | * Disables an ADC module that was previously enabled. |
sahilmgandhi | 18:6a4db94011d3 | 626 | * |
sahilmgandhi | 18:6a4db94011d3 | 627 | * \param[in] module_inst Pointer to the ADC software instance struct |
sahilmgandhi | 18:6a4db94011d3 | 628 | */ |
sahilmgandhi | 18:6a4db94011d3 | 629 | static inline enum status_code adc_disable( |
sahilmgandhi | 18:6a4db94011d3 | 630 | struct adc_module *const module_inst) |
sahilmgandhi | 18:6a4db94011d3 | 631 | { |
sahilmgandhi | 18:6a4db94011d3 | 632 | Assert(module_inst); |
sahilmgandhi | 18:6a4db94011d3 | 633 | Assert(module_inst->hw); |
sahilmgandhi | 18:6a4db94011d3 | 634 | |
sahilmgandhi | 18:6a4db94011d3 | 635 | Adc *const adc_module = module_inst->hw; |
sahilmgandhi | 18:6a4db94011d3 | 636 | |
sahilmgandhi | 18:6a4db94011d3 | 637 | #if ADC_CALLBACK_MODE == true |
sahilmgandhi | 18:6a4db94011d3 | 638 | # if (ADC_INST_NUM > 1) |
sahilmgandhi | 18:6a4db94011d3 | 639 | system_interrupt_disable(_adc_interrupt_get_interrupt_vector( |
sahilmgandhi | 18:6a4db94011d3 | 640 | _adc_get_inst_index(adc_module))); |
sahilmgandhi | 18:6a4db94011d3 | 641 | # elif (SAMC20) |
sahilmgandhi | 18:6a4db94011d3 | 642 | system_interrupt_disable(SYSTEM_INTERRUPT_MODULE_ADC0); |
sahilmgandhi | 18:6a4db94011d3 | 643 | # else |
sahilmgandhi | 18:6a4db94011d3 | 644 | system_interrupt_disable(SYSTEM_INTERRUPT_MODULE_ADC); |
sahilmgandhi | 18:6a4db94011d3 | 645 | # endif |
sahilmgandhi | 18:6a4db94011d3 | 646 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 647 | |
sahilmgandhi | 18:6a4db94011d3 | 648 | while (adc_is_syncing(module_inst)) { |
sahilmgandhi | 18:6a4db94011d3 | 649 | /* Wait for synchronization */ |
sahilmgandhi | 18:6a4db94011d3 | 650 | } |
sahilmgandhi | 18:6a4db94011d3 | 651 | |
sahilmgandhi | 18:6a4db94011d3 | 652 | adc_module->CTRLA.reg &= ~ADC_CTRLA_ENABLE; |
sahilmgandhi | 18:6a4db94011d3 | 653 | |
sahilmgandhi | 18:6a4db94011d3 | 654 | while (adc_is_syncing(module_inst)) { |
sahilmgandhi | 18:6a4db94011d3 | 655 | /* Wait for synchronization */ |
sahilmgandhi | 18:6a4db94011d3 | 656 | } |
sahilmgandhi | 18:6a4db94011d3 | 657 | return STATUS_OK; |
sahilmgandhi | 18:6a4db94011d3 | 658 | } |
sahilmgandhi | 18:6a4db94011d3 | 659 | |
sahilmgandhi | 18:6a4db94011d3 | 660 | /** |
sahilmgandhi | 18:6a4db94011d3 | 661 | * \brief Resets the ADC module. |
sahilmgandhi | 18:6a4db94011d3 | 662 | * |
sahilmgandhi | 18:6a4db94011d3 | 663 | * Resets an ADC module, clearing all module state and registers to their |
sahilmgandhi | 18:6a4db94011d3 | 664 | * default values. |
sahilmgandhi | 18:6a4db94011d3 | 665 | * |
sahilmgandhi | 18:6a4db94011d3 | 666 | * \param[in] module_inst Pointer to the ADC software instance struct |
sahilmgandhi | 18:6a4db94011d3 | 667 | */ |
sahilmgandhi | 18:6a4db94011d3 | 668 | static inline enum status_code adc_reset( |
sahilmgandhi | 18:6a4db94011d3 | 669 | struct adc_module *const module_inst) |
sahilmgandhi | 18:6a4db94011d3 | 670 | { |
sahilmgandhi | 18:6a4db94011d3 | 671 | /* Sanity check arguments */ |
sahilmgandhi | 18:6a4db94011d3 | 672 | Assert(module_inst); |
sahilmgandhi | 18:6a4db94011d3 | 673 | Assert(module_inst->hw); |
sahilmgandhi | 18:6a4db94011d3 | 674 | |
sahilmgandhi | 18:6a4db94011d3 | 675 | Adc *const adc_module = module_inst->hw; |
sahilmgandhi | 18:6a4db94011d3 | 676 | |
sahilmgandhi | 18:6a4db94011d3 | 677 | /* Disable to make sure the pipeline is flushed before reset */ |
sahilmgandhi | 18:6a4db94011d3 | 678 | adc_disable(module_inst); |
sahilmgandhi | 18:6a4db94011d3 | 679 | |
sahilmgandhi | 18:6a4db94011d3 | 680 | /* Software reset the module */ |
sahilmgandhi | 18:6a4db94011d3 | 681 | adc_module->CTRLA.reg |= ADC_CTRLA_SWRST; |
sahilmgandhi | 18:6a4db94011d3 | 682 | |
sahilmgandhi | 18:6a4db94011d3 | 683 | while (adc_is_syncing(module_inst)) { |
sahilmgandhi | 18:6a4db94011d3 | 684 | /* Wait for synchronization */ |
sahilmgandhi | 18:6a4db94011d3 | 685 | } |
sahilmgandhi | 18:6a4db94011d3 | 686 | return STATUS_OK; |
sahilmgandhi | 18:6a4db94011d3 | 687 | } |
sahilmgandhi | 18:6a4db94011d3 | 688 | |
sahilmgandhi | 18:6a4db94011d3 | 689 | |
sahilmgandhi | 18:6a4db94011d3 | 690 | /** |
sahilmgandhi | 18:6a4db94011d3 | 691 | * \brief Enables an ADC event input or output. |
sahilmgandhi | 18:6a4db94011d3 | 692 | * |
sahilmgandhi | 18:6a4db94011d3 | 693 | * Enables one or more input or output events to or from the ADC module. See |
sahilmgandhi | 18:6a4db94011d3 | 694 | * \ref adc_events "Struct adc_events" for a list of events this module supports. |
sahilmgandhi | 18:6a4db94011d3 | 695 | * |
sahilmgandhi | 18:6a4db94011d3 | 696 | * \note Events cannot be altered while the module is enabled. |
sahilmgandhi | 18:6a4db94011d3 | 697 | * |
sahilmgandhi | 18:6a4db94011d3 | 698 | * \param[in] module_inst Software instance for the ADC peripheral |
sahilmgandhi | 18:6a4db94011d3 | 699 | * \param[in] events Struct containing flags of events to enable |
sahilmgandhi | 18:6a4db94011d3 | 700 | */ |
sahilmgandhi | 18:6a4db94011d3 | 701 | static inline void adc_enable_events( |
sahilmgandhi | 18:6a4db94011d3 | 702 | struct adc_module *const module_inst, |
sahilmgandhi | 18:6a4db94011d3 | 703 | struct adc_events *const events) |
sahilmgandhi | 18:6a4db94011d3 | 704 | { |
sahilmgandhi | 18:6a4db94011d3 | 705 | /* Sanity check arguments */ |
sahilmgandhi | 18:6a4db94011d3 | 706 | Assert(module_inst); |
sahilmgandhi | 18:6a4db94011d3 | 707 | Assert(module_inst->hw); |
sahilmgandhi | 18:6a4db94011d3 | 708 | Assert(events); |
sahilmgandhi | 18:6a4db94011d3 | 709 | |
sahilmgandhi | 18:6a4db94011d3 | 710 | Adc *const adc_module = module_inst->hw; |
sahilmgandhi | 18:6a4db94011d3 | 711 | |
sahilmgandhi | 18:6a4db94011d3 | 712 | uint32_t event_mask = 0; |
sahilmgandhi | 18:6a4db94011d3 | 713 | |
sahilmgandhi | 18:6a4db94011d3 | 714 | /* Configure Window Monitor event */ |
sahilmgandhi | 18:6a4db94011d3 | 715 | if (events->generate_event_on_window_monitor) { |
sahilmgandhi | 18:6a4db94011d3 | 716 | event_mask |= ADC_EVCTRL_WINMONEO; |
sahilmgandhi | 18:6a4db94011d3 | 717 | } |
sahilmgandhi | 18:6a4db94011d3 | 718 | |
sahilmgandhi | 18:6a4db94011d3 | 719 | /* Configure Result Ready event */ |
sahilmgandhi | 18:6a4db94011d3 | 720 | if (events->generate_event_on_conversion_done) { |
sahilmgandhi | 18:6a4db94011d3 | 721 | event_mask |= ADC_EVCTRL_RESRDYEO; |
sahilmgandhi | 18:6a4db94011d3 | 722 | } |
sahilmgandhi | 18:6a4db94011d3 | 723 | |
sahilmgandhi | 18:6a4db94011d3 | 724 | adc_module->EVCTRL.reg |= event_mask; |
sahilmgandhi | 18:6a4db94011d3 | 725 | } |
sahilmgandhi | 18:6a4db94011d3 | 726 | |
sahilmgandhi | 18:6a4db94011d3 | 727 | /** |
sahilmgandhi | 18:6a4db94011d3 | 728 | * \brief Disables an ADC event input or output. |
sahilmgandhi | 18:6a4db94011d3 | 729 | * |
sahilmgandhi | 18:6a4db94011d3 | 730 | * Disables one or more input or output events to or from the ADC module. See |
sahilmgandhi | 18:6a4db94011d3 | 731 | * \ref adc_events "Struct adc_events" for a list of events this module supports. |
sahilmgandhi | 18:6a4db94011d3 | 732 | * |
sahilmgandhi | 18:6a4db94011d3 | 733 | * \note Events cannot be altered while the module is enabled. |
sahilmgandhi | 18:6a4db94011d3 | 734 | * |
sahilmgandhi | 18:6a4db94011d3 | 735 | * \param[in] module_inst Software instance for the ADC peripheral |
sahilmgandhi | 18:6a4db94011d3 | 736 | * \param[in] events Struct containing flags of events to disable |
sahilmgandhi | 18:6a4db94011d3 | 737 | */ |
sahilmgandhi | 18:6a4db94011d3 | 738 | static inline void adc_disable_events( |
sahilmgandhi | 18:6a4db94011d3 | 739 | struct adc_module *const module_inst, |
sahilmgandhi | 18:6a4db94011d3 | 740 | struct adc_events *const events) |
sahilmgandhi | 18:6a4db94011d3 | 741 | { |
sahilmgandhi | 18:6a4db94011d3 | 742 | /* Sanity check arguments */ |
sahilmgandhi | 18:6a4db94011d3 | 743 | Assert(module_inst); |
sahilmgandhi | 18:6a4db94011d3 | 744 | Assert(module_inst->hw); |
sahilmgandhi | 18:6a4db94011d3 | 745 | Assert(events); |
sahilmgandhi | 18:6a4db94011d3 | 746 | |
sahilmgandhi | 18:6a4db94011d3 | 747 | Adc *const adc_module = module_inst->hw; |
sahilmgandhi | 18:6a4db94011d3 | 748 | |
sahilmgandhi | 18:6a4db94011d3 | 749 | uint32_t event_mask = 0; |
sahilmgandhi | 18:6a4db94011d3 | 750 | |
sahilmgandhi | 18:6a4db94011d3 | 751 | /* Configure Window Monitor event */ |
sahilmgandhi | 18:6a4db94011d3 | 752 | if (events->generate_event_on_window_monitor) { |
sahilmgandhi | 18:6a4db94011d3 | 753 | event_mask |= ADC_EVCTRL_WINMONEO; |
sahilmgandhi | 18:6a4db94011d3 | 754 | } |
sahilmgandhi | 18:6a4db94011d3 | 755 | |
sahilmgandhi | 18:6a4db94011d3 | 756 | /* Configure Result Ready event */ |
sahilmgandhi | 18:6a4db94011d3 | 757 | if (events->generate_event_on_conversion_done) { |
sahilmgandhi | 18:6a4db94011d3 | 758 | event_mask |= ADC_EVCTRL_RESRDYEO; |
sahilmgandhi | 18:6a4db94011d3 | 759 | } |
sahilmgandhi | 18:6a4db94011d3 | 760 | |
sahilmgandhi | 18:6a4db94011d3 | 761 | adc_module->EVCTRL.reg &= ~event_mask; |
sahilmgandhi | 18:6a4db94011d3 | 762 | } |
sahilmgandhi | 18:6a4db94011d3 | 763 | |
sahilmgandhi | 18:6a4db94011d3 | 764 | /** |
sahilmgandhi | 18:6a4db94011d3 | 765 | * \brief Starts an ADC conversion. |
sahilmgandhi | 18:6a4db94011d3 | 766 | * |
sahilmgandhi | 18:6a4db94011d3 | 767 | * Starts a new ADC conversion. |
sahilmgandhi | 18:6a4db94011d3 | 768 | * |
sahilmgandhi | 18:6a4db94011d3 | 769 | * \param[in] module_inst Pointer to the ADC software instance struct |
sahilmgandhi | 18:6a4db94011d3 | 770 | */ |
sahilmgandhi | 18:6a4db94011d3 | 771 | static inline void adc_start_conversion( |
sahilmgandhi | 18:6a4db94011d3 | 772 | struct adc_module *const module_inst) |
sahilmgandhi | 18:6a4db94011d3 | 773 | { |
sahilmgandhi | 18:6a4db94011d3 | 774 | Assert(module_inst); |
sahilmgandhi | 18:6a4db94011d3 | 775 | Assert(module_inst->hw); |
sahilmgandhi | 18:6a4db94011d3 | 776 | |
sahilmgandhi | 18:6a4db94011d3 | 777 | Adc *const adc_module = module_inst->hw; |
sahilmgandhi | 18:6a4db94011d3 | 778 | |
sahilmgandhi | 18:6a4db94011d3 | 779 | while (adc_is_syncing(module_inst)) { |
sahilmgandhi | 18:6a4db94011d3 | 780 | /* Wait for synchronization */ |
sahilmgandhi | 18:6a4db94011d3 | 781 | } |
sahilmgandhi | 18:6a4db94011d3 | 782 | |
sahilmgandhi | 18:6a4db94011d3 | 783 | adc_module->SWTRIG.reg |= ADC_SWTRIG_START; |
sahilmgandhi | 18:6a4db94011d3 | 784 | |
sahilmgandhi | 18:6a4db94011d3 | 785 | while (adc_is_syncing(module_inst)) { |
sahilmgandhi | 18:6a4db94011d3 | 786 | /* Wait for synchronization */ |
sahilmgandhi | 18:6a4db94011d3 | 787 | } |
sahilmgandhi | 18:6a4db94011d3 | 788 | } |
sahilmgandhi | 18:6a4db94011d3 | 789 | |
sahilmgandhi | 18:6a4db94011d3 | 790 | /** |
sahilmgandhi | 18:6a4db94011d3 | 791 | * \brief Reads the ADC result. |
sahilmgandhi | 18:6a4db94011d3 | 792 | * |
sahilmgandhi | 18:6a4db94011d3 | 793 | * Reads the result from an ADC conversion that was previously started. |
sahilmgandhi | 18:6a4db94011d3 | 794 | * |
sahilmgandhi | 18:6a4db94011d3 | 795 | * \param[in] module_inst Pointer to the ADC software instance struct |
sahilmgandhi | 18:6a4db94011d3 | 796 | * \param[out] result Pointer to store the result value in |
sahilmgandhi | 18:6a4db94011d3 | 797 | * |
sahilmgandhi | 18:6a4db94011d3 | 798 | * \return Status of the ADC read request. |
sahilmgandhi | 18:6a4db94011d3 | 799 | * \retval STATUS_OK The result was retrieved successfully |
sahilmgandhi | 18:6a4db94011d3 | 800 | * \retval STATUS_BUSY A conversion result was not ready |
sahilmgandhi | 18:6a4db94011d3 | 801 | * \retval STATUS_ERR_OVERFLOW The result register has been overwritten by the |
sahilmgandhi | 18:6a4db94011d3 | 802 | * ADC module before the result was read by the software |
sahilmgandhi | 18:6a4db94011d3 | 803 | */ |
sahilmgandhi | 18:6a4db94011d3 | 804 | static inline enum status_code adc_read( |
sahilmgandhi | 18:6a4db94011d3 | 805 | struct adc_module *const module_inst, |
sahilmgandhi | 18:6a4db94011d3 | 806 | uint16_t *result) |
sahilmgandhi | 18:6a4db94011d3 | 807 | { |
sahilmgandhi | 18:6a4db94011d3 | 808 | Assert(module_inst); |
sahilmgandhi | 18:6a4db94011d3 | 809 | Assert(module_inst->hw); |
sahilmgandhi | 18:6a4db94011d3 | 810 | Assert(result); |
sahilmgandhi | 18:6a4db94011d3 | 811 | |
sahilmgandhi | 18:6a4db94011d3 | 812 | if (!(adc_get_status(module_inst) & ADC_STATUS_RESULT_READY)) { |
sahilmgandhi | 18:6a4db94011d3 | 813 | /* Result not ready */ |
sahilmgandhi | 18:6a4db94011d3 | 814 | return STATUS_BUSY; |
sahilmgandhi | 18:6a4db94011d3 | 815 | } |
sahilmgandhi | 18:6a4db94011d3 | 816 | |
sahilmgandhi | 18:6a4db94011d3 | 817 | Adc *const adc_module = module_inst->hw; |
sahilmgandhi | 18:6a4db94011d3 | 818 | |
sahilmgandhi | 18:6a4db94011d3 | 819 | #if (SAMD) || (SAMR21) |
sahilmgandhi | 18:6a4db94011d3 | 820 | while (adc_is_syncing(module_inst)) { |
sahilmgandhi | 18:6a4db94011d3 | 821 | /* Wait for synchronization */ |
sahilmgandhi | 18:6a4db94011d3 | 822 | } |
sahilmgandhi | 18:6a4db94011d3 | 823 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 824 | |
sahilmgandhi | 18:6a4db94011d3 | 825 | /* Get ADC result */ |
sahilmgandhi | 18:6a4db94011d3 | 826 | *result = adc_module->RESULT.reg; |
sahilmgandhi | 18:6a4db94011d3 | 827 | |
sahilmgandhi | 18:6a4db94011d3 | 828 | /* Reset ready flag */ |
sahilmgandhi | 18:6a4db94011d3 | 829 | adc_clear_status(module_inst, ADC_STATUS_RESULT_READY); |
sahilmgandhi | 18:6a4db94011d3 | 830 | |
sahilmgandhi | 18:6a4db94011d3 | 831 | if (adc_get_status(module_inst) & ADC_STATUS_OVERRUN) { |
sahilmgandhi | 18:6a4db94011d3 | 832 | adc_clear_status(module_inst, ADC_STATUS_OVERRUN); |
sahilmgandhi | 18:6a4db94011d3 | 833 | return STATUS_ERR_OVERFLOW; |
sahilmgandhi | 18:6a4db94011d3 | 834 | } |
sahilmgandhi | 18:6a4db94011d3 | 835 | |
sahilmgandhi | 18:6a4db94011d3 | 836 | return STATUS_OK; |
sahilmgandhi | 18:6a4db94011d3 | 837 | } |
sahilmgandhi | 18:6a4db94011d3 | 838 | |
sahilmgandhi | 18:6a4db94011d3 | 839 | /** @} */ |
sahilmgandhi | 18:6a4db94011d3 | 840 | |
sahilmgandhi | 18:6a4db94011d3 | 841 | /** |
sahilmgandhi | 18:6a4db94011d3 | 842 | * \name Runtime Changes of ADC Module |
sahilmgandhi | 18:6a4db94011d3 | 843 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 844 | */ |
sahilmgandhi | 18:6a4db94011d3 | 845 | |
sahilmgandhi | 18:6a4db94011d3 | 846 | /** |
sahilmgandhi | 18:6a4db94011d3 | 847 | * \brief Flushes the ADC pipeline. |
sahilmgandhi | 18:6a4db94011d3 | 848 | * |
sahilmgandhi | 18:6a4db94011d3 | 849 | * Flushes the pipeline and restarts the ADC clock on the next peripheral clock |
sahilmgandhi | 18:6a4db94011d3 | 850 | * edge. All conversions in progress will be lost. When flush is complete, the |
sahilmgandhi | 18:6a4db94011d3 | 851 | * module will resume where it left off. |
sahilmgandhi | 18:6a4db94011d3 | 852 | * |
sahilmgandhi | 18:6a4db94011d3 | 853 | * \param[in] module_inst Pointer to the ADC software instance struct |
sahilmgandhi | 18:6a4db94011d3 | 854 | */ |
sahilmgandhi | 18:6a4db94011d3 | 855 | static inline void adc_flush( |
sahilmgandhi | 18:6a4db94011d3 | 856 | struct adc_module *const module_inst) |
sahilmgandhi | 18:6a4db94011d3 | 857 | { |
sahilmgandhi | 18:6a4db94011d3 | 858 | Assert(module_inst); |
sahilmgandhi | 18:6a4db94011d3 | 859 | Assert(module_inst->hw); |
sahilmgandhi | 18:6a4db94011d3 | 860 | |
sahilmgandhi | 18:6a4db94011d3 | 861 | Adc *const adc_module = module_inst->hw; |
sahilmgandhi | 18:6a4db94011d3 | 862 | |
sahilmgandhi | 18:6a4db94011d3 | 863 | while (adc_is_syncing(module_inst)) { |
sahilmgandhi | 18:6a4db94011d3 | 864 | /* Wait for synchronization */ |
sahilmgandhi | 18:6a4db94011d3 | 865 | } |
sahilmgandhi | 18:6a4db94011d3 | 866 | |
sahilmgandhi | 18:6a4db94011d3 | 867 | adc_module->SWTRIG.reg |= ADC_SWTRIG_FLUSH; |
sahilmgandhi | 18:6a4db94011d3 | 868 | |
sahilmgandhi | 18:6a4db94011d3 | 869 | while (adc_is_syncing(module_inst)) { |
sahilmgandhi | 18:6a4db94011d3 | 870 | /* Wait for synchronization */ |
sahilmgandhi | 18:6a4db94011d3 | 871 | } |
sahilmgandhi | 18:6a4db94011d3 | 872 | } |
sahilmgandhi | 18:6a4db94011d3 | 873 | void adc_set_window_mode( |
sahilmgandhi | 18:6a4db94011d3 | 874 | struct adc_module *const module_inst, |
sahilmgandhi | 18:6a4db94011d3 | 875 | const enum adc_window_mode window_mode, |
sahilmgandhi | 18:6a4db94011d3 | 876 | const int16_t window_lower_value, |
sahilmgandhi | 18:6a4db94011d3 | 877 | const int16_t window_upper_value); |
sahilmgandhi | 18:6a4db94011d3 | 878 | |
sahilmgandhi | 18:6a4db94011d3 | 879 | /** |
sahilmgandhi | 18:6a4db94011d3 | 880 | * \brief Sets positive ADC input pin. |
sahilmgandhi | 18:6a4db94011d3 | 881 | * |
sahilmgandhi | 18:6a4db94011d3 | 882 | * Sets the positive ADC input pin selection. |
sahilmgandhi | 18:6a4db94011d3 | 883 | * |
sahilmgandhi | 18:6a4db94011d3 | 884 | * \param[in] module_inst Pointer to the ADC software instance struct |
sahilmgandhi | 18:6a4db94011d3 | 885 | * \param[in] positive_input Positive input pin |
sahilmgandhi | 18:6a4db94011d3 | 886 | */ |
sahilmgandhi | 18:6a4db94011d3 | 887 | static inline void adc_set_positive_input( |
sahilmgandhi | 18:6a4db94011d3 | 888 | struct adc_module *const module_inst, |
sahilmgandhi | 18:6a4db94011d3 | 889 | const enum adc_positive_input positive_input) |
sahilmgandhi | 18:6a4db94011d3 | 890 | { |
sahilmgandhi | 18:6a4db94011d3 | 891 | /* Sanity check arguments */ |
sahilmgandhi | 18:6a4db94011d3 | 892 | Assert(module_inst); |
sahilmgandhi | 18:6a4db94011d3 | 893 | Assert(module_inst->hw); |
sahilmgandhi | 18:6a4db94011d3 | 894 | |
sahilmgandhi | 18:6a4db94011d3 | 895 | Adc *const adc_module = module_inst->hw; |
sahilmgandhi | 18:6a4db94011d3 | 896 | |
sahilmgandhi | 18:6a4db94011d3 | 897 | while (adc_is_syncing(module_inst)) { |
sahilmgandhi | 18:6a4db94011d3 | 898 | /* Wait for synchronization */ |
sahilmgandhi | 18:6a4db94011d3 | 899 | } |
sahilmgandhi | 18:6a4db94011d3 | 900 | |
sahilmgandhi | 18:6a4db94011d3 | 901 | /* Set positive input pin */ |
sahilmgandhi | 18:6a4db94011d3 | 902 | adc_module->INPUTCTRL.reg = |
sahilmgandhi | 18:6a4db94011d3 | 903 | (adc_module->INPUTCTRL.reg & ~ADC_INPUTCTRL_MUXPOS_Msk) | |
sahilmgandhi | 18:6a4db94011d3 | 904 | (positive_input); |
sahilmgandhi | 18:6a4db94011d3 | 905 | |
sahilmgandhi | 18:6a4db94011d3 | 906 | while (adc_is_syncing(module_inst)) { |
sahilmgandhi | 18:6a4db94011d3 | 907 | /* Wait for synchronization */ |
sahilmgandhi | 18:6a4db94011d3 | 908 | } |
sahilmgandhi | 18:6a4db94011d3 | 909 | } |
sahilmgandhi | 18:6a4db94011d3 | 910 | |
sahilmgandhi | 18:6a4db94011d3 | 911 | |
sahilmgandhi | 18:6a4db94011d3 | 912 | /** |
sahilmgandhi | 18:6a4db94011d3 | 913 | * \brief Sets negative ADC input pin for differential mode. |
sahilmgandhi | 18:6a4db94011d3 | 914 | * |
sahilmgandhi | 18:6a4db94011d3 | 915 | * Sets the negative ADC input pin, when the ADC is configured in differential |
sahilmgandhi | 18:6a4db94011d3 | 916 | * mode. |
sahilmgandhi | 18:6a4db94011d3 | 917 | * |
sahilmgandhi | 18:6a4db94011d3 | 918 | * \param[in] module_inst Pointer to the ADC software instance struct |
sahilmgandhi | 18:6a4db94011d3 | 919 | * \param[in] negative_input Negative input pin |
sahilmgandhi | 18:6a4db94011d3 | 920 | */ |
sahilmgandhi | 18:6a4db94011d3 | 921 | static inline void adc_set_negative_input( |
sahilmgandhi | 18:6a4db94011d3 | 922 | struct adc_module *const module_inst, |
sahilmgandhi | 18:6a4db94011d3 | 923 | const enum adc_negative_input negative_input) |
sahilmgandhi | 18:6a4db94011d3 | 924 | { |
sahilmgandhi | 18:6a4db94011d3 | 925 | /* Sanity check arguments */ |
sahilmgandhi | 18:6a4db94011d3 | 926 | Assert(module_inst); |
sahilmgandhi | 18:6a4db94011d3 | 927 | Assert(module_inst->hw); |
sahilmgandhi | 18:6a4db94011d3 | 928 | |
sahilmgandhi | 18:6a4db94011d3 | 929 | Adc *const adc_module = module_inst->hw; |
sahilmgandhi | 18:6a4db94011d3 | 930 | |
sahilmgandhi | 18:6a4db94011d3 | 931 | while (adc_is_syncing(module_inst)) { |
sahilmgandhi | 18:6a4db94011d3 | 932 | /* Wait for synchronization */ |
sahilmgandhi | 18:6a4db94011d3 | 933 | } |
sahilmgandhi | 18:6a4db94011d3 | 934 | |
sahilmgandhi | 18:6a4db94011d3 | 935 | /* Set negative input pin */ |
sahilmgandhi | 18:6a4db94011d3 | 936 | adc_module->INPUTCTRL.reg = |
sahilmgandhi | 18:6a4db94011d3 | 937 | (adc_module->INPUTCTRL.reg & ~ADC_INPUTCTRL_MUXNEG_Msk) | |
sahilmgandhi | 18:6a4db94011d3 | 938 | (negative_input); |
sahilmgandhi | 18:6a4db94011d3 | 939 | |
sahilmgandhi | 18:6a4db94011d3 | 940 | while (adc_is_syncing(module_inst)) { |
sahilmgandhi | 18:6a4db94011d3 | 941 | /* Wait for synchronization */ |
sahilmgandhi | 18:6a4db94011d3 | 942 | } |
sahilmgandhi | 18:6a4db94011d3 | 943 | } |
sahilmgandhi | 18:6a4db94011d3 | 944 | |
sahilmgandhi | 18:6a4db94011d3 | 945 | /** @} */ |
sahilmgandhi | 18:6a4db94011d3 | 946 | |
sahilmgandhi | 18:6a4db94011d3 | 947 | #if ADC_CALLBACK_MODE == true |
sahilmgandhi | 18:6a4db94011d3 | 948 | /** |
sahilmgandhi | 18:6a4db94011d3 | 949 | * \name Enable and Disable Interrupts |
sahilmgandhi | 18:6a4db94011d3 | 950 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 951 | */ |
sahilmgandhi | 18:6a4db94011d3 | 952 | |
sahilmgandhi | 18:6a4db94011d3 | 953 | /** |
sahilmgandhi | 18:6a4db94011d3 | 954 | * \brief Enable interrupt. |
sahilmgandhi | 18:6a4db94011d3 | 955 | * |
sahilmgandhi | 18:6a4db94011d3 | 956 | * Enable the given interrupt request from the ADC module. |
sahilmgandhi | 18:6a4db94011d3 | 957 | * |
sahilmgandhi | 18:6a4db94011d3 | 958 | * \param[in] module_inst Pointer to the ADC software instance struct |
sahilmgandhi | 18:6a4db94011d3 | 959 | * \param[in] interrupt Interrupt to enable |
sahilmgandhi | 18:6a4db94011d3 | 960 | */ |
sahilmgandhi | 18:6a4db94011d3 | 961 | static inline void adc_enable_interrupt(struct adc_module *const module_inst, |
sahilmgandhi | 18:6a4db94011d3 | 962 | enum adc_interrupt_flag interrupt) |
sahilmgandhi | 18:6a4db94011d3 | 963 | { |
sahilmgandhi | 18:6a4db94011d3 | 964 | /* Sanity check arguments */ |
sahilmgandhi | 18:6a4db94011d3 | 965 | Assert(module_inst); |
sahilmgandhi | 18:6a4db94011d3 | 966 | Assert(module_inst->hw); |
sahilmgandhi | 18:6a4db94011d3 | 967 | |
sahilmgandhi | 18:6a4db94011d3 | 968 | Adc *const adc_module = module_inst->hw; |
sahilmgandhi | 18:6a4db94011d3 | 969 | /* Enable interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 970 | adc_module->INTENSET.reg = interrupt; |
sahilmgandhi | 18:6a4db94011d3 | 971 | } |
sahilmgandhi | 18:6a4db94011d3 | 972 | |
sahilmgandhi | 18:6a4db94011d3 | 973 | /** |
sahilmgandhi | 18:6a4db94011d3 | 974 | * \brief Disable interrupt. |
sahilmgandhi | 18:6a4db94011d3 | 975 | * |
sahilmgandhi | 18:6a4db94011d3 | 976 | * Disable the given interrupt request from the ADC module. |
sahilmgandhi | 18:6a4db94011d3 | 977 | * |
sahilmgandhi | 18:6a4db94011d3 | 978 | * \param[in] module_inst Pointer to the ADC software instance struct |
sahilmgandhi | 18:6a4db94011d3 | 979 | * \param[in] interrupt Interrupt to disable |
sahilmgandhi | 18:6a4db94011d3 | 980 | */ |
sahilmgandhi | 18:6a4db94011d3 | 981 | static inline void adc_disable_interrupt(struct adc_module *const module_inst, |
sahilmgandhi | 18:6a4db94011d3 | 982 | enum adc_interrupt_flag interrupt) |
sahilmgandhi | 18:6a4db94011d3 | 983 | { |
sahilmgandhi | 18:6a4db94011d3 | 984 | /* Sanity check arguments */ |
sahilmgandhi | 18:6a4db94011d3 | 985 | Assert(module_inst); |
sahilmgandhi | 18:6a4db94011d3 | 986 | Assert(module_inst->hw); |
sahilmgandhi | 18:6a4db94011d3 | 987 | |
sahilmgandhi | 18:6a4db94011d3 | 988 | Adc *const adc_module = module_inst->hw; |
sahilmgandhi | 18:6a4db94011d3 | 989 | /* Enable interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 990 | adc_module->INTENCLR.reg = interrupt; |
sahilmgandhi | 18:6a4db94011d3 | 991 | } |
sahilmgandhi | 18:6a4db94011d3 | 992 | |
sahilmgandhi | 18:6a4db94011d3 | 993 | /** @} */ |
sahilmgandhi | 18:6a4db94011d3 | 994 | #endif /* ADC_CALLBACK_MODE == true */ |
sahilmgandhi | 18:6a4db94011d3 | 995 | |
sahilmgandhi | 18:6a4db94011d3 | 996 | #ifdef __cplusplus |
sahilmgandhi | 18:6a4db94011d3 | 997 | } |
sahilmgandhi | 18:6a4db94011d3 | 998 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 999 | |
sahilmgandhi | 18:6a4db94011d3 | 1000 | /** @} */ |
sahilmgandhi | 18:6a4db94011d3 | 1001 | |
sahilmgandhi | 18:6a4db94011d3 | 1002 | |
sahilmgandhi | 18:6a4db94011d3 | 1003 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1004 | * \page asfdoc_sam0_adc_extra Extra Information for ADC Driver |
sahilmgandhi | 18:6a4db94011d3 | 1005 | * |
sahilmgandhi | 18:6a4db94011d3 | 1006 | * \section asfdoc_sam0_adc_extra_acronyms Acronyms |
sahilmgandhi | 18:6a4db94011d3 | 1007 | * Below is a table listing the acronyms used in this module, along with their |
sahilmgandhi | 18:6a4db94011d3 | 1008 | * intended meanings. |
sahilmgandhi | 18:6a4db94011d3 | 1009 | * |
sahilmgandhi | 18:6a4db94011d3 | 1010 | * <table> |
sahilmgandhi | 18:6a4db94011d3 | 1011 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 1012 | * <th>Acronym</th> |
sahilmgandhi | 18:6a4db94011d3 | 1013 | * <th>Description</th> |
sahilmgandhi | 18:6a4db94011d3 | 1014 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 1015 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 1016 | * <td>ADC</td> |
sahilmgandhi | 18:6a4db94011d3 | 1017 | * <td>Analog-to-Digital Converter</td> |
sahilmgandhi | 18:6a4db94011d3 | 1018 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 1019 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 1020 | * <td>DAC</td> |
sahilmgandhi | 18:6a4db94011d3 | 1021 | * <td>Digital-to-Analog Converter</td> |
sahilmgandhi | 18:6a4db94011d3 | 1022 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 1023 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 1024 | * <td>LSB</td> |
sahilmgandhi | 18:6a4db94011d3 | 1025 | * <td>Least Significant Bit</td> |
sahilmgandhi | 18:6a4db94011d3 | 1026 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 1027 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 1028 | * <td>MSB</td> |
sahilmgandhi | 18:6a4db94011d3 | 1029 | * <td>Most Significant Bit</td> |
sahilmgandhi | 18:6a4db94011d3 | 1030 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 1031 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 1032 | * <td>DMA</td> |
sahilmgandhi | 18:6a4db94011d3 | 1033 | * <td>Direct Memory Access</td> |
sahilmgandhi | 18:6a4db94011d3 | 1034 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 1035 | * </table> |
sahilmgandhi | 18:6a4db94011d3 | 1036 | * |
sahilmgandhi | 18:6a4db94011d3 | 1037 | * |
sahilmgandhi | 18:6a4db94011d3 | 1038 | * \section asfdoc_sam0_adc_extra_dependencies Dependencies |
sahilmgandhi | 18:6a4db94011d3 | 1039 | * This driver has the following dependencies: |
sahilmgandhi | 18:6a4db94011d3 | 1040 | * |
sahilmgandhi | 18:6a4db94011d3 | 1041 | * - \ref asfdoc_sam0_system_pinmux_group "System Pin Multiplexer Driver" |
sahilmgandhi | 18:6a4db94011d3 | 1042 | * |
sahilmgandhi | 18:6a4db94011d3 | 1043 | * |
sahilmgandhi | 18:6a4db94011d3 | 1044 | * \section asfdoc_sam0_adc_extra_errata Errata |
sahilmgandhi | 18:6a4db94011d3 | 1045 | * There are no errata related to this driver. |
sahilmgandhi | 18:6a4db94011d3 | 1046 | * |
sahilmgandhi | 18:6a4db94011d3 | 1047 | * |
sahilmgandhi | 18:6a4db94011d3 | 1048 | * \section asfdoc_sam0_adc_extra_history Module History |
sahilmgandhi | 18:6a4db94011d3 | 1049 | * An overview of the module history is presented in the table below, with |
sahilmgandhi | 18:6a4db94011d3 | 1050 | * details on the enhancements and fixes made to the module since its first |
sahilmgandhi | 18:6a4db94011d3 | 1051 | * release. The current version of this corresponds to the newest version in |
sahilmgandhi | 18:6a4db94011d3 | 1052 | * the table. |
sahilmgandhi | 18:6a4db94011d3 | 1053 | * |
sahilmgandhi | 18:6a4db94011d3 | 1054 | * <table> |
sahilmgandhi | 18:6a4db94011d3 | 1055 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 1056 | * <th>Changelog</th> |
sahilmgandhi | 18:6a4db94011d3 | 1057 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 1058 | * \if DEVICE_SAML21_SUPPORT |
sahilmgandhi | 18:6a4db94011d3 | 1059 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 1060 | * <td>Initial Release</td> |
sahilmgandhi | 18:6a4db94011d3 | 1061 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 1062 | * \else |
sahilmgandhi | 18:6a4db94011d3 | 1063 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 1064 | * <td>Added support for SAMR21</td> |
sahilmgandhi | 18:6a4db94011d3 | 1065 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 1066 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 1067 | * <td>Added support for SAMD21 and new DMA quick start guide</td> |
sahilmgandhi | 18:6a4db94011d3 | 1068 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 1069 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 1070 | * <td>Added ADC calibration constant loading from the device signature |
sahilmgandhi | 18:6a4db94011d3 | 1071 | * row when the module is initialized</td> |
sahilmgandhi | 18:6a4db94011d3 | 1072 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 1073 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 1074 | * <td>Initial Release</td> |
sahilmgandhi | 18:6a4db94011d3 | 1075 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 1076 | * \endif |
sahilmgandhi | 18:6a4db94011d3 | 1077 | * </table> |
sahilmgandhi | 18:6a4db94011d3 | 1078 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1079 | |
sahilmgandhi | 18:6a4db94011d3 | 1080 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1081 | * \page asfdoc_sam0_adc_exqsg Examples for ADC Driver |
sahilmgandhi | 18:6a4db94011d3 | 1082 | * |
sahilmgandhi | 18:6a4db94011d3 | 1083 | * This is a list of the available Quick Start guides (QSGs) and example |
sahilmgandhi | 18:6a4db94011d3 | 1084 | * applications for \ref asfdoc_sam0_adc_group. QSGs are simple examples with |
sahilmgandhi | 18:6a4db94011d3 | 1085 | * step-by-step instructions to configure and use this driver in a selection of |
sahilmgandhi | 18:6a4db94011d3 | 1086 | * use cases. Note that a QSG can be compiled as a standalone application or be |
sahilmgandhi | 18:6a4db94011d3 | 1087 | * added to the user application. |
sahilmgandhi | 18:6a4db94011d3 | 1088 | * |
sahilmgandhi | 18:6a4db94011d3 | 1089 | * - \subpage asfdoc_sam0_adc_basic_use_case |
sahilmgandhi | 18:6a4db94011d3 | 1090 | * \if ADC_CALLBACK_MODE |
sahilmgandhi | 18:6a4db94011d3 | 1091 | * - \subpage asfdoc_sam0_adc_basic_use_case_callback |
sahilmgandhi | 18:6a4db94011d3 | 1092 | * \endif |
sahilmgandhi | 18:6a4db94011d3 | 1093 | * - \subpage asfdoc_sam0_adc_dma_use_case |
sahilmgandhi | 18:6a4db94011d3 | 1094 | * |
sahilmgandhi | 18:6a4db94011d3 | 1095 | * \page asfdoc_sam0_adc_document_revision_history Document Revision History |
sahilmgandhi | 18:6a4db94011d3 | 1096 | * |
sahilmgandhi | 18:6a4db94011d3 | 1097 | * <table> |
sahilmgandhi | 18:6a4db94011d3 | 1098 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 1099 | * <th>Doc. Rev.</td> |
sahilmgandhi | 18:6a4db94011d3 | 1100 | * <th>Date</td> |
sahilmgandhi | 18:6a4db94011d3 | 1101 | * <th>Comments</td> |
sahilmgandhi | 18:6a4db94011d3 | 1102 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 1103 | * \if DEVICE_SAML21_SUPPORT |
sahilmgandhi | 18:6a4db94011d3 | 1104 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 1105 | * <td>42451A</td> |
sahilmgandhi | 18:6a4db94011d3 | 1106 | * <td>07/2015</td> |
sahilmgandhi | 18:6a4db94011d3 | 1107 | * <td>Initial document release</td> |
sahilmgandhi | 18:6a4db94011d3 | 1108 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 1109 | * \else |
sahilmgandhi | 18:6a4db94011d3 | 1110 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 1111 | * <td>42109E</td> |
sahilmgandhi | 18:6a4db94011d3 | 1112 | * <td>04/2015</td> |
sahilmgandhi | 18:6a4db94011d3 | 1113 | * <td>Added support for SAMDAx.</td> |
sahilmgandhi | 18:6a4db94011d3 | 1114 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 1115 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 1116 | * <td>42109D</td> |
sahilmgandhi | 18:6a4db94011d3 | 1117 | * <td>12/2014</td> |
sahilmgandhi | 18:6a4db94011d3 | 1118 | * <td>Added support for SAMR21 and SAMD10/D11</td> |
sahilmgandhi | 18:6a4db94011d3 | 1119 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 1120 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 1121 | * <td>42109C</td> |
sahilmgandhi | 18:6a4db94011d3 | 1122 | * <td>01/2014</td> |
sahilmgandhi | 18:6a4db94011d3 | 1123 | * <td>Added support for SAMD21</td> |
sahilmgandhi | 18:6a4db94011d3 | 1124 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 1125 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 1126 | * <td>42109B</td> |
sahilmgandhi | 18:6a4db94011d3 | 1127 | * <td>06/2013</td> |
sahilmgandhi | 18:6a4db94011d3 | 1128 | * <td>Added additional documentation on the event system. Corrected |
sahilmgandhi | 18:6a4db94011d3 | 1129 | * documentation typos.</td> |
sahilmgandhi | 18:6a4db94011d3 | 1130 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 1131 | * <tr> |
sahilmgandhi | 18:6a4db94011d3 | 1132 | * <td>42109A</td> |
sahilmgandhi | 18:6a4db94011d3 | 1133 | * <td>06/2013</td> |
sahilmgandhi | 18:6a4db94011d3 | 1134 | * <td>Initial release</td> |
sahilmgandhi | 18:6a4db94011d3 | 1135 | * </tr> |
sahilmgandhi | 18:6a4db94011d3 | 1136 | * \endif |
sahilmgandhi | 18:6a4db94011d3 | 1137 | * </table> |
sahilmgandhi | 18:6a4db94011d3 | 1138 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1139 | |
sahilmgandhi | 18:6a4db94011d3 | 1140 | #endif /* ADC_H_INCLUDED */ |