Diff: mbed-dev/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_IAR/TARGET_LPC11U68/LPC11U68.icf

Revision:

18:6a4db94011d3

--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/mbed-dev/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_IAR/TARGET_LPC11U68/LPC11U68.icf	Sun May 14 23:18:57 2017 +0000
@@ -0,0 +1,47 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x00000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__   = 0x00000000;
+define symbol __ICFEDIT_region_ROM_end__     = 0x0003FFFF;
+define symbol __ICFEDIT_region_NVIC_start__   = 0x10000000;
+define symbol __ICFEDIT_region_NVIC_end__   = 0x100000FF;
+define symbol __ICFEDIT_region_RAM_start__   = 0x10000100;
+define symbol __ICFEDIT_region_RAM_end__     = 0x10007FDF;
+/*-Sizes-*/
+/*Heap 1/4 of ram and stack 1/8*/
+define symbol __ICFEDIT_size_cstack__   = 0x1000;
+define symbol __ICFEDIT_size_heap__     = 0x2000;
+/**** End of ICF editor section. ###ICF###*/
+
+define symbol __CRP_start__    = 0x000002FC;
+define symbol __CRP_end__      = 0x000002FF;
+
+define symbol __RAM1_start__   = 0x20000000;
+define symbol __RAM1_end__     = 0x200007FF;
+
+define symbol __RAM_USB_start__= 0x20004000;
+define symbol __RAM_USB_end__  = 0x200047FF;
+
+define memory mem with size 	= 4G;
+define region ROM_region   		= mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__] -  mem:[from  __CRP_start__ to __CRP_end__];
+define region RAM_region   		= mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+define region RAM1_region  		= mem:[from __RAM1_start__  to __RAM1_end__];
+define region RAM_USB_region 	= mem:[from __RAM_USB_start__  to __RAM_USB_end__];
+define region CRP_region   		= mem:[from  __CRP_start__ to __CRP_end__];
+
+define block CSTACK	with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP   with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+place in ROM_region   	{ readonly };
+place in RAM_region   	{ readwrite,
+                        	block HEAP, block CSTACK };
+place in CRP_region   	{ section .crp };
+place in RAM1_region  	{ section .sram1 };
+place in RAM_USB_region	{ section .sram_usb };