Mouse code for the MacroRat
mbed-dev/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFR32MG1/device/efr32mg1p_pcnt.h@46:b156ef445742, 2017-06-03 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sat Jun 03 00:22:44 2017 +0000
- Revision:
- 46:b156ef445742
- Parent:
- 18:6a4db94011d3
Final code for internal battlebot competition.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sahilmgandhi | 18:6a4db94011d3 | 1 | /**************************************************************************//** |
sahilmgandhi | 18:6a4db94011d3 | 2 | * @file efr32mg1p_pcnt.h |
sahilmgandhi | 18:6a4db94011d3 | 3 | * @brief EFR32MG1P_PCNT register and bit field definitions |
sahilmgandhi | 18:6a4db94011d3 | 4 | * @version 5.1.2 |
sahilmgandhi | 18:6a4db94011d3 | 5 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 6 | * @section License |
sahilmgandhi | 18:6a4db94011d3 | 7 | * <b>Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com</b> |
sahilmgandhi | 18:6a4db94011d3 | 8 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 9 | * |
sahilmgandhi | 18:6a4db94011d3 | 10 | * Permission is granted to anyone to use this software for any purpose, |
sahilmgandhi | 18:6a4db94011d3 | 11 | * including commercial applications, and to alter it and redistribute it |
sahilmgandhi | 18:6a4db94011d3 | 12 | * freely, subject to the following restrictions: |
sahilmgandhi | 18:6a4db94011d3 | 13 | * |
sahilmgandhi | 18:6a4db94011d3 | 14 | * 1. The origin of this software must not be misrepresented; you must not |
sahilmgandhi | 18:6a4db94011d3 | 15 | * claim that you wrote the original software.@n |
sahilmgandhi | 18:6a4db94011d3 | 16 | * 2. Altered source versions must be plainly marked as such, and must not be |
sahilmgandhi | 18:6a4db94011d3 | 17 | * misrepresented as being the original software.@n |
sahilmgandhi | 18:6a4db94011d3 | 18 | * 3. This notice may not be removed or altered from any source distribution. |
sahilmgandhi | 18:6a4db94011d3 | 19 | * |
sahilmgandhi | 18:6a4db94011d3 | 20 | * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc. |
sahilmgandhi | 18:6a4db94011d3 | 21 | * has no obligation to support this Software. Silicon Laboratories, Inc. is |
sahilmgandhi | 18:6a4db94011d3 | 22 | * providing the Software "AS IS", with no express or implied warranties of any |
sahilmgandhi | 18:6a4db94011d3 | 23 | * kind, including, but not limited to, any implied warranties of |
sahilmgandhi | 18:6a4db94011d3 | 24 | * merchantability or fitness for any particular purpose or warranties against |
sahilmgandhi | 18:6a4db94011d3 | 25 | * infringement of any proprietary rights of a third party. |
sahilmgandhi | 18:6a4db94011d3 | 26 | * |
sahilmgandhi | 18:6a4db94011d3 | 27 | * Silicon Laboratories, Inc. will not be liable for any consequential, |
sahilmgandhi | 18:6a4db94011d3 | 28 | * incidental, or special damages, or any other relief, or for any claim by |
sahilmgandhi | 18:6a4db94011d3 | 29 | * any third party, arising from your use of this Software. |
sahilmgandhi | 18:6a4db94011d3 | 30 | * |
sahilmgandhi | 18:6a4db94011d3 | 31 | *****************************************************************************/ |
sahilmgandhi | 18:6a4db94011d3 | 32 | /**************************************************************************//** |
sahilmgandhi | 18:6a4db94011d3 | 33 | * @addtogroup Parts |
sahilmgandhi | 18:6a4db94011d3 | 34 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 35 | ******************************************************************************/ |
sahilmgandhi | 18:6a4db94011d3 | 36 | /**************************************************************************//** |
sahilmgandhi | 18:6a4db94011d3 | 37 | * @defgroup EFR32MG1P_PCNT |
sahilmgandhi | 18:6a4db94011d3 | 38 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 39 | * @brief EFR32MG1P_PCNT Register Declaration |
sahilmgandhi | 18:6a4db94011d3 | 40 | *****************************************************************************/ |
sahilmgandhi | 18:6a4db94011d3 | 41 | typedef struct |
sahilmgandhi | 18:6a4db94011d3 | 42 | { |
sahilmgandhi | 18:6a4db94011d3 | 43 | __IOM uint32_t CTRL; /**< Control Register */ |
sahilmgandhi | 18:6a4db94011d3 | 44 | __IOM uint32_t CMD; /**< Command Register */ |
sahilmgandhi | 18:6a4db94011d3 | 45 | __IM uint32_t STATUS; /**< Status Register */ |
sahilmgandhi | 18:6a4db94011d3 | 46 | __IM uint32_t CNT; /**< Counter Value Register */ |
sahilmgandhi | 18:6a4db94011d3 | 47 | __IM uint32_t TOP; /**< Top Value Register */ |
sahilmgandhi | 18:6a4db94011d3 | 48 | __IOM uint32_t TOPB; /**< Top Value Buffer Register */ |
sahilmgandhi | 18:6a4db94011d3 | 49 | __IM uint32_t IF; /**< Interrupt Flag Register */ |
sahilmgandhi | 18:6a4db94011d3 | 50 | __IOM uint32_t IFS; /**< Interrupt Flag Set Register */ |
sahilmgandhi | 18:6a4db94011d3 | 51 | __IOM uint32_t IFC; /**< Interrupt Flag Clear Register */ |
sahilmgandhi | 18:6a4db94011d3 | 52 | __IOM uint32_t IEN; /**< Interrupt Enable Register */ |
sahilmgandhi | 18:6a4db94011d3 | 53 | uint32_t RESERVED0[1]; /**< Reserved for future use **/ |
sahilmgandhi | 18:6a4db94011d3 | 54 | __IOM uint32_t ROUTELOC0; /**< I/O Routing Location Register */ |
sahilmgandhi | 18:6a4db94011d3 | 55 | |
sahilmgandhi | 18:6a4db94011d3 | 56 | uint32_t RESERVED1[4]; /**< Reserved for future use **/ |
sahilmgandhi | 18:6a4db94011d3 | 57 | __IOM uint32_t FREEZE; /**< Freeze Register */ |
sahilmgandhi | 18:6a4db94011d3 | 58 | __IM uint32_t SYNCBUSY; /**< Synchronization Busy Register */ |
sahilmgandhi | 18:6a4db94011d3 | 59 | |
sahilmgandhi | 18:6a4db94011d3 | 60 | uint32_t RESERVED2[7]; /**< Reserved for future use **/ |
sahilmgandhi | 18:6a4db94011d3 | 61 | __IM uint32_t AUXCNT; /**< Auxiliary Counter Value Register */ |
sahilmgandhi | 18:6a4db94011d3 | 62 | __IOM uint32_t INPUT; /**< PCNT Input Register */ |
sahilmgandhi | 18:6a4db94011d3 | 63 | __IOM uint32_t OVSCFG; /**< Oversampling Config Register */ |
sahilmgandhi | 18:6a4db94011d3 | 64 | } PCNT_TypeDef; /** @} */ |
sahilmgandhi | 18:6a4db94011d3 | 65 | |
sahilmgandhi | 18:6a4db94011d3 | 66 | /**************************************************************************//** |
sahilmgandhi | 18:6a4db94011d3 | 67 | * @defgroup EFR32MG1P_PCNT_BitFields |
sahilmgandhi | 18:6a4db94011d3 | 68 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 69 | *****************************************************************************/ |
sahilmgandhi | 18:6a4db94011d3 | 70 | |
sahilmgandhi | 18:6a4db94011d3 | 71 | /* Bit fields for PCNT CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 72 | #define _PCNT_CTRL_RESETVALUE 0x00000000UL /**< Default value for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 73 | #define _PCNT_CTRL_MASK 0xBFDBFFFFUL /**< Mask for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 74 | #define _PCNT_CTRL_MODE_SHIFT 0 /**< Shift value for PCNT_MODE */ |
sahilmgandhi | 18:6a4db94011d3 | 75 | #define _PCNT_CTRL_MODE_MASK 0x7UL /**< Bit mask for PCNT_MODE */ |
sahilmgandhi | 18:6a4db94011d3 | 76 | #define _PCNT_CTRL_MODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 77 | #define _PCNT_CTRL_MODE_DISABLE 0x00000000UL /**< Mode DISABLE for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 78 | #define _PCNT_CTRL_MODE_OVSSINGLE 0x00000001UL /**< Mode OVSSINGLE for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 79 | #define _PCNT_CTRL_MODE_EXTCLKSINGLE 0x00000002UL /**< Mode EXTCLKSINGLE for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 80 | #define _PCNT_CTRL_MODE_EXTCLKQUAD 0x00000003UL /**< Mode EXTCLKQUAD for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 81 | #define _PCNT_CTRL_MODE_OVSQUAD1X 0x00000004UL /**< Mode OVSQUAD1X for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 82 | #define _PCNT_CTRL_MODE_OVSQUAD2X 0x00000005UL /**< Mode OVSQUAD2X for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 83 | #define _PCNT_CTRL_MODE_OVSQUAD4X 0x00000006UL /**< Mode OVSQUAD4X for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 84 | #define PCNT_CTRL_MODE_DEFAULT (_PCNT_CTRL_MODE_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 85 | #define PCNT_CTRL_MODE_DISABLE (_PCNT_CTRL_MODE_DISABLE << 0) /**< Shifted mode DISABLE for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 86 | #define PCNT_CTRL_MODE_OVSSINGLE (_PCNT_CTRL_MODE_OVSSINGLE << 0) /**< Shifted mode OVSSINGLE for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 87 | #define PCNT_CTRL_MODE_EXTCLKSINGLE (_PCNT_CTRL_MODE_EXTCLKSINGLE << 0) /**< Shifted mode EXTCLKSINGLE for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 88 | #define PCNT_CTRL_MODE_EXTCLKQUAD (_PCNT_CTRL_MODE_EXTCLKQUAD << 0) /**< Shifted mode EXTCLKQUAD for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 89 | #define PCNT_CTRL_MODE_OVSQUAD1X (_PCNT_CTRL_MODE_OVSQUAD1X << 0) /**< Shifted mode OVSQUAD1X for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 90 | #define PCNT_CTRL_MODE_OVSQUAD2X (_PCNT_CTRL_MODE_OVSQUAD2X << 0) /**< Shifted mode OVSQUAD2X for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 91 | #define PCNT_CTRL_MODE_OVSQUAD4X (_PCNT_CTRL_MODE_OVSQUAD4X << 0) /**< Shifted mode OVSQUAD4X for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 92 | #define PCNT_CTRL_FILT (0x1UL << 3) /**< Enable Digital Pulse Width Filter */ |
sahilmgandhi | 18:6a4db94011d3 | 93 | #define _PCNT_CTRL_FILT_SHIFT 3 /**< Shift value for PCNT_FILT */ |
sahilmgandhi | 18:6a4db94011d3 | 94 | #define _PCNT_CTRL_FILT_MASK 0x8UL /**< Bit mask for PCNT_FILT */ |
sahilmgandhi | 18:6a4db94011d3 | 95 | #define _PCNT_CTRL_FILT_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 96 | #define PCNT_CTRL_FILT_DEFAULT (_PCNT_CTRL_FILT_DEFAULT << 3) /**< Shifted mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 97 | #define PCNT_CTRL_RSTEN (0x1UL << 4) /**< Enable PCNT Clock Domain Reset */ |
sahilmgandhi | 18:6a4db94011d3 | 98 | #define _PCNT_CTRL_RSTEN_SHIFT 4 /**< Shift value for PCNT_RSTEN */ |
sahilmgandhi | 18:6a4db94011d3 | 99 | #define _PCNT_CTRL_RSTEN_MASK 0x10UL /**< Bit mask for PCNT_RSTEN */ |
sahilmgandhi | 18:6a4db94011d3 | 100 | #define _PCNT_CTRL_RSTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 101 | #define PCNT_CTRL_RSTEN_DEFAULT (_PCNT_CTRL_RSTEN_DEFAULT << 4) /**< Shifted mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 102 | #define PCNT_CTRL_CNTRSTEN (0x1UL << 5) /**< Enable CNT Reset */ |
sahilmgandhi | 18:6a4db94011d3 | 103 | #define _PCNT_CTRL_CNTRSTEN_SHIFT 5 /**< Shift value for PCNT_CNTRSTEN */ |
sahilmgandhi | 18:6a4db94011d3 | 104 | #define _PCNT_CTRL_CNTRSTEN_MASK 0x20UL /**< Bit mask for PCNT_CNTRSTEN */ |
sahilmgandhi | 18:6a4db94011d3 | 105 | #define _PCNT_CTRL_CNTRSTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 106 | #define PCNT_CTRL_CNTRSTEN_DEFAULT (_PCNT_CTRL_CNTRSTEN_DEFAULT << 5) /**< Shifted mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 107 | #define PCNT_CTRL_AUXCNTRSTEN (0x1UL << 6) /**< Enable AUXCNT Reset */ |
sahilmgandhi | 18:6a4db94011d3 | 108 | #define _PCNT_CTRL_AUXCNTRSTEN_SHIFT 6 /**< Shift value for PCNT_AUXCNTRSTEN */ |
sahilmgandhi | 18:6a4db94011d3 | 109 | #define _PCNT_CTRL_AUXCNTRSTEN_MASK 0x40UL /**< Bit mask for PCNT_AUXCNTRSTEN */ |
sahilmgandhi | 18:6a4db94011d3 | 110 | #define _PCNT_CTRL_AUXCNTRSTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 111 | #define PCNT_CTRL_AUXCNTRSTEN_DEFAULT (_PCNT_CTRL_AUXCNTRSTEN_DEFAULT << 6) /**< Shifted mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 112 | #define PCNT_CTRL_DEBUGHALT (0x1UL << 7) /**< Debug Mode Halt Enable */ |
sahilmgandhi | 18:6a4db94011d3 | 113 | #define _PCNT_CTRL_DEBUGHALT_SHIFT 7 /**< Shift value for PCNT_DEBUGHALT */ |
sahilmgandhi | 18:6a4db94011d3 | 114 | #define _PCNT_CTRL_DEBUGHALT_MASK 0x80UL /**< Bit mask for PCNT_DEBUGHALT */ |
sahilmgandhi | 18:6a4db94011d3 | 115 | #define _PCNT_CTRL_DEBUGHALT_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 116 | #define PCNT_CTRL_DEBUGHALT_DEFAULT (_PCNT_CTRL_DEBUGHALT_DEFAULT << 7) /**< Shifted mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 117 | #define PCNT_CTRL_HYST (0x1UL << 8) /**< Enable Hysteresis */ |
sahilmgandhi | 18:6a4db94011d3 | 118 | #define _PCNT_CTRL_HYST_SHIFT 8 /**< Shift value for PCNT_HYST */ |
sahilmgandhi | 18:6a4db94011d3 | 119 | #define _PCNT_CTRL_HYST_MASK 0x100UL /**< Bit mask for PCNT_HYST */ |
sahilmgandhi | 18:6a4db94011d3 | 120 | #define _PCNT_CTRL_HYST_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 121 | #define PCNT_CTRL_HYST_DEFAULT (_PCNT_CTRL_HYST_DEFAULT << 8) /**< Shifted mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 122 | #define PCNT_CTRL_S1CDIR (0x1UL << 9) /**< Count direction determined by S1 */ |
sahilmgandhi | 18:6a4db94011d3 | 123 | #define _PCNT_CTRL_S1CDIR_SHIFT 9 /**< Shift value for PCNT_S1CDIR */ |
sahilmgandhi | 18:6a4db94011d3 | 124 | #define _PCNT_CTRL_S1CDIR_MASK 0x200UL /**< Bit mask for PCNT_S1CDIR */ |
sahilmgandhi | 18:6a4db94011d3 | 125 | #define _PCNT_CTRL_S1CDIR_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 126 | #define PCNT_CTRL_S1CDIR_DEFAULT (_PCNT_CTRL_S1CDIR_DEFAULT << 9) /**< Shifted mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 127 | #define _PCNT_CTRL_CNTEV_SHIFT 10 /**< Shift value for PCNT_CNTEV */ |
sahilmgandhi | 18:6a4db94011d3 | 128 | #define _PCNT_CTRL_CNTEV_MASK 0xC00UL /**< Bit mask for PCNT_CNTEV */ |
sahilmgandhi | 18:6a4db94011d3 | 129 | #define _PCNT_CTRL_CNTEV_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 130 | #define _PCNT_CTRL_CNTEV_BOTH 0x00000000UL /**< Mode BOTH for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 131 | #define _PCNT_CTRL_CNTEV_UP 0x00000001UL /**< Mode UP for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 132 | #define _PCNT_CTRL_CNTEV_DOWN 0x00000002UL /**< Mode DOWN for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 133 | #define _PCNT_CTRL_CNTEV_NONE 0x00000003UL /**< Mode NONE for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 134 | #define PCNT_CTRL_CNTEV_DEFAULT (_PCNT_CTRL_CNTEV_DEFAULT << 10) /**< Shifted mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 135 | #define PCNT_CTRL_CNTEV_BOTH (_PCNT_CTRL_CNTEV_BOTH << 10) /**< Shifted mode BOTH for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 136 | #define PCNT_CTRL_CNTEV_UP (_PCNT_CTRL_CNTEV_UP << 10) /**< Shifted mode UP for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 137 | #define PCNT_CTRL_CNTEV_DOWN (_PCNT_CTRL_CNTEV_DOWN << 10) /**< Shifted mode DOWN for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 138 | #define PCNT_CTRL_CNTEV_NONE (_PCNT_CTRL_CNTEV_NONE << 10) /**< Shifted mode NONE for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 139 | #define _PCNT_CTRL_AUXCNTEV_SHIFT 12 /**< Shift value for PCNT_AUXCNTEV */ |
sahilmgandhi | 18:6a4db94011d3 | 140 | #define _PCNT_CTRL_AUXCNTEV_MASK 0x3000UL /**< Bit mask for PCNT_AUXCNTEV */ |
sahilmgandhi | 18:6a4db94011d3 | 141 | #define _PCNT_CTRL_AUXCNTEV_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 142 | #define _PCNT_CTRL_AUXCNTEV_NONE 0x00000000UL /**< Mode NONE for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 143 | #define _PCNT_CTRL_AUXCNTEV_UP 0x00000001UL /**< Mode UP for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 144 | #define _PCNT_CTRL_AUXCNTEV_DOWN 0x00000002UL /**< Mode DOWN for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 145 | #define _PCNT_CTRL_AUXCNTEV_BOTH 0x00000003UL /**< Mode BOTH for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 146 | #define PCNT_CTRL_AUXCNTEV_DEFAULT (_PCNT_CTRL_AUXCNTEV_DEFAULT << 12) /**< Shifted mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 147 | #define PCNT_CTRL_AUXCNTEV_NONE (_PCNT_CTRL_AUXCNTEV_NONE << 12) /**< Shifted mode NONE for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 148 | #define PCNT_CTRL_AUXCNTEV_UP (_PCNT_CTRL_AUXCNTEV_UP << 12) /**< Shifted mode UP for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 149 | #define PCNT_CTRL_AUXCNTEV_DOWN (_PCNT_CTRL_AUXCNTEV_DOWN << 12) /**< Shifted mode DOWN for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 150 | #define PCNT_CTRL_AUXCNTEV_BOTH (_PCNT_CTRL_AUXCNTEV_BOTH << 12) /**< Shifted mode BOTH for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 151 | #define PCNT_CTRL_CNTDIR (0x1UL << 14) /**< Non-Quadrature Mode Counter Direction Control */ |
sahilmgandhi | 18:6a4db94011d3 | 152 | #define _PCNT_CTRL_CNTDIR_SHIFT 14 /**< Shift value for PCNT_CNTDIR */ |
sahilmgandhi | 18:6a4db94011d3 | 153 | #define _PCNT_CTRL_CNTDIR_MASK 0x4000UL /**< Bit mask for PCNT_CNTDIR */ |
sahilmgandhi | 18:6a4db94011d3 | 154 | #define _PCNT_CTRL_CNTDIR_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 155 | #define _PCNT_CTRL_CNTDIR_UP 0x00000000UL /**< Mode UP for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 156 | #define _PCNT_CTRL_CNTDIR_DOWN 0x00000001UL /**< Mode DOWN for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 157 | #define PCNT_CTRL_CNTDIR_DEFAULT (_PCNT_CTRL_CNTDIR_DEFAULT << 14) /**< Shifted mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 158 | #define PCNT_CTRL_CNTDIR_UP (_PCNT_CTRL_CNTDIR_UP << 14) /**< Shifted mode UP for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 159 | #define PCNT_CTRL_CNTDIR_DOWN (_PCNT_CTRL_CNTDIR_DOWN << 14) /**< Shifted mode DOWN for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 160 | #define PCNT_CTRL_EDGE (0x1UL << 15) /**< Edge Select */ |
sahilmgandhi | 18:6a4db94011d3 | 161 | #define _PCNT_CTRL_EDGE_SHIFT 15 /**< Shift value for PCNT_EDGE */ |
sahilmgandhi | 18:6a4db94011d3 | 162 | #define _PCNT_CTRL_EDGE_MASK 0x8000UL /**< Bit mask for PCNT_EDGE */ |
sahilmgandhi | 18:6a4db94011d3 | 163 | #define _PCNT_CTRL_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 164 | #define _PCNT_CTRL_EDGE_POS 0x00000000UL /**< Mode POS for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 165 | #define _PCNT_CTRL_EDGE_NEG 0x00000001UL /**< Mode NEG for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 166 | #define PCNT_CTRL_EDGE_DEFAULT (_PCNT_CTRL_EDGE_DEFAULT << 15) /**< Shifted mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 167 | #define PCNT_CTRL_EDGE_POS (_PCNT_CTRL_EDGE_POS << 15) /**< Shifted mode POS for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 168 | #define PCNT_CTRL_EDGE_NEG (_PCNT_CTRL_EDGE_NEG << 15) /**< Shifted mode NEG for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 169 | #define _PCNT_CTRL_TCCMODE_SHIFT 16 /**< Shift value for PCNT_TCCMODE */ |
sahilmgandhi | 18:6a4db94011d3 | 170 | #define _PCNT_CTRL_TCCMODE_MASK 0x30000UL /**< Bit mask for PCNT_TCCMODE */ |
sahilmgandhi | 18:6a4db94011d3 | 171 | #define _PCNT_CTRL_TCCMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 172 | #define _PCNT_CTRL_TCCMODE_DISABLED 0x00000000UL /**< Mode DISABLED for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 173 | #define _PCNT_CTRL_TCCMODE_LFA 0x00000001UL /**< Mode LFA for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 174 | #define _PCNT_CTRL_TCCMODE_PRS 0x00000002UL /**< Mode PRS for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 175 | #define PCNT_CTRL_TCCMODE_DEFAULT (_PCNT_CTRL_TCCMODE_DEFAULT << 16) /**< Shifted mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 176 | #define PCNT_CTRL_TCCMODE_DISABLED (_PCNT_CTRL_TCCMODE_DISABLED << 16) /**< Shifted mode DISABLED for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 177 | #define PCNT_CTRL_TCCMODE_LFA (_PCNT_CTRL_TCCMODE_LFA << 16) /**< Shifted mode LFA for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 178 | #define PCNT_CTRL_TCCMODE_PRS (_PCNT_CTRL_TCCMODE_PRS << 16) /**< Shifted mode PRS for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 179 | #define _PCNT_CTRL_TCCPRESC_SHIFT 19 /**< Shift value for PCNT_TCCPRESC */ |
sahilmgandhi | 18:6a4db94011d3 | 180 | #define _PCNT_CTRL_TCCPRESC_MASK 0x180000UL /**< Bit mask for PCNT_TCCPRESC */ |
sahilmgandhi | 18:6a4db94011d3 | 181 | #define _PCNT_CTRL_TCCPRESC_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 182 | #define _PCNT_CTRL_TCCPRESC_DIV1 0x00000000UL /**< Mode DIV1 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 183 | #define _PCNT_CTRL_TCCPRESC_DIV2 0x00000001UL /**< Mode DIV2 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 184 | #define _PCNT_CTRL_TCCPRESC_DIV4 0x00000002UL /**< Mode DIV4 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 185 | #define _PCNT_CTRL_TCCPRESC_DIV8 0x00000003UL /**< Mode DIV8 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 186 | #define PCNT_CTRL_TCCPRESC_DEFAULT (_PCNT_CTRL_TCCPRESC_DEFAULT << 19) /**< Shifted mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 187 | #define PCNT_CTRL_TCCPRESC_DIV1 (_PCNT_CTRL_TCCPRESC_DIV1 << 19) /**< Shifted mode DIV1 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 188 | #define PCNT_CTRL_TCCPRESC_DIV2 (_PCNT_CTRL_TCCPRESC_DIV2 << 19) /**< Shifted mode DIV2 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 189 | #define PCNT_CTRL_TCCPRESC_DIV4 (_PCNT_CTRL_TCCPRESC_DIV4 << 19) /**< Shifted mode DIV4 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 190 | #define PCNT_CTRL_TCCPRESC_DIV8 (_PCNT_CTRL_TCCPRESC_DIV8 << 19) /**< Shifted mode DIV8 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 191 | #define _PCNT_CTRL_TCCCOMP_SHIFT 22 /**< Shift value for PCNT_TCCCOMP */ |
sahilmgandhi | 18:6a4db94011d3 | 192 | #define _PCNT_CTRL_TCCCOMP_MASK 0xC00000UL /**< Bit mask for PCNT_TCCCOMP */ |
sahilmgandhi | 18:6a4db94011d3 | 193 | #define _PCNT_CTRL_TCCCOMP_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 194 | #define _PCNT_CTRL_TCCCOMP_LTOE 0x00000000UL /**< Mode LTOE for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 195 | #define _PCNT_CTRL_TCCCOMP_GTOE 0x00000001UL /**< Mode GTOE for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 196 | #define _PCNT_CTRL_TCCCOMP_RANGE 0x00000002UL /**< Mode RANGE for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 197 | #define PCNT_CTRL_TCCCOMP_DEFAULT (_PCNT_CTRL_TCCCOMP_DEFAULT << 22) /**< Shifted mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 198 | #define PCNT_CTRL_TCCCOMP_LTOE (_PCNT_CTRL_TCCCOMP_LTOE << 22) /**< Shifted mode LTOE for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 199 | #define PCNT_CTRL_TCCCOMP_GTOE (_PCNT_CTRL_TCCCOMP_GTOE << 22) /**< Shifted mode GTOE for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 200 | #define PCNT_CTRL_TCCCOMP_RANGE (_PCNT_CTRL_TCCCOMP_RANGE << 22) /**< Shifted mode RANGE for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 201 | #define PCNT_CTRL_PRSGATEEN (0x1UL << 24) /**< PRS gate enable */ |
sahilmgandhi | 18:6a4db94011d3 | 202 | #define _PCNT_CTRL_PRSGATEEN_SHIFT 24 /**< Shift value for PCNT_PRSGATEEN */ |
sahilmgandhi | 18:6a4db94011d3 | 203 | #define _PCNT_CTRL_PRSGATEEN_MASK 0x1000000UL /**< Bit mask for PCNT_PRSGATEEN */ |
sahilmgandhi | 18:6a4db94011d3 | 204 | #define _PCNT_CTRL_PRSGATEEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 205 | #define PCNT_CTRL_PRSGATEEN_DEFAULT (_PCNT_CTRL_PRSGATEEN_DEFAULT << 24) /**< Shifted mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 206 | #define PCNT_CTRL_TCCPRSPOL (0x1UL << 25) /**< TCC PRS polarity select */ |
sahilmgandhi | 18:6a4db94011d3 | 207 | #define _PCNT_CTRL_TCCPRSPOL_SHIFT 25 /**< Shift value for PCNT_TCCPRSPOL */ |
sahilmgandhi | 18:6a4db94011d3 | 208 | #define _PCNT_CTRL_TCCPRSPOL_MASK 0x2000000UL /**< Bit mask for PCNT_TCCPRSPOL */ |
sahilmgandhi | 18:6a4db94011d3 | 209 | #define _PCNT_CTRL_TCCPRSPOL_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 210 | #define _PCNT_CTRL_TCCPRSPOL_RISING 0x00000000UL /**< Mode RISING for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 211 | #define _PCNT_CTRL_TCCPRSPOL_FALLING 0x00000001UL /**< Mode FALLING for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 212 | #define PCNT_CTRL_TCCPRSPOL_DEFAULT (_PCNT_CTRL_TCCPRSPOL_DEFAULT << 25) /**< Shifted mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 213 | #define PCNT_CTRL_TCCPRSPOL_RISING (_PCNT_CTRL_TCCPRSPOL_RISING << 25) /**< Shifted mode RISING for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 214 | #define PCNT_CTRL_TCCPRSPOL_FALLING (_PCNT_CTRL_TCCPRSPOL_FALLING << 25) /**< Shifted mode FALLING for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 215 | #define _PCNT_CTRL_TCCPRSSEL_SHIFT 26 /**< Shift value for PCNT_TCCPRSSEL */ |
sahilmgandhi | 18:6a4db94011d3 | 216 | #define _PCNT_CTRL_TCCPRSSEL_MASK 0x3C000000UL /**< Bit mask for PCNT_TCCPRSSEL */ |
sahilmgandhi | 18:6a4db94011d3 | 217 | #define _PCNT_CTRL_TCCPRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 218 | #define _PCNT_CTRL_TCCPRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 219 | #define _PCNT_CTRL_TCCPRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 220 | #define _PCNT_CTRL_TCCPRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 221 | #define _PCNT_CTRL_TCCPRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 222 | #define _PCNT_CTRL_TCCPRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 223 | #define _PCNT_CTRL_TCCPRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 224 | #define _PCNT_CTRL_TCCPRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 225 | #define _PCNT_CTRL_TCCPRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 226 | #define _PCNT_CTRL_TCCPRSSEL_PRSCH8 0x00000008UL /**< Mode PRSCH8 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 227 | #define _PCNT_CTRL_TCCPRSSEL_PRSCH9 0x00000009UL /**< Mode PRSCH9 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 228 | #define _PCNT_CTRL_TCCPRSSEL_PRSCH10 0x0000000AUL /**< Mode PRSCH10 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 229 | #define _PCNT_CTRL_TCCPRSSEL_PRSCH11 0x0000000BUL /**< Mode PRSCH11 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 230 | #define PCNT_CTRL_TCCPRSSEL_DEFAULT (_PCNT_CTRL_TCCPRSSEL_DEFAULT << 26) /**< Shifted mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 231 | #define PCNT_CTRL_TCCPRSSEL_PRSCH0 (_PCNT_CTRL_TCCPRSSEL_PRSCH0 << 26) /**< Shifted mode PRSCH0 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 232 | #define PCNT_CTRL_TCCPRSSEL_PRSCH1 (_PCNT_CTRL_TCCPRSSEL_PRSCH1 << 26) /**< Shifted mode PRSCH1 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 233 | #define PCNT_CTRL_TCCPRSSEL_PRSCH2 (_PCNT_CTRL_TCCPRSSEL_PRSCH2 << 26) /**< Shifted mode PRSCH2 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 234 | #define PCNT_CTRL_TCCPRSSEL_PRSCH3 (_PCNT_CTRL_TCCPRSSEL_PRSCH3 << 26) /**< Shifted mode PRSCH3 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 235 | #define PCNT_CTRL_TCCPRSSEL_PRSCH4 (_PCNT_CTRL_TCCPRSSEL_PRSCH4 << 26) /**< Shifted mode PRSCH4 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 236 | #define PCNT_CTRL_TCCPRSSEL_PRSCH5 (_PCNT_CTRL_TCCPRSSEL_PRSCH5 << 26) /**< Shifted mode PRSCH5 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 237 | #define PCNT_CTRL_TCCPRSSEL_PRSCH6 (_PCNT_CTRL_TCCPRSSEL_PRSCH6 << 26) /**< Shifted mode PRSCH6 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 238 | #define PCNT_CTRL_TCCPRSSEL_PRSCH7 (_PCNT_CTRL_TCCPRSSEL_PRSCH7 << 26) /**< Shifted mode PRSCH7 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 239 | #define PCNT_CTRL_TCCPRSSEL_PRSCH8 (_PCNT_CTRL_TCCPRSSEL_PRSCH8 << 26) /**< Shifted mode PRSCH8 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 240 | #define PCNT_CTRL_TCCPRSSEL_PRSCH9 (_PCNT_CTRL_TCCPRSSEL_PRSCH9 << 26) /**< Shifted mode PRSCH9 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 241 | #define PCNT_CTRL_TCCPRSSEL_PRSCH10 (_PCNT_CTRL_TCCPRSSEL_PRSCH10 << 26) /**< Shifted mode PRSCH10 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 242 | #define PCNT_CTRL_TCCPRSSEL_PRSCH11 (_PCNT_CTRL_TCCPRSSEL_PRSCH11 << 26) /**< Shifted mode PRSCH11 for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 243 | #define PCNT_CTRL_TOPBHFSEL (0x1UL << 31) /**< TOPB High frequency value select */ |
sahilmgandhi | 18:6a4db94011d3 | 244 | #define _PCNT_CTRL_TOPBHFSEL_SHIFT 31 /**< Shift value for PCNT_TOPBHFSEL */ |
sahilmgandhi | 18:6a4db94011d3 | 245 | #define _PCNT_CTRL_TOPBHFSEL_MASK 0x80000000UL /**< Bit mask for PCNT_TOPBHFSEL */ |
sahilmgandhi | 18:6a4db94011d3 | 246 | #define _PCNT_CTRL_TOPBHFSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 247 | #define PCNT_CTRL_TOPBHFSEL_DEFAULT (_PCNT_CTRL_TOPBHFSEL_DEFAULT << 31) /**< Shifted mode DEFAULT for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 248 | |
sahilmgandhi | 18:6a4db94011d3 | 249 | /* Bit fields for PCNT CMD */ |
sahilmgandhi | 18:6a4db94011d3 | 250 | #define _PCNT_CMD_RESETVALUE 0x00000000UL /**< Default value for PCNT_CMD */ |
sahilmgandhi | 18:6a4db94011d3 | 251 | #define _PCNT_CMD_MASK 0x00000003UL /**< Mask for PCNT_CMD */ |
sahilmgandhi | 18:6a4db94011d3 | 252 | #define PCNT_CMD_LCNTIM (0x1UL << 0) /**< Load CNT Immediately */ |
sahilmgandhi | 18:6a4db94011d3 | 253 | #define _PCNT_CMD_LCNTIM_SHIFT 0 /**< Shift value for PCNT_LCNTIM */ |
sahilmgandhi | 18:6a4db94011d3 | 254 | #define _PCNT_CMD_LCNTIM_MASK 0x1UL /**< Bit mask for PCNT_LCNTIM */ |
sahilmgandhi | 18:6a4db94011d3 | 255 | #define _PCNT_CMD_LCNTIM_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CMD */ |
sahilmgandhi | 18:6a4db94011d3 | 256 | #define PCNT_CMD_LCNTIM_DEFAULT (_PCNT_CMD_LCNTIM_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_CMD */ |
sahilmgandhi | 18:6a4db94011d3 | 257 | #define PCNT_CMD_LTOPBIM (0x1UL << 1) /**< Load TOPB Immediately */ |
sahilmgandhi | 18:6a4db94011d3 | 258 | #define _PCNT_CMD_LTOPBIM_SHIFT 1 /**< Shift value for PCNT_LTOPBIM */ |
sahilmgandhi | 18:6a4db94011d3 | 259 | #define _PCNT_CMD_LTOPBIM_MASK 0x2UL /**< Bit mask for PCNT_LTOPBIM */ |
sahilmgandhi | 18:6a4db94011d3 | 260 | #define _PCNT_CMD_LTOPBIM_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CMD */ |
sahilmgandhi | 18:6a4db94011d3 | 261 | #define PCNT_CMD_LTOPBIM_DEFAULT (_PCNT_CMD_LTOPBIM_DEFAULT << 1) /**< Shifted mode DEFAULT for PCNT_CMD */ |
sahilmgandhi | 18:6a4db94011d3 | 262 | |
sahilmgandhi | 18:6a4db94011d3 | 263 | /* Bit fields for PCNT STATUS */ |
sahilmgandhi | 18:6a4db94011d3 | 264 | #define _PCNT_STATUS_RESETVALUE 0x00000000UL /**< Default value for PCNT_STATUS */ |
sahilmgandhi | 18:6a4db94011d3 | 265 | #define _PCNT_STATUS_MASK 0x00000001UL /**< Mask for PCNT_STATUS */ |
sahilmgandhi | 18:6a4db94011d3 | 266 | #define PCNT_STATUS_DIR (0x1UL << 0) /**< Current Counter Direction */ |
sahilmgandhi | 18:6a4db94011d3 | 267 | #define _PCNT_STATUS_DIR_SHIFT 0 /**< Shift value for PCNT_DIR */ |
sahilmgandhi | 18:6a4db94011d3 | 268 | #define _PCNT_STATUS_DIR_MASK 0x1UL /**< Bit mask for PCNT_DIR */ |
sahilmgandhi | 18:6a4db94011d3 | 269 | #define _PCNT_STATUS_DIR_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_STATUS */ |
sahilmgandhi | 18:6a4db94011d3 | 270 | #define _PCNT_STATUS_DIR_UP 0x00000000UL /**< Mode UP for PCNT_STATUS */ |
sahilmgandhi | 18:6a4db94011d3 | 271 | #define _PCNT_STATUS_DIR_DOWN 0x00000001UL /**< Mode DOWN for PCNT_STATUS */ |
sahilmgandhi | 18:6a4db94011d3 | 272 | #define PCNT_STATUS_DIR_DEFAULT (_PCNT_STATUS_DIR_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_STATUS */ |
sahilmgandhi | 18:6a4db94011d3 | 273 | #define PCNT_STATUS_DIR_UP (_PCNT_STATUS_DIR_UP << 0) /**< Shifted mode UP for PCNT_STATUS */ |
sahilmgandhi | 18:6a4db94011d3 | 274 | #define PCNT_STATUS_DIR_DOWN (_PCNT_STATUS_DIR_DOWN << 0) /**< Shifted mode DOWN for PCNT_STATUS */ |
sahilmgandhi | 18:6a4db94011d3 | 275 | |
sahilmgandhi | 18:6a4db94011d3 | 276 | /* Bit fields for PCNT CNT */ |
sahilmgandhi | 18:6a4db94011d3 | 277 | #define _PCNT_CNT_RESETVALUE 0x00000000UL /**< Default value for PCNT_CNT */ |
sahilmgandhi | 18:6a4db94011d3 | 278 | #define _PCNT_CNT_MASK 0x0000FFFFUL /**< Mask for PCNT_CNT */ |
sahilmgandhi | 18:6a4db94011d3 | 279 | #define _PCNT_CNT_CNT_SHIFT 0 /**< Shift value for PCNT_CNT */ |
sahilmgandhi | 18:6a4db94011d3 | 280 | #define _PCNT_CNT_CNT_MASK 0xFFFFUL /**< Bit mask for PCNT_CNT */ |
sahilmgandhi | 18:6a4db94011d3 | 281 | #define _PCNT_CNT_CNT_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_CNT */ |
sahilmgandhi | 18:6a4db94011d3 | 282 | #define PCNT_CNT_CNT_DEFAULT (_PCNT_CNT_CNT_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_CNT */ |
sahilmgandhi | 18:6a4db94011d3 | 283 | |
sahilmgandhi | 18:6a4db94011d3 | 284 | /* Bit fields for PCNT TOP */ |
sahilmgandhi | 18:6a4db94011d3 | 285 | #define _PCNT_TOP_RESETVALUE 0x000000FFUL /**< Default value for PCNT_TOP */ |
sahilmgandhi | 18:6a4db94011d3 | 286 | #define _PCNT_TOP_MASK 0x0000FFFFUL /**< Mask for PCNT_TOP */ |
sahilmgandhi | 18:6a4db94011d3 | 287 | #define _PCNT_TOP_TOP_SHIFT 0 /**< Shift value for PCNT_TOP */ |
sahilmgandhi | 18:6a4db94011d3 | 288 | #define _PCNT_TOP_TOP_MASK 0xFFFFUL /**< Bit mask for PCNT_TOP */ |
sahilmgandhi | 18:6a4db94011d3 | 289 | #define _PCNT_TOP_TOP_DEFAULT 0x000000FFUL /**< Mode DEFAULT for PCNT_TOP */ |
sahilmgandhi | 18:6a4db94011d3 | 290 | #define PCNT_TOP_TOP_DEFAULT (_PCNT_TOP_TOP_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_TOP */ |
sahilmgandhi | 18:6a4db94011d3 | 291 | |
sahilmgandhi | 18:6a4db94011d3 | 292 | /* Bit fields for PCNT TOPB */ |
sahilmgandhi | 18:6a4db94011d3 | 293 | #define _PCNT_TOPB_RESETVALUE 0x000000FFUL /**< Default value for PCNT_TOPB */ |
sahilmgandhi | 18:6a4db94011d3 | 294 | #define _PCNT_TOPB_MASK 0x0000FFFFUL /**< Mask for PCNT_TOPB */ |
sahilmgandhi | 18:6a4db94011d3 | 295 | #define _PCNT_TOPB_TOPB_SHIFT 0 /**< Shift value for PCNT_TOPB */ |
sahilmgandhi | 18:6a4db94011d3 | 296 | #define _PCNT_TOPB_TOPB_MASK 0xFFFFUL /**< Bit mask for PCNT_TOPB */ |
sahilmgandhi | 18:6a4db94011d3 | 297 | #define _PCNT_TOPB_TOPB_DEFAULT 0x000000FFUL /**< Mode DEFAULT for PCNT_TOPB */ |
sahilmgandhi | 18:6a4db94011d3 | 298 | #define PCNT_TOPB_TOPB_DEFAULT (_PCNT_TOPB_TOPB_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_TOPB */ |
sahilmgandhi | 18:6a4db94011d3 | 299 | |
sahilmgandhi | 18:6a4db94011d3 | 300 | /* Bit fields for PCNT IF */ |
sahilmgandhi | 18:6a4db94011d3 | 301 | #define _PCNT_IF_RESETVALUE 0x00000000UL /**< Default value for PCNT_IF */ |
sahilmgandhi | 18:6a4db94011d3 | 302 | #define _PCNT_IF_MASK 0x0000003FUL /**< Mask for PCNT_IF */ |
sahilmgandhi | 18:6a4db94011d3 | 303 | #define PCNT_IF_UF (0x1UL << 0) /**< Underflow Interrupt Read Flag */ |
sahilmgandhi | 18:6a4db94011d3 | 304 | #define _PCNT_IF_UF_SHIFT 0 /**< Shift value for PCNT_UF */ |
sahilmgandhi | 18:6a4db94011d3 | 305 | #define _PCNT_IF_UF_MASK 0x1UL /**< Bit mask for PCNT_UF */ |
sahilmgandhi | 18:6a4db94011d3 | 306 | #define _PCNT_IF_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IF */ |
sahilmgandhi | 18:6a4db94011d3 | 307 | #define PCNT_IF_UF_DEFAULT (_PCNT_IF_UF_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_IF */ |
sahilmgandhi | 18:6a4db94011d3 | 308 | #define PCNT_IF_OF (0x1UL << 1) /**< Overflow Interrupt Read Flag */ |
sahilmgandhi | 18:6a4db94011d3 | 309 | #define _PCNT_IF_OF_SHIFT 1 /**< Shift value for PCNT_OF */ |
sahilmgandhi | 18:6a4db94011d3 | 310 | #define _PCNT_IF_OF_MASK 0x2UL /**< Bit mask for PCNT_OF */ |
sahilmgandhi | 18:6a4db94011d3 | 311 | #define _PCNT_IF_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IF */ |
sahilmgandhi | 18:6a4db94011d3 | 312 | #define PCNT_IF_OF_DEFAULT (_PCNT_IF_OF_DEFAULT << 1) /**< Shifted mode DEFAULT for PCNT_IF */ |
sahilmgandhi | 18:6a4db94011d3 | 313 | #define PCNT_IF_DIRCNG (0x1UL << 2) /**< Direction Change Detect Interrupt Flag */ |
sahilmgandhi | 18:6a4db94011d3 | 314 | #define _PCNT_IF_DIRCNG_SHIFT 2 /**< Shift value for PCNT_DIRCNG */ |
sahilmgandhi | 18:6a4db94011d3 | 315 | #define _PCNT_IF_DIRCNG_MASK 0x4UL /**< Bit mask for PCNT_DIRCNG */ |
sahilmgandhi | 18:6a4db94011d3 | 316 | #define _PCNT_IF_DIRCNG_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IF */ |
sahilmgandhi | 18:6a4db94011d3 | 317 | #define PCNT_IF_DIRCNG_DEFAULT (_PCNT_IF_DIRCNG_DEFAULT << 2) /**< Shifted mode DEFAULT for PCNT_IF */ |
sahilmgandhi | 18:6a4db94011d3 | 318 | #define PCNT_IF_AUXOF (0x1UL << 3) /**< Auxiliary Overflow Interrupt Read Flag */ |
sahilmgandhi | 18:6a4db94011d3 | 319 | #define _PCNT_IF_AUXOF_SHIFT 3 /**< Shift value for PCNT_AUXOF */ |
sahilmgandhi | 18:6a4db94011d3 | 320 | #define _PCNT_IF_AUXOF_MASK 0x8UL /**< Bit mask for PCNT_AUXOF */ |
sahilmgandhi | 18:6a4db94011d3 | 321 | #define _PCNT_IF_AUXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IF */ |
sahilmgandhi | 18:6a4db94011d3 | 322 | #define PCNT_IF_AUXOF_DEFAULT (_PCNT_IF_AUXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for PCNT_IF */ |
sahilmgandhi | 18:6a4db94011d3 | 323 | #define PCNT_IF_TCC (0x1UL << 4) /**< Triggered compare Interrupt Read Flag */ |
sahilmgandhi | 18:6a4db94011d3 | 324 | #define _PCNT_IF_TCC_SHIFT 4 /**< Shift value for PCNT_TCC */ |
sahilmgandhi | 18:6a4db94011d3 | 325 | #define _PCNT_IF_TCC_MASK 0x10UL /**< Bit mask for PCNT_TCC */ |
sahilmgandhi | 18:6a4db94011d3 | 326 | #define _PCNT_IF_TCC_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IF */ |
sahilmgandhi | 18:6a4db94011d3 | 327 | #define PCNT_IF_TCC_DEFAULT (_PCNT_IF_TCC_DEFAULT << 4) /**< Shifted mode DEFAULT for PCNT_IF */ |
sahilmgandhi | 18:6a4db94011d3 | 328 | #define PCNT_IF_OQSTERR (0x1UL << 5) /**< Oversampling Quadrature State Error Interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 329 | #define _PCNT_IF_OQSTERR_SHIFT 5 /**< Shift value for PCNT_OQSTERR */ |
sahilmgandhi | 18:6a4db94011d3 | 330 | #define _PCNT_IF_OQSTERR_MASK 0x20UL /**< Bit mask for PCNT_OQSTERR */ |
sahilmgandhi | 18:6a4db94011d3 | 331 | #define _PCNT_IF_OQSTERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IF */ |
sahilmgandhi | 18:6a4db94011d3 | 332 | #define PCNT_IF_OQSTERR_DEFAULT (_PCNT_IF_OQSTERR_DEFAULT << 5) /**< Shifted mode DEFAULT for PCNT_IF */ |
sahilmgandhi | 18:6a4db94011d3 | 333 | |
sahilmgandhi | 18:6a4db94011d3 | 334 | /* Bit fields for PCNT IFS */ |
sahilmgandhi | 18:6a4db94011d3 | 335 | #define _PCNT_IFS_RESETVALUE 0x00000000UL /**< Default value for PCNT_IFS */ |
sahilmgandhi | 18:6a4db94011d3 | 336 | #define _PCNT_IFS_MASK 0x0000003FUL /**< Mask for PCNT_IFS */ |
sahilmgandhi | 18:6a4db94011d3 | 337 | #define PCNT_IFS_UF (0x1UL << 0) /**< Set UF Interrupt Flag */ |
sahilmgandhi | 18:6a4db94011d3 | 338 | #define _PCNT_IFS_UF_SHIFT 0 /**< Shift value for PCNT_UF */ |
sahilmgandhi | 18:6a4db94011d3 | 339 | #define _PCNT_IFS_UF_MASK 0x1UL /**< Bit mask for PCNT_UF */ |
sahilmgandhi | 18:6a4db94011d3 | 340 | #define _PCNT_IFS_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFS */ |
sahilmgandhi | 18:6a4db94011d3 | 341 | #define PCNT_IFS_UF_DEFAULT (_PCNT_IFS_UF_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_IFS */ |
sahilmgandhi | 18:6a4db94011d3 | 342 | #define PCNT_IFS_OF (0x1UL << 1) /**< Set OF Interrupt Flag */ |
sahilmgandhi | 18:6a4db94011d3 | 343 | #define _PCNT_IFS_OF_SHIFT 1 /**< Shift value for PCNT_OF */ |
sahilmgandhi | 18:6a4db94011d3 | 344 | #define _PCNT_IFS_OF_MASK 0x2UL /**< Bit mask for PCNT_OF */ |
sahilmgandhi | 18:6a4db94011d3 | 345 | #define _PCNT_IFS_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFS */ |
sahilmgandhi | 18:6a4db94011d3 | 346 | #define PCNT_IFS_OF_DEFAULT (_PCNT_IFS_OF_DEFAULT << 1) /**< Shifted mode DEFAULT for PCNT_IFS */ |
sahilmgandhi | 18:6a4db94011d3 | 347 | #define PCNT_IFS_DIRCNG (0x1UL << 2) /**< Set DIRCNG Interrupt Flag */ |
sahilmgandhi | 18:6a4db94011d3 | 348 | #define _PCNT_IFS_DIRCNG_SHIFT 2 /**< Shift value for PCNT_DIRCNG */ |
sahilmgandhi | 18:6a4db94011d3 | 349 | #define _PCNT_IFS_DIRCNG_MASK 0x4UL /**< Bit mask for PCNT_DIRCNG */ |
sahilmgandhi | 18:6a4db94011d3 | 350 | #define _PCNT_IFS_DIRCNG_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFS */ |
sahilmgandhi | 18:6a4db94011d3 | 351 | #define PCNT_IFS_DIRCNG_DEFAULT (_PCNT_IFS_DIRCNG_DEFAULT << 2) /**< Shifted mode DEFAULT for PCNT_IFS */ |
sahilmgandhi | 18:6a4db94011d3 | 352 | #define PCNT_IFS_AUXOF (0x1UL << 3) /**< Set AUXOF Interrupt Flag */ |
sahilmgandhi | 18:6a4db94011d3 | 353 | #define _PCNT_IFS_AUXOF_SHIFT 3 /**< Shift value for PCNT_AUXOF */ |
sahilmgandhi | 18:6a4db94011d3 | 354 | #define _PCNT_IFS_AUXOF_MASK 0x8UL /**< Bit mask for PCNT_AUXOF */ |
sahilmgandhi | 18:6a4db94011d3 | 355 | #define _PCNT_IFS_AUXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFS */ |
sahilmgandhi | 18:6a4db94011d3 | 356 | #define PCNT_IFS_AUXOF_DEFAULT (_PCNT_IFS_AUXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for PCNT_IFS */ |
sahilmgandhi | 18:6a4db94011d3 | 357 | #define PCNT_IFS_TCC (0x1UL << 4) /**< Set TCC Interrupt Flag */ |
sahilmgandhi | 18:6a4db94011d3 | 358 | #define _PCNT_IFS_TCC_SHIFT 4 /**< Shift value for PCNT_TCC */ |
sahilmgandhi | 18:6a4db94011d3 | 359 | #define _PCNT_IFS_TCC_MASK 0x10UL /**< Bit mask for PCNT_TCC */ |
sahilmgandhi | 18:6a4db94011d3 | 360 | #define _PCNT_IFS_TCC_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFS */ |
sahilmgandhi | 18:6a4db94011d3 | 361 | #define PCNT_IFS_TCC_DEFAULT (_PCNT_IFS_TCC_DEFAULT << 4) /**< Shifted mode DEFAULT for PCNT_IFS */ |
sahilmgandhi | 18:6a4db94011d3 | 362 | #define PCNT_IFS_OQSTERR (0x1UL << 5) /**< Set OQSTERR Interrupt Flag */ |
sahilmgandhi | 18:6a4db94011d3 | 363 | #define _PCNT_IFS_OQSTERR_SHIFT 5 /**< Shift value for PCNT_OQSTERR */ |
sahilmgandhi | 18:6a4db94011d3 | 364 | #define _PCNT_IFS_OQSTERR_MASK 0x20UL /**< Bit mask for PCNT_OQSTERR */ |
sahilmgandhi | 18:6a4db94011d3 | 365 | #define _PCNT_IFS_OQSTERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFS */ |
sahilmgandhi | 18:6a4db94011d3 | 366 | #define PCNT_IFS_OQSTERR_DEFAULT (_PCNT_IFS_OQSTERR_DEFAULT << 5) /**< Shifted mode DEFAULT for PCNT_IFS */ |
sahilmgandhi | 18:6a4db94011d3 | 367 | |
sahilmgandhi | 18:6a4db94011d3 | 368 | /* Bit fields for PCNT IFC */ |
sahilmgandhi | 18:6a4db94011d3 | 369 | #define _PCNT_IFC_RESETVALUE 0x00000000UL /**< Default value for PCNT_IFC */ |
sahilmgandhi | 18:6a4db94011d3 | 370 | #define _PCNT_IFC_MASK 0x0000003FUL /**< Mask for PCNT_IFC */ |
sahilmgandhi | 18:6a4db94011d3 | 371 | #define PCNT_IFC_UF (0x1UL << 0) /**< Clear UF Interrupt Flag */ |
sahilmgandhi | 18:6a4db94011d3 | 372 | #define _PCNT_IFC_UF_SHIFT 0 /**< Shift value for PCNT_UF */ |
sahilmgandhi | 18:6a4db94011d3 | 373 | #define _PCNT_IFC_UF_MASK 0x1UL /**< Bit mask for PCNT_UF */ |
sahilmgandhi | 18:6a4db94011d3 | 374 | #define _PCNT_IFC_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFC */ |
sahilmgandhi | 18:6a4db94011d3 | 375 | #define PCNT_IFC_UF_DEFAULT (_PCNT_IFC_UF_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_IFC */ |
sahilmgandhi | 18:6a4db94011d3 | 376 | #define PCNT_IFC_OF (0x1UL << 1) /**< Clear OF Interrupt Flag */ |
sahilmgandhi | 18:6a4db94011d3 | 377 | #define _PCNT_IFC_OF_SHIFT 1 /**< Shift value for PCNT_OF */ |
sahilmgandhi | 18:6a4db94011d3 | 378 | #define _PCNT_IFC_OF_MASK 0x2UL /**< Bit mask for PCNT_OF */ |
sahilmgandhi | 18:6a4db94011d3 | 379 | #define _PCNT_IFC_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFC */ |
sahilmgandhi | 18:6a4db94011d3 | 380 | #define PCNT_IFC_OF_DEFAULT (_PCNT_IFC_OF_DEFAULT << 1) /**< Shifted mode DEFAULT for PCNT_IFC */ |
sahilmgandhi | 18:6a4db94011d3 | 381 | #define PCNT_IFC_DIRCNG (0x1UL << 2) /**< Clear DIRCNG Interrupt Flag */ |
sahilmgandhi | 18:6a4db94011d3 | 382 | #define _PCNT_IFC_DIRCNG_SHIFT 2 /**< Shift value for PCNT_DIRCNG */ |
sahilmgandhi | 18:6a4db94011d3 | 383 | #define _PCNT_IFC_DIRCNG_MASK 0x4UL /**< Bit mask for PCNT_DIRCNG */ |
sahilmgandhi | 18:6a4db94011d3 | 384 | #define _PCNT_IFC_DIRCNG_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFC */ |
sahilmgandhi | 18:6a4db94011d3 | 385 | #define PCNT_IFC_DIRCNG_DEFAULT (_PCNT_IFC_DIRCNG_DEFAULT << 2) /**< Shifted mode DEFAULT for PCNT_IFC */ |
sahilmgandhi | 18:6a4db94011d3 | 386 | #define PCNT_IFC_AUXOF (0x1UL << 3) /**< Clear AUXOF Interrupt Flag */ |
sahilmgandhi | 18:6a4db94011d3 | 387 | #define _PCNT_IFC_AUXOF_SHIFT 3 /**< Shift value for PCNT_AUXOF */ |
sahilmgandhi | 18:6a4db94011d3 | 388 | #define _PCNT_IFC_AUXOF_MASK 0x8UL /**< Bit mask for PCNT_AUXOF */ |
sahilmgandhi | 18:6a4db94011d3 | 389 | #define _PCNT_IFC_AUXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFC */ |
sahilmgandhi | 18:6a4db94011d3 | 390 | #define PCNT_IFC_AUXOF_DEFAULT (_PCNT_IFC_AUXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for PCNT_IFC */ |
sahilmgandhi | 18:6a4db94011d3 | 391 | #define PCNT_IFC_TCC (0x1UL << 4) /**< Clear TCC Interrupt Flag */ |
sahilmgandhi | 18:6a4db94011d3 | 392 | #define _PCNT_IFC_TCC_SHIFT 4 /**< Shift value for PCNT_TCC */ |
sahilmgandhi | 18:6a4db94011d3 | 393 | #define _PCNT_IFC_TCC_MASK 0x10UL /**< Bit mask for PCNT_TCC */ |
sahilmgandhi | 18:6a4db94011d3 | 394 | #define _PCNT_IFC_TCC_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFC */ |
sahilmgandhi | 18:6a4db94011d3 | 395 | #define PCNT_IFC_TCC_DEFAULT (_PCNT_IFC_TCC_DEFAULT << 4) /**< Shifted mode DEFAULT for PCNT_IFC */ |
sahilmgandhi | 18:6a4db94011d3 | 396 | #define PCNT_IFC_OQSTERR (0x1UL << 5) /**< Clear OQSTERR Interrupt Flag */ |
sahilmgandhi | 18:6a4db94011d3 | 397 | #define _PCNT_IFC_OQSTERR_SHIFT 5 /**< Shift value for PCNT_OQSTERR */ |
sahilmgandhi | 18:6a4db94011d3 | 398 | #define _PCNT_IFC_OQSTERR_MASK 0x20UL /**< Bit mask for PCNT_OQSTERR */ |
sahilmgandhi | 18:6a4db94011d3 | 399 | #define _PCNT_IFC_OQSTERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IFC */ |
sahilmgandhi | 18:6a4db94011d3 | 400 | #define PCNT_IFC_OQSTERR_DEFAULT (_PCNT_IFC_OQSTERR_DEFAULT << 5) /**< Shifted mode DEFAULT for PCNT_IFC */ |
sahilmgandhi | 18:6a4db94011d3 | 401 | |
sahilmgandhi | 18:6a4db94011d3 | 402 | /* Bit fields for PCNT IEN */ |
sahilmgandhi | 18:6a4db94011d3 | 403 | #define _PCNT_IEN_RESETVALUE 0x00000000UL /**< Default value for PCNT_IEN */ |
sahilmgandhi | 18:6a4db94011d3 | 404 | #define _PCNT_IEN_MASK 0x0000003FUL /**< Mask for PCNT_IEN */ |
sahilmgandhi | 18:6a4db94011d3 | 405 | #define PCNT_IEN_UF (0x1UL << 0) /**< UF Interrupt Enable */ |
sahilmgandhi | 18:6a4db94011d3 | 406 | #define _PCNT_IEN_UF_SHIFT 0 /**< Shift value for PCNT_UF */ |
sahilmgandhi | 18:6a4db94011d3 | 407 | #define _PCNT_IEN_UF_MASK 0x1UL /**< Bit mask for PCNT_UF */ |
sahilmgandhi | 18:6a4db94011d3 | 408 | #define _PCNT_IEN_UF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IEN */ |
sahilmgandhi | 18:6a4db94011d3 | 409 | #define PCNT_IEN_UF_DEFAULT (_PCNT_IEN_UF_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_IEN */ |
sahilmgandhi | 18:6a4db94011d3 | 410 | #define PCNT_IEN_OF (0x1UL << 1) /**< OF Interrupt Enable */ |
sahilmgandhi | 18:6a4db94011d3 | 411 | #define _PCNT_IEN_OF_SHIFT 1 /**< Shift value for PCNT_OF */ |
sahilmgandhi | 18:6a4db94011d3 | 412 | #define _PCNT_IEN_OF_MASK 0x2UL /**< Bit mask for PCNT_OF */ |
sahilmgandhi | 18:6a4db94011d3 | 413 | #define _PCNT_IEN_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IEN */ |
sahilmgandhi | 18:6a4db94011d3 | 414 | #define PCNT_IEN_OF_DEFAULT (_PCNT_IEN_OF_DEFAULT << 1) /**< Shifted mode DEFAULT for PCNT_IEN */ |
sahilmgandhi | 18:6a4db94011d3 | 415 | #define PCNT_IEN_DIRCNG (0x1UL << 2) /**< DIRCNG Interrupt Enable */ |
sahilmgandhi | 18:6a4db94011d3 | 416 | #define _PCNT_IEN_DIRCNG_SHIFT 2 /**< Shift value for PCNT_DIRCNG */ |
sahilmgandhi | 18:6a4db94011d3 | 417 | #define _PCNT_IEN_DIRCNG_MASK 0x4UL /**< Bit mask for PCNT_DIRCNG */ |
sahilmgandhi | 18:6a4db94011d3 | 418 | #define _PCNT_IEN_DIRCNG_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IEN */ |
sahilmgandhi | 18:6a4db94011d3 | 419 | #define PCNT_IEN_DIRCNG_DEFAULT (_PCNT_IEN_DIRCNG_DEFAULT << 2) /**< Shifted mode DEFAULT for PCNT_IEN */ |
sahilmgandhi | 18:6a4db94011d3 | 420 | #define PCNT_IEN_AUXOF (0x1UL << 3) /**< AUXOF Interrupt Enable */ |
sahilmgandhi | 18:6a4db94011d3 | 421 | #define _PCNT_IEN_AUXOF_SHIFT 3 /**< Shift value for PCNT_AUXOF */ |
sahilmgandhi | 18:6a4db94011d3 | 422 | #define _PCNT_IEN_AUXOF_MASK 0x8UL /**< Bit mask for PCNT_AUXOF */ |
sahilmgandhi | 18:6a4db94011d3 | 423 | #define _PCNT_IEN_AUXOF_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IEN */ |
sahilmgandhi | 18:6a4db94011d3 | 424 | #define PCNT_IEN_AUXOF_DEFAULT (_PCNT_IEN_AUXOF_DEFAULT << 3) /**< Shifted mode DEFAULT for PCNT_IEN */ |
sahilmgandhi | 18:6a4db94011d3 | 425 | #define PCNT_IEN_TCC (0x1UL << 4) /**< TCC Interrupt Enable */ |
sahilmgandhi | 18:6a4db94011d3 | 426 | #define _PCNT_IEN_TCC_SHIFT 4 /**< Shift value for PCNT_TCC */ |
sahilmgandhi | 18:6a4db94011d3 | 427 | #define _PCNT_IEN_TCC_MASK 0x10UL /**< Bit mask for PCNT_TCC */ |
sahilmgandhi | 18:6a4db94011d3 | 428 | #define _PCNT_IEN_TCC_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IEN */ |
sahilmgandhi | 18:6a4db94011d3 | 429 | #define PCNT_IEN_TCC_DEFAULT (_PCNT_IEN_TCC_DEFAULT << 4) /**< Shifted mode DEFAULT for PCNT_IEN */ |
sahilmgandhi | 18:6a4db94011d3 | 430 | #define PCNT_IEN_OQSTERR (0x1UL << 5) /**< OQSTERR Interrupt Enable */ |
sahilmgandhi | 18:6a4db94011d3 | 431 | #define _PCNT_IEN_OQSTERR_SHIFT 5 /**< Shift value for PCNT_OQSTERR */ |
sahilmgandhi | 18:6a4db94011d3 | 432 | #define _PCNT_IEN_OQSTERR_MASK 0x20UL /**< Bit mask for PCNT_OQSTERR */ |
sahilmgandhi | 18:6a4db94011d3 | 433 | #define _PCNT_IEN_OQSTERR_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_IEN */ |
sahilmgandhi | 18:6a4db94011d3 | 434 | #define PCNT_IEN_OQSTERR_DEFAULT (_PCNT_IEN_OQSTERR_DEFAULT << 5) /**< Shifted mode DEFAULT for PCNT_IEN */ |
sahilmgandhi | 18:6a4db94011d3 | 435 | |
sahilmgandhi | 18:6a4db94011d3 | 436 | /* Bit fields for PCNT ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 437 | #define _PCNT_ROUTELOC0_RESETVALUE 0x00000000UL /**< Default value for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 438 | #define _PCNT_ROUTELOC0_MASK 0x00001F1FUL /**< Mask for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 439 | #define _PCNT_ROUTELOC0_S0INLOC_SHIFT 0 /**< Shift value for PCNT_S0INLOC */ |
sahilmgandhi | 18:6a4db94011d3 | 440 | #define _PCNT_ROUTELOC0_S0INLOC_MASK 0x1FUL /**< Bit mask for PCNT_S0INLOC */ |
sahilmgandhi | 18:6a4db94011d3 | 441 | #define _PCNT_ROUTELOC0_S0INLOC_LOC0 0x00000000UL /**< Mode LOC0 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 442 | #define _PCNT_ROUTELOC0_S0INLOC_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 443 | #define _PCNT_ROUTELOC0_S0INLOC_LOC1 0x00000001UL /**< Mode LOC1 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 444 | #define _PCNT_ROUTELOC0_S0INLOC_LOC2 0x00000002UL /**< Mode LOC2 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 445 | #define _PCNT_ROUTELOC0_S0INLOC_LOC3 0x00000003UL /**< Mode LOC3 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 446 | #define _PCNT_ROUTELOC0_S0INLOC_LOC4 0x00000004UL /**< Mode LOC4 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 447 | #define _PCNT_ROUTELOC0_S0INLOC_LOC5 0x00000005UL /**< Mode LOC5 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 448 | #define _PCNT_ROUTELOC0_S0INLOC_LOC6 0x00000006UL /**< Mode LOC6 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 449 | #define _PCNT_ROUTELOC0_S0INLOC_LOC7 0x00000007UL /**< Mode LOC7 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 450 | #define _PCNT_ROUTELOC0_S0INLOC_LOC8 0x00000008UL /**< Mode LOC8 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 451 | #define _PCNT_ROUTELOC0_S0INLOC_LOC9 0x00000009UL /**< Mode LOC9 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 452 | #define _PCNT_ROUTELOC0_S0INLOC_LOC10 0x0000000AUL /**< Mode LOC10 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 453 | #define _PCNT_ROUTELOC0_S0INLOC_LOC11 0x0000000BUL /**< Mode LOC11 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 454 | #define _PCNT_ROUTELOC0_S0INLOC_LOC12 0x0000000CUL /**< Mode LOC12 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 455 | #define _PCNT_ROUTELOC0_S0INLOC_LOC13 0x0000000DUL /**< Mode LOC13 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 456 | #define _PCNT_ROUTELOC0_S0INLOC_LOC14 0x0000000EUL /**< Mode LOC14 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 457 | #define _PCNT_ROUTELOC0_S0INLOC_LOC15 0x0000000FUL /**< Mode LOC15 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 458 | #define _PCNT_ROUTELOC0_S0INLOC_LOC16 0x00000010UL /**< Mode LOC16 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 459 | #define _PCNT_ROUTELOC0_S0INLOC_LOC17 0x00000011UL /**< Mode LOC17 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 460 | #define _PCNT_ROUTELOC0_S0INLOC_LOC18 0x00000012UL /**< Mode LOC18 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 461 | #define _PCNT_ROUTELOC0_S0INLOC_LOC19 0x00000013UL /**< Mode LOC19 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 462 | #define _PCNT_ROUTELOC0_S0INLOC_LOC20 0x00000014UL /**< Mode LOC20 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 463 | #define _PCNT_ROUTELOC0_S0INLOC_LOC21 0x00000015UL /**< Mode LOC21 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 464 | #define _PCNT_ROUTELOC0_S0INLOC_LOC22 0x00000016UL /**< Mode LOC22 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 465 | #define _PCNT_ROUTELOC0_S0INLOC_LOC23 0x00000017UL /**< Mode LOC23 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 466 | #define _PCNT_ROUTELOC0_S0INLOC_LOC24 0x00000018UL /**< Mode LOC24 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 467 | #define _PCNT_ROUTELOC0_S0INLOC_LOC25 0x00000019UL /**< Mode LOC25 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 468 | #define _PCNT_ROUTELOC0_S0INLOC_LOC26 0x0000001AUL /**< Mode LOC26 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 469 | #define _PCNT_ROUTELOC0_S0INLOC_LOC27 0x0000001BUL /**< Mode LOC27 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 470 | #define _PCNT_ROUTELOC0_S0INLOC_LOC28 0x0000001CUL /**< Mode LOC28 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 471 | #define _PCNT_ROUTELOC0_S0INLOC_LOC29 0x0000001DUL /**< Mode LOC29 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 472 | #define _PCNT_ROUTELOC0_S0INLOC_LOC30 0x0000001EUL /**< Mode LOC30 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 473 | #define _PCNT_ROUTELOC0_S0INLOC_LOC31 0x0000001FUL /**< Mode LOC31 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 474 | #define PCNT_ROUTELOC0_S0INLOC_LOC0 (_PCNT_ROUTELOC0_S0INLOC_LOC0 << 0) /**< Shifted mode LOC0 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 475 | #define PCNT_ROUTELOC0_S0INLOC_DEFAULT (_PCNT_ROUTELOC0_S0INLOC_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 476 | #define PCNT_ROUTELOC0_S0INLOC_LOC1 (_PCNT_ROUTELOC0_S0INLOC_LOC1 << 0) /**< Shifted mode LOC1 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 477 | #define PCNT_ROUTELOC0_S0INLOC_LOC2 (_PCNT_ROUTELOC0_S0INLOC_LOC2 << 0) /**< Shifted mode LOC2 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 478 | #define PCNT_ROUTELOC0_S0INLOC_LOC3 (_PCNT_ROUTELOC0_S0INLOC_LOC3 << 0) /**< Shifted mode LOC3 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 479 | #define PCNT_ROUTELOC0_S0INLOC_LOC4 (_PCNT_ROUTELOC0_S0INLOC_LOC4 << 0) /**< Shifted mode LOC4 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 480 | #define PCNT_ROUTELOC0_S0INLOC_LOC5 (_PCNT_ROUTELOC0_S0INLOC_LOC5 << 0) /**< Shifted mode LOC5 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 481 | #define PCNT_ROUTELOC0_S0INLOC_LOC6 (_PCNT_ROUTELOC0_S0INLOC_LOC6 << 0) /**< Shifted mode LOC6 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 482 | #define PCNT_ROUTELOC0_S0INLOC_LOC7 (_PCNT_ROUTELOC0_S0INLOC_LOC7 << 0) /**< Shifted mode LOC7 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 483 | #define PCNT_ROUTELOC0_S0INLOC_LOC8 (_PCNT_ROUTELOC0_S0INLOC_LOC8 << 0) /**< Shifted mode LOC8 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 484 | #define PCNT_ROUTELOC0_S0INLOC_LOC9 (_PCNT_ROUTELOC0_S0INLOC_LOC9 << 0) /**< Shifted mode LOC9 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 485 | #define PCNT_ROUTELOC0_S0INLOC_LOC10 (_PCNT_ROUTELOC0_S0INLOC_LOC10 << 0) /**< Shifted mode LOC10 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 486 | #define PCNT_ROUTELOC0_S0INLOC_LOC11 (_PCNT_ROUTELOC0_S0INLOC_LOC11 << 0) /**< Shifted mode LOC11 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 487 | #define PCNT_ROUTELOC0_S0INLOC_LOC12 (_PCNT_ROUTELOC0_S0INLOC_LOC12 << 0) /**< Shifted mode LOC12 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 488 | #define PCNT_ROUTELOC0_S0INLOC_LOC13 (_PCNT_ROUTELOC0_S0INLOC_LOC13 << 0) /**< Shifted mode LOC13 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 489 | #define PCNT_ROUTELOC0_S0INLOC_LOC14 (_PCNT_ROUTELOC0_S0INLOC_LOC14 << 0) /**< Shifted mode LOC14 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 490 | #define PCNT_ROUTELOC0_S0INLOC_LOC15 (_PCNT_ROUTELOC0_S0INLOC_LOC15 << 0) /**< Shifted mode LOC15 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 491 | #define PCNT_ROUTELOC0_S0INLOC_LOC16 (_PCNT_ROUTELOC0_S0INLOC_LOC16 << 0) /**< Shifted mode LOC16 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 492 | #define PCNT_ROUTELOC0_S0INLOC_LOC17 (_PCNT_ROUTELOC0_S0INLOC_LOC17 << 0) /**< Shifted mode LOC17 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 493 | #define PCNT_ROUTELOC0_S0INLOC_LOC18 (_PCNT_ROUTELOC0_S0INLOC_LOC18 << 0) /**< Shifted mode LOC18 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 494 | #define PCNT_ROUTELOC0_S0INLOC_LOC19 (_PCNT_ROUTELOC0_S0INLOC_LOC19 << 0) /**< Shifted mode LOC19 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 495 | #define PCNT_ROUTELOC0_S0INLOC_LOC20 (_PCNT_ROUTELOC0_S0INLOC_LOC20 << 0) /**< Shifted mode LOC20 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 496 | #define PCNT_ROUTELOC0_S0INLOC_LOC21 (_PCNT_ROUTELOC0_S0INLOC_LOC21 << 0) /**< Shifted mode LOC21 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 497 | #define PCNT_ROUTELOC0_S0INLOC_LOC22 (_PCNT_ROUTELOC0_S0INLOC_LOC22 << 0) /**< Shifted mode LOC22 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 498 | #define PCNT_ROUTELOC0_S0INLOC_LOC23 (_PCNT_ROUTELOC0_S0INLOC_LOC23 << 0) /**< Shifted mode LOC23 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 499 | #define PCNT_ROUTELOC0_S0INLOC_LOC24 (_PCNT_ROUTELOC0_S0INLOC_LOC24 << 0) /**< Shifted mode LOC24 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 500 | #define PCNT_ROUTELOC0_S0INLOC_LOC25 (_PCNT_ROUTELOC0_S0INLOC_LOC25 << 0) /**< Shifted mode LOC25 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 501 | #define PCNT_ROUTELOC0_S0INLOC_LOC26 (_PCNT_ROUTELOC0_S0INLOC_LOC26 << 0) /**< Shifted mode LOC26 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 502 | #define PCNT_ROUTELOC0_S0INLOC_LOC27 (_PCNT_ROUTELOC0_S0INLOC_LOC27 << 0) /**< Shifted mode LOC27 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 503 | #define PCNT_ROUTELOC0_S0INLOC_LOC28 (_PCNT_ROUTELOC0_S0INLOC_LOC28 << 0) /**< Shifted mode LOC28 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 504 | #define PCNT_ROUTELOC0_S0INLOC_LOC29 (_PCNT_ROUTELOC0_S0INLOC_LOC29 << 0) /**< Shifted mode LOC29 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 505 | #define PCNT_ROUTELOC0_S0INLOC_LOC30 (_PCNT_ROUTELOC0_S0INLOC_LOC30 << 0) /**< Shifted mode LOC30 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 506 | #define PCNT_ROUTELOC0_S0INLOC_LOC31 (_PCNT_ROUTELOC0_S0INLOC_LOC31 << 0) /**< Shifted mode LOC31 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 507 | #define _PCNT_ROUTELOC0_S1INLOC_SHIFT 8 /**< Shift value for PCNT_S1INLOC */ |
sahilmgandhi | 18:6a4db94011d3 | 508 | #define _PCNT_ROUTELOC0_S1INLOC_MASK 0x1F00UL /**< Bit mask for PCNT_S1INLOC */ |
sahilmgandhi | 18:6a4db94011d3 | 509 | #define _PCNT_ROUTELOC0_S1INLOC_LOC0 0x00000000UL /**< Mode LOC0 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 510 | #define _PCNT_ROUTELOC0_S1INLOC_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 511 | #define _PCNT_ROUTELOC0_S1INLOC_LOC1 0x00000001UL /**< Mode LOC1 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 512 | #define _PCNT_ROUTELOC0_S1INLOC_LOC2 0x00000002UL /**< Mode LOC2 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 513 | #define _PCNT_ROUTELOC0_S1INLOC_LOC3 0x00000003UL /**< Mode LOC3 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 514 | #define _PCNT_ROUTELOC0_S1INLOC_LOC4 0x00000004UL /**< Mode LOC4 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 515 | #define _PCNT_ROUTELOC0_S1INLOC_LOC5 0x00000005UL /**< Mode LOC5 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 516 | #define _PCNT_ROUTELOC0_S1INLOC_LOC6 0x00000006UL /**< Mode LOC6 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 517 | #define _PCNT_ROUTELOC0_S1INLOC_LOC7 0x00000007UL /**< Mode LOC7 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 518 | #define _PCNT_ROUTELOC0_S1INLOC_LOC8 0x00000008UL /**< Mode LOC8 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 519 | #define _PCNT_ROUTELOC0_S1INLOC_LOC9 0x00000009UL /**< Mode LOC9 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 520 | #define _PCNT_ROUTELOC0_S1INLOC_LOC10 0x0000000AUL /**< Mode LOC10 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 521 | #define _PCNT_ROUTELOC0_S1INLOC_LOC11 0x0000000BUL /**< Mode LOC11 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 522 | #define _PCNT_ROUTELOC0_S1INLOC_LOC12 0x0000000CUL /**< Mode LOC12 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 523 | #define _PCNT_ROUTELOC0_S1INLOC_LOC13 0x0000000DUL /**< Mode LOC13 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 524 | #define _PCNT_ROUTELOC0_S1INLOC_LOC14 0x0000000EUL /**< Mode LOC14 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 525 | #define _PCNT_ROUTELOC0_S1INLOC_LOC15 0x0000000FUL /**< Mode LOC15 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 526 | #define _PCNT_ROUTELOC0_S1INLOC_LOC16 0x00000010UL /**< Mode LOC16 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 527 | #define _PCNT_ROUTELOC0_S1INLOC_LOC17 0x00000011UL /**< Mode LOC17 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 528 | #define _PCNT_ROUTELOC0_S1INLOC_LOC18 0x00000012UL /**< Mode LOC18 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 529 | #define _PCNT_ROUTELOC0_S1INLOC_LOC19 0x00000013UL /**< Mode LOC19 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 530 | #define _PCNT_ROUTELOC0_S1INLOC_LOC20 0x00000014UL /**< Mode LOC20 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 531 | #define _PCNT_ROUTELOC0_S1INLOC_LOC21 0x00000015UL /**< Mode LOC21 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 532 | #define _PCNT_ROUTELOC0_S1INLOC_LOC22 0x00000016UL /**< Mode LOC22 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 533 | #define _PCNT_ROUTELOC0_S1INLOC_LOC23 0x00000017UL /**< Mode LOC23 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 534 | #define _PCNT_ROUTELOC0_S1INLOC_LOC24 0x00000018UL /**< Mode LOC24 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 535 | #define _PCNT_ROUTELOC0_S1INLOC_LOC25 0x00000019UL /**< Mode LOC25 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 536 | #define _PCNT_ROUTELOC0_S1INLOC_LOC26 0x0000001AUL /**< Mode LOC26 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 537 | #define _PCNT_ROUTELOC0_S1INLOC_LOC27 0x0000001BUL /**< Mode LOC27 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 538 | #define _PCNT_ROUTELOC0_S1INLOC_LOC28 0x0000001CUL /**< Mode LOC28 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 539 | #define _PCNT_ROUTELOC0_S1INLOC_LOC29 0x0000001DUL /**< Mode LOC29 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 540 | #define _PCNT_ROUTELOC0_S1INLOC_LOC30 0x0000001EUL /**< Mode LOC30 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 541 | #define _PCNT_ROUTELOC0_S1INLOC_LOC31 0x0000001FUL /**< Mode LOC31 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 542 | #define PCNT_ROUTELOC0_S1INLOC_LOC0 (_PCNT_ROUTELOC0_S1INLOC_LOC0 << 8) /**< Shifted mode LOC0 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 543 | #define PCNT_ROUTELOC0_S1INLOC_DEFAULT (_PCNT_ROUTELOC0_S1INLOC_DEFAULT << 8) /**< Shifted mode DEFAULT for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 544 | #define PCNT_ROUTELOC0_S1INLOC_LOC1 (_PCNT_ROUTELOC0_S1INLOC_LOC1 << 8) /**< Shifted mode LOC1 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 545 | #define PCNT_ROUTELOC0_S1INLOC_LOC2 (_PCNT_ROUTELOC0_S1INLOC_LOC2 << 8) /**< Shifted mode LOC2 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 546 | #define PCNT_ROUTELOC0_S1INLOC_LOC3 (_PCNT_ROUTELOC0_S1INLOC_LOC3 << 8) /**< Shifted mode LOC3 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 547 | #define PCNT_ROUTELOC0_S1INLOC_LOC4 (_PCNT_ROUTELOC0_S1INLOC_LOC4 << 8) /**< Shifted mode LOC4 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 548 | #define PCNT_ROUTELOC0_S1INLOC_LOC5 (_PCNT_ROUTELOC0_S1INLOC_LOC5 << 8) /**< Shifted mode LOC5 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 549 | #define PCNT_ROUTELOC0_S1INLOC_LOC6 (_PCNT_ROUTELOC0_S1INLOC_LOC6 << 8) /**< Shifted mode LOC6 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 550 | #define PCNT_ROUTELOC0_S1INLOC_LOC7 (_PCNT_ROUTELOC0_S1INLOC_LOC7 << 8) /**< Shifted mode LOC7 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 551 | #define PCNT_ROUTELOC0_S1INLOC_LOC8 (_PCNT_ROUTELOC0_S1INLOC_LOC8 << 8) /**< Shifted mode LOC8 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 552 | #define PCNT_ROUTELOC0_S1INLOC_LOC9 (_PCNT_ROUTELOC0_S1INLOC_LOC9 << 8) /**< Shifted mode LOC9 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 553 | #define PCNT_ROUTELOC0_S1INLOC_LOC10 (_PCNT_ROUTELOC0_S1INLOC_LOC10 << 8) /**< Shifted mode LOC10 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 554 | #define PCNT_ROUTELOC0_S1INLOC_LOC11 (_PCNT_ROUTELOC0_S1INLOC_LOC11 << 8) /**< Shifted mode LOC11 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 555 | #define PCNT_ROUTELOC0_S1INLOC_LOC12 (_PCNT_ROUTELOC0_S1INLOC_LOC12 << 8) /**< Shifted mode LOC12 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 556 | #define PCNT_ROUTELOC0_S1INLOC_LOC13 (_PCNT_ROUTELOC0_S1INLOC_LOC13 << 8) /**< Shifted mode LOC13 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 557 | #define PCNT_ROUTELOC0_S1INLOC_LOC14 (_PCNT_ROUTELOC0_S1INLOC_LOC14 << 8) /**< Shifted mode LOC14 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 558 | #define PCNT_ROUTELOC0_S1INLOC_LOC15 (_PCNT_ROUTELOC0_S1INLOC_LOC15 << 8) /**< Shifted mode LOC15 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 559 | #define PCNT_ROUTELOC0_S1INLOC_LOC16 (_PCNT_ROUTELOC0_S1INLOC_LOC16 << 8) /**< Shifted mode LOC16 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 560 | #define PCNT_ROUTELOC0_S1INLOC_LOC17 (_PCNT_ROUTELOC0_S1INLOC_LOC17 << 8) /**< Shifted mode LOC17 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 561 | #define PCNT_ROUTELOC0_S1INLOC_LOC18 (_PCNT_ROUTELOC0_S1INLOC_LOC18 << 8) /**< Shifted mode LOC18 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 562 | #define PCNT_ROUTELOC0_S1INLOC_LOC19 (_PCNT_ROUTELOC0_S1INLOC_LOC19 << 8) /**< Shifted mode LOC19 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 563 | #define PCNT_ROUTELOC0_S1INLOC_LOC20 (_PCNT_ROUTELOC0_S1INLOC_LOC20 << 8) /**< Shifted mode LOC20 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 564 | #define PCNT_ROUTELOC0_S1INLOC_LOC21 (_PCNT_ROUTELOC0_S1INLOC_LOC21 << 8) /**< Shifted mode LOC21 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 565 | #define PCNT_ROUTELOC0_S1INLOC_LOC22 (_PCNT_ROUTELOC0_S1INLOC_LOC22 << 8) /**< Shifted mode LOC22 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 566 | #define PCNT_ROUTELOC0_S1INLOC_LOC23 (_PCNT_ROUTELOC0_S1INLOC_LOC23 << 8) /**< Shifted mode LOC23 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 567 | #define PCNT_ROUTELOC0_S1INLOC_LOC24 (_PCNT_ROUTELOC0_S1INLOC_LOC24 << 8) /**< Shifted mode LOC24 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 568 | #define PCNT_ROUTELOC0_S1INLOC_LOC25 (_PCNT_ROUTELOC0_S1INLOC_LOC25 << 8) /**< Shifted mode LOC25 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 569 | #define PCNT_ROUTELOC0_S1INLOC_LOC26 (_PCNT_ROUTELOC0_S1INLOC_LOC26 << 8) /**< Shifted mode LOC26 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 570 | #define PCNT_ROUTELOC0_S1INLOC_LOC27 (_PCNT_ROUTELOC0_S1INLOC_LOC27 << 8) /**< Shifted mode LOC27 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 571 | #define PCNT_ROUTELOC0_S1INLOC_LOC28 (_PCNT_ROUTELOC0_S1INLOC_LOC28 << 8) /**< Shifted mode LOC28 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 572 | #define PCNT_ROUTELOC0_S1INLOC_LOC29 (_PCNT_ROUTELOC0_S1INLOC_LOC29 << 8) /**< Shifted mode LOC29 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 573 | #define PCNT_ROUTELOC0_S1INLOC_LOC30 (_PCNT_ROUTELOC0_S1INLOC_LOC30 << 8) /**< Shifted mode LOC30 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 574 | #define PCNT_ROUTELOC0_S1INLOC_LOC31 (_PCNT_ROUTELOC0_S1INLOC_LOC31 << 8) /**< Shifted mode LOC31 for PCNT_ROUTELOC0 */ |
sahilmgandhi | 18:6a4db94011d3 | 575 | |
sahilmgandhi | 18:6a4db94011d3 | 576 | /* Bit fields for PCNT FREEZE */ |
sahilmgandhi | 18:6a4db94011d3 | 577 | #define _PCNT_FREEZE_RESETVALUE 0x00000000UL /**< Default value for PCNT_FREEZE */ |
sahilmgandhi | 18:6a4db94011d3 | 578 | #define _PCNT_FREEZE_MASK 0x00000001UL /**< Mask for PCNT_FREEZE */ |
sahilmgandhi | 18:6a4db94011d3 | 579 | #define PCNT_FREEZE_REGFREEZE (0x1UL << 0) /**< Register Update Freeze */ |
sahilmgandhi | 18:6a4db94011d3 | 580 | #define _PCNT_FREEZE_REGFREEZE_SHIFT 0 /**< Shift value for PCNT_REGFREEZE */ |
sahilmgandhi | 18:6a4db94011d3 | 581 | #define _PCNT_FREEZE_REGFREEZE_MASK 0x1UL /**< Bit mask for PCNT_REGFREEZE */ |
sahilmgandhi | 18:6a4db94011d3 | 582 | #define _PCNT_FREEZE_REGFREEZE_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_FREEZE */ |
sahilmgandhi | 18:6a4db94011d3 | 583 | #define _PCNT_FREEZE_REGFREEZE_UPDATE 0x00000000UL /**< Mode UPDATE for PCNT_FREEZE */ |
sahilmgandhi | 18:6a4db94011d3 | 584 | #define _PCNT_FREEZE_REGFREEZE_FREEZE 0x00000001UL /**< Mode FREEZE for PCNT_FREEZE */ |
sahilmgandhi | 18:6a4db94011d3 | 585 | #define PCNT_FREEZE_REGFREEZE_DEFAULT (_PCNT_FREEZE_REGFREEZE_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_FREEZE */ |
sahilmgandhi | 18:6a4db94011d3 | 586 | #define PCNT_FREEZE_REGFREEZE_UPDATE (_PCNT_FREEZE_REGFREEZE_UPDATE << 0) /**< Shifted mode UPDATE for PCNT_FREEZE */ |
sahilmgandhi | 18:6a4db94011d3 | 587 | #define PCNT_FREEZE_REGFREEZE_FREEZE (_PCNT_FREEZE_REGFREEZE_FREEZE << 0) /**< Shifted mode FREEZE for PCNT_FREEZE */ |
sahilmgandhi | 18:6a4db94011d3 | 588 | |
sahilmgandhi | 18:6a4db94011d3 | 589 | /* Bit fields for PCNT SYNCBUSY */ |
sahilmgandhi | 18:6a4db94011d3 | 590 | #define _PCNT_SYNCBUSY_RESETVALUE 0x00000000UL /**< Default value for PCNT_SYNCBUSY */ |
sahilmgandhi | 18:6a4db94011d3 | 591 | #define _PCNT_SYNCBUSY_MASK 0x0000000FUL /**< Mask for PCNT_SYNCBUSY */ |
sahilmgandhi | 18:6a4db94011d3 | 592 | #define PCNT_SYNCBUSY_CTRL (0x1UL << 0) /**< CTRL Register Busy */ |
sahilmgandhi | 18:6a4db94011d3 | 593 | #define _PCNT_SYNCBUSY_CTRL_SHIFT 0 /**< Shift value for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 594 | #define _PCNT_SYNCBUSY_CTRL_MASK 0x1UL /**< Bit mask for PCNT_CTRL */ |
sahilmgandhi | 18:6a4db94011d3 | 595 | #define _PCNT_SYNCBUSY_CTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_SYNCBUSY */ |
sahilmgandhi | 18:6a4db94011d3 | 596 | #define PCNT_SYNCBUSY_CTRL_DEFAULT (_PCNT_SYNCBUSY_CTRL_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_SYNCBUSY */ |
sahilmgandhi | 18:6a4db94011d3 | 597 | #define PCNT_SYNCBUSY_CMD (0x1UL << 1) /**< CMD Register Busy */ |
sahilmgandhi | 18:6a4db94011d3 | 598 | #define _PCNT_SYNCBUSY_CMD_SHIFT 1 /**< Shift value for PCNT_CMD */ |
sahilmgandhi | 18:6a4db94011d3 | 599 | #define _PCNT_SYNCBUSY_CMD_MASK 0x2UL /**< Bit mask for PCNT_CMD */ |
sahilmgandhi | 18:6a4db94011d3 | 600 | #define _PCNT_SYNCBUSY_CMD_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_SYNCBUSY */ |
sahilmgandhi | 18:6a4db94011d3 | 601 | #define PCNT_SYNCBUSY_CMD_DEFAULT (_PCNT_SYNCBUSY_CMD_DEFAULT << 1) /**< Shifted mode DEFAULT for PCNT_SYNCBUSY */ |
sahilmgandhi | 18:6a4db94011d3 | 602 | #define PCNT_SYNCBUSY_TOPB (0x1UL << 2) /**< TOPB Register Busy */ |
sahilmgandhi | 18:6a4db94011d3 | 603 | #define _PCNT_SYNCBUSY_TOPB_SHIFT 2 /**< Shift value for PCNT_TOPB */ |
sahilmgandhi | 18:6a4db94011d3 | 604 | #define _PCNT_SYNCBUSY_TOPB_MASK 0x4UL /**< Bit mask for PCNT_TOPB */ |
sahilmgandhi | 18:6a4db94011d3 | 605 | #define _PCNT_SYNCBUSY_TOPB_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_SYNCBUSY */ |
sahilmgandhi | 18:6a4db94011d3 | 606 | #define PCNT_SYNCBUSY_TOPB_DEFAULT (_PCNT_SYNCBUSY_TOPB_DEFAULT << 2) /**< Shifted mode DEFAULT for PCNT_SYNCBUSY */ |
sahilmgandhi | 18:6a4db94011d3 | 607 | #define PCNT_SYNCBUSY_OVSCFG (0x1UL << 3) /**< OVSCFG Register Busy */ |
sahilmgandhi | 18:6a4db94011d3 | 608 | #define _PCNT_SYNCBUSY_OVSCFG_SHIFT 3 /**< Shift value for PCNT_OVSCFG */ |
sahilmgandhi | 18:6a4db94011d3 | 609 | #define _PCNT_SYNCBUSY_OVSCFG_MASK 0x8UL /**< Bit mask for PCNT_OVSCFG */ |
sahilmgandhi | 18:6a4db94011d3 | 610 | #define _PCNT_SYNCBUSY_OVSCFG_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_SYNCBUSY */ |
sahilmgandhi | 18:6a4db94011d3 | 611 | #define PCNT_SYNCBUSY_OVSCFG_DEFAULT (_PCNT_SYNCBUSY_OVSCFG_DEFAULT << 3) /**< Shifted mode DEFAULT for PCNT_SYNCBUSY */ |
sahilmgandhi | 18:6a4db94011d3 | 612 | |
sahilmgandhi | 18:6a4db94011d3 | 613 | /* Bit fields for PCNT AUXCNT */ |
sahilmgandhi | 18:6a4db94011d3 | 614 | #define _PCNT_AUXCNT_RESETVALUE 0x00000000UL /**< Default value for PCNT_AUXCNT */ |
sahilmgandhi | 18:6a4db94011d3 | 615 | #define _PCNT_AUXCNT_MASK 0x0000FFFFUL /**< Mask for PCNT_AUXCNT */ |
sahilmgandhi | 18:6a4db94011d3 | 616 | #define _PCNT_AUXCNT_AUXCNT_SHIFT 0 /**< Shift value for PCNT_AUXCNT */ |
sahilmgandhi | 18:6a4db94011d3 | 617 | #define _PCNT_AUXCNT_AUXCNT_MASK 0xFFFFUL /**< Bit mask for PCNT_AUXCNT */ |
sahilmgandhi | 18:6a4db94011d3 | 618 | #define _PCNT_AUXCNT_AUXCNT_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_AUXCNT */ |
sahilmgandhi | 18:6a4db94011d3 | 619 | #define PCNT_AUXCNT_AUXCNT_DEFAULT (_PCNT_AUXCNT_AUXCNT_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_AUXCNT */ |
sahilmgandhi | 18:6a4db94011d3 | 620 | |
sahilmgandhi | 18:6a4db94011d3 | 621 | /* Bit fields for PCNT INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 622 | #define _PCNT_INPUT_RESETVALUE 0x00000000UL /**< Default value for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 623 | #define _PCNT_INPUT_MASK 0x00000BEFUL /**< Mask for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 624 | #define _PCNT_INPUT_S0PRSSEL_SHIFT 0 /**< Shift value for PCNT_S0PRSSEL */ |
sahilmgandhi | 18:6a4db94011d3 | 625 | #define _PCNT_INPUT_S0PRSSEL_MASK 0xFUL /**< Bit mask for PCNT_S0PRSSEL */ |
sahilmgandhi | 18:6a4db94011d3 | 626 | #define _PCNT_INPUT_S0PRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 627 | #define _PCNT_INPUT_S0PRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 628 | #define _PCNT_INPUT_S0PRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 629 | #define _PCNT_INPUT_S0PRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 630 | #define _PCNT_INPUT_S0PRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 631 | #define _PCNT_INPUT_S0PRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 632 | #define _PCNT_INPUT_S0PRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 633 | #define _PCNT_INPUT_S0PRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 634 | #define _PCNT_INPUT_S0PRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 635 | #define _PCNT_INPUT_S0PRSSEL_PRSCH8 0x00000008UL /**< Mode PRSCH8 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 636 | #define _PCNT_INPUT_S0PRSSEL_PRSCH9 0x00000009UL /**< Mode PRSCH9 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 637 | #define _PCNT_INPUT_S0PRSSEL_PRSCH10 0x0000000AUL /**< Mode PRSCH10 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 638 | #define _PCNT_INPUT_S0PRSSEL_PRSCH11 0x0000000BUL /**< Mode PRSCH11 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 639 | #define PCNT_INPUT_S0PRSSEL_DEFAULT (_PCNT_INPUT_S0PRSSEL_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 640 | #define PCNT_INPUT_S0PRSSEL_PRSCH0 (_PCNT_INPUT_S0PRSSEL_PRSCH0 << 0) /**< Shifted mode PRSCH0 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 641 | #define PCNT_INPUT_S0PRSSEL_PRSCH1 (_PCNT_INPUT_S0PRSSEL_PRSCH1 << 0) /**< Shifted mode PRSCH1 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 642 | #define PCNT_INPUT_S0PRSSEL_PRSCH2 (_PCNT_INPUT_S0PRSSEL_PRSCH2 << 0) /**< Shifted mode PRSCH2 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 643 | #define PCNT_INPUT_S0PRSSEL_PRSCH3 (_PCNT_INPUT_S0PRSSEL_PRSCH3 << 0) /**< Shifted mode PRSCH3 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 644 | #define PCNT_INPUT_S0PRSSEL_PRSCH4 (_PCNT_INPUT_S0PRSSEL_PRSCH4 << 0) /**< Shifted mode PRSCH4 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 645 | #define PCNT_INPUT_S0PRSSEL_PRSCH5 (_PCNT_INPUT_S0PRSSEL_PRSCH5 << 0) /**< Shifted mode PRSCH5 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 646 | #define PCNT_INPUT_S0PRSSEL_PRSCH6 (_PCNT_INPUT_S0PRSSEL_PRSCH6 << 0) /**< Shifted mode PRSCH6 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 647 | #define PCNT_INPUT_S0PRSSEL_PRSCH7 (_PCNT_INPUT_S0PRSSEL_PRSCH7 << 0) /**< Shifted mode PRSCH7 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 648 | #define PCNT_INPUT_S0PRSSEL_PRSCH8 (_PCNT_INPUT_S0PRSSEL_PRSCH8 << 0) /**< Shifted mode PRSCH8 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 649 | #define PCNT_INPUT_S0PRSSEL_PRSCH9 (_PCNT_INPUT_S0PRSSEL_PRSCH9 << 0) /**< Shifted mode PRSCH9 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 650 | #define PCNT_INPUT_S0PRSSEL_PRSCH10 (_PCNT_INPUT_S0PRSSEL_PRSCH10 << 0) /**< Shifted mode PRSCH10 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 651 | #define PCNT_INPUT_S0PRSSEL_PRSCH11 (_PCNT_INPUT_S0PRSSEL_PRSCH11 << 0) /**< Shifted mode PRSCH11 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 652 | #define PCNT_INPUT_S0PRSEN (0x1UL << 5) /**< S0IN PRS Enable */ |
sahilmgandhi | 18:6a4db94011d3 | 653 | #define _PCNT_INPUT_S0PRSEN_SHIFT 5 /**< Shift value for PCNT_S0PRSEN */ |
sahilmgandhi | 18:6a4db94011d3 | 654 | #define _PCNT_INPUT_S0PRSEN_MASK 0x20UL /**< Bit mask for PCNT_S0PRSEN */ |
sahilmgandhi | 18:6a4db94011d3 | 655 | #define _PCNT_INPUT_S0PRSEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 656 | #define PCNT_INPUT_S0PRSEN_DEFAULT (_PCNT_INPUT_S0PRSEN_DEFAULT << 5) /**< Shifted mode DEFAULT for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 657 | #define _PCNT_INPUT_S1PRSSEL_SHIFT 6 /**< Shift value for PCNT_S1PRSSEL */ |
sahilmgandhi | 18:6a4db94011d3 | 658 | #define _PCNT_INPUT_S1PRSSEL_MASK 0x3C0UL /**< Bit mask for PCNT_S1PRSSEL */ |
sahilmgandhi | 18:6a4db94011d3 | 659 | #define _PCNT_INPUT_S1PRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 660 | #define _PCNT_INPUT_S1PRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 661 | #define _PCNT_INPUT_S1PRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 662 | #define _PCNT_INPUT_S1PRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 663 | #define _PCNT_INPUT_S1PRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 664 | #define _PCNT_INPUT_S1PRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 665 | #define _PCNT_INPUT_S1PRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 666 | #define _PCNT_INPUT_S1PRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 667 | #define _PCNT_INPUT_S1PRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 668 | #define _PCNT_INPUT_S1PRSSEL_PRSCH8 0x00000008UL /**< Mode PRSCH8 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 669 | #define _PCNT_INPUT_S1PRSSEL_PRSCH9 0x00000009UL /**< Mode PRSCH9 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 670 | #define _PCNT_INPUT_S1PRSSEL_PRSCH10 0x0000000AUL /**< Mode PRSCH10 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 671 | #define _PCNT_INPUT_S1PRSSEL_PRSCH11 0x0000000BUL /**< Mode PRSCH11 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 672 | #define PCNT_INPUT_S1PRSSEL_DEFAULT (_PCNT_INPUT_S1PRSSEL_DEFAULT << 6) /**< Shifted mode DEFAULT for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 673 | #define PCNT_INPUT_S1PRSSEL_PRSCH0 (_PCNT_INPUT_S1PRSSEL_PRSCH0 << 6) /**< Shifted mode PRSCH0 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 674 | #define PCNT_INPUT_S1PRSSEL_PRSCH1 (_PCNT_INPUT_S1PRSSEL_PRSCH1 << 6) /**< Shifted mode PRSCH1 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 675 | #define PCNT_INPUT_S1PRSSEL_PRSCH2 (_PCNT_INPUT_S1PRSSEL_PRSCH2 << 6) /**< Shifted mode PRSCH2 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 676 | #define PCNT_INPUT_S1PRSSEL_PRSCH3 (_PCNT_INPUT_S1PRSSEL_PRSCH3 << 6) /**< Shifted mode PRSCH3 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 677 | #define PCNT_INPUT_S1PRSSEL_PRSCH4 (_PCNT_INPUT_S1PRSSEL_PRSCH4 << 6) /**< Shifted mode PRSCH4 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 678 | #define PCNT_INPUT_S1PRSSEL_PRSCH5 (_PCNT_INPUT_S1PRSSEL_PRSCH5 << 6) /**< Shifted mode PRSCH5 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 679 | #define PCNT_INPUT_S1PRSSEL_PRSCH6 (_PCNT_INPUT_S1PRSSEL_PRSCH6 << 6) /**< Shifted mode PRSCH6 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 680 | #define PCNT_INPUT_S1PRSSEL_PRSCH7 (_PCNT_INPUT_S1PRSSEL_PRSCH7 << 6) /**< Shifted mode PRSCH7 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 681 | #define PCNT_INPUT_S1PRSSEL_PRSCH8 (_PCNT_INPUT_S1PRSSEL_PRSCH8 << 6) /**< Shifted mode PRSCH8 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 682 | #define PCNT_INPUT_S1PRSSEL_PRSCH9 (_PCNT_INPUT_S1PRSSEL_PRSCH9 << 6) /**< Shifted mode PRSCH9 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 683 | #define PCNT_INPUT_S1PRSSEL_PRSCH10 (_PCNT_INPUT_S1PRSSEL_PRSCH10 << 6) /**< Shifted mode PRSCH10 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 684 | #define PCNT_INPUT_S1PRSSEL_PRSCH11 (_PCNT_INPUT_S1PRSSEL_PRSCH11 << 6) /**< Shifted mode PRSCH11 for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 685 | #define PCNT_INPUT_S1PRSEN (0x1UL << 11) /**< S1IN PRS Enable */ |
sahilmgandhi | 18:6a4db94011d3 | 686 | #define _PCNT_INPUT_S1PRSEN_SHIFT 11 /**< Shift value for PCNT_S1PRSEN */ |
sahilmgandhi | 18:6a4db94011d3 | 687 | #define _PCNT_INPUT_S1PRSEN_MASK 0x800UL /**< Bit mask for PCNT_S1PRSEN */ |
sahilmgandhi | 18:6a4db94011d3 | 688 | #define _PCNT_INPUT_S1PRSEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 689 | #define PCNT_INPUT_S1PRSEN_DEFAULT (_PCNT_INPUT_S1PRSEN_DEFAULT << 11) /**< Shifted mode DEFAULT for PCNT_INPUT */ |
sahilmgandhi | 18:6a4db94011d3 | 690 | |
sahilmgandhi | 18:6a4db94011d3 | 691 | /* Bit fields for PCNT OVSCFG */ |
sahilmgandhi | 18:6a4db94011d3 | 692 | #define _PCNT_OVSCFG_RESETVALUE 0x00000000UL /**< Default value for PCNT_OVSCFG */ |
sahilmgandhi | 18:6a4db94011d3 | 693 | #define _PCNT_OVSCFG_MASK 0x000010FFUL /**< Mask for PCNT_OVSCFG */ |
sahilmgandhi | 18:6a4db94011d3 | 694 | #define _PCNT_OVSCFG_FILTLEN_SHIFT 0 /**< Shift value for PCNT_FILTLEN */ |
sahilmgandhi | 18:6a4db94011d3 | 695 | #define _PCNT_OVSCFG_FILTLEN_MASK 0xFFUL /**< Bit mask for PCNT_FILTLEN */ |
sahilmgandhi | 18:6a4db94011d3 | 696 | #define _PCNT_OVSCFG_FILTLEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_OVSCFG */ |
sahilmgandhi | 18:6a4db94011d3 | 697 | #define PCNT_OVSCFG_FILTLEN_DEFAULT (_PCNT_OVSCFG_FILTLEN_DEFAULT << 0) /**< Shifted mode DEFAULT for PCNT_OVSCFG */ |
sahilmgandhi | 18:6a4db94011d3 | 698 | #define PCNT_OVSCFG_FLUTTERRM (0x1UL << 12) /**< Flutter Remove */ |
sahilmgandhi | 18:6a4db94011d3 | 699 | #define _PCNT_OVSCFG_FLUTTERRM_SHIFT 12 /**< Shift value for PCNT_FLUTTERRM */ |
sahilmgandhi | 18:6a4db94011d3 | 700 | #define _PCNT_OVSCFG_FLUTTERRM_MASK 0x1000UL /**< Bit mask for PCNT_FLUTTERRM */ |
sahilmgandhi | 18:6a4db94011d3 | 701 | #define _PCNT_OVSCFG_FLUTTERRM_DEFAULT 0x00000000UL /**< Mode DEFAULT for PCNT_OVSCFG */ |
sahilmgandhi | 18:6a4db94011d3 | 702 | #define PCNT_OVSCFG_FLUTTERRM_DEFAULT (_PCNT_OVSCFG_FLUTTERRM_DEFAULT << 12) /**< Shifted mode DEFAULT for PCNT_OVSCFG */ |
sahilmgandhi | 18:6a4db94011d3 | 703 | |
sahilmgandhi | 18:6a4db94011d3 | 704 | /** @} End of group EFR32MG1P_PCNT */ |
sahilmgandhi | 18:6a4db94011d3 | 705 | /** @} End of group Parts */ |
sahilmgandhi | 18:6a4db94011d3 | 706 |