MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F4/serial_api.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 *******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * Copyright (c) 2015, STMicroelectronics
sahilmgandhi 18:6a4db94011d3 4 * All rights reserved.
sahilmgandhi 18:6a4db94011d3 5 *
sahilmgandhi 18:6a4db94011d3 6 * Redistribution and use in source and binary forms, with or without
sahilmgandhi 18:6a4db94011d3 7 * modification, are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 8 *
sahilmgandhi 18:6a4db94011d3 9 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 10 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 12 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 13 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 15 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 16 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 17 *
sahilmgandhi 18:6a4db94011d3 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 28 *******************************************************************************
sahilmgandhi 18:6a4db94011d3 29 */
sahilmgandhi 18:6a4db94011d3 30
sahilmgandhi 18:6a4db94011d3 31 #include "mbed_assert.h"
sahilmgandhi 18:6a4db94011d3 32 #include "serial_api.h"
sahilmgandhi 18:6a4db94011d3 33
sahilmgandhi 18:6a4db94011d3 34 #if DEVICE_SERIAL
sahilmgandhi 18:6a4db94011d3 35
sahilmgandhi 18:6a4db94011d3 36 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 37 #include "pinmap.h"
sahilmgandhi 18:6a4db94011d3 38 #include <string.h>
sahilmgandhi 18:6a4db94011d3 39 #include "PeripheralPins.h"
sahilmgandhi 18:6a4db94011d3 40 #include "mbed_error.h"
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #define UART_NUM (8)
sahilmgandhi 18:6a4db94011d3 43 static uint32_t serial_irq_ids[UART_NUM] = {0};
sahilmgandhi 18:6a4db94011d3 44 static UART_HandleTypeDef uart_handlers[UART_NUM];
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 static uart_irq_handler irq_handler;
sahilmgandhi 18:6a4db94011d3 47
sahilmgandhi 18:6a4db94011d3 48 int stdio_uart_inited = 0;
sahilmgandhi 18:6a4db94011d3 49 serial_t stdio_uart;
sahilmgandhi 18:6a4db94011d3 50
sahilmgandhi 18:6a4db94011d3 51 #if DEVICE_SERIAL_ASYNCH
sahilmgandhi 18:6a4db94011d3 52 #define SERIAL_S(obj) (&((obj)->serial))
sahilmgandhi 18:6a4db94011d3 53 #else
sahilmgandhi 18:6a4db94011d3 54 #define SERIAL_S(obj) (obj)
sahilmgandhi 18:6a4db94011d3 55 #endif
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57
sahilmgandhi 18:6a4db94011d3 58 static void init_uart(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 59 {
sahilmgandhi 18:6a4db94011d3 60 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 61 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
sahilmgandhi 18:6a4db94011d3 62 huart->Instance = (USART_TypeDef *)(obj_s->uart);
sahilmgandhi 18:6a4db94011d3 63
sahilmgandhi 18:6a4db94011d3 64 huart->Init.BaudRate = obj_s->baudrate;
sahilmgandhi 18:6a4db94011d3 65 huart->Init.WordLength = obj_s->databits;
sahilmgandhi 18:6a4db94011d3 66 huart->Init.StopBits = obj_s->stopbits;
sahilmgandhi 18:6a4db94011d3 67 huart->Init.Parity = obj_s->parity;
sahilmgandhi 18:6a4db94011d3 68 #if DEVICE_SERIAL_FC
sahilmgandhi 18:6a4db94011d3 69 huart->Init.HwFlowCtl = obj_s->hw_flow_ctl;
sahilmgandhi 18:6a4db94011d3 70 #else
sahilmgandhi 18:6a4db94011d3 71 huart->Init.HwFlowCtl = UART_HWCONTROL_NONE;
sahilmgandhi 18:6a4db94011d3 72 #endif
sahilmgandhi 18:6a4db94011d3 73 huart->Init.OverSampling = UART_OVERSAMPLING_16;
sahilmgandhi 18:6a4db94011d3 74 huart->TxXferCount = 0;
sahilmgandhi 18:6a4db94011d3 75 huart->TxXferSize = 0;
sahilmgandhi 18:6a4db94011d3 76 huart->RxXferCount = 0;
sahilmgandhi 18:6a4db94011d3 77 huart->RxXferSize = 0;
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 if (obj_s->pin_rx == NC) {
sahilmgandhi 18:6a4db94011d3 80 huart->Init.Mode = UART_MODE_TX;
sahilmgandhi 18:6a4db94011d3 81 } else if (obj_s->pin_tx == NC) {
sahilmgandhi 18:6a4db94011d3 82 huart->Init.Mode = UART_MODE_RX;
sahilmgandhi 18:6a4db94011d3 83 } else {
sahilmgandhi 18:6a4db94011d3 84 huart->Init.Mode = UART_MODE_TX_RX;
sahilmgandhi 18:6a4db94011d3 85 }
sahilmgandhi 18:6a4db94011d3 86
sahilmgandhi 18:6a4db94011d3 87 if (HAL_UART_Init(huart) != HAL_OK) {
sahilmgandhi 18:6a4db94011d3 88 error("Cannot initialize UART\n");
sahilmgandhi 18:6a4db94011d3 89 }
sahilmgandhi 18:6a4db94011d3 90 }
sahilmgandhi 18:6a4db94011d3 91
sahilmgandhi 18:6a4db94011d3 92 void serial_init(serial_t *obj, PinName tx, PinName rx)
sahilmgandhi 18:6a4db94011d3 93 {
sahilmgandhi 18:6a4db94011d3 94 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 95
sahilmgandhi 18:6a4db94011d3 96 // Determine the UART to use (UART_1, UART_2, ...)
sahilmgandhi 18:6a4db94011d3 97 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 98 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
sahilmgandhi 18:6a4db94011d3 99
sahilmgandhi 18:6a4db94011d3 100 // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object
sahilmgandhi 18:6a4db94011d3 101 obj_s->uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
sahilmgandhi 18:6a4db94011d3 102 MBED_ASSERT(obj_s->uart != (UARTName)NC);
sahilmgandhi 18:6a4db94011d3 103
sahilmgandhi 18:6a4db94011d3 104 // Enable USART clock
sahilmgandhi 18:6a4db94011d3 105 switch (obj_s->uart) {
sahilmgandhi 18:6a4db94011d3 106 case UART_1:
sahilmgandhi 18:6a4db94011d3 107 __HAL_RCC_USART1_FORCE_RESET();
sahilmgandhi 18:6a4db94011d3 108 __HAL_RCC_USART1_RELEASE_RESET();
sahilmgandhi 18:6a4db94011d3 109 __HAL_RCC_USART1_CLK_ENABLE();
sahilmgandhi 18:6a4db94011d3 110 obj_s->index = 0;
sahilmgandhi 18:6a4db94011d3 111 break;
sahilmgandhi 18:6a4db94011d3 112
sahilmgandhi 18:6a4db94011d3 113 case UART_2:
sahilmgandhi 18:6a4db94011d3 114 __HAL_RCC_USART2_FORCE_RESET();
sahilmgandhi 18:6a4db94011d3 115 __HAL_RCC_USART2_RELEASE_RESET();
sahilmgandhi 18:6a4db94011d3 116 __HAL_RCC_USART2_CLK_ENABLE();
sahilmgandhi 18:6a4db94011d3 117 obj_s->index = 1;
sahilmgandhi 18:6a4db94011d3 118 break;
sahilmgandhi 18:6a4db94011d3 119 #if defined(USART3_BASE)
sahilmgandhi 18:6a4db94011d3 120 case UART_3:
sahilmgandhi 18:6a4db94011d3 121 __HAL_RCC_USART3_FORCE_RESET();
sahilmgandhi 18:6a4db94011d3 122 __HAL_RCC_USART3_RELEASE_RESET();
sahilmgandhi 18:6a4db94011d3 123 __HAL_RCC_USART3_CLK_ENABLE();
sahilmgandhi 18:6a4db94011d3 124 obj_s->index = 2;
sahilmgandhi 18:6a4db94011d3 125 break;
sahilmgandhi 18:6a4db94011d3 126 #endif
sahilmgandhi 18:6a4db94011d3 127 #if defined(UART4_BASE)
sahilmgandhi 18:6a4db94011d3 128 case UART_4:
sahilmgandhi 18:6a4db94011d3 129 __HAL_RCC_UART4_FORCE_RESET();
sahilmgandhi 18:6a4db94011d3 130 __HAL_RCC_UART4_RELEASE_RESET();
sahilmgandhi 18:6a4db94011d3 131 __HAL_RCC_UART4_CLK_ENABLE();
sahilmgandhi 18:6a4db94011d3 132 obj_s->index = 3;
sahilmgandhi 18:6a4db94011d3 133 break;
sahilmgandhi 18:6a4db94011d3 134 #endif
sahilmgandhi 18:6a4db94011d3 135 #if defined(UART5_BASE)
sahilmgandhi 18:6a4db94011d3 136 case UART_5:
sahilmgandhi 18:6a4db94011d3 137 __HAL_RCC_UART5_FORCE_RESET();
sahilmgandhi 18:6a4db94011d3 138 __HAL_RCC_UART5_RELEASE_RESET();
sahilmgandhi 18:6a4db94011d3 139 __HAL_RCC_UART5_CLK_ENABLE();
sahilmgandhi 18:6a4db94011d3 140 obj_s->index = 4;
sahilmgandhi 18:6a4db94011d3 141 break;
sahilmgandhi 18:6a4db94011d3 142 #endif
sahilmgandhi 18:6a4db94011d3 143 #if defined(USART6_BASE)
sahilmgandhi 18:6a4db94011d3 144 case UART_6:
sahilmgandhi 18:6a4db94011d3 145 __HAL_RCC_USART6_FORCE_RESET();
sahilmgandhi 18:6a4db94011d3 146 __HAL_RCC_USART6_RELEASE_RESET();
sahilmgandhi 18:6a4db94011d3 147 __HAL_RCC_USART6_CLK_ENABLE();
sahilmgandhi 18:6a4db94011d3 148 obj_s->index = 5;
sahilmgandhi 18:6a4db94011d3 149 break;
sahilmgandhi 18:6a4db94011d3 150 #endif
sahilmgandhi 18:6a4db94011d3 151 #if defined(UART7_BASE)
sahilmgandhi 18:6a4db94011d3 152 case UART_7:
sahilmgandhi 18:6a4db94011d3 153 __HAL_RCC_UART7_FORCE_RESET();
sahilmgandhi 18:6a4db94011d3 154 __HAL_RCC_UART7_RELEASE_RESET();
sahilmgandhi 18:6a4db94011d3 155 __HAL_RCC_UART7_CLK_ENABLE();
sahilmgandhi 18:6a4db94011d3 156 obj_s->index = 6;
sahilmgandhi 18:6a4db94011d3 157 break;
sahilmgandhi 18:6a4db94011d3 158 #endif
sahilmgandhi 18:6a4db94011d3 159 #if defined(UART8_BASE)
sahilmgandhi 18:6a4db94011d3 160 case UART_8:
sahilmgandhi 18:6a4db94011d3 161 __HAL_RCC_UART8_FORCE_RESET();
sahilmgandhi 18:6a4db94011d3 162 __HAL_RCC_UART8_RELEASE_RESET();
sahilmgandhi 18:6a4db94011d3 163 __HAL_RCC_UART8_CLK_ENABLE();
sahilmgandhi 18:6a4db94011d3 164 obj_s->index = 7;
sahilmgandhi 18:6a4db94011d3 165 break;
sahilmgandhi 18:6a4db94011d3 166 #endif
sahilmgandhi 18:6a4db94011d3 167 }
sahilmgandhi 18:6a4db94011d3 168
sahilmgandhi 18:6a4db94011d3 169 // Configure the UART pins
sahilmgandhi 18:6a4db94011d3 170 pinmap_pinout(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 171 pinmap_pinout(rx, PinMap_UART_RX);
sahilmgandhi 18:6a4db94011d3 172
sahilmgandhi 18:6a4db94011d3 173 if (tx != NC) {
sahilmgandhi 18:6a4db94011d3 174 pin_mode(tx, PullUp);
sahilmgandhi 18:6a4db94011d3 175 }
sahilmgandhi 18:6a4db94011d3 176 if (rx != NC) {
sahilmgandhi 18:6a4db94011d3 177 pin_mode(rx, PullUp);
sahilmgandhi 18:6a4db94011d3 178 }
sahilmgandhi 18:6a4db94011d3 179
sahilmgandhi 18:6a4db94011d3 180 // Configure UART
sahilmgandhi 18:6a4db94011d3 181 obj_s->baudrate = 9600;
sahilmgandhi 18:6a4db94011d3 182 obj_s->databits = UART_WORDLENGTH_8B;
sahilmgandhi 18:6a4db94011d3 183 obj_s->stopbits = UART_STOPBITS_1;
sahilmgandhi 18:6a4db94011d3 184 obj_s->parity = UART_PARITY_NONE;
sahilmgandhi 18:6a4db94011d3 185
sahilmgandhi 18:6a4db94011d3 186 #if DEVICE_SERIAL_FC
sahilmgandhi 18:6a4db94011d3 187 obj_s->hw_flow_ctl = UART_HWCONTROL_NONE;
sahilmgandhi 18:6a4db94011d3 188 #endif
sahilmgandhi 18:6a4db94011d3 189
sahilmgandhi 18:6a4db94011d3 190 obj_s->pin_tx = tx;
sahilmgandhi 18:6a4db94011d3 191 obj_s->pin_rx = rx;
sahilmgandhi 18:6a4db94011d3 192
sahilmgandhi 18:6a4db94011d3 193 init_uart(obj);
sahilmgandhi 18:6a4db94011d3 194
sahilmgandhi 18:6a4db94011d3 195 // For stdio management
sahilmgandhi 18:6a4db94011d3 196 if (obj_s->uart == STDIO_UART) {
sahilmgandhi 18:6a4db94011d3 197 stdio_uart_inited = 1;
sahilmgandhi 18:6a4db94011d3 198 memcpy(&stdio_uart, obj, sizeof(serial_t));
sahilmgandhi 18:6a4db94011d3 199 }
sahilmgandhi 18:6a4db94011d3 200 }
sahilmgandhi 18:6a4db94011d3 201
sahilmgandhi 18:6a4db94011d3 202 void serial_free(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 203 {
sahilmgandhi 18:6a4db94011d3 204 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 205
sahilmgandhi 18:6a4db94011d3 206 // Reset UART and disable clock
sahilmgandhi 18:6a4db94011d3 207 switch (obj_s->index) {
sahilmgandhi 18:6a4db94011d3 208 case 0:
sahilmgandhi 18:6a4db94011d3 209 __USART1_FORCE_RESET();
sahilmgandhi 18:6a4db94011d3 210 __USART1_RELEASE_RESET();
sahilmgandhi 18:6a4db94011d3 211 __USART1_CLK_DISABLE();
sahilmgandhi 18:6a4db94011d3 212 break;
sahilmgandhi 18:6a4db94011d3 213 case 1:
sahilmgandhi 18:6a4db94011d3 214 __USART2_FORCE_RESET();
sahilmgandhi 18:6a4db94011d3 215 __USART2_RELEASE_RESET();
sahilmgandhi 18:6a4db94011d3 216 __USART2_CLK_DISABLE();
sahilmgandhi 18:6a4db94011d3 217 break;
sahilmgandhi 18:6a4db94011d3 218 #if defined(USART3_BASE)
sahilmgandhi 18:6a4db94011d3 219 case 2:
sahilmgandhi 18:6a4db94011d3 220 __USART3_FORCE_RESET();
sahilmgandhi 18:6a4db94011d3 221 __USART3_RELEASE_RESET();
sahilmgandhi 18:6a4db94011d3 222 __USART3_CLK_DISABLE();
sahilmgandhi 18:6a4db94011d3 223 break;
sahilmgandhi 18:6a4db94011d3 224 #endif
sahilmgandhi 18:6a4db94011d3 225 #if defined(UART4_BASE)
sahilmgandhi 18:6a4db94011d3 226 case 3:
sahilmgandhi 18:6a4db94011d3 227 __UART4_FORCE_RESET();
sahilmgandhi 18:6a4db94011d3 228 __UART4_RELEASE_RESET();
sahilmgandhi 18:6a4db94011d3 229 __UART4_CLK_DISABLE();
sahilmgandhi 18:6a4db94011d3 230 break;
sahilmgandhi 18:6a4db94011d3 231 #endif
sahilmgandhi 18:6a4db94011d3 232 #if defined(UART5_BASE)
sahilmgandhi 18:6a4db94011d3 233 case 4:
sahilmgandhi 18:6a4db94011d3 234 __UART5_FORCE_RESET();
sahilmgandhi 18:6a4db94011d3 235 __UART5_RELEASE_RESET();
sahilmgandhi 18:6a4db94011d3 236 __UART5_CLK_DISABLE();
sahilmgandhi 18:6a4db94011d3 237 break;
sahilmgandhi 18:6a4db94011d3 238 #endif
sahilmgandhi 18:6a4db94011d3 239 #if defined(USART6_BASE)
sahilmgandhi 18:6a4db94011d3 240 case 5:
sahilmgandhi 18:6a4db94011d3 241 __USART6_FORCE_RESET();
sahilmgandhi 18:6a4db94011d3 242 __USART6_RELEASE_RESET();
sahilmgandhi 18:6a4db94011d3 243 __USART6_CLK_DISABLE();
sahilmgandhi 18:6a4db94011d3 244 break;
sahilmgandhi 18:6a4db94011d3 245 #endif
sahilmgandhi 18:6a4db94011d3 246 #if defined(UART7_BASE)
sahilmgandhi 18:6a4db94011d3 247 case 6:
sahilmgandhi 18:6a4db94011d3 248 __UART7_FORCE_RESET();
sahilmgandhi 18:6a4db94011d3 249 __UART7_RELEASE_RESET();
sahilmgandhi 18:6a4db94011d3 250 __UART7_CLK_DISABLE();
sahilmgandhi 18:6a4db94011d3 251 break;
sahilmgandhi 18:6a4db94011d3 252 #endif
sahilmgandhi 18:6a4db94011d3 253 #if defined(UART8_BASE)
sahilmgandhi 18:6a4db94011d3 254 case 7:
sahilmgandhi 18:6a4db94011d3 255 __UART8_FORCE_RESET();
sahilmgandhi 18:6a4db94011d3 256 __UART8_RELEASE_RESET();
sahilmgandhi 18:6a4db94011d3 257 __UART8_CLK_DISABLE();
sahilmgandhi 18:6a4db94011d3 258 break;
sahilmgandhi 18:6a4db94011d3 259 #endif
sahilmgandhi 18:6a4db94011d3 260 }
sahilmgandhi 18:6a4db94011d3 261
sahilmgandhi 18:6a4db94011d3 262 // Configure GPIOs
sahilmgandhi 18:6a4db94011d3 263 pin_function(obj_s->pin_tx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
sahilmgandhi 18:6a4db94011d3 264 pin_function(obj_s->pin_rx, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
sahilmgandhi 18:6a4db94011d3 265
sahilmgandhi 18:6a4db94011d3 266 serial_irq_ids[obj_s->index] = 0;
sahilmgandhi 18:6a4db94011d3 267 }
sahilmgandhi 18:6a4db94011d3 268
sahilmgandhi 18:6a4db94011d3 269 void serial_baud(serial_t *obj, int baudrate)
sahilmgandhi 18:6a4db94011d3 270 {
sahilmgandhi 18:6a4db94011d3 271 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 272
sahilmgandhi 18:6a4db94011d3 273 obj_s->baudrate = baudrate;
sahilmgandhi 18:6a4db94011d3 274 init_uart(obj);
sahilmgandhi 18:6a4db94011d3 275 }
sahilmgandhi 18:6a4db94011d3 276
sahilmgandhi 18:6a4db94011d3 277 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
sahilmgandhi 18:6a4db94011d3 278 {
sahilmgandhi 18:6a4db94011d3 279 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 280
sahilmgandhi 18:6a4db94011d3 281 if (data_bits == 9) {
sahilmgandhi 18:6a4db94011d3 282 obj_s->databits = UART_WORDLENGTH_9B;
sahilmgandhi 18:6a4db94011d3 283 } else {
sahilmgandhi 18:6a4db94011d3 284 obj_s->databits = UART_WORDLENGTH_8B;
sahilmgandhi 18:6a4db94011d3 285 }
sahilmgandhi 18:6a4db94011d3 286
sahilmgandhi 18:6a4db94011d3 287 switch (parity) {
sahilmgandhi 18:6a4db94011d3 288 case ParityOdd:
sahilmgandhi 18:6a4db94011d3 289 obj_s->parity = UART_PARITY_ODD;
sahilmgandhi 18:6a4db94011d3 290 break;
sahilmgandhi 18:6a4db94011d3 291 case ParityEven:
sahilmgandhi 18:6a4db94011d3 292 obj_s->parity = UART_PARITY_EVEN;
sahilmgandhi 18:6a4db94011d3 293 break;
sahilmgandhi 18:6a4db94011d3 294 default: // ParityNone
sahilmgandhi 18:6a4db94011d3 295 case ParityForced0: // unsupported!
sahilmgandhi 18:6a4db94011d3 296 case ParityForced1: // unsupported!
sahilmgandhi 18:6a4db94011d3 297 obj_s->parity = UART_PARITY_NONE;
sahilmgandhi 18:6a4db94011d3 298 break;
sahilmgandhi 18:6a4db94011d3 299 }
sahilmgandhi 18:6a4db94011d3 300
sahilmgandhi 18:6a4db94011d3 301 if (stop_bits == 2) {
sahilmgandhi 18:6a4db94011d3 302 obj_s->stopbits = UART_STOPBITS_2;
sahilmgandhi 18:6a4db94011d3 303 } else {
sahilmgandhi 18:6a4db94011d3 304 obj_s->stopbits = UART_STOPBITS_1;
sahilmgandhi 18:6a4db94011d3 305 }
sahilmgandhi 18:6a4db94011d3 306
sahilmgandhi 18:6a4db94011d3 307 init_uart(obj);
sahilmgandhi 18:6a4db94011d3 308 }
sahilmgandhi 18:6a4db94011d3 309
sahilmgandhi 18:6a4db94011d3 310 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 311 * INTERRUPTS HANDLING
sahilmgandhi 18:6a4db94011d3 312 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 313
sahilmgandhi 18:6a4db94011d3 314 static void uart_irq(int id)
sahilmgandhi 18:6a4db94011d3 315 {
sahilmgandhi 18:6a4db94011d3 316 UART_HandleTypeDef * huart = &uart_handlers[id];
sahilmgandhi 18:6a4db94011d3 317
sahilmgandhi 18:6a4db94011d3 318 if (serial_irq_ids[id] != 0) {
sahilmgandhi 18:6a4db94011d3 319 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) {
sahilmgandhi 18:6a4db94011d3 320 if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET) {
sahilmgandhi 18:6a4db94011d3 321 irq_handler(serial_irq_ids[id], TxIrq);
sahilmgandhi 18:6a4db94011d3 322 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
sahilmgandhi 18:6a4db94011d3 323 }
sahilmgandhi 18:6a4db94011d3 324 }
sahilmgandhi 18:6a4db94011d3 325 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE) != RESET) {
sahilmgandhi 18:6a4db94011d3 326 if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_RXNE) != RESET) {
sahilmgandhi 18:6a4db94011d3 327 irq_handler(serial_irq_ids[id], RxIrq);
sahilmgandhi 18:6a4db94011d3 328 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_RXNE);
sahilmgandhi 18:6a4db94011d3 329 }
sahilmgandhi 18:6a4db94011d3 330 }
sahilmgandhi 18:6a4db94011d3 331 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) {
sahilmgandhi 18:6a4db94011d3 332 if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) {
sahilmgandhi 18:6a4db94011d3 333 volatile uint32_t tmpval = huart->Instance->DR; // Clear ORE flag
sahilmgandhi 18:6a4db94011d3 334 }
sahilmgandhi 18:6a4db94011d3 335 }
sahilmgandhi 18:6a4db94011d3 336 }
sahilmgandhi 18:6a4db94011d3 337 }
sahilmgandhi 18:6a4db94011d3 338
sahilmgandhi 18:6a4db94011d3 339 static void uart1_irq(void)
sahilmgandhi 18:6a4db94011d3 340 {
sahilmgandhi 18:6a4db94011d3 341 uart_irq(0);
sahilmgandhi 18:6a4db94011d3 342 }
sahilmgandhi 18:6a4db94011d3 343
sahilmgandhi 18:6a4db94011d3 344 static void uart2_irq(void)
sahilmgandhi 18:6a4db94011d3 345 {
sahilmgandhi 18:6a4db94011d3 346 uart_irq(1);
sahilmgandhi 18:6a4db94011d3 347 }
sahilmgandhi 18:6a4db94011d3 348
sahilmgandhi 18:6a4db94011d3 349 #if defined(USART3_BASE)
sahilmgandhi 18:6a4db94011d3 350 static void uart3_irq(void)
sahilmgandhi 18:6a4db94011d3 351 {
sahilmgandhi 18:6a4db94011d3 352 uart_irq(2);
sahilmgandhi 18:6a4db94011d3 353 }
sahilmgandhi 18:6a4db94011d3 354 #endif
sahilmgandhi 18:6a4db94011d3 355
sahilmgandhi 18:6a4db94011d3 356 #if defined(UART4_BASE)
sahilmgandhi 18:6a4db94011d3 357 static void uart4_irq(void)
sahilmgandhi 18:6a4db94011d3 358 {
sahilmgandhi 18:6a4db94011d3 359 uart_irq(3);
sahilmgandhi 18:6a4db94011d3 360 }
sahilmgandhi 18:6a4db94011d3 361 #endif
sahilmgandhi 18:6a4db94011d3 362
sahilmgandhi 18:6a4db94011d3 363 #if defined(UART5_BASE)
sahilmgandhi 18:6a4db94011d3 364 static void uart5_irq(void)
sahilmgandhi 18:6a4db94011d3 365 {
sahilmgandhi 18:6a4db94011d3 366 uart_irq(4);
sahilmgandhi 18:6a4db94011d3 367 }
sahilmgandhi 18:6a4db94011d3 368 #endif
sahilmgandhi 18:6a4db94011d3 369
sahilmgandhi 18:6a4db94011d3 370 #if defined(USART6_BASE)
sahilmgandhi 18:6a4db94011d3 371 static void uart6_irq(void)
sahilmgandhi 18:6a4db94011d3 372 {
sahilmgandhi 18:6a4db94011d3 373 uart_irq(5);
sahilmgandhi 18:6a4db94011d3 374 }
sahilmgandhi 18:6a4db94011d3 375 #endif
sahilmgandhi 18:6a4db94011d3 376
sahilmgandhi 18:6a4db94011d3 377 #if defined(UART7_BASE)
sahilmgandhi 18:6a4db94011d3 378 static void uart7_irq(void)
sahilmgandhi 18:6a4db94011d3 379 {
sahilmgandhi 18:6a4db94011d3 380 uart_irq(6);
sahilmgandhi 18:6a4db94011d3 381 }
sahilmgandhi 18:6a4db94011d3 382 #endif
sahilmgandhi 18:6a4db94011d3 383
sahilmgandhi 18:6a4db94011d3 384 #if defined(UART8_BASE)
sahilmgandhi 18:6a4db94011d3 385 static void uart8_irq(void)
sahilmgandhi 18:6a4db94011d3 386 {
sahilmgandhi 18:6a4db94011d3 387 uart_irq(7);
sahilmgandhi 18:6a4db94011d3 388 }
sahilmgandhi 18:6a4db94011d3 389 #endif
sahilmgandhi 18:6a4db94011d3 390
sahilmgandhi 18:6a4db94011d3 391 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
sahilmgandhi 18:6a4db94011d3 392 {
sahilmgandhi 18:6a4db94011d3 393 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 394
sahilmgandhi 18:6a4db94011d3 395 irq_handler = handler;
sahilmgandhi 18:6a4db94011d3 396 serial_irq_ids[obj_s->index] = id;
sahilmgandhi 18:6a4db94011d3 397 }
sahilmgandhi 18:6a4db94011d3 398
sahilmgandhi 18:6a4db94011d3 399 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
sahilmgandhi 18:6a4db94011d3 400 {
sahilmgandhi 18:6a4db94011d3 401 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 402 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
sahilmgandhi 18:6a4db94011d3 403 IRQn_Type irq_n = (IRQn_Type)0;
sahilmgandhi 18:6a4db94011d3 404 uint32_t vector = 0;
sahilmgandhi 18:6a4db94011d3 405
sahilmgandhi 18:6a4db94011d3 406 switch (obj_s->index) {
sahilmgandhi 18:6a4db94011d3 407 case 0:
sahilmgandhi 18:6a4db94011d3 408 irq_n = USART1_IRQn;
sahilmgandhi 18:6a4db94011d3 409 vector = (uint32_t)&uart1_irq;
sahilmgandhi 18:6a4db94011d3 410 break;
sahilmgandhi 18:6a4db94011d3 411
sahilmgandhi 18:6a4db94011d3 412 case 1:
sahilmgandhi 18:6a4db94011d3 413 irq_n = USART2_IRQn;
sahilmgandhi 18:6a4db94011d3 414 vector = (uint32_t)&uart2_irq;
sahilmgandhi 18:6a4db94011d3 415 break;
sahilmgandhi 18:6a4db94011d3 416 #if defined(USART3_BASE)
sahilmgandhi 18:6a4db94011d3 417 case 2:
sahilmgandhi 18:6a4db94011d3 418 irq_n = USART3_IRQn;
sahilmgandhi 18:6a4db94011d3 419 vector = (uint32_t)&uart3_irq;
sahilmgandhi 18:6a4db94011d3 420 break;
sahilmgandhi 18:6a4db94011d3 421 #endif
sahilmgandhi 18:6a4db94011d3 422 #if defined(UART4_BASE)
sahilmgandhi 18:6a4db94011d3 423 case 3:
sahilmgandhi 18:6a4db94011d3 424 irq_n = UART4_IRQn;
sahilmgandhi 18:6a4db94011d3 425 vector = (uint32_t)&uart4_irq;
sahilmgandhi 18:6a4db94011d3 426 break;
sahilmgandhi 18:6a4db94011d3 427 #endif
sahilmgandhi 18:6a4db94011d3 428 #if defined(UART5_BASE)
sahilmgandhi 18:6a4db94011d3 429 case 4:
sahilmgandhi 18:6a4db94011d3 430 irq_n = UART5_IRQn;
sahilmgandhi 18:6a4db94011d3 431 vector = (uint32_t)&uart5_irq;
sahilmgandhi 18:6a4db94011d3 432 break;
sahilmgandhi 18:6a4db94011d3 433 #endif
sahilmgandhi 18:6a4db94011d3 434 #if defined(USART6_BASE)
sahilmgandhi 18:6a4db94011d3 435 case 5:
sahilmgandhi 18:6a4db94011d3 436 irq_n = USART6_IRQn;
sahilmgandhi 18:6a4db94011d3 437 vector = (uint32_t)&uart6_irq;
sahilmgandhi 18:6a4db94011d3 438 break;
sahilmgandhi 18:6a4db94011d3 439 #endif
sahilmgandhi 18:6a4db94011d3 440 #if defined(UART7_BASE)
sahilmgandhi 18:6a4db94011d3 441 case 6:
sahilmgandhi 18:6a4db94011d3 442 irq_n = UART7_IRQn;
sahilmgandhi 18:6a4db94011d3 443 vector = (uint32_t)&uart7_irq;
sahilmgandhi 18:6a4db94011d3 444 break;
sahilmgandhi 18:6a4db94011d3 445 #endif
sahilmgandhi 18:6a4db94011d3 446 #if defined(UART8_BASE)
sahilmgandhi 18:6a4db94011d3 447 case 7:
sahilmgandhi 18:6a4db94011d3 448 irq_n = UART8_IRQn;
sahilmgandhi 18:6a4db94011d3 449 vector = (uint32_t)&uart8_irq;
sahilmgandhi 18:6a4db94011d3 450 break;
sahilmgandhi 18:6a4db94011d3 451 #endif
sahilmgandhi 18:6a4db94011d3 452 }
sahilmgandhi 18:6a4db94011d3 453
sahilmgandhi 18:6a4db94011d3 454 if (enable) {
sahilmgandhi 18:6a4db94011d3 455 if (irq == RxIrq) {
sahilmgandhi 18:6a4db94011d3 456 __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
sahilmgandhi 18:6a4db94011d3 457 } else { // TxIrq
sahilmgandhi 18:6a4db94011d3 458 __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
sahilmgandhi 18:6a4db94011d3 459 }
sahilmgandhi 18:6a4db94011d3 460 NVIC_SetVector(irq_n, vector);
sahilmgandhi 18:6a4db94011d3 461 NVIC_EnableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 462
sahilmgandhi 18:6a4db94011d3 463 } else { // disable
sahilmgandhi 18:6a4db94011d3 464 int all_disabled = 0;
sahilmgandhi 18:6a4db94011d3 465 if (irq == RxIrq) {
sahilmgandhi 18:6a4db94011d3 466 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
sahilmgandhi 18:6a4db94011d3 467 // Check if TxIrq is disabled too
sahilmgandhi 18:6a4db94011d3 468 if ((huart->Instance->CR1 & USART_CR1_TXEIE) == 0) {
sahilmgandhi 18:6a4db94011d3 469 all_disabled = 1;
sahilmgandhi 18:6a4db94011d3 470 }
sahilmgandhi 18:6a4db94011d3 471 } else { // TxIrq
sahilmgandhi 18:6a4db94011d3 472 __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
sahilmgandhi 18:6a4db94011d3 473 // Check if RxIrq is disabled too
sahilmgandhi 18:6a4db94011d3 474 if ((huart->Instance->CR1 & USART_CR1_RXNEIE) == 0) {
sahilmgandhi 18:6a4db94011d3 475 all_disabled = 1;
sahilmgandhi 18:6a4db94011d3 476 }
sahilmgandhi 18:6a4db94011d3 477 }
sahilmgandhi 18:6a4db94011d3 478
sahilmgandhi 18:6a4db94011d3 479 if (all_disabled) {
sahilmgandhi 18:6a4db94011d3 480 NVIC_DisableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 481 }
sahilmgandhi 18:6a4db94011d3 482 }
sahilmgandhi 18:6a4db94011d3 483 }
sahilmgandhi 18:6a4db94011d3 484
sahilmgandhi 18:6a4db94011d3 485 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 486 * READ/WRITE
sahilmgandhi 18:6a4db94011d3 487 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 488
sahilmgandhi 18:6a4db94011d3 489 int serial_getc(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 490 {
sahilmgandhi 18:6a4db94011d3 491 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 492 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
sahilmgandhi 18:6a4db94011d3 493
sahilmgandhi 18:6a4db94011d3 494 while (!serial_readable(obj));
sahilmgandhi 18:6a4db94011d3 495 return (int)(huart->Instance->DR & 0x1FF);
sahilmgandhi 18:6a4db94011d3 496 }
sahilmgandhi 18:6a4db94011d3 497
sahilmgandhi 18:6a4db94011d3 498 void serial_putc(serial_t *obj, int c)
sahilmgandhi 18:6a4db94011d3 499 {
sahilmgandhi 18:6a4db94011d3 500 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 501 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
sahilmgandhi 18:6a4db94011d3 502
sahilmgandhi 18:6a4db94011d3 503 while (!serial_writable(obj));
sahilmgandhi 18:6a4db94011d3 504 huart->Instance->DR = (uint32_t)(c & 0x1FF);
sahilmgandhi 18:6a4db94011d3 505 }
sahilmgandhi 18:6a4db94011d3 506
sahilmgandhi 18:6a4db94011d3 507 int serial_readable(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 508 {
sahilmgandhi 18:6a4db94011d3 509 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 510 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
sahilmgandhi 18:6a4db94011d3 511
sahilmgandhi 18:6a4db94011d3 512 // Check if data is received
sahilmgandhi 18:6a4db94011d3 513 return (__HAL_UART_GET_FLAG(huart, UART_FLAG_RXNE) != RESET) ? 1 : 0;
sahilmgandhi 18:6a4db94011d3 514 }
sahilmgandhi 18:6a4db94011d3 515
sahilmgandhi 18:6a4db94011d3 516 int serial_writable(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 517 {
sahilmgandhi 18:6a4db94011d3 518 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 519 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
sahilmgandhi 18:6a4db94011d3 520
sahilmgandhi 18:6a4db94011d3 521 // Check if data is transmitted
sahilmgandhi 18:6a4db94011d3 522 return (__HAL_UART_GET_FLAG(huart, UART_FLAG_TXE) != RESET) ? 1 : 0;
sahilmgandhi 18:6a4db94011d3 523 }
sahilmgandhi 18:6a4db94011d3 524
sahilmgandhi 18:6a4db94011d3 525 void serial_clear(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 526 {
sahilmgandhi 18:6a4db94011d3 527 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 528 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
sahilmgandhi 18:6a4db94011d3 529
sahilmgandhi 18:6a4db94011d3 530 huart->TxXferCount = 0;
sahilmgandhi 18:6a4db94011d3 531 huart->RxXferCount = 0;
sahilmgandhi 18:6a4db94011d3 532 }
sahilmgandhi 18:6a4db94011d3 533
sahilmgandhi 18:6a4db94011d3 534 void serial_pinout_tx(PinName tx)
sahilmgandhi 18:6a4db94011d3 535 {
sahilmgandhi 18:6a4db94011d3 536 pinmap_pinout(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 537 }
sahilmgandhi 18:6a4db94011d3 538
sahilmgandhi 18:6a4db94011d3 539 void serial_break_set(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 540 {
sahilmgandhi 18:6a4db94011d3 541 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 542 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
sahilmgandhi 18:6a4db94011d3 543
sahilmgandhi 18:6a4db94011d3 544 HAL_LIN_SendBreak(huart);
sahilmgandhi 18:6a4db94011d3 545 }
sahilmgandhi 18:6a4db94011d3 546
sahilmgandhi 18:6a4db94011d3 547 void serial_break_clear(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 548 {
sahilmgandhi 18:6a4db94011d3 549 (void)obj;
sahilmgandhi 18:6a4db94011d3 550 }
sahilmgandhi 18:6a4db94011d3 551
sahilmgandhi 18:6a4db94011d3 552 #if DEVICE_SERIAL_ASYNCH
sahilmgandhi 18:6a4db94011d3 553
sahilmgandhi 18:6a4db94011d3 554 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 555 * LOCAL HELPER FUNCTIONS
sahilmgandhi 18:6a4db94011d3 556 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 557
sahilmgandhi 18:6a4db94011d3 558 /**
sahilmgandhi 18:6a4db94011d3 559 * Configure the TX buffer for an asynchronous write serial transaction
sahilmgandhi 18:6a4db94011d3 560 *
sahilmgandhi 18:6a4db94011d3 561 * @param obj The serial object.
sahilmgandhi 18:6a4db94011d3 562 * @param tx The buffer for sending.
sahilmgandhi 18:6a4db94011d3 563 * @param tx_length The number of words to transmit.
sahilmgandhi 18:6a4db94011d3 564 */
sahilmgandhi 18:6a4db94011d3 565 static void serial_tx_buffer_set(serial_t *obj, void *tx, int tx_length, uint8_t width)
sahilmgandhi 18:6a4db94011d3 566 {
sahilmgandhi 18:6a4db94011d3 567 (void)width;
sahilmgandhi 18:6a4db94011d3 568
sahilmgandhi 18:6a4db94011d3 569 // Exit if a transmit is already on-going
sahilmgandhi 18:6a4db94011d3 570 if (serial_tx_active(obj)) {
sahilmgandhi 18:6a4db94011d3 571 return;
sahilmgandhi 18:6a4db94011d3 572 }
sahilmgandhi 18:6a4db94011d3 573
sahilmgandhi 18:6a4db94011d3 574 obj->tx_buff.buffer = tx;
sahilmgandhi 18:6a4db94011d3 575 obj->tx_buff.length = tx_length;
sahilmgandhi 18:6a4db94011d3 576 obj->tx_buff.pos = 0;
sahilmgandhi 18:6a4db94011d3 577 }
sahilmgandhi 18:6a4db94011d3 578
sahilmgandhi 18:6a4db94011d3 579 /**
sahilmgandhi 18:6a4db94011d3 580 * Configure the RX buffer for an asynchronous write serial transaction
sahilmgandhi 18:6a4db94011d3 581 *
sahilmgandhi 18:6a4db94011d3 582 * @param obj The serial object.
sahilmgandhi 18:6a4db94011d3 583 * @param tx The buffer for sending.
sahilmgandhi 18:6a4db94011d3 584 * @param tx_length The number of words to transmit.
sahilmgandhi 18:6a4db94011d3 585 */
sahilmgandhi 18:6a4db94011d3 586 static void serial_rx_buffer_set(serial_t *obj, void *rx, int rx_length, uint8_t width)
sahilmgandhi 18:6a4db94011d3 587 {
sahilmgandhi 18:6a4db94011d3 588 (void)width;
sahilmgandhi 18:6a4db94011d3 589
sahilmgandhi 18:6a4db94011d3 590 // Exit if a reception is already on-going
sahilmgandhi 18:6a4db94011d3 591 if (serial_rx_active(obj)) {
sahilmgandhi 18:6a4db94011d3 592 return;
sahilmgandhi 18:6a4db94011d3 593 }
sahilmgandhi 18:6a4db94011d3 594
sahilmgandhi 18:6a4db94011d3 595 obj->rx_buff.buffer = rx;
sahilmgandhi 18:6a4db94011d3 596 obj->rx_buff.length = rx_length;
sahilmgandhi 18:6a4db94011d3 597 obj->rx_buff.pos = 0;
sahilmgandhi 18:6a4db94011d3 598 }
sahilmgandhi 18:6a4db94011d3 599
sahilmgandhi 18:6a4db94011d3 600 /**
sahilmgandhi 18:6a4db94011d3 601 * Configure events
sahilmgandhi 18:6a4db94011d3 602 *
sahilmgandhi 18:6a4db94011d3 603 * @param obj The serial object
sahilmgandhi 18:6a4db94011d3 604 * @param event The logical OR of the events to configure
sahilmgandhi 18:6a4db94011d3 605 * @param enable Set to non-zero to enable events, or zero to disable them
sahilmgandhi 18:6a4db94011d3 606 */
sahilmgandhi 18:6a4db94011d3 607 static void serial_enable_event(serial_t *obj, int event, uint8_t enable)
sahilmgandhi 18:6a4db94011d3 608 {
sahilmgandhi 18:6a4db94011d3 609 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 610
sahilmgandhi 18:6a4db94011d3 611 // Shouldn't have to enable interrupt here, just need to keep track of the requested events.
sahilmgandhi 18:6a4db94011d3 612 if (enable) {
sahilmgandhi 18:6a4db94011d3 613 obj_s->events |= event;
sahilmgandhi 18:6a4db94011d3 614 } else {
sahilmgandhi 18:6a4db94011d3 615 obj_s->events &= ~event;
sahilmgandhi 18:6a4db94011d3 616 }
sahilmgandhi 18:6a4db94011d3 617 }
sahilmgandhi 18:6a4db94011d3 618
sahilmgandhi 18:6a4db94011d3 619
sahilmgandhi 18:6a4db94011d3 620 /**
sahilmgandhi 18:6a4db94011d3 621 * Get index of serial object TX IRQ, relating it to the physical peripheral.
sahilmgandhi 18:6a4db94011d3 622 *
sahilmgandhi 18:6a4db94011d3 623 * @param obj pointer to serial object
sahilmgandhi 18:6a4db94011d3 624 * @return internal NVIC TX IRQ index of U(S)ART peripheral
sahilmgandhi 18:6a4db94011d3 625 */
sahilmgandhi 18:6a4db94011d3 626 static IRQn_Type serial_get_irq_n(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 627 {
sahilmgandhi 18:6a4db94011d3 628 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 629 IRQn_Type irq_n;
sahilmgandhi 18:6a4db94011d3 630
sahilmgandhi 18:6a4db94011d3 631 switch (obj_s->index) {
sahilmgandhi 18:6a4db94011d3 632 #if defined(USART1_BASE)
sahilmgandhi 18:6a4db94011d3 633 case 0:
sahilmgandhi 18:6a4db94011d3 634 irq_n = USART1_IRQn;
sahilmgandhi 18:6a4db94011d3 635 break;
sahilmgandhi 18:6a4db94011d3 636 #endif
sahilmgandhi 18:6a4db94011d3 637 #if defined(USART2_BASE)
sahilmgandhi 18:6a4db94011d3 638 case 1:
sahilmgandhi 18:6a4db94011d3 639 irq_n = USART2_IRQn;
sahilmgandhi 18:6a4db94011d3 640 break;
sahilmgandhi 18:6a4db94011d3 641 #endif
sahilmgandhi 18:6a4db94011d3 642 #if defined(USART3_BASE)
sahilmgandhi 18:6a4db94011d3 643 case 2:
sahilmgandhi 18:6a4db94011d3 644 irq_n = USART3_IRQn;
sahilmgandhi 18:6a4db94011d3 645 break;
sahilmgandhi 18:6a4db94011d3 646 #endif
sahilmgandhi 18:6a4db94011d3 647 #if defined(UART4_BASE)
sahilmgandhi 18:6a4db94011d3 648 case 3:
sahilmgandhi 18:6a4db94011d3 649 irq_n = UART4_IRQn;
sahilmgandhi 18:6a4db94011d3 650 break;
sahilmgandhi 18:6a4db94011d3 651 #endif
sahilmgandhi 18:6a4db94011d3 652 #if defined(USART5_BASE)
sahilmgandhi 18:6a4db94011d3 653 case 4:
sahilmgandhi 18:6a4db94011d3 654 irq_n = UART5_IRQn;
sahilmgandhi 18:6a4db94011d3 655 break;
sahilmgandhi 18:6a4db94011d3 656 #endif
sahilmgandhi 18:6a4db94011d3 657 #if defined(USART6_BASE)
sahilmgandhi 18:6a4db94011d3 658 case 5:
sahilmgandhi 18:6a4db94011d3 659 irq_n = USART6_IRQn;
sahilmgandhi 18:6a4db94011d3 660 break;
sahilmgandhi 18:6a4db94011d3 661 #endif
sahilmgandhi 18:6a4db94011d3 662 #if defined(UART7_BASE)
sahilmgandhi 18:6a4db94011d3 663 case 6:
sahilmgandhi 18:6a4db94011d3 664 irq_n = UART7_IRQn;
sahilmgandhi 18:6a4db94011d3 665 break;
sahilmgandhi 18:6a4db94011d3 666 #endif
sahilmgandhi 18:6a4db94011d3 667 #if defined(UART8_BASE)
sahilmgandhi 18:6a4db94011d3 668 case 7:
sahilmgandhi 18:6a4db94011d3 669 irq_n = UART8_IRQn;
sahilmgandhi 18:6a4db94011d3 670 break;
sahilmgandhi 18:6a4db94011d3 671 #endif
sahilmgandhi 18:6a4db94011d3 672 default:
sahilmgandhi 18:6a4db94011d3 673 irq_n = (IRQn_Type)0;
sahilmgandhi 18:6a4db94011d3 674 }
sahilmgandhi 18:6a4db94011d3 675
sahilmgandhi 18:6a4db94011d3 676 return irq_n;
sahilmgandhi 18:6a4db94011d3 677 }
sahilmgandhi 18:6a4db94011d3 678
sahilmgandhi 18:6a4db94011d3 679 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 680 * MBED API FUNCTIONS
sahilmgandhi 18:6a4db94011d3 681 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 682
sahilmgandhi 18:6a4db94011d3 683 /**
sahilmgandhi 18:6a4db94011d3 684 * Begin asynchronous TX transfer. The used buffer is specified in the serial
sahilmgandhi 18:6a4db94011d3 685 * object, tx_buff
sahilmgandhi 18:6a4db94011d3 686 *
sahilmgandhi 18:6a4db94011d3 687 * @param obj The serial object
sahilmgandhi 18:6a4db94011d3 688 * @param tx The buffer for sending
sahilmgandhi 18:6a4db94011d3 689 * @param tx_length The number of words to transmit
sahilmgandhi 18:6a4db94011d3 690 * @param tx_width The bit width of buffer word
sahilmgandhi 18:6a4db94011d3 691 * @param handler The serial handler
sahilmgandhi 18:6a4db94011d3 692 * @param event The logical OR of events to be registered
sahilmgandhi 18:6a4db94011d3 693 * @param hint A suggestion for how to use DMA with this transfer
sahilmgandhi 18:6a4db94011d3 694 * @return Returns number of data transfered, or 0 otherwise
sahilmgandhi 18:6a4db94011d3 695 */
sahilmgandhi 18:6a4db94011d3 696 int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint)
sahilmgandhi 18:6a4db94011d3 697 {
sahilmgandhi 18:6a4db94011d3 698 // TODO: DMA usage is currently ignored
sahilmgandhi 18:6a4db94011d3 699 (void) hint;
sahilmgandhi 18:6a4db94011d3 700
sahilmgandhi 18:6a4db94011d3 701 // Check buffer is ok
sahilmgandhi 18:6a4db94011d3 702 MBED_ASSERT(tx != (void*)0);
sahilmgandhi 18:6a4db94011d3 703 MBED_ASSERT(tx_width == 8); // support only 8b width
sahilmgandhi 18:6a4db94011d3 704
sahilmgandhi 18:6a4db94011d3 705 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 706 UART_HandleTypeDef * huart = &uart_handlers[obj_s->index];
sahilmgandhi 18:6a4db94011d3 707
sahilmgandhi 18:6a4db94011d3 708 if (tx_length == 0) {
sahilmgandhi 18:6a4db94011d3 709 return 0;
sahilmgandhi 18:6a4db94011d3 710 }
sahilmgandhi 18:6a4db94011d3 711
sahilmgandhi 18:6a4db94011d3 712 // Set up buffer
sahilmgandhi 18:6a4db94011d3 713 serial_tx_buffer_set(obj, (void *)tx, tx_length, tx_width);
sahilmgandhi 18:6a4db94011d3 714
sahilmgandhi 18:6a4db94011d3 715 // Set up events
sahilmgandhi 18:6a4db94011d3 716 serial_enable_event(obj, SERIAL_EVENT_TX_ALL, 0); // Clear all events
sahilmgandhi 18:6a4db94011d3 717 serial_enable_event(obj, event, 1); // Set only the wanted events
sahilmgandhi 18:6a4db94011d3 718
sahilmgandhi 18:6a4db94011d3 719 // Enable interrupt
sahilmgandhi 18:6a4db94011d3 720 IRQn_Type irq_n = serial_get_irq_n(obj);
sahilmgandhi 18:6a4db94011d3 721 NVIC_ClearPendingIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 722 NVIC_DisableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 723 NVIC_SetPriority(irq_n, 1);
sahilmgandhi 18:6a4db94011d3 724 NVIC_SetVector(irq_n, (uint32_t)handler);
sahilmgandhi 18:6a4db94011d3 725 NVIC_EnableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 726
sahilmgandhi 18:6a4db94011d3 727 // the following function will enable UART_IT_TXE and error interrupts
sahilmgandhi 18:6a4db94011d3 728 if (HAL_UART_Transmit_IT(huart, (uint8_t*)tx, tx_length) != HAL_OK) {
sahilmgandhi 18:6a4db94011d3 729 return 0;
sahilmgandhi 18:6a4db94011d3 730 }
sahilmgandhi 18:6a4db94011d3 731
sahilmgandhi 18:6a4db94011d3 732 return tx_length;
sahilmgandhi 18:6a4db94011d3 733 }
sahilmgandhi 18:6a4db94011d3 734
sahilmgandhi 18:6a4db94011d3 735 /**
sahilmgandhi 18:6a4db94011d3 736 * Begin asynchronous RX transfer (enable interrupt for data collecting)
sahilmgandhi 18:6a4db94011d3 737 * The used buffer is specified in the serial object, rx_buff
sahilmgandhi 18:6a4db94011d3 738 *
sahilmgandhi 18:6a4db94011d3 739 * @param obj The serial object
sahilmgandhi 18:6a4db94011d3 740 * @param rx The buffer for sending
sahilmgandhi 18:6a4db94011d3 741 * @param rx_length The number of words to transmit
sahilmgandhi 18:6a4db94011d3 742 * @param rx_width The bit width of buffer word
sahilmgandhi 18:6a4db94011d3 743 * @param handler The serial handler
sahilmgandhi 18:6a4db94011d3 744 * @param event The logical OR of events to be registered
sahilmgandhi 18:6a4db94011d3 745 * @param handler The serial handler
sahilmgandhi 18:6a4db94011d3 746 * @param char_match A character in range 0-254 to be matched
sahilmgandhi 18:6a4db94011d3 747 * @param hint A suggestion for how to use DMA with this transfer
sahilmgandhi 18:6a4db94011d3 748 */
sahilmgandhi 18:6a4db94011d3 749 void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint)
sahilmgandhi 18:6a4db94011d3 750 {
sahilmgandhi 18:6a4db94011d3 751 // TODO: DMA usage is currently ignored
sahilmgandhi 18:6a4db94011d3 752 (void) hint;
sahilmgandhi 18:6a4db94011d3 753
sahilmgandhi 18:6a4db94011d3 754 /* Sanity check arguments */
sahilmgandhi 18:6a4db94011d3 755 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 756 MBED_ASSERT(rx != (void*)0);
sahilmgandhi 18:6a4db94011d3 757 MBED_ASSERT(rx_width == 8); // support only 8b width
sahilmgandhi 18:6a4db94011d3 758
sahilmgandhi 18:6a4db94011d3 759 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 760 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
sahilmgandhi 18:6a4db94011d3 761
sahilmgandhi 18:6a4db94011d3 762 serial_enable_event(obj, SERIAL_EVENT_RX_ALL, 0);
sahilmgandhi 18:6a4db94011d3 763 serial_enable_event(obj, event, 1);
sahilmgandhi 18:6a4db94011d3 764
sahilmgandhi 18:6a4db94011d3 765 // set CharMatch
sahilmgandhi 18:6a4db94011d3 766 obj->char_match = char_match;
sahilmgandhi 18:6a4db94011d3 767
sahilmgandhi 18:6a4db94011d3 768 serial_rx_buffer_set(obj, rx, rx_length, rx_width);
sahilmgandhi 18:6a4db94011d3 769
sahilmgandhi 18:6a4db94011d3 770 IRQn_Type irq_n = serial_get_irq_n(obj);
sahilmgandhi 18:6a4db94011d3 771 NVIC_ClearPendingIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 772 NVIC_DisableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 773 NVIC_SetPriority(irq_n, 0);
sahilmgandhi 18:6a4db94011d3 774 NVIC_SetVector(irq_n, (uint32_t)handler);
sahilmgandhi 18:6a4db94011d3 775 NVIC_EnableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 776
sahilmgandhi 18:6a4db94011d3 777 // following HAL function will enable the RXNE interrupt + error interrupts
sahilmgandhi 18:6a4db94011d3 778 HAL_UART_Receive_IT(huart, (uint8_t*)rx, rx_length);
sahilmgandhi 18:6a4db94011d3 779 }
sahilmgandhi 18:6a4db94011d3 780
sahilmgandhi 18:6a4db94011d3 781 /**
sahilmgandhi 18:6a4db94011d3 782 * Attempts to determine if the serial peripheral is already in use for TX
sahilmgandhi 18:6a4db94011d3 783 *
sahilmgandhi 18:6a4db94011d3 784 * @param obj The serial object
sahilmgandhi 18:6a4db94011d3 785 * @return Non-zero if the TX transaction is ongoing, 0 otherwise
sahilmgandhi 18:6a4db94011d3 786 */
sahilmgandhi 18:6a4db94011d3 787 uint8_t serial_tx_active(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 788 {
sahilmgandhi 18:6a4db94011d3 789 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 790
sahilmgandhi 18:6a4db94011d3 791 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 792 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
sahilmgandhi 18:6a4db94011d3 793
sahilmgandhi 18:6a4db94011d3 794 return ((HAL_UART_GetState(huart) == HAL_UART_STATE_BUSY_TX) ? 1 : 0);
sahilmgandhi 18:6a4db94011d3 795 }
sahilmgandhi 18:6a4db94011d3 796
sahilmgandhi 18:6a4db94011d3 797 /**
sahilmgandhi 18:6a4db94011d3 798 * Attempts to determine if the serial peripheral is already in use for RX
sahilmgandhi 18:6a4db94011d3 799 *
sahilmgandhi 18:6a4db94011d3 800 * @param obj The serial object
sahilmgandhi 18:6a4db94011d3 801 * @return Non-zero if the RX transaction is ongoing, 0 otherwise
sahilmgandhi 18:6a4db94011d3 802 */
sahilmgandhi 18:6a4db94011d3 803 uint8_t serial_rx_active(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 804 {
sahilmgandhi 18:6a4db94011d3 805 MBED_ASSERT(obj);
sahilmgandhi 18:6a4db94011d3 806
sahilmgandhi 18:6a4db94011d3 807 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 808 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
sahilmgandhi 18:6a4db94011d3 809
sahilmgandhi 18:6a4db94011d3 810 return ((HAL_UART_GetState(huart) == HAL_UART_STATE_BUSY_RX) ? 1 : 0);
sahilmgandhi 18:6a4db94011d3 811 }
sahilmgandhi 18:6a4db94011d3 812
sahilmgandhi 18:6a4db94011d3 813 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) {
sahilmgandhi 18:6a4db94011d3 814 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) {
sahilmgandhi 18:6a4db94011d3 815 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
sahilmgandhi 18:6a4db94011d3 816 }
sahilmgandhi 18:6a4db94011d3 817 }
sahilmgandhi 18:6a4db94011d3 818
sahilmgandhi 18:6a4db94011d3 819 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart) {
sahilmgandhi 18:6a4db94011d3 820 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) {
sahilmgandhi 18:6a4db94011d3 821 volatile uint32_t tmpval = huart->Instance->DR; // Clear PE flag
sahilmgandhi 18:6a4db94011d3 822 } else if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) {
sahilmgandhi 18:6a4db94011d3 823 volatile uint32_t tmpval = huart->Instance->DR; // Clear FE flag
sahilmgandhi 18:6a4db94011d3 824 } else if (__HAL_UART_GET_FLAG(huart, UART_FLAG_NE) != RESET) {
sahilmgandhi 18:6a4db94011d3 825 volatile uint32_t tmpval = huart->Instance->DR; // Clear NE flag
sahilmgandhi 18:6a4db94011d3 826 } else if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) {
sahilmgandhi 18:6a4db94011d3 827 volatile uint32_t tmpval = huart->Instance->DR; // Clear ORE flag
sahilmgandhi 18:6a4db94011d3 828 }
sahilmgandhi 18:6a4db94011d3 829 }
sahilmgandhi 18:6a4db94011d3 830
sahilmgandhi 18:6a4db94011d3 831 /**
sahilmgandhi 18:6a4db94011d3 832 * The asynchronous TX and RX handler.
sahilmgandhi 18:6a4db94011d3 833 *
sahilmgandhi 18:6a4db94011d3 834 * @param obj The serial object
sahilmgandhi 18:6a4db94011d3 835 * @return Returns event flags if a TX/RX transfer termination condition was met or 0 otherwise
sahilmgandhi 18:6a4db94011d3 836 */
sahilmgandhi 18:6a4db94011d3 837 int serial_irq_handler_asynch(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 838 {
sahilmgandhi 18:6a4db94011d3 839 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 840 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
sahilmgandhi 18:6a4db94011d3 841
sahilmgandhi 18:6a4db94011d3 842 volatile int return_event = 0;
sahilmgandhi 18:6a4db94011d3 843 uint8_t *buf = (uint8_t*)(obj->rx_buff.buffer);
sahilmgandhi 18:6a4db94011d3 844 uint8_t i = 0;
sahilmgandhi 18:6a4db94011d3 845
sahilmgandhi 18:6a4db94011d3 846 // TX PART:
sahilmgandhi 18:6a4db94011d3 847 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_TC) != RESET) {
sahilmgandhi 18:6a4db94011d3 848 if (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET) {
sahilmgandhi 18:6a4db94011d3 849 // Return event SERIAL_EVENT_TX_COMPLETE if requested
sahilmgandhi 18:6a4db94011d3 850 if ((obj_s->events & SERIAL_EVENT_TX_COMPLETE ) != 0) {
sahilmgandhi 18:6a4db94011d3 851 return_event |= (SERIAL_EVENT_TX_COMPLETE & obj_s->events);
sahilmgandhi 18:6a4db94011d3 852 }
sahilmgandhi 18:6a4db94011d3 853 }
sahilmgandhi 18:6a4db94011d3 854 }
sahilmgandhi 18:6a4db94011d3 855
sahilmgandhi 18:6a4db94011d3 856 // Handle error events
sahilmgandhi 18:6a4db94011d3 857 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_PE) != RESET) {
sahilmgandhi 18:6a4db94011d3 858 if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) {
sahilmgandhi 18:6a4db94011d3 859 return_event |= (SERIAL_EVENT_RX_PARITY_ERROR & obj_s->events);
sahilmgandhi 18:6a4db94011d3 860 }
sahilmgandhi 18:6a4db94011d3 861 }
sahilmgandhi 18:6a4db94011d3 862
sahilmgandhi 18:6a4db94011d3 863 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_FE) != RESET) {
sahilmgandhi 18:6a4db94011d3 864 if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) {
sahilmgandhi 18:6a4db94011d3 865 return_event |= (SERIAL_EVENT_RX_FRAMING_ERROR & obj_s->events);
sahilmgandhi 18:6a4db94011d3 866 }
sahilmgandhi 18:6a4db94011d3 867 }
sahilmgandhi 18:6a4db94011d3 868
sahilmgandhi 18:6a4db94011d3 869 if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) != RESET) {
sahilmgandhi 18:6a4db94011d3 870 if (__HAL_UART_GET_IT_SOURCE(huart, USART_IT_ERR) != RESET) {
sahilmgandhi 18:6a4db94011d3 871 return_event |= (SERIAL_EVENT_RX_OVERRUN_ERROR & obj_s->events);
sahilmgandhi 18:6a4db94011d3 872 }
sahilmgandhi 18:6a4db94011d3 873 }
sahilmgandhi 18:6a4db94011d3 874
sahilmgandhi 18:6a4db94011d3 875 HAL_UART_IRQHandler(huart);
sahilmgandhi 18:6a4db94011d3 876
sahilmgandhi 18:6a4db94011d3 877 // Abort if an error occurs
sahilmgandhi 18:6a4db94011d3 878 if (return_event & SERIAL_EVENT_RX_PARITY_ERROR ||
sahilmgandhi 18:6a4db94011d3 879 return_event & SERIAL_EVENT_RX_FRAMING_ERROR ||
sahilmgandhi 18:6a4db94011d3 880 return_event & SERIAL_EVENT_RX_OVERRUN_ERROR) {
sahilmgandhi 18:6a4db94011d3 881 return return_event;
sahilmgandhi 18:6a4db94011d3 882 }
sahilmgandhi 18:6a4db94011d3 883
sahilmgandhi 18:6a4db94011d3 884 //RX PART
sahilmgandhi 18:6a4db94011d3 885 if (huart->RxXferSize != 0) {
sahilmgandhi 18:6a4db94011d3 886 obj->rx_buff.pos = huart->RxXferSize - huart->RxXferCount;
sahilmgandhi 18:6a4db94011d3 887 }
sahilmgandhi 18:6a4db94011d3 888 if ((huart->RxXferCount == 0) && (obj->rx_buff.pos >= (obj->rx_buff.length - 1))) {
sahilmgandhi 18:6a4db94011d3 889 return_event |= (SERIAL_EVENT_RX_COMPLETE & obj_s->events);
sahilmgandhi 18:6a4db94011d3 890 }
sahilmgandhi 18:6a4db94011d3 891
sahilmgandhi 18:6a4db94011d3 892 // Check if char_match is present
sahilmgandhi 18:6a4db94011d3 893 if (obj_s->events & SERIAL_EVENT_RX_CHARACTER_MATCH) {
sahilmgandhi 18:6a4db94011d3 894 if (buf != NULL) {
sahilmgandhi 18:6a4db94011d3 895 for (i = 0; i < obj->rx_buff.pos; i++) {
sahilmgandhi 18:6a4db94011d3 896 if (buf[i] == obj->char_match) {
sahilmgandhi 18:6a4db94011d3 897 obj->rx_buff.pos = i;
sahilmgandhi 18:6a4db94011d3 898 return_event |= (SERIAL_EVENT_RX_CHARACTER_MATCH & obj_s->events);
sahilmgandhi 18:6a4db94011d3 899 serial_rx_abort_asynch(obj);
sahilmgandhi 18:6a4db94011d3 900 break;
sahilmgandhi 18:6a4db94011d3 901 }
sahilmgandhi 18:6a4db94011d3 902 }
sahilmgandhi 18:6a4db94011d3 903 }
sahilmgandhi 18:6a4db94011d3 904 }
sahilmgandhi 18:6a4db94011d3 905
sahilmgandhi 18:6a4db94011d3 906 return return_event;
sahilmgandhi 18:6a4db94011d3 907 }
sahilmgandhi 18:6a4db94011d3 908
sahilmgandhi 18:6a4db94011d3 909 /**
sahilmgandhi 18:6a4db94011d3 910 * Abort the ongoing TX transaction. It disables the enabled interupt for TX and
sahilmgandhi 18:6a4db94011d3 911 * flush TX hardware buffer if TX FIFO is used
sahilmgandhi 18:6a4db94011d3 912 *
sahilmgandhi 18:6a4db94011d3 913 * @param obj The serial object
sahilmgandhi 18:6a4db94011d3 914 */
sahilmgandhi 18:6a4db94011d3 915 void serial_tx_abort_asynch(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 916 {
sahilmgandhi 18:6a4db94011d3 917 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 918 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
sahilmgandhi 18:6a4db94011d3 919
sahilmgandhi 18:6a4db94011d3 920 __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
sahilmgandhi 18:6a4db94011d3 921 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
sahilmgandhi 18:6a4db94011d3 922
sahilmgandhi 18:6a4db94011d3 923 // clear flags
sahilmgandhi 18:6a4db94011d3 924 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
sahilmgandhi 18:6a4db94011d3 925
sahilmgandhi 18:6a4db94011d3 926 // reset states
sahilmgandhi 18:6a4db94011d3 927 huart->TxXferCount = 0;
sahilmgandhi 18:6a4db94011d3 928 // update handle state
sahilmgandhi 18:6a4db94011d3 929 if(huart->gState == HAL_UART_STATE_BUSY_TX_RX) {
sahilmgandhi 18:6a4db94011d3 930 huart->gState = HAL_UART_STATE_BUSY_RX;
sahilmgandhi 18:6a4db94011d3 931 } else {
sahilmgandhi 18:6a4db94011d3 932 huart->gState = HAL_UART_STATE_READY;
sahilmgandhi 18:6a4db94011d3 933 }
sahilmgandhi 18:6a4db94011d3 934 }
sahilmgandhi 18:6a4db94011d3 935
sahilmgandhi 18:6a4db94011d3 936 /**
sahilmgandhi 18:6a4db94011d3 937 * Abort the ongoing RX transaction It disables the enabled interrupt for RX and
sahilmgandhi 18:6a4db94011d3 938 * flush RX hardware buffer if RX FIFO is used
sahilmgandhi 18:6a4db94011d3 939 *
sahilmgandhi 18:6a4db94011d3 940 * @param obj The serial object
sahilmgandhi 18:6a4db94011d3 941 */
sahilmgandhi 18:6a4db94011d3 942 void serial_rx_abort_asynch(serial_t *obj)
sahilmgandhi 18:6a4db94011d3 943 {
sahilmgandhi 18:6a4db94011d3 944 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 945 UART_HandleTypeDef *huart = &uart_handlers[obj_s->index];
sahilmgandhi 18:6a4db94011d3 946
sahilmgandhi 18:6a4db94011d3 947 // disable interrupts
sahilmgandhi 18:6a4db94011d3 948 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
sahilmgandhi 18:6a4db94011d3 949 __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
sahilmgandhi 18:6a4db94011d3 950 __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
sahilmgandhi 18:6a4db94011d3 951
sahilmgandhi 18:6a4db94011d3 952 // clear flags
sahilmgandhi 18:6a4db94011d3 953 __HAL_UART_CLEAR_FLAG(huart, UART_FLAG_RXNE);
sahilmgandhi 18:6a4db94011d3 954 volatile uint32_t tmpval = huart->Instance->DR; // Clear errors flag
sahilmgandhi 18:6a4db94011d3 955
sahilmgandhi 18:6a4db94011d3 956 // reset states
sahilmgandhi 18:6a4db94011d3 957 huart->RxXferCount = 0;
sahilmgandhi 18:6a4db94011d3 958 // update handle state
sahilmgandhi 18:6a4db94011d3 959 if(huart->RxState == HAL_UART_STATE_BUSY_TX_RX) {
sahilmgandhi 18:6a4db94011d3 960 huart->RxState = HAL_UART_STATE_BUSY_TX;
sahilmgandhi 18:6a4db94011d3 961 } else {
sahilmgandhi 18:6a4db94011d3 962 huart->RxState = HAL_UART_STATE_READY;
sahilmgandhi 18:6a4db94011d3 963 }
sahilmgandhi 18:6a4db94011d3 964 }
sahilmgandhi 18:6a4db94011d3 965
sahilmgandhi 18:6a4db94011d3 966 #endif
sahilmgandhi 18:6a4db94011d3 967
sahilmgandhi 18:6a4db94011d3 968 #if DEVICE_SERIAL_FC
sahilmgandhi 18:6a4db94011d3 969
sahilmgandhi 18:6a4db94011d3 970 /**
sahilmgandhi 18:6a4db94011d3 971 * Set HW Control Flow
sahilmgandhi 18:6a4db94011d3 972 * @param obj The serial object
sahilmgandhi 18:6a4db94011d3 973 * @param type The Control Flow type (FlowControlNone, FlowControlRTS, FlowControlCTS, FlowControlRTSCTS)
sahilmgandhi 18:6a4db94011d3 974 * @param rxflow Pin for the rxflow
sahilmgandhi 18:6a4db94011d3 975 * @param txflow Pin for the txflow
sahilmgandhi 18:6a4db94011d3 976 */
sahilmgandhi 18:6a4db94011d3 977 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
sahilmgandhi 18:6a4db94011d3 978 {
sahilmgandhi 18:6a4db94011d3 979 struct serial_s *obj_s = SERIAL_S(obj);
sahilmgandhi 18:6a4db94011d3 980
sahilmgandhi 18:6a4db94011d3 981 // Determine the UART to use (UART_1, UART_2, ...)
sahilmgandhi 18:6a4db94011d3 982 UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS);
sahilmgandhi 18:6a4db94011d3 983 UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS);
sahilmgandhi 18:6a4db94011d3 984
sahilmgandhi 18:6a4db94011d3 985 // Get the peripheral name (UART_1, UART_2, ...) from the pin and assign it to the object
sahilmgandhi 18:6a4db94011d3 986 obj_s->uart = (UARTName)pinmap_merge(uart_cts, uart_rts);
sahilmgandhi 18:6a4db94011d3 987 MBED_ASSERT(obj_s->uart != (UARTName)NC);
sahilmgandhi 18:6a4db94011d3 988
sahilmgandhi 18:6a4db94011d3 989 if(type == FlowControlNone) {
sahilmgandhi 18:6a4db94011d3 990 // Disable hardware flow control
sahilmgandhi 18:6a4db94011d3 991 obj_s->hw_flow_ctl = UART_HWCONTROL_NONE;
sahilmgandhi 18:6a4db94011d3 992 }
sahilmgandhi 18:6a4db94011d3 993 if (type == FlowControlRTS) {
sahilmgandhi 18:6a4db94011d3 994 // Enable RTS
sahilmgandhi 18:6a4db94011d3 995 MBED_ASSERT(uart_rts != (UARTName)NC);
sahilmgandhi 18:6a4db94011d3 996 obj_s->hw_flow_ctl = UART_HWCONTROL_RTS;
sahilmgandhi 18:6a4db94011d3 997 obj_s->pin_rts = rxflow;
sahilmgandhi 18:6a4db94011d3 998 // Enable the pin for RTS function
sahilmgandhi 18:6a4db94011d3 999 pinmap_pinout(rxflow, PinMap_UART_RTS);
sahilmgandhi 18:6a4db94011d3 1000 }
sahilmgandhi 18:6a4db94011d3 1001 if (type == FlowControlCTS) {
sahilmgandhi 18:6a4db94011d3 1002 // Enable CTS
sahilmgandhi 18:6a4db94011d3 1003 MBED_ASSERT(uart_cts != (UARTName)NC);
sahilmgandhi 18:6a4db94011d3 1004 obj_s->hw_flow_ctl = UART_HWCONTROL_CTS;
sahilmgandhi 18:6a4db94011d3 1005 obj_s->pin_cts = txflow;
sahilmgandhi 18:6a4db94011d3 1006 // Enable the pin for CTS function
sahilmgandhi 18:6a4db94011d3 1007 pinmap_pinout(txflow, PinMap_UART_CTS);
sahilmgandhi 18:6a4db94011d3 1008 }
sahilmgandhi 18:6a4db94011d3 1009 if (type == FlowControlRTSCTS) {
sahilmgandhi 18:6a4db94011d3 1010 // Enable CTS & RTS
sahilmgandhi 18:6a4db94011d3 1011 MBED_ASSERT(uart_rts != (UARTName)NC);
sahilmgandhi 18:6a4db94011d3 1012 MBED_ASSERT(uart_cts != (UARTName)NC);
sahilmgandhi 18:6a4db94011d3 1013 obj_s->hw_flow_ctl = UART_HWCONTROL_RTS_CTS;
sahilmgandhi 18:6a4db94011d3 1014 obj_s->pin_rts = rxflow;
sahilmgandhi 18:6a4db94011d3 1015 obj_s->pin_cts = txflow;
sahilmgandhi 18:6a4db94011d3 1016 // Enable the pin for CTS function
sahilmgandhi 18:6a4db94011d3 1017 pinmap_pinout(txflow, PinMap_UART_CTS);
sahilmgandhi 18:6a4db94011d3 1018 // Enable the pin for RTS function
sahilmgandhi 18:6a4db94011d3 1019 pinmap_pinout(rxflow, PinMap_UART_RTS);
sahilmgandhi 18:6a4db94011d3 1020 }
sahilmgandhi 18:6a4db94011d3 1021
sahilmgandhi 18:6a4db94011d3 1022 init_uart(obj);
sahilmgandhi 18:6a4db94011d3 1023 }
sahilmgandhi 18:6a4db94011d3 1024
sahilmgandhi 18:6a4db94011d3 1025 #endif
sahilmgandhi 18:6a4db94011d3 1026
sahilmgandhi 18:6a4db94011d3 1027 #endif