MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_usb.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f4xx_ll_usb.h
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.5.0
sahilmgandhi 18:6a4db94011d3 6 * @date 06-May-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief Header file of USB Core HAL module.
sahilmgandhi 18:6a4db94011d3 8 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 9 * @attention
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 12 *
sahilmgandhi 18:6a4db94011d3 13 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 14 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 15 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 16 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 18 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 19 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 21 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 22 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 23 *
sahilmgandhi 18:6a4db94011d3 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 34 *
sahilmgandhi 18:6a4db94011d3 35 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 36 */
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 /* Define to prevent recursive inclusion -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 39 #ifndef __STM32F4xx_LL_USB_H
sahilmgandhi 18:6a4db94011d3 40 #define __STM32F4xx_LL_USB_H
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 43 extern "C" {
sahilmgandhi 18:6a4db94011d3 44 #endif
sahilmgandhi 18:6a4db94011d3 45 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
sahilmgandhi 18:6a4db94011d3 46 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
sahilmgandhi 18:6a4db94011d3 47 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
sahilmgandhi 18:6a4db94011d3 48 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
sahilmgandhi 18:6a4db94011d3 49 defined(STM32F412Rx) || defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 50 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 51 #include "stm32f4xx_hal_def.h"
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 /** @addtogroup STM32F4xx_HAL
sahilmgandhi 18:6a4db94011d3 54 * @{
sahilmgandhi 18:6a4db94011d3 55 */
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 /** @addtogroup USB_Core
sahilmgandhi 18:6a4db94011d3 58 * @{
sahilmgandhi 18:6a4db94011d3 59 */
sahilmgandhi 18:6a4db94011d3 60
sahilmgandhi 18:6a4db94011d3 61 /* Exported types ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 /**
sahilmgandhi 18:6a4db94011d3 64 * @brief USB Mode definition
sahilmgandhi 18:6a4db94011d3 65 */
sahilmgandhi 18:6a4db94011d3 66 typedef enum
sahilmgandhi 18:6a4db94011d3 67 {
sahilmgandhi 18:6a4db94011d3 68 USB_OTG_DEVICE_MODE = 0U,
sahilmgandhi 18:6a4db94011d3 69 USB_OTG_HOST_MODE = 1U,
sahilmgandhi 18:6a4db94011d3 70 USB_OTG_DRD_MODE = 2U
sahilmgandhi 18:6a4db94011d3 71
sahilmgandhi 18:6a4db94011d3 72 }USB_OTG_ModeTypeDef;
sahilmgandhi 18:6a4db94011d3 73
sahilmgandhi 18:6a4db94011d3 74 /**
sahilmgandhi 18:6a4db94011d3 75 * @brief URB States definition
sahilmgandhi 18:6a4db94011d3 76 */
sahilmgandhi 18:6a4db94011d3 77 typedef enum {
sahilmgandhi 18:6a4db94011d3 78 URB_IDLE = 0U,
sahilmgandhi 18:6a4db94011d3 79 URB_DONE,
sahilmgandhi 18:6a4db94011d3 80 URB_NOTREADY,
sahilmgandhi 18:6a4db94011d3 81 URB_NYET,
sahilmgandhi 18:6a4db94011d3 82 URB_ERROR,
sahilmgandhi 18:6a4db94011d3 83 URB_STALL
sahilmgandhi 18:6a4db94011d3 84
sahilmgandhi 18:6a4db94011d3 85 }USB_OTG_URBStateTypeDef;
sahilmgandhi 18:6a4db94011d3 86
sahilmgandhi 18:6a4db94011d3 87 /**
sahilmgandhi 18:6a4db94011d3 88 * @brief Host channel States definition
sahilmgandhi 18:6a4db94011d3 89 */
sahilmgandhi 18:6a4db94011d3 90 typedef enum {
sahilmgandhi 18:6a4db94011d3 91 HC_IDLE = 0U,
sahilmgandhi 18:6a4db94011d3 92 HC_XFRC,
sahilmgandhi 18:6a4db94011d3 93 HC_HALTED,
sahilmgandhi 18:6a4db94011d3 94 HC_NAK,
sahilmgandhi 18:6a4db94011d3 95 HC_NYET,
sahilmgandhi 18:6a4db94011d3 96 HC_STALL,
sahilmgandhi 18:6a4db94011d3 97 HC_XACTERR,
sahilmgandhi 18:6a4db94011d3 98 HC_BBLERR,
sahilmgandhi 18:6a4db94011d3 99 HC_DATATGLERR
sahilmgandhi 18:6a4db94011d3 100
sahilmgandhi 18:6a4db94011d3 101 }USB_OTG_HCStateTypeDef;
sahilmgandhi 18:6a4db94011d3 102
sahilmgandhi 18:6a4db94011d3 103 /**
sahilmgandhi 18:6a4db94011d3 104 * @brief PCD Initialization Structure definition
sahilmgandhi 18:6a4db94011d3 105 */
sahilmgandhi 18:6a4db94011d3 106 typedef struct
sahilmgandhi 18:6a4db94011d3 107 {
sahilmgandhi 18:6a4db94011d3 108 uint32_t dev_endpoints; /*!< Device Endpoints number.
sahilmgandhi 18:6a4db94011d3 109 This parameter depends on the used USB core.
sahilmgandhi 18:6a4db94011d3 110 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
sahilmgandhi 18:6a4db94011d3 111
sahilmgandhi 18:6a4db94011d3 112 uint32_t Host_channels; /*!< Host Channels number.
sahilmgandhi 18:6a4db94011d3 113 This parameter Depends on the used USB core.
sahilmgandhi 18:6a4db94011d3 114 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
sahilmgandhi 18:6a4db94011d3 115
sahilmgandhi 18:6a4db94011d3 116 uint32_t speed; /*!< USB Core speed.
sahilmgandhi 18:6a4db94011d3 117 This parameter can be any value of @ref USB_Core_Speed_ */
sahilmgandhi 18:6a4db94011d3 118
sahilmgandhi 18:6a4db94011d3 119 uint32_t dma_enable; /*!< Enable or disable of the USB embedded DMA. */
sahilmgandhi 18:6a4db94011d3 120
sahilmgandhi 18:6a4db94011d3 121 uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size.
sahilmgandhi 18:6a4db94011d3 122 This parameter can be any value of @ref USB_EP0_MPS_ */
sahilmgandhi 18:6a4db94011d3 123
sahilmgandhi 18:6a4db94011d3 124 uint32_t phy_itface; /*!< Select the used PHY interface.
sahilmgandhi 18:6a4db94011d3 125 This parameter can be any value of @ref USB_Core_PHY_ */
sahilmgandhi 18:6a4db94011d3 126
sahilmgandhi 18:6a4db94011d3 127 uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
sahilmgandhi 18:6a4db94011d3 128
sahilmgandhi 18:6a4db94011d3 129 uint32_t low_power_enable; /*!< Enable or disable the low power mode. */
sahilmgandhi 18:6a4db94011d3 130
sahilmgandhi 18:6a4db94011d3 131 uint32_t lpm_enable; /*!< Enable or disable Link Power Management. */
sahilmgandhi 18:6a4db94011d3 132
sahilmgandhi 18:6a4db94011d3 133 uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */
sahilmgandhi 18:6a4db94011d3 134
sahilmgandhi 18:6a4db94011d3 135 uint32_t vbus_sensing_enable; /*!< Enable or disable the VBUS Sensing feature. */
sahilmgandhi 18:6a4db94011d3 136
sahilmgandhi 18:6a4db94011d3 137 uint32_t use_dedicated_ep1; /*!< Enable or disable the use of the dedicated EP1 interrupt. */
sahilmgandhi 18:6a4db94011d3 138
sahilmgandhi 18:6a4db94011d3 139 uint32_t use_external_vbus; /*!< Enable or disable the use of the external VBUS. */
sahilmgandhi 18:6a4db94011d3 140
sahilmgandhi 18:6a4db94011d3 141 }USB_OTG_CfgTypeDef;
sahilmgandhi 18:6a4db94011d3 142
sahilmgandhi 18:6a4db94011d3 143 /**
sahilmgandhi 18:6a4db94011d3 144 * @brief OTG End Point Initialization Structure definition
sahilmgandhi 18:6a4db94011d3 145 */
sahilmgandhi 18:6a4db94011d3 146 typedef struct
sahilmgandhi 18:6a4db94011d3 147 {
sahilmgandhi 18:6a4db94011d3 148 uint8_t num; /*!< Endpoint number
sahilmgandhi 18:6a4db94011d3 149 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
sahilmgandhi 18:6a4db94011d3 150
sahilmgandhi 18:6a4db94011d3 151 uint8_t is_in; /*!< Endpoint direction
sahilmgandhi 18:6a4db94011d3 152 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
sahilmgandhi 18:6a4db94011d3 153
sahilmgandhi 18:6a4db94011d3 154 uint8_t is_stall; /*!< Endpoint stall condition
sahilmgandhi 18:6a4db94011d3 155 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
sahilmgandhi 18:6a4db94011d3 156
sahilmgandhi 18:6a4db94011d3 157 uint8_t type; /*!< Endpoint type
sahilmgandhi 18:6a4db94011d3 158 This parameter can be any value of @ref USB_EP_Type_ */
sahilmgandhi 18:6a4db94011d3 159
sahilmgandhi 18:6a4db94011d3 160 uint8_t data_pid_start; /*!< Initial data PID
sahilmgandhi 18:6a4db94011d3 161 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
sahilmgandhi 18:6a4db94011d3 162
sahilmgandhi 18:6a4db94011d3 163 uint8_t even_odd_frame; /*!< IFrame parity
sahilmgandhi 18:6a4db94011d3 164 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
sahilmgandhi 18:6a4db94011d3 165
sahilmgandhi 18:6a4db94011d3 166 uint16_t tx_fifo_num; /*!< Transmission FIFO number
sahilmgandhi 18:6a4db94011d3 167 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
sahilmgandhi 18:6a4db94011d3 168
sahilmgandhi 18:6a4db94011d3 169 uint32_t maxpacket; /*!< Endpoint Max packet size
sahilmgandhi 18:6a4db94011d3 170 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
sahilmgandhi 18:6a4db94011d3 171
sahilmgandhi 18:6a4db94011d3 172 uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
sahilmgandhi 18:6a4db94011d3 173
sahilmgandhi 18:6a4db94011d3 174 uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address */
sahilmgandhi 18:6a4db94011d3 175
sahilmgandhi 18:6a4db94011d3 176 uint32_t xfer_len; /*!< Current transfer length */
sahilmgandhi 18:6a4db94011d3 177
sahilmgandhi 18:6a4db94011d3 178 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
sahilmgandhi 18:6a4db94011d3 179
sahilmgandhi 18:6a4db94011d3 180 }USB_OTG_EPTypeDef;
sahilmgandhi 18:6a4db94011d3 181
sahilmgandhi 18:6a4db94011d3 182 /**
sahilmgandhi 18:6a4db94011d3 183 * @brief OTG HC Initialization Structure definition
sahilmgandhi 18:6a4db94011d3 184 */
sahilmgandhi 18:6a4db94011d3 185 typedef struct
sahilmgandhi 18:6a4db94011d3 186 {
sahilmgandhi 18:6a4db94011d3 187 uint8_t dev_addr ; /*!< USB device address.
sahilmgandhi 18:6a4db94011d3 188 This parameter must be a number between Min_Data = 1 and Max_Data = 255 */
sahilmgandhi 18:6a4db94011d3 189
sahilmgandhi 18:6a4db94011d3 190 uint8_t ch_num; /*!< Host channel number.
sahilmgandhi 18:6a4db94011d3 191 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
sahilmgandhi 18:6a4db94011d3 192
sahilmgandhi 18:6a4db94011d3 193 uint8_t ep_num; /*!< Endpoint number.
sahilmgandhi 18:6a4db94011d3 194 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
sahilmgandhi 18:6a4db94011d3 195
sahilmgandhi 18:6a4db94011d3 196 uint8_t ep_is_in; /*!< Endpoint direction
sahilmgandhi 18:6a4db94011d3 197 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
sahilmgandhi 18:6a4db94011d3 198
sahilmgandhi 18:6a4db94011d3 199 uint8_t speed; /*!< USB Host speed.
sahilmgandhi 18:6a4db94011d3 200 This parameter can be any value of @ref USB_Core_Speed_ */
sahilmgandhi 18:6a4db94011d3 201
sahilmgandhi 18:6a4db94011d3 202 uint8_t do_ping; /*!< Enable or disable the use of the PING protocol for HS mode. */
sahilmgandhi 18:6a4db94011d3 203
sahilmgandhi 18:6a4db94011d3 204 uint8_t process_ping; /*!< Execute the PING protocol for HS mode. */
sahilmgandhi 18:6a4db94011d3 205
sahilmgandhi 18:6a4db94011d3 206 uint8_t ep_type; /*!< Endpoint Type.
sahilmgandhi 18:6a4db94011d3 207 This parameter can be any value of @ref USB_EP_Type_ */
sahilmgandhi 18:6a4db94011d3 208
sahilmgandhi 18:6a4db94011d3 209 uint16_t max_packet; /*!< Endpoint Max packet size.
sahilmgandhi 18:6a4db94011d3 210 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
sahilmgandhi 18:6a4db94011d3 211
sahilmgandhi 18:6a4db94011d3 212 uint8_t data_pid; /*!< Initial data PID.
sahilmgandhi 18:6a4db94011d3 213 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
sahilmgandhi 18:6a4db94011d3 214
sahilmgandhi 18:6a4db94011d3 215 uint8_t *xfer_buff; /*!< Pointer to transfer buffer. */
sahilmgandhi 18:6a4db94011d3 216
sahilmgandhi 18:6a4db94011d3 217 uint32_t xfer_len; /*!< Current transfer length. */
sahilmgandhi 18:6a4db94011d3 218
sahilmgandhi 18:6a4db94011d3 219 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer. */
sahilmgandhi 18:6a4db94011d3 220
sahilmgandhi 18:6a4db94011d3 221 uint8_t toggle_in; /*!< IN transfer current toggle flag.
sahilmgandhi 18:6a4db94011d3 222 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
sahilmgandhi 18:6a4db94011d3 223
sahilmgandhi 18:6a4db94011d3 224 uint8_t toggle_out; /*!< OUT transfer current toggle flag
sahilmgandhi 18:6a4db94011d3 225 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
sahilmgandhi 18:6a4db94011d3 226
sahilmgandhi 18:6a4db94011d3 227 uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address. */
sahilmgandhi 18:6a4db94011d3 228
sahilmgandhi 18:6a4db94011d3 229 uint32_t ErrCnt; /*!< Host channel error count.*/
sahilmgandhi 18:6a4db94011d3 230
sahilmgandhi 18:6a4db94011d3 231 USB_OTG_URBStateTypeDef urb_state; /*!< URB state.
sahilmgandhi 18:6a4db94011d3 232 This parameter can be any value of @ref USB_OTG_URBStateTypeDef */
sahilmgandhi 18:6a4db94011d3 233
sahilmgandhi 18:6a4db94011d3 234 USB_OTG_HCStateTypeDef state; /*!< Host Channel state.
sahilmgandhi 18:6a4db94011d3 235 This parameter can be any value of @ref USB_OTG_HCStateTypeDef */
sahilmgandhi 18:6a4db94011d3 236
sahilmgandhi 18:6a4db94011d3 237 }USB_OTG_HCTypeDef;
sahilmgandhi 18:6a4db94011d3 238
sahilmgandhi 18:6a4db94011d3 239 /* Exported constants --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 240
sahilmgandhi 18:6a4db94011d3 241 /** @defgroup PCD_Exported_Constants PCD Exported Constants
sahilmgandhi 18:6a4db94011d3 242 * @{
sahilmgandhi 18:6a4db94011d3 243 */
sahilmgandhi 18:6a4db94011d3 244
sahilmgandhi 18:6a4db94011d3 245 /** @defgroup USB_Core_Mode_ USB Core Mode
sahilmgandhi 18:6a4db94011d3 246 * @{
sahilmgandhi 18:6a4db94011d3 247 */
sahilmgandhi 18:6a4db94011d3 248 #define USB_OTG_MODE_DEVICE 0U
sahilmgandhi 18:6a4db94011d3 249 #define USB_OTG_MODE_HOST 1U
sahilmgandhi 18:6a4db94011d3 250 #define USB_OTG_MODE_DRD 2U
sahilmgandhi 18:6a4db94011d3 251 /**
sahilmgandhi 18:6a4db94011d3 252 * @}
sahilmgandhi 18:6a4db94011d3 253 */
sahilmgandhi 18:6a4db94011d3 254
sahilmgandhi 18:6a4db94011d3 255 /** @defgroup USB_Core_Speed_ USB Core Speed
sahilmgandhi 18:6a4db94011d3 256 * @{
sahilmgandhi 18:6a4db94011d3 257 */
sahilmgandhi 18:6a4db94011d3 258 #define USB_OTG_SPEED_HIGH 0U
sahilmgandhi 18:6a4db94011d3 259 #define USB_OTG_SPEED_HIGH_IN_FULL 1U
sahilmgandhi 18:6a4db94011d3 260 #define USB_OTG_SPEED_LOW 2U
sahilmgandhi 18:6a4db94011d3 261 #define USB_OTG_SPEED_FULL 3U
sahilmgandhi 18:6a4db94011d3 262 /**
sahilmgandhi 18:6a4db94011d3 263 * @}
sahilmgandhi 18:6a4db94011d3 264 */
sahilmgandhi 18:6a4db94011d3 265
sahilmgandhi 18:6a4db94011d3 266 /** @defgroup USB_Core_PHY_ USB Core PHY
sahilmgandhi 18:6a4db94011d3 267 * @{
sahilmgandhi 18:6a4db94011d3 268 */
sahilmgandhi 18:6a4db94011d3 269 #define USB_OTG_ULPI_PHY 1U
sahilmgandhi 18:6a4db94011d3 270 #define USB_OTG_EMBEDDED_PHY 2U
sahilmgandhi 18:6a4db94011d3 271 /**
sahilmgandhi 18:6a4db94011d3 272 * @}
sahilmgandhi 18:6a4db94011d3 273 */
sahilmgandhi 18:6a4db94011d3 274
sahilmgandhi 18:6a4db94011d3 275 /** @defgroup USB_Core_MPS_ USB Core MPS
sahilmgandhi 18:6a4db94011d3 276 * @{
sahilmgandhi 18:6a4db94011d3 277 */
sahilmgandhi 18:6a4db94011d3 278 #define USB_OTG_HS_MAX_PACKET_SIZE 512U
sahilmgandhi 18:6a4db94011d3 279 #define USB_OTG_FS_MAX_PACKET_SIZE 64U
sahilmgandhi 18:6a4db94011d3 280 #define USB_OTG_MAX_EP0_SIZE 64U
sahilmgandhi 18:6a4db94011d3 281 /**
sahilmgandhi 18:6a4db94011d3 282 * @}
sahilmgandhi 18:6a4db94011d3 283 */
sahilmgandhi 18:6a4db94011d3 284
sahilmgandhi 18:6a4db94011d3 285 /** @defgroup USB_Core_Phy_Frequency_ USB Core Phy Frequency
sahilmgandhi 18:6a4db94011d3 286 * @{
sahilmgandhi 18:6a4db94011d3 287 */
sahilmgandhi 18:6a4db94011d3 288 #define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ (0U << 1U)
sahilmgandhi 18:6a4db94011d3 289 #define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ (1U << 1U)
sahilmgandhi 18:6a4db94011d3 290 #define DSTS_ENUMSPD_LS_PHY_6MHZ (2U << 1U)
sahilmgandhi 18:6a4db94011d3 291 #define DSTS_ENUMSPD_FS_PHY_48MHZ (3U << 1U)
sahilmgandhi 18:6a4db94011d3 292 /**
sahilmgandhi 18:6a4db94011d3 293 * @}
sahilmgandhi 18:6a4db94011d3 294 */
sahilmgandhi 18:6a4db94011d3 295
sahilmgandhi 18:6a4db94011d3 296 /** @defgroup USB_CORE_Frame_Interval_ USB CORE Frame Interval
sahilmgandhi 18:6a4db94011d3 297 * @{
sahilmgandhi 18:6a4db94011d3 298 */
sahilmgandhi 18:6a4db94011d3 299 #define DCFG_FRAME_INTERVAL_80 0U
sahilmgandhi 18:6a4db94011d3 300 #define DCFG_FRAME_INTERVAL_85 1U
sahilmgandhi 18:6a4db94011d3 301 #define DCFG_FRAME_INTERVAL_90 2U
sahilmgandhi 18:6a4db94011d3 302 #define DCFG_FRAME_INTERVAL_95 3U
sahilmgandhi 18:6a4db94011d3 303 /**
sahilmgandhi 18:6a4db94011d3 304 * @}
sahilmgandhi 18:6a4db94011d3 305 */
sahilmgandhi 18:6a4db94011d3 306
sahilmgandhi 18:6a4db94011d3 307 /** @defgroup USB_EP0_MPS_ USB EP0 MPS
sahilmgandhi 18:6a4db94011d3 308 * @{
sahilmgandhi 18:6a4db94011d3 309 */
sahilmgandhi 18:6a4db94011d3 310 #define DEP0CTL_MPS_64 0U
sahilmgandhi 18:6a4db94011d3 311 #define DEP0CTL_MPS_32 1U
sahilmgandhi 18:6a4db94011d3 312 #define DEP0CTL_MPS_16 2U
sahilmgandhi 18:6a4db94011d3 313 #define DEP0CTL_MPS_8 3U
sahilmgandhi 18:6a4db94011d3 314 /**
sahilmgandhi 18:6a4db94011d3 315 * @}
sahilmgandhi 18:6a4db94011d3 316 */
sahilmgandhi 18:6a4db94011d3 317
sahilmgandhi 18:6a4db94011d3 318 /** @defgroup USB_EP_Speed_ USB EP Speed
sahilmgandhi 18:6a4db94011d3 319 * @{
sahilmgandhi 18:6a4db94011d3 320 */
sahilmgandhi 18:6a4db94011d3 321 #define EP_SPEED_LOW 0U
sahilmgandhi 18:6a4db94011d3 322 #define EP_SPEED_FULL 1U
sahilmgandhi 18:6a4db94011d3 323 #define EP_SPEED_HIGH 2U
sahilmgandhi 18:6a4db94011d3 324 /**
sahilmgandhi 18:6a4db94011d3 325 * @}
sahilmgandhi 18:6a4db94011d3 326 */
sahilmgandhi 18:6a4db94011d3 327
sahilmgandhi 18:6a4db94011d3 328 /** @defgroup USB_EP_Type_ USB EP Type
sahilmgandhi 18:6a4db94011d3 329 * @{
sahilmgandhi 18:6a4db94011d3 330 */
sahilmgandhi 18:6a4db94011d3 331 #define EP_TYPE_CTRL 0U
sahilmgandhi 18:6a4db94011d3 332 #define EP_TYPE_ISOC 1U
sahilmgandhi 18:6a4db94011d3 333 #define EP_TYPE_BULK 2U
sahilmgandhi 18:6a4db94011d3 334 #define EP_TYPE_INTR 3U
sahilmgandhi 18:6a4db94011d3 335 #define EP_TYPE_MSK 3U
sahilmgandhi 18:6a4db94011d3 336 /**
sahilmgandhi 18:6a4db94011d3 337 * @}
sahilmgandhi 18:6a4db94011d3 338 */
sahilmgandhi 18:6a4db94011d3 339
sahilmgandhi 18:6a4db94011d3 340 /** @defgroup USB_STS_Defines_ USB STS Defines
sahilmgandhi 18:6a4db94011d3 341 * @{
sahilmgandhi 18:6a4db94011d3 342 */
sahilmgandhi 18:6a4db94011d3 343 #define STS_GOUT_NAK 1U
sahilmgandhi 18:6a4db94011d3 344 #define STS_DATA_UPDT 2U
sahilmgandhi 18:6a4db94011d3 345 #define STS_XFER_COMP 3U
sahilmgandhi 18:6a4db94011d3 346 #define STS_SETUP_COMP 4U
sahilmgandhi 18:6a4db94011d3 347 #define STS_SETUP_UPDT 6U
sahilmgandhi 18:6a4db94011d3 348 /**
sahilmgandhi 18:6a4db94011d3 349 * @}
sahilmgandhi 18:6a4db94011d3 350 */
sahilmgandhi 18:6a4db94011d3 351
sahilmgandhi 18:6a4db94011d3 352 /** @defgroup HCFG_SPEED_Defines_ HCFG SPEED Defines
sahilmgandhi 18:6a4db94011d3 353 * @{
sahilmgandhi 18:6a4db94011d3 354 */
sahilmgandhi 18:6a4db94011d3 355 #define HCFG_30_60_MHZ 0U
sahilmgandhi 18:6a4db94011d3 356 #define HCFG_48_MHZ 1U
sahilmgandhi 18:6a4db94011d3 357 #define HCFG_6_MHZ 2U
sahilmgandhi 18:6a4db94011d3 358 /**
sahilmgandhi 18:6a4db94011d3 359 * @}
sahilmgandhi 18:6a4db94011d3 360 */
sahilmgandhi 18:6a4db94011d3 361
sahilmgandhi 18:6a4db94011d3 362 /** @defgroup HPRT0_PRTSPD_SPEED_Defines_ HPRT0 PRTSPD SPEED Defines
sahilmgandhi 18:6a4db94011d3 363 * @{
sahilmgandhi 18:6a4db94011d3 364 */
sahilmgandhi 18:6a4db94011d3 365 #define HPRT0_PRTSPD_HIGH_SPEED 0U
sahilmgandhi 18:6a4db94011d3 366 #define HPRT0_PRTSPD_FULL_SPEED 1U
sahilmgandhi 18:6a4db94011d3 367 #define HPRT0_PRTSPD_LOW_SPEED 2U
sahilmgandhi 18:6a4db94011d3 368 /**
sahilmgandhi 18:6a4db94011d3 369 * @}
sahilmgandhi 18:6a4db94011d3 370 */
sahilmgandhi 18:6a4db94011d3 371
sahilmgandhi 18:6a4db94011d3 372 #define HCCHAR_CTRL 0U
sahilmgandhi 18:6a4db94011d3 373 #define HCCHAR_ISOC 1U
sahilmgandhi 18:6a4db94011d3 374 #define HCCHAR_BULK 2U
sahilmgandhi 18:6a4db94011d3 375 #define HCCHAR_INTR 3U
sahilmgandhi 18:6a4db94011d3 376
sahilmgandhi 18:6a4db94011d3 377 #define HC_PID_DATA0 0U
sahilmgandhi 18:6a4db94011d3 378 #define HC_PID_DATA2 1U
sahilmgandhi 18:6a4db94011d3 379 #define HC_PID_DATA1 2U
sahilmgandhi 18:6a4db94011d3 380 #define HC_PID_SETUP 3U
sahilmgandhi 18:6a4db94011d3 381
sahilmgandhi 18:6a4db94011d3 382 #define GRXSTS_PKTSTS_IN 2
sahilmgandhi 18:6a4db94011d3 383 #define GRXSTS_PKTSTS_IN_XFER_COMP 3
sahilmgandhi 18:6a4db94011d3 384 #define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5
sahilmgandhi 18:6a4db94011d3 385 #define GRXSTS_PKTSTS_CH_HALTED 7
sahilmgandhi 18:6a4db94011d3 386
sahilmgandhi 18:6a4db94011d3 387 #define USBx_PCGCCTL *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_PCGCCTL_BASE)
sahilmgandhi 18:6a4db94011d3 388 #define USBx_HPRT0 *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_HOST_PORT_BASE)
sahilmgandhi 18:6a4db94011d3 389
sahilmgandhi 18:6a4db94011d3 390 #define USBx_DEVICE ((USB_OTG_DeviceTypeDef *)((uint32_t )USBx + USB_OTG_DEVICE_BASE))
sahilmgandhi 18:6a4db94011d3 391 #define USBx_INEP(i) ((USB_OTG_INEndpointTypeDef *)((uint32_t)USBx + USB_OTG_IN_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE))
sahilmgandhi 18:6a4db94011d3 392 #define USBx_OUTEP(i) ((USB_OTG_OUTEndpointTypeDef *)((uint32_t)USBx + USB_OTG_OUT_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE))
sahilmgandhi 18:6a4db94011d3 393 #define USBx_DFIFO(i) *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_FIFO_BASE + (i) * USB_OTG_FIFO_SIZE)
sahilmgandhi 18:6a4db94011d3 394
sahilmgandhi 18:6a4db94011d3 395 #define USBx_HOST ((USB_OTG_HostTypeDef *)((uint32_t )USBx + USB_OTG_HOST_BASE))
sahilmgandhi 18:6a4db94011d3 396 #define USBx_HC(i) ((USB_OTG_HostChannelTypeDef *)((uint32_t)USBx + USB_OTG_HOST_CHANNEL_BASE + (i)*USB_OTG_HOST_CHANNEL_SIZE))
sahilmgandhi 18:6a4db94011d3 397 /**
sahilmgandhi 18:6a4db94011d3 398 * @}
sahilmgandhi 18:6a4db94011d3 399 */
sahilmgandhi 18:6a4db94011d3 400 /* Exported macro ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 401 #define USB_MASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK &= ~(__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 402 #define USB_UNMASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK |= (__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 403
sahilmgandhi 18:6a4db94011d3 404 #define CLEAR_IN_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_INEP(__EPNUM__)->DIEPINT = (__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 405 #define CLEAR_OUT_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_OUTEP(__EPNUM__)->DOEPINT = (__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 406
sahilmgandhi 18:6a4db94011d3 407 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 408 HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init);
sahilmgandhi 18:6a4db94011d3 409 HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init);
sahilmgandhi 18:6a4db94011d3 410 HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx);
sahilmgandhi 18:6a4db94011d3 411 HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx);
sahilmgandhi 18:6a4db94011d3 412 HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_OTG_ModeTypeDef mode);
sahilmgandhi 18:6a4db94011d3 413 HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed);
sahilmgandhi 18:6a4db94011d3 414 HAL_StatusTypeDef USB_FlushRxFifo (USB_OTG_GlobalTypeDef *USBx);
sahilmgandhi 18:6a4db94011d3 415 HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num );
sahilmgandhi 18:6a4db94011d3 416 HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
sahilmgandhi 18:6a4db94011d3 417 HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
sahilmgandhi 18:6a4db94011d3 418 HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
sahilmgandhi 18:6a4db94011d3 419 HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
sahilmgandhi 18:6a4db94011d3 420 HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma);
sahilmgandhi 18:6a4db94011d3 421 HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma);
sahilmgandhi 18:6a4db94011d3 422 HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma);
sahilmgandhi 18:6a4db94011d3 423 void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len);
sahilmgandhi 18:6a4db94011d3 424 HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep);
sahilmgandhi 18:6a4db94011d3 425 HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep);
sahilmgandhi 18:6a4db94011d3 426 HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address);
sahilmgandhi 18:6a4db94011d3 427 HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx);
sahilmgandhi 18:6a4db94011d3 428 HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx);
sahilmgandhi 18:6a4db94011d3 429 HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx);
sahilmgandhi 18:6a4db94011d3 430 HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx);
sahilmgandhi 18:6a4db94011d3 431 HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uint8_t *psetup);
sahilmgandhi 18:6a4db94011d3 432 uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx);
sahilmgandhi 18:6a4db94011d3 433 uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx);
sahilmgandhi 18:6a4db94011d3 434 uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx);
sahilmgandhi 18:6a4db94011d3 435 uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx);
sahilmgandhi 18:6a4db94011d3 436 uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum);
sahilmgandhi 18:6a4db94011d3 437 uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx);
sahilmgandhi 18:6a4db94011d3 438 uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum);
sahilmgandhi 18:6a4db94011d3 439 void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt);
sahilmgandhi 18:6a4db94011d3 440
sahilmgandhi 18:6a4db94011d3 441 HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg);
sahilmgandhi 18:6a4db94011d3 442 HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq);
sahilmgandhi 18:6a4db94011d3 443 HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx);
sahilmgandhi 18:6a4db94011d3 444 HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state);
sahilmgandhi 18:6a4db94011d3 445 uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx);
sahilmgandhi 18:6a4db94011d3 446 uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx);
sahilmgandhi 18:6a4db94011d3 447 HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
sahilmgandhi 18:6a4db94011d3 448 uint8_t ch_num,
sahilmgandhi 18:6a4db94011d3 449 uint8_t epnum,
sahilmgandhi 18:6a4db94011d3 450 uint8_t dev_address,
sahilmgandhi 18:6a4db94011d3 451 uint8_t speed,
sahilmgandhi 18:6a4db94011d3 452 uint8_t ep_type,
sahilmgandhi 18:6a4db94011d3 453 uint16_t mps);
sahilmgandhi 18:6a4db94011d3 454 HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma);
sahilmgandhi 18:6a4db94011d3 455 uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx);
sahilmgandhi 18:6a4db94011d3 456 HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num);
sahilmgandhi 18:6a4db94011d3 457 HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num);
sahilmgandhi 18:6a4db94011d3 458 HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx);
sahilmgandhi 18:6a4db94011d3 459
sahilmgandhi 18:6a4db94011d3 460 /**
sahilmgandhi 18:6a4db94011d3 461 * @}
sahilmgandhi 18:6a4db94011d3 462 */
sahilmgandhi 18:6a4db94011d3 463
sahilmgandhi 18:6a4db94011d3 464 /**
sahilmgandhi 18:6a4db94011d3 465 * @}
sahilmgandhi 18:6a4db94011d3 466 */
sahilmgandhi 18:6a4db94011d3 467 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
sahilmgandhi 18:6a4db94011d3 468 STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Rx ||
sahilmgandhi 18:6a4db94011d3 469 STM32F412Vx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 470 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 471 }
sahilmgandhi 18:6a4db94011d3 472 #endif
sahilmgandhi 18:6a4db94011d3 473
sahilmgandhi 18:6a4db94011d3 474
sahilmgandhi 18:6a4db94011d3 475 #endif /* __STM32F4xx_LL_USB_H */
sahilmgandhi 18:6a4db94011d3 476
sahilmgandhi 18:6a4db94011d3 477 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/