MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_sdmmc.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f4xx_ll_sdmmc.c
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.5.0
sahilmgandhi 18:6a4db94011d3 6 * @date 06-May-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief SDMMC Low Layer HAL module driver.
sahilmgandhi 18:6a4db94011d3 8 *
sahilmgandhi 18:6a4db94011d3 9 * This file provides firmware functions to manage the following
sahilmgandhi 18:6a4db94011d3 10 * functionalities of the SDMMC peripheral:
sahilmgandhi 18:6a4db94011d3 11 * + Initialization/de-initialization functions
sahilmgandhi 18:6a4db94011d3 12 * + I/O operation functions
sahilmgandhi 18:6a4db94011d3 13 * + Peripheral Control functions
sahilmgandhi 18:6a4db94011d3 14 * + Peripheral State functions
sahilmgandhi 18:6a4db94011d3 15 *
sahilmgandhi 18:6a4db94011d3 16 @verbatim
sahilmgandhi 18:6a4db94011d3 17 ==============================================================================
sahilmgandhi 18:6a4db94011d3 18 ##### SDMMC peripheral features #####
sahilmgandhi 18:6a4db94011d3 19 ==============================================================================
sahilmgandhi 18:6a4db94011d3 20 [..] The SD/SDIO MMC card host interface (SDIO) provides an interface between the APB2
sahilmgandhi 18:6a4db94011d3 21 peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDIO cards and CE-ATA
sahilmgandhi 18:6a4db94011d3 22 devices.
sahilmgandhi 18:6a4db94011d3 23
sahilmgandhi 18:6a4db94011d3 24 [..] The SDIO features include the following:
sahilmgandhi 18:6a4db94011d3 25 (+) Full compliance with MultiMedia Card System Specification Version 4.2. Card support
sahilmgandhi 18:6a4db94011d3 26 for three different databus modes: 1-bit (default), 4-bit and 8-bit
sahilmgandhi 18:6a4db94011d3 27 (+) Full compatibility with previous versions of MultiMedia Cards (forward compatibility)
sahilmgandhi 18:6a4db94011d3 28 (+) Full compliance with SD Memory Card Specifications Version 2.0
sahilmgandhi 18:6a4db94011d3 29 (+) Full compliance with SD I/O Card Specification Version 2.0: card support for two
sahilmgandhi 18:6a4db94011d3 30 different data bus modes: 1-bit (default) and 4-bit
sahilmgandhi 18:6a4db94011d3 31 (+) Full support of the CE-ATA features (full compliance with CE-ATA digital protocol
sahilmgandhi 18:6a4db94011d3 32 Rev1.1)
sahilmgandhi 18:6a4db94011d3 33 (+) Data transfer up to 48 MHz for the 8 bit mode
sahilmgandhi 18:6a4db94011d3 34 (+) Data and command output enable signals to control external bidirectional drivers.
sahilmgandhi 18:6a4db94011d3 35
sahilmgandhi 18:6a4db94011d3 36
sahilmgandhi 18:6a4db94011d3 37 ##### How to use this driver #####
sahilmgandhi 18:6a4db94011d3 38 ==============================================================================
sahilmgandhi 18:6a4db94011d3 39 [..]
sahilmgandhi 18:6a4db94011d3 40 This driver is a considered as a driver of service for external devices drivers
sahilmgandhi 18:6a4db94011d3 41 that interfaces with the SDIO peripheral.
sahilmgandhi 18:6a4db94011d3 42 According to the device used (SD card/ MMC card / SDIO card ...), a set of APIs
sahilmgandhi 18:6a4db94011d3 43 is used in the device's driver to perform SDIO operations and functionalities.
sahilmgandhi 18:6a4db94011d3 44
sahilmgandhi 18:6a4db94011d3 45 This driver is almost transparent for the final user, it is only used to implement other
sahilmgandhi 18:6a4db94011d3 46 functionalities of the external device.
sahilmgandhi 18:6a4db94011d3 47
sahilmgandhi 18:6a4db94011d3 48 [..]
sahilmgandhi 18:6a4db94011d3 49 (+) The SDIO clock (SDIOCLK = 48 MHz) is coming from a specific output of PLL
sahilmgandhi 18:6a4db94011d3 50 (PLL48CLK). Before start working with SDIO peripheral make sure that the
sahilmgandhi 18:6a4db94011d3 51 PLL is well configured.
sahilmgandhi 18:6a4db94011d3 52 The SDIO peripheral uses two clock signals:
sahilmgandhi 18:6a4db94011d3 53 (++) SDIO adapter clock (SDIOCLK = 48 MHz)
sahilmgandhi 18:6a4db94011d3 54 (++) APB2 bus clock (PCLK2)
sahilmgandhi 18:6a4db94011d3 55
sahilmgandhi 18:6a4db94011d3 56 -@@- PCLK2 and SDIO_CK clock frequencies must respect the following condition:
sahilmgandhi 18:6a4db94011d3 57 Frequency(PCLK2) >= (3 / 8 x Frequency(SDIO_CK))
sahilmgandhi 18:6a4db94011d3 58
sahilmgandhi 18:6a4db94011d3 59 (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDIO
sahilmgandhi 18:6a4db94011d3 60 peripheral.
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 (+) Enable the Power ON State using the SDIO_PowerState_ON(SDIOx)
sahilmgandhi 18:6a4db94011d3 63 function and disable it using the function SDIO_PowerState_OFF(SDIOx).
sahilmgandhi 18:6a4db94011d3 64
sahilmgandhi 18:6a4db94011d3 65 (+) Enable/Disable the clock using the __SDIO_ENABLE()/__SDIO_DISABLE() macros.
sahilmgandhi 18:6a4db94011d3 66
sahilmgandhi 18:6a4db94011d3 67 (+) Enable/Disable the peripheral interrupts using the macros __SDIO_ENABLE_IT(hsdio, IT)
sahilmgandhi 18:6a4db94011d3 68 and __SDIO_DISABLE_IT(hsdio, IT) if you need to use interrupt mode.
sahilmgandhi 18:6a4db94011d3 69
sahilmgandhi 18:6a4db94011d3 70 (+) When using the DMA mode
sahilmgandhi 18:6a4db94011d3 71 (++) Configure the DMA in the MSP layer of the external device
sahilmgandhi 18:6a4db94011d3 72 (++) Active the needed channel Request
sahilmgandhi 18:6a4db94011d3 73 (++) Enable the DMA using __SDIO_DMA_ENABLE() macro or Disable it using the macro
sahilmgandhi 18:6a4db94011d3 74 __SDIO_DMA_DISABLE().
sahilmgandhi 18:6a4db94011d3 75
sahilmgandhi 18:6a4db94011d3 76 (+) To control the CPSM (Command Path State Machine) and send
sahilmgandhi 18:6a4db94011d3 77 commands to the card use the SDIO_SendCommand(SDIOx),
sahilmgandhi 18:6a4db94011d3 78 SDIO_GetCommandResponse() and SDIO_GetResponse() functions. First, user has
sahilmgandhi 18:6a4db94011d3 79 to fill the command structure (pointer to SDIO_CmdInitTypeDef) according
sahilmgandhi 18:6a4db94011d3 80 to the selected command to be sent.
sahilmgandhi 18:6a4db94011d3 81 The parameters that should be filled are:
sahilmgandhi 18:6a4db94011d3 82 (++) Command Argument
sahilmgandhi 18:6a4db94011d3 83 (++) Command Index
sahilmgandhi 18:6a4db94011d3 84 (++) Command Response type
sahilmgandhi 18:6a4db94011d3 85 (++) Command Wait
sahilmgandhi 18:6a4db94011d3 86 (++) CPSM Status (Enable or Disable).
sahilmgandhi 18:6a4db94011d3 87
sahilmgandhi 18:6a4db94011d3 88 -@@- To check if the command is well received, read the SDIO_CMDRESP
sahilmgandhi 18:6a4db94011d3 89 register using the SDIO_GetCommandResponse().
sahilmgandhi 18:6a4db94011d3 90 The SDIO responses registers (SDIO_RESP1 to SDIO_RESP2), use the
sahilmgandhi 18:6a4db94011d3 91 SDIO_GetResponse() function.
sahilmgandhi 18:6a4db94011d3 92
sahilmgandhi 18:6a4db94011d3 93 (+) To control the DPSM (Data Path State Machine) and send/receive
sahilmgandhi 18:6a4db94011d3 94 data to/from the card use the SDIO_DataConfig(), SDIO_GetDataCounter(),
sahilmgandhi 18:6a4db94011d3 95 SDIO_ReadFIFO(), DIO_WriteFIFO() and SDIO_GetFIFOCount() functions.
sahilmgandhi 18:6a4db94011d3 96
sahilmgandhi 18:6a4db94011d3 97 *** Read Operations ***
sahilmgandhi 18:6a4db94011d3 98 =======================
sahilmgandhi 18:6a4db94011d3 99 [..]
sahilmgandhi 18:6a4db94011d3 100 (#) First, user has to fill the data structure (pointer to
sahilmgandhi 18:6a4db94011d3 101 SDIO_DataInitTypeDef) according to the selected data type to be received.
sahilmgandhi 18:6a4db94011d3 102 The parameters that should be filled are:
sahilmgandhi 18:6a4db94011d3 103 (++) Data Timeout
sahilmgandhi 18:6a4db94011d3 104 (++) Data Length
sahilmgandhi 18:6a4db94011d3 105 (++) Data Block size
sahilmgandhi 18:6a4db94011d3 106 (++) Data Transfer direction: should be from card (To SDIO)
sahilmgandhi 18:6a4db94011d3 107 (++) Data Transfer mode
sahilmgandhi 18:6a4db94011d3 108 (++) DPSM Status (Enable or Disable)
sahilmgandhi 18:6a4db94011d3 109
sahilmgandhi 18:6a4db94011d3 110 (#) Configure the SDIO resources to receive the data from the card
sahilmgandhi 18:6a4db94011d3 111 according to selected transfer mode (Refer to Step 8, 9 and 10).
sahilmgandhi 18:6a4db94011d3 112
sahilmgandhi 18:6a4db94011d3 113 (#) Send the selected Read command (refer to step 11).
sahilmgandhi 18:6a4db94011d3 114
sahilmgandhi 18:6a4db94011d3 115 (#) Use the SDIO flags/interrupts to check the transfer status.
sahilmgandhi 18:6a4db94011d3 116
sahilmgandhi 18:6a4db94011d3 117 *** Write Operations ***
sahilmgandhi 18:6a4db94011d3 118 ========================
sahilmgandhi 18:6a4db94011d3 119 [..]
sahilmgandhi 18:6a4db94011d3 120 (#) First, user has to fill the data structure (pointer to
sahilmgandhi 18:6a4db94011d3 121 SDIO_DataInitTypeDef) according to the selected data type to be received.
sahilmgandhi 18:6a4db94011d3 122 The parameters that should be filled are:
sahilmgandhi 18:6a4db94011d3 123 (++) Data Timeout
sahilmgandhi 18:6a4db94011d3 124 (++) Data Length
sahilmgandhi 18:6a4db94011d3 125 (++) Data Block size
sahilmgandhi 18:6a4db94011d3 126 (++) Data Transfer direction: should be to card (To CARD)
sahilmgandhi 18:6a4db94011d3 127 (++) Data Transfer mode
sahilmgandhi 18:6a4db94011d3 128 (++) DPSM Status (Enable or Disable)
sahilmgandhi 18:6a4db94011d3 129
sahilmgandhi 18:6a4db94011d3 130 (#) Configure the SDIO resources to send the data to the card according to
sahilmgandhi 18:6a4db94011d3 131 selected transfer mode.
sahilmgandhi 18:6a4db94011d3 132
sahilmgandhi 18:6a4db94011d3 133 (#) Send the selected Write command.
sahilmgandhi 18:6a4db94011d3 134
sahilmgandhi 18:6a4db94011d3 135 (#) Use the SDIO flags/interrupts to check the transfer status.
sahilmgandhi 18:6a4db94011d3 136
sahilmgandhi 18:6a4db94011d3 137 @endverbatim
sahilmgandhi 18:6a4db94011d3 138 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 139 * @attention
sahilmgandhi 18:6a4db94011d3 140 *
sahilmgandhi 18:6a4db94011d3 141 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 142 *
sahilmgandhi 18:6a4db94011d3 143 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 144 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 145 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 146 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 147 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 148 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 149 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 150 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 151 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 152 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 153 *
sahilmgandhi 18:6a4db94011d3 154 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 155 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 156 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 157 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 158 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 159 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 160 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 161 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 162 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 163 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 164 *
sahilmgandhi 18:6a4db94011d3 165 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 166 */
sahilmgandhi 18:6a4db94011d3 167
sahilmgandhi 18:6a4db94011d3 168 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 169 #include "stm32f4xx_hal.h"
sahilmgandhi 18:6a4db94011d3 170
sahilmgandhi 18:6a4db94011d3 171 /** @addtogroup STM32F4xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 172 * @{
sahilmgandhi 18:6a4db94011d3 173 */
sahilmgandhi 18:6a4db94011d3 174
sahilmgandhi 18:6a4db94011d3 175 /** @defgroup SDMMC_LL SDMMC Low Layer
sahilmgandhi 18:6a4db94011d3 176 * @brief Low layer module for SD and MMC driver
sahilmgandhi 18:6a4db94011d3 177 * @{
sahilmgandhi 18:6a4db94011d3 178 */
sahilmgandhi 18:6a4db94011d3 179
sahilmgandhi 18:6a4db94011d3 180 #if defined(HAL_SD_MODULE_ENABLED) || defined(HAL_MMC_MODULE_ENABLED)
sahilmgandhi 18:6a4db94011d3 181 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
sahilmgandhi 18:6a4db94011d3 182 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
sahilmgandhi 18:6a4db94011d3 183 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
sahilmgandhi 18:6a4db94011d3 184 defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
sahilmgandhi 18:6a4db94011d3 185 defined(STM32F412Rx) || defined(STM32F412Cx)
sahilmgandhi 18:6a4db94011d3 186 /* Private typedef -----------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 187 /* Private define ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 188 /* Private macro -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 189 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 190 /* Private function prototypes -----------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 191 /* Private functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 192
sahilmgandhi 18:6a4db94011d3 193 /** @defgroup SDMMC_LL_Exported_Functions SDMMC_LL Exported Functions
sahilmgandhi 18:6a4db94011d3 194 * @{
sahilmgandhi 18:6a4db94011d3 195 */
sahilmgandhi 18:6a4db94011d3 196
sahilmgandhi 18:6a4db94011d3 197 /** @defgroup HAL_SDMMC_LL_Group1 Initialization/de-initialization functions
sahilmgandhi 18:6a4db94011d3 198 * @brief Initialization and Configuration functions
sahilmgandhi 18:6a4db94011d3 199 *
sahilmgandhi 18:6a4db94011d3 200 @verbatim
sahilmgandhi 18:6a4db94011d3 201 ===============================================================================
sahilmgandhi 18:6a4db94011d3 202 ##### Initialization/de-initialization functions #####
sahilmgandhi 18:6a4db94011d3 203 ===============================================================================
sahilmgandhi 18:6a4db94011d3 204 [..] This section provides functions allowing to:
sahilmgandhi 18:6a4db94011d3 205
sahilmgandhi 18:6a4db94011d3 206 @endverbatim
sahilmgandhi 18:6a4db94011d3 207 * @{
sahilmgandhi 18:6a4db94011d3 208 */
sahilmgandhi 18:6a4db94011d3 209
sahilmgandhi 18:6a4db94011d3 210 /**
sahilmgandhi 18:6a4db94011d3 211 * @brief Initializes the SDIO according to the specified
sahilmgandhi 18:6a4db94011d3 212 * parameters in the SDIO_InitTypeDef and create the associated handle.
sahilmgandhi 18:6a4db94011d3 213 * @param SDIOx: Pointer to SDIO register base
sahilmgandhi 18:6a4db94011d3 214 * @param Init: SDIO initialization structure
sahilmgandhi 18:6a4db94011d3 215 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 216 */
sahilmgandhi 18:6a4db94011d3 217 HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init)
sahilmgandhi 18:6a4db94011d3 218 {
sahilmgandhi 18:6a4db94011d3 219 uint32_t tmpreg = 0U;
sahilmgandhi 18:6a4db94011d3 220
sahilmgandhi 18:6a4db94011d3 221 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 222 assert_param(IS_SDIO_ALL_INSTANCE(SDIOx));
sahilmgandhi 18:6a4db94011d3 223 assert_param(IS_SDIO_CLOCK_EDGE(Init.ClockEdge));
sahilmgandhi 18:6a4db94011d3 224 assert_param(IS_SDIO_CLOCK_BYPASS(Init.ClockBypass));
sahilmgandhi 18:6a4db94011d3 225 assert_param(IS_SDIO_CLOCK_POWER_SAVE(Init.ClockPowerSave));
sahilmgandhi 18:6a4db94011d3 226 assert_param(IS_SDIO_BUS_WIDE(Init.BusWide));
sahilmgandhi 18:6a4db94011d3 227 assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl));
sahilmgandhi 18:6a4db94011d3 228 assert_param(IS_SDIO_CLKDIV(Init.ClockDiv));
sahilmgandhi 18:6a4db94011d3 229
sahilmgandhi 18:6a4db94011d3 230 /* Set SDIO configuration parameters */
sahilmgandhi 18:6a4db94011d3 231 tmpreg |= (Init.ClockEdge |\
sahilmgandhi 18:6a4db94011d3 232 Init.ClockBypass |\
sahilmgandhi 18:6a4db94011d3 233 Init.ClockPowerSave |\
sahilmgandhi 18:6a4db94011d3 234 Init.BusWide |\
sahilmgandhi 18:6a4db94011d3 235 Init.HardwareFlowControl |\
sahilmgandhi 18:6a4db94011d3 236 Init.ClockDiv
sahilmgandhi 18:6a4db94011d3 237 );
sahilmgandhi 18:6a4db94011d3 238
sahilmgandhi 18:6a4db94011d3 239 /* Write to SDIO CLKCR */
sahilmgandhi 18:6a4db94011d3 240 MODIFY_REG(SDIOx->CLKCR, CLKCR_CLEAR_MASK, tmpreg);
sahilmgandhi 18:6a4db94011d3 241
sahilmgandhi 18:6a4db94011d3 242 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 243 }
sahilmgandhi 18:6a4db94011d3 244
sahilmgandhi 18:6a4db94011d3 245 /**
sahilmgandhi 18:6a4db94011d3 246 * @}
sahilmgandhi 18:6a4db94011d3 247 */
sahilmgandhi 18:6a4db94011d3 248
sahilmgandhi 18:6a4db94011d3 249 /** @defgroup HAL_SDMMC_LL_Group2 I/O operation functions
sahilmgandhi 18:6a4db94011d3 250 * @brief Data transfers functions
sahilmgandhi 18:6a4db94011d3 251 *
sahilmgandhi 18:6a4db94011d3 252 @verbatim
sahilmgandhi 18:6a4db94011d3 253 ===============================================================================
sahilmgandhi 18:6a4db94011d3 254 ##### I/O operation functions #####
sahilmgandhi 18:6a4db94011d3 255 ===============================================================================
sahilmgandhi 18:6a4db94011d3 256 [..]
sahilmgandhi 18:6a4db94011d3 257 This subsection provides a set of functions allowing to manage the SDIO data
sahilmgandhi 18:6a4db94011d3 258 transfers.
sahilmgandhi 18:6a4db94011d3 259
sahilmgandhi 18:6a4db94011d3 260 @endverbatim
sahilmgandhi 18:6a4db94011d3 261 * @{
sahilmgandhi 18:6a4db94011d3 262 */
sahilmgandhi 18:6a4db94011d3 263
sahilmgandhi 18:6a4db94011d3 264 /**
sahilmgandhi 18:6a4db94011d3 265 * @brief Read data (word) from Rx FIFO in blocking mode (polling)
sahilmgandhi 18:6a4db94011d3 266 * @param SDIOx: Pointer to SDIO register base
sahilmgandhi 18:6a4db94011d3 267 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 268 */
sahilmgandhi 18:6a4db94011d3 269 uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx)
sahilmgandhi 18:6a4db94011d3 270 {
sahilmgandhi 18:6a4db94011d3 271 /* Read data from Rx FIFO */
sahilmgandhi 18:6a4db94011d3 272 return (SDIOx->FIFO);
sahilmgandhi 18:6a4db94011d3 273 }
sahilmgandhi 18:6a4db94011d3 274
sahilmgandhi 18:6a4db94011d3 275 /**
sahilmgandhi 18:6a4db94011d3 276 * @brief Write data (word) to Tx FIFO in blocking mode (polling)
sahilmgandhi 18:6a4db94011d3 277 * @param SDIOx: Pointer to SDIO register base
sahilmgandhi 18:6a4db94011d3 278 * @param pWriteData: pointer to data to write
sahilmgandhi 18:6a4db94011d3 279 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 280 */
sahilmgandhi 18:6a4db94011d3 281 HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData)
sahilmgandhi 18:6a4db94011d3 282 {
sahilmgandhi 18:6a4db94011d3 283 /* Write data to FIFO */
sahilmgandhi 18:6a4db94011d3 284 SDIOx->FIFO = *pWriteData;
sahilmgandhi 18:6a4db94011d3 285
sahilmgandhi 18:6a4db94011d3 286 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 287 }
sahilmgandhi 18:6a4db94011d3 288
sahilmgandhi 18:6a4db94011d3 289 /**
sahilmgandhi 18:6a4db94011d3 290 * @}
sahilmgandhi 18:6a4db94011d3 291 */
sahilmgandhi 18:6a4db94011d3 292
sahilmgandhi 18:6a4db94011d3 293 /** @defgroup HAL_SDMMC_LL_Group3 Peripheral Control functions
sahilmgandhi 18:6a4db94011d3 294 * @brief management functions
sahilmgandhi 18:6a4db94011d3 295 *
sahilmgandhi 18:6a4db94011d3 296 @verbatim
sahilmgandhi 18:6a4db94011d3 297 ===============================================================================
sahilmgandhi 18:6a4db94011d3 298 ##### Peripheral Control functions #####
sahilmgandhi 18:6a4db94011d3 299 ===============================================================================
sahilmgandhi 18:6a4db94011d3 300 [..]
sahilmgandhi 18:6a4db94011d3 301 This subsection provides a set of functions allowing to control the SDIO data
sahilmgandhi 18:6a4db94011d3 302 transfers.
sahilmgandhi 18:6a4db94011d3 303
sahilmgandhi 18:6a4db94011d3 304 @endverbatim
sahilmgandhi 18:6a4db94011d3 305 * @{
sahilmgandhi 18:6a4db94011d3 306 */
sahilmgandhi 18:6a4db94011d3 307
sahilmgandhi 18:6a4db94011d3 308 /**
sahilmgandhi 18:6a4db94011d3 309 * @brief Set SDIO Power state to ON.
sahilmgandhi 18:6a4db94011d3 310 * @param SDIOx: Pointer to SDIO register base
sahilmgandhi 18:6a4db94011d3 311 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 312 */
sahilmgandhi 18:6a4db94011d3 313 HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx)
sahilmgandhi 18:6a4db94011d3 314 {
sahilmgandhi 18:6a4db94011d3 315 /* Set power state to ON */
sahilmgandhi 18:6a4db94011d3 316 SDIOx->POWER = SDIO_POWER_PWRCTRL;
sahilmgandhi 18:6a4db94011d3 317
sahilmgandhi 18:6a4db94011d3 318 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 319 }
sahilmgandhi 18:6a4db94011d3 320
sahilmgandhi 18:6a4db94011d3 321 /**
sahilmgandhi 18:6a4db94011d3 322 * @brief Set SDIO Power state to OFF.
sahilmgandhi 18:6a4db94011d3 323 * @param SDIOx: Pointer to SDIO register base
sahilmgandhi 18:6a4db94011d3 324 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 325 */
sahilmgandhi 18:6a4db94011d3 326 HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx)
sahilmgandhi 18:6a4db94011d3 327 {
sahilmgandhi 18:6a4db94011d3 328 /* Set power state to OFF */
sahilmgandhi 18:6a4db94011d3 329 SDIOx->POWER = (uint32_t)0x00000000U;
sahilmgandhi 18:6a4db94011d3 330
sahilmgandhi 18:6a4db94011d3 331 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 332 }
sahilmgandhi 18:6a4db94011d3 333
sahilmgandhi 18:6a4db94011d3 334 /**
sahilmgandhi 18:6a4db94011d3 335 * @brief Get SDIO Power state.
sahilmgandhi 18:6a4db94011d3 336 * @param SDIOx: Pointer to SDIO register base
sahilmgandhi 18:6a4db94011d3 337 * @retval Power status of the controller. The returned value can be one of the
sahilmgandhi 18:6a4db94011d3 338 * following values:
sahilmgandhi 18:6a4db94011d3 339 * - 0x00: Power OFF
sahilmgandhi 18:6a4db94011d3 340 * - 0x02: Power UP
sahilmgandhi 18:6a4db94011d3 341 * - 0x03: Power ON
sahilmgandhi 18:6a4db94011d3 342 */
sahilmgandhi 18:6a4db94011d3 343 uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx)
sahilmgandhi 18:6a4db94011d3 344 {
sahilmgandhi 18:6a4db94011d3 345 return (SDIOx->POWER & SDIO_POWER_PWRCTRL);
sahilmgandhi 18:6a4db94011d3 346 }
sahilmgandhi 18:6a4db94011d3 347
sahilmgandhi 18:6a4db94011d3 348 /**
sahilmgandhi 18:6a4db94011d3 349 * @brief Configure the SDIO command path according to the specified parameters in
sahilmgandhi 18:6a4db94011d3 350 * SDIO_CmdInitTypeDef structure and send the command
sahilmgandhi 18:6a4db94011d3 351 * @param SDIOx: Pointer to SDIO register base
sahilmgandhi 18:6a4db94011d3 352 * @param SDIO_CmdInitStruct: pointer to a SDIO_CmdInitTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 353 * the configuration information for the SDIO command
sahilmgandhi 18:6a4db94011d3 354 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 355 */
sahilmgandhi 18:6a4db94011d3 356 HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *SDIO_CmdInitStruct)
sahilmgandhi 18:6a4db94011d3 357 {
sahilmgandhi 18:6a4db94011d3 358 uint32_t tmpreg = 0U;
sahilmgandhi 18:6a4db94011d3 359
sahilmgandhi 18:6a4db94011d3 360 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 361 assert_param(IS_SDIO_CMD_INDEX(SDIO_CmdInitStruct->CmdIndex));
sahilmgandhi 18:6a4db94011d3 362 assert_param(IS_SDIO_RESPONSE(SDIO_CmdInitStruct->Response));
sahilmgandhi 18:6a4db94011d3 363 assert_param(IS_SDIO_WAIT(SDIO_CmdInitStruct->WaitForInterrupt));
sahilmgandhi 18:6a4db94011d3 364 assert_param(IS_SDIO_CPSM(SDIO_CmdInitStruct->CPSM));
sahilmgandhi 18:6a4db94011d3 365
sahilmgandhi 18:6a4db94011d3 366 /* Set the SDIO Argument value */
sahilmgandhi 18:6a4db94011d3 367 SDIOx->ARG = SDIO_CmdInitStruct->Argument;
sahilmgandhi 18:6a4db94011d3 368
sahilmgandhi 18:6a4db94011d3 369 /* Set SDIO command parameters */
sahilmgandhi 18:6a4db94011d3 370 tmpreg |= (uint32_t)(SDIO_CmdInitStruct->CmdIndex |\
sahilmgandhi 18:6a4db94011d3 371 SDIO_CmdInitStruct->Response |\
sahilmgandhi 18:6a4db94011d3 372 SDIO_CmdInitStruct->WaitForInterrupt |\
sahilmgandhi 18:6a4db94011d3 373 SDIO_CmdInitStruct->CPSM);
sahilmgandhi 18:6a4db94011d3 374
sahilmgandhi 18:6a4db94011d3 375 /* Write to SDIO CMD register */
sahilmgandhi 18:6a4db94011d3 376 MODIFY_REG(SDIOx->CMD, CMD_CLEAR_MASK, tmpreg);
sahilmgandhi 18:6a4db94011d3 377
sahilmgandhi 18:6a4db94011d3 378 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 379 }
sahilmgandhi 18:6a4db94011d3 380
sahilmgandhi 18:6a4db94011d3 381 /**
sahilmgandhi 18:6a4db94011d3 382 * @brief Return the command index of last command for which response received
sahilmgandhi 18:6a4db94011d3 383 * @param SDIOx: Pointer to SDIO register base
sahilmgandhi 18:6a4db94011d3 384 * @retval Command index of the last command response received
sahilmgandhi 18:6a4db94011d3 385 */
sahilmgandhi 18:6a4db94011d3 386 uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx)
sahilmgandhi 18:6a4db94011d3 387 {
sahilmgandhi 18:6a4db94011d3 388 return (uint8_t)(SDIOx->RESPCMD);
sahilmgandhi 18:6a4db94011d3 389 }
sahilmgandhi 18:6a4db94011d3 390
sahilmgandhi 18:6a4db94011d3 391
sahilmgandhi 18:6a4db94011d3 392 /**
sahilmgandhi 18:6a4db94011d3 393 * @brief Return the response received from the card for the last command
sahilmgandhi 18:6a4db94011d3 394 * @param SDIO_RESP: Specifies the SDIO response register.
sahilmgandhi 18:6a4db94011d3 395 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 396 * @arg SDIO_RESP1: Response Register 1
sahilmgandhi 18:6a4db94011d3 397 * @arg SDIO_RESP2: Response Register 2
sahilmgandhi 18:6a4db94011d3 398 * @arg SDIO_RESP3: Response Register 3
sahilmgandhi 18:6a4db94011d3 399 * @arg SDIO_RESP4: Response Register 4
sahilmgandhi 18:6a4db94011d3 400 * @retval The Corresponding response register value
sahilmgandhi 18:6a4db94011d3 401 */
sahilmgandhi 18:6a4db94011d3 402 uint32_t SDIO_GetResponse(uint32_t SDIO_RESP)
sahilmgandhi 18:6a4db94011d3 403 {
sahilmgandhi 18:6a4db94011d3 404 __IO uint32_t tmp = 0U;
sahilmgandhi 18:6a4db94011d3 405
sahilmgandhi 18:6a4db94011d3 406 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 407 assert_param(IS_SDIO_RESP(SDIO_RESP));
sahilmgandhi 18:6a4db94011d3 408
sahilmgandhi 18:6a4db94011d3 409 /* Get the response */
sahilmgandhi 18:6a4db94011d3 410 tmp = SDIO_RESP_ADDR + SDIO_RESP;
sahilmgandhi 18:6a4db94011d3 411
sahilmgandhi 18:6a4db94011d3 412 return (*(__IO uint32_t *) tmp);
sahilmgandhi 18:6a4db94011d3 413 }
sahilmgandhi 18:6a4db94011d3 414
sahilmgandhi 18:6a4db94011d3 415 /**
sahilmgandhi 18:6a4db94011d3 416 * @brief Configure the SDIO data path according to the specified
sahilmgandhi 18:6a4db94011d3 417 * parameters in the SDIO_DataInitTypeDef.
sahilmgandhi 18:6a4db94011d3 418 * @param SDIOx: Pointer to SDIO register base
sahilmgandhi 18:6a4db94011d3 419 * @param SDIO_DataInitStruct : pointer to a SDIO_DataInitTypeDef structure
sahilmgandhi 18:6a4db94011d3 420 * that contains the configuration information for the SDIO command.
sahilmgandhi 18:6a4db94011d3 421 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 422 */
sahilmgandhi 18:6a4db94011d3 423 HAL_StatusTypeDef SDIO_DataConfig(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* SDIO_DataInitStruct)
sahilmgandhi 18:6a4db94011d3 424 {
sahilmgandhi 18:6a4db94011d3 425 uint32_t tmpreg = 0U;
sahilmgandhi 18:6a4db94011d3 426
sahilmgandhi 18:6a4db94011d3 427 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 428 assert_param(IS_SDIO_DATA_LENGTH(SDIO_DataInitStruct->DataLength));
sahilmgandhi 18:6a4db94011d3 429 assert_param(IS_SDIO_BLOCK_SIZE(SDIO_DataInitStruct->DataBlockSize));
sahilmgandhi 18:6a4db94011d3 430 assert_param(IS_SDIO_TRANSFER_DIR(SDIO_DataInitStruct->TransferDir));
sahilmgandhi 18:6a4db94011d3 431 assert_param(IS_SDIO_TRANSFER_MODE(SDIO_DataInitStruct->TransferMode));
sahilmgandhi 18:6a4db94011d3 432 assert_param(IS_SDIO_DPSM(SDIO_DataInitStruct->DPSM));
sahilmgandhi 18:6a4db94011d3 433
sahilmgandhi 18:6a4db94011d3 434 /* Set the SDIO Data Timeout value */
sahilmgandhi 18:6a4db94011d3 435 SDIOx->DTIMER = SDIO_DataInitStruct->DataTimeOut;
sahilmgandhi 18:6a4db94011d3 436
sahilmgandhi 18:6a4db94011d3 437 /* Set the SDIO DataLength value */
sahilmgandhi 18:6a4db94011d3 438 SDIOx->DLEN = SDIO_DataInitStruct->DataLength;
sahilmgandhi 18:6a4db94011d3 439
sahilmgandhi 18:6a4db94011d3 440 /* Set the SDIO data configuration parameters */
sahilmgandhi 18:6a4db94011d3 441 tmpreg |= (uint32_t)(SDIO_DataInitStruct->DataBlockSize |\
sahilmgandhi 18:6a4db94011d3 442 SDIO_DataInitStruct->TransferDir |\
sahilmgandhi 18:6a4db94011d3 443 SDIO_DataInitStruct->TransferMode |\
sahilmgandhi 18:6a4db94011d3 444 SDIO_DataInitStruct->DPSM);
sahilmgandhi 18:6a4db94011d3 445
sahilmgandhi 18:6a4db94011d3 446 /* Write to SDIO DCTRL */
sahilmgandhi 18:6a4db94011d3 447 MODIFY_REG(SDIOx->DCTRL, DCTRL_CLEAR_MASK, tmpreg);
sahilmgandhi 18:6a4db94011d3 448
sahilmgandhi 18:6a4db94011d3 449 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 450
sahilmgandhi 18:6a4db94011d3 451 }
sahilmgandhi 18:6a4db94011d3 452
sahilmgandhi 18:6a4db94011d3 453 /**
sahilmgandhi 18:6a4db94011d3 454 * @brief Returns number of remaining data bytes to be transferred.
sahilmgandhi 18:6a4db94011d3 455 * @param SDIOx: Pointer to SDIO register base
sahilmgandhi 18:6a4db94011d3 456 * @retval Number of remaining data bytes to be transferred
sahilmgandhi 18:6a4db94011d3 457 */
sahilmgandhi 18:6a4db94011d3 458 uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx)
sahilmgandhi 18:6a4db94011d3 459 {
sahilmgandhi 18:6a4db94011d3 460 return (SDIOx->DCOUNT);
sahilmgandhi 18:6a4db94011d3 461 }
sahilmgandhi 18:6a4db94011d3 462
sahilmgandhi 18:6a4db94011d3 463 /**
sahilmgandhi 18:6a4db94011d3 464 * @brief Get the FIFO data
sahilmgandhi 18:6a4db94011d3 465 * @param SDIOx: Pointer to SDIO register base
sahilmgandhi 18:6a4db94011d3 466 * @retval Data received
sahilmgandhi 18:6a4db94011d3 467 */
sahilmgandhi 18:6a4db94011d3 468 uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx)
sahilmgandhi 18:6a4db94011d3 469 {
sahilmgandhi 18:6a4db94011d3 470 return (SDIOx->FIFO);
sahilmgandhi 18:6a4db94011d3 471 }
sahilmgandhi 18:6a4db94011d3 472
sahilmgandhi 18:6a4db94011d3 473
sahilmgandhi 18:6a4db94011d3 474 /**
sahilmgandhi 18:6a4db94011d3 475 * @brief Sets one of the two options of inserting read wait interval.
sahilmgandhi 18:6a4db94011d3 476 * @param SDIO_ReadWaitMode: SD I/O Read Wait operation mode.
sahilmgandhi 18:6a4db94011d3 477 * This parameter can be:
sahilmgandhi 18:6a4db94011d3 478 * @arg SDIO_READ_WAIT_MODE_CLK: Read Wait control by stopping SDIOCLK
sahilmgandhi 18:6a4db94011d3 479 * @arg SDIO_READ_WAIT_MODE_DATA2: Read Wait control using SDIO_DATA2
sahilmgandhi 18:6a4db94011d3 480 * @retval None
sahilmgandhi 18:6a4db94011d3 481 */
sahilmgandhi 18:6a4db94011d3 482 HAL_StatusTypeDef SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode)
sahilmgandhi 18:6a4db94011d3 483 {
sahilmgandhi 18:6a4db94011d3 484 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 485 assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode));
sahilmgandhi 18:6a4db94011d3 486
sahilmgandhi 18:6a4db94011d3 487 *(__IO uint32_t *)DCTRL_RWMOD_BB = SDIO_ReadWaitMode;
sahilmgandhi 18:6a4db94011d3 488
sahilmgandhi 18:6a4db94011d3 489 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 490 }
sahilmgandhi 18:6a4db94011d3 491
sahilmgandhi 18:6a4db94011d3 492 /**
sahilmgandhi 18:6a4db94011d3 493 * @}
sahilmgandhi 18:6a4db94011d3 494 */
sahilmgandhi 18:6a4db94011d3 495
sahilmgandhi 18:6a4db94011d3 496 /**
sahilmgandhi 18:6a4db94011d3 497 * @}
sahilmgandhi 18:6a4db94011d3 498 */
sahilmgandhi 18:6a4db94011d3 499 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
sahilmgandhi 18:6a4db94011d3 500 STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx ||
sahilmgandhi 18:6a4db94011d3 501 STM32F412Rx || STM32F412Cx */
sahilmgandhi 18:6a4db94011d3 502 #endif /* (HAL_SD_MODULE_ENABLED) || (HAL_MMC_MODULE_ENABLED) */
sahilmgandhi 18:6a4db94011d3 503 /**
sahilmgandhi 18:6a4db94011d3 504 * @}
sahilmgandhi 18:6a4db94011d3 505 */
sahilmgandhi 18:6a4db94011d3 506
sahilmgandhi 18:6a4db94011d3 507 /**
sahilmgandhi 18:6a4db94011d3 508 * @}
sahilmgandhi 18:6a4db94011d3 509 */
sahilmgandhi 18:6a4db94011d3 510
sahilmgandhi 18:6a4db94011d3 511 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/