MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_uart.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f4xx_hal_uart.h
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.5.0
sahilmgandhi 18:6a4db94011d3 6 * @date 06-May-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief Header file of UART HAL module.
sahilmgandhi 18:6a4db94011d3 8 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 9 * @attention
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 12 *
sahilmgandhi 18:6a4db94011d3 13 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 14 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 15 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 16 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 18 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 19 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 21 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 22 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 23 *
sahilmgandhi 18:6a4db94011d3 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 34 *
sahilmgandhi 18:6a4db94011d3 35 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 36 */
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 /* Define to prevent recursive inclusion -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 39 #ifndef __STM32F4xx_HAL_UART_H
sahilmgandhi 18:6a4db94011d3 40 #define __STM32F4xx_HAL_UART_H
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 43 extern "C" {
sahilmgandhi 18:6a4db94011d3 44 #endif
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 47 #include "stm32f4xx_hal_def.h"
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 /** @addtogroup STM32F4xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 50 * @{
sahilmgandhi 18:6a4db94011d3 51 */
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 /** @addtogroup UART
sahilmgandhi 18:6a4db94011d3 54 * @{
sahilmgandhi 18:6a4db94011d3 55 */
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 /* Exported types ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 58 /** @defgroup UART_Exported_Types UART Exported Types
sahilmgandhi 18:6a4db94011d3 59 * @{
sahilmgandhi 18:6a4db94011d3 60 */
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 /**
sahilmgandhi 18:6a4db94011d3 63 * @brief UART Init Structure definition
sahilmgandhi 18:6a4db94011d3 64 */
sahilmgandhi 18:6a4db94011d3 65 typedef struct
sahilmgandhi 18:6a4db94011d3 66 {
sahilmgandhi 18:6a4db94011d3 67 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
sahilmgandhi 18:6a4db94011d3 68 The baud rate is computed using the following formula:
sahilmgandhi 18:6a4db94011d3 69 - IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate)))
sahilmgandhi 18:6a4db94011d3 70 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5
sahilmgandhi 18:6a4db94011d3 71 Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */
sahilmgandhi 18:6a4db94011d3 72
sahilmgandhi 18:6a4db94011d3 73 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
sahilmgandhi 18:6a4db94011d3 74 This parameter can be a value of @ref UART_Word_Length */
sahilmgandhi 18:6a4db94011d3 75
sahilmgandhi 18:6a4db94011d3 76 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
sahilmgandhi 18:6a4db94011d3 77 This parameter can be a value of @ref UART_Stop_Bits */
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 uint32_t Parity; /*!< Specifies the parity mode.
sahilmgandhi 18:6a4db94011d3 80 This parameter can be a value of @ref UART_Parity
sahilmgandhi 18:6a4db94011d3 81 @note When parity is enabled, the computed parity is inserted
sahilmgandhi 18:6a4db94011d3 82 at the MSB position of the transmitted data (9th bit when
sahilmgandhi 18:6a4db94011d3 83 the word length is set to 9 data bits; 8th bit when the
sahilmgandhi 18:6a4db94011d3 84 word length is set to 8 data bits). */
sahilmgandhi 18:6a4db94011d3 85
sahilmgandhi 18:6a4db94011d3 86 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
sahilmgandhi 18:6a4db94011d3 87 This parameter can be a value of @ref UART_Mode */
sahilmgandhi 18:6a4db94011d3 88
sahilmgandhi 18:6a4db94011d3 89 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
sahilmgandhi 18:6a4db94011d3 90 or disabled.
sahilmgandhi 18:6a4db94011d3 91 This parameter can be a value of @ref UART_Hardware_Flow_Control */
sahilmgandhi 18:6a4db94011d3 92
sahilmgandhi 18:6a4db94011d3 93 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
sahilmgandhi 18:6a4db94011d3 94 This parameter can be a value of @ref UART_Over_Sampling */
sahilmgandhi 18:6a4db94011d3 95 }UART_InitTypeDef;
sahilmgandhi 18:6a4db94011d3 96
sahilmgandhi 18:6a4db94011d3 97 /**
sahilmgandhi 18:6a4db94011d3 98 * @brief HAL UART State structures definition
sahilmgandhi 18:6a4db94011d3 99 * @note HAL UART State value is a combination of 2 different substates: gState and RxState.
sahilmgandhi 18:6a4db94011d3 100 * - gState contains UART state information related to global Handle management
sahilmgandhi 18:6a4db94011d3 101 * and also information related to Tx operations.
sahilmgandhi 18:6a4db94011d3 102 * gState value coding follow below described bitmap :
sahilmgandhi 18:6a4db94011d3 103 * b7-b6 Error information
sahilmgandhi 18:6a4db94011d3 104 * 00 : No Error
sahilmgandhi 18:6a4db94011d3 105 * 01 : (Not Used)
sahilmgandhi 18:6a4db94011d3 106 * 10 : Timeout
sahilmgandhi 18:6a4db94011d3 107 * 11 : Error
sahilmgandhi 18:6a4db94011d3 108 * b5 IP initilisation status
sahilmgandhi 18:6a4db94011d3 109 * 0 : Reset (IP not initialized)
sahilmgandhi 18:6a4db94011d3 110 * 1 : Init done (IP not initialized. HAL UART Init function already called)
sahilmgandhi 18:6a4db94011d3 111 * b4-b3 (not used)
sahilmgandhi 18:6a4db94011d3 112 * xx : Should be set to 00
sahilmgandhi 18:6a4db94011d3 113 * b2 Intrinsic process state
sahilmgandhi 18:6a4db94011d3 114 * 0 : Ready
sahilmgandhi 18:6a4db94011d3 115 * 1 : Busy (IP busy with some configuration or internal operations)
sahilmgandhi 18:6a4db94011d3 116 * b1 (not used)
sahilmgandhi 18:6a4db94011d3 117 * x : Should be set to 0
sahilmgandhi 18:6a4db94011d3 118 * b0 Tx state
sahilmgandhi 18:6a4db94011d3 119 * 0 : Ready (no Tx operation ongoing)
sahilmgandhi 18:6a4db94011d3 120 * 1 : Busy (Tx operation ongoing)
sahilmgandhi 18:6a4db94011d3 121 * - RxState contains information related to Rx operations.
sahilmgandhi 18:6a4db94011d3 122 * RxState value coding follow below described bitmap :
sahilmgandhi 18:6a4db94011d3 123 * b7-b6 (not used)
sahilmgandhi 18:6a4db94011d3 124 * xx : Should be set to 00
sahilmgandhi 18:6a4db94011d3 125 * b5 IP initilisation status
sahilmgandhi 18:6a4db94011d3 126 * 0 : Reset (IP not initialized)
sahilmgandhi 18:6a4db94011d3 127 * 1 : Init done (IP not initialized)
sahilmgandhi 18:6a4db94011d3 128 * b4-b2 (not used)
sahilmgandhi 18:6a4db94011d3 129 * xxx : Should be set to 000
sahilmgandhi 18:6a4db94011d3 130 * b1 Rx state
sahilmgandhi 18:6a4db94011d3 131 * 0 : Ready (no Rx operation ongoing)
sahilmgandhi 18:6a4db94011d3 132 * 1 : Busy (Rx operation ongoing)
sahilmgandhi 18:6a4db94011d3 133 * b0 (not used)
sahilmgandhi 18:6a4db94011d3 134 * x : Should be set to 0.
sahilmgandhi 18:6a4db94011d3 135 */
sahilmgandhi 18:6a4db94011d3 136 typedef enum
sahilmgandhi 18:6a4db94011d3 137 {
sahilmgandhi 18:6a4db94011d3 138 HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized
sahilmgandhi 18:6a4db94011d3 139 Value is allowed for gState and RxState */
sahilmgandhi 18:6a4db94011d3 140 HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
sahilmgandhi 18:6a4db94011d3 141 Value is allowed for gState and RxState */
sahilmgandhi 18:6a4db94011d3 142 HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
sahilmgandhi 18:6a4db94011d3 143 Value is allowed for gState only */
sahilmgandhi 18:6a4db94011d3 144 HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
sahilmgandhi 18:6a4db94011d3 145 Value is allowed for gState only */
sahilmgandhi 18:6a4db94011d3 146 HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
sahilmgandhi 18:6a4db94011d3 147 Value is allowed for RxState only */
sahilmgandhi 18:6a4db94011d3 148 HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
sahilmgandhi 18:6a4db94011d3 149 Not to be used for neither gState nor RxState.
sahilmgandhi 18:6a4db94011d3 150 Value is result of combination (Or) between gState and RxState values */
sahilmgandhi 18:6a4db94011d3 151 HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
sahilmgandhi 18:6a4db94011d3 152 Value is allowed for gState only */
sahilmgandhi 18:6a4db94011d3 153 HAL_UART_STATE_ERROR = 0xE0U /*!< Error
sahilmgandhi 18:6a4db94011d3 154 Value is allowed for gState only */
sahilmgandhi 18:6a4db94011d3 155 }HAL_UART_StateTypeDef;
sahilmgandhi 18:6a4db94011d3 156
sahilmgandhi 18:6a4db94011d3 157 /**
sahilmgandhi 18:6a4db94011d3 158 * @brief UART handle Structure definition
sahilmgandhi 18:6a4db94011d3 159 */
sahilmgandhi 18:6a4db94011d3 160 typedef struct
sahilmgandhi 18:6a4db94011d3 161 {
sahilmgandhi 18:6a4db94011d3 162 USART_TypeDef *Instance; /*!< UART registers base address */
sahilmgandhi 18:6a4db94011d3 163
sahilmgandhi 18:6a4db94011d3 164 UART_InitTypeDef Init; /*!< UART communication parameters */
sahilmgandhi 18:6a4db94011d3 165
sahilmgandhi 18:6a4db94011d3 166 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
sahilmgandhi 18:6a4db94011d3 167
sahilmgandhi 18:6a4db94011d3 168 uint16_t TxXferSize; /*!< UART Tx Transfer size */
sahilmgandhi 18:6a4db94011d3 169
sahilmgandhi 18:6a4db94011d3 170 uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
sahilmgandhi 18:6a4db94011d3 171
sahilmgandhi 18:6a4db94011d3 172 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
sahilmgandhi 18:6a4db94011d3 173
sahilmgandhi 18:6a4db94011d3 174 uint16_t RxXferSize; /*!< UART Rx Transfer size */
sahilmgandhi 18:6a4db94011d3 175
sahilmgandhi 18:6a4db94011d3 176 uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
sahilmgandhi 18:6a4db94011d3 177
sahilmgandhi 18:6a4db94011d3 178 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
sahilmgandhi 18:6a4db94011d3 179
sahilmgandhi 18:6a4db94011d3 180 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
sahilmgandhi 18:6a4db94011d3 181
sahilmgandhi 18:6a4db94011d3 182 HAL_LockTypeDef Lock; /*!< Locking object */
sahilmgandhi 18:6a4db94011d3 183
sahilmgandhi 18:6a4db94011d3 184 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
sahilmgandhi 18:6a4db94011d3 185 and also related to Tx operations.
sahilmgandhi 18:6a4db94011d3 186 This parameter can be a value of @ref HAL_UART_StateTypeDef */
sahilmgandhi 18:6a4db94011d3 187
sahilmgandhi 18:6a4db94011d3 188 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
sahilmgandhi 18:6a4db94011d3 189 This parameter can be a value of @ref HAL_UART_StateTypeDef */
sahilmgandhi 18:6a4db94011d3 190
sahilmgandhi 18:6a4db94011d3 191 __IO uint32_t ErrorCode; /*!< UART Error code */
sahilmgandhi 18:6a4db94011d3 192
sahilmgandhi 18:6a4db94011d3 193 }UART_HandleTypeDef;
sahilmgandhi 18:6a4db94011d3 194 /**
sahilmgandhi 18:6a4db94011d3 195 * @}
sahilmgandhi 18:6a4db94011d3 196 */
sahilmgandhi 18:6a4db94011d3 197
sahilmgandhi 18:6a4db94011d3 198 /* Exported constants --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 199 /** @defgroup UART_Exported_Constants UART Exported constants
sahilmgandhi 18:6a4db94011d3 200 * @{
sahilmgandhi 18:6a4db94011d3 201 */
sahilmgandhi 18:6a4db94011d3 202
sahilmgandhi 18:6a4db94011d3 203 /** @defgroup UART_Error_Code UART Error Code
sahilmgandhi 18:6a4db94011d3 204 * @brief UART Error Code
sahilmgandhi 18:6a4db94011d3 205 * @{
sahilmgandhi 18:6a4db94011d3 206 */
sahilmgandhi 18:6a4db94011d3 207 #define HAL_UART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
sahilmgandhi 18:6a4db94011d3 208 #define HAL_UART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */
sahilmgandhi 18:6a4db94011d3 209 #define HAL_UART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */
sahilmgandhi 18:6a4db94011d3 210 #define HAL_UART_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */
sahilmgandhi 18:6a4db94011d3 211 #define HAL_UART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */
sahilmgandhi 18:6a4db94011d3 212 #define HAL_UART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */
sahilmgandhi 18:6a4db94011d3 213 /**
sahilmgandhi 18:6a4db94011d3 214 * @}
sahilmgandhi 18:6a4db94011d3 215 */
sahilmgandhi 18:6a4db94011d3 216
sahilmgandhi 18:6a4db94011d3 217 /** @defgroup UART_Word_Length UART Word Length
sahilmgandhi 18:6a4db94011d3 218 * @{
sahilmgandhi 18:6a4db94011d3 219 */
sahilmgandhi 18:6a4db94011d3 220 #define UART_WORDLENGTH_8B ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 221 #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
sahilmgandhi 18:6a4db94011d3 222 /**
sahilmgandhi 18:6a4db94011d3 223 * @}
sahilmgandhi 18:6a4db94011d3 224 */
sahilmgandhi 18:6a4db94011d3 225
sahilmgandhi 18:6a4db94011d3 226 /** @defgroup UART_Stop_Bits UART Number of Stop Bits
sahilmgandhi 18:6a4db94011d3 227 * @{
sahilmgandhi 18:6a4db94011d3 228 */
sahilmgandhi 18:6a4db94011d3 229 #define UART_STOPBITS_1 ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 230 #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
sahilmgandhi 18:6a4db94011d3 231 /**
sahilmgandhi 18:6a4db94011d3 232 * @}
sahilmgandhi 18:6a4db94011d3 233 */
sahilmgandhi 18:6a4db94011d3 234
sahilmgandhi 18:6a4db94011d3 235 /** @defgroup UART_Parity UART Parity
sahilmgandhi 18:6a4db94011d3 236 * @{
sahilmgandhi 18:6a4db94011d3 237 */
sahilmgandhi 18:6a4db94011d3 238 #define UART_PARITY_NONE ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 239 #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
sahilmgandhi 18:6a4db94011d3 240 #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
sahilmgandhi 18:6a4db94011d3 241 /**
sahilmgandhi 18:6a4db94011d3 242 * @}
sahilmgandhi 18:6a4db94011d3 243 */
sahilmgandhi 18:6a4db94011d3 244
sahilmgandhi 18:6a4db94011d3 245 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
sahilmgandhi 18:6a4db94011d3 246 * @{
sahilmgandhi 18:6a4db94011d3 247 */
sahilmgandhi 18:6a4db94011d3 248 #define UART_HWCONTROL_NONE ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 249 #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
sahilmgandhi 18:6a4db94011d3 250 #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
sahilmgandhi 18:6a4db94011d3 251 #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE))
sahilmgandhi 18:6a4db94011d3 252 /**
sahilmgandhi 18:6a4db94011d3 253 * @}
sahilmgandhi 18:6a4db94011d3 254 */
sahilmgandhi 18:6a4db94011d3 255
sahilmgandhi 18:6a4db94011d3 256 /** @defgroup UART_Mode UART Transfer Mode
sahilmgandhi 18:6a4db94011d3 257 * @{
sahilmgandhi 18:6a4db94011d3 258 */
sahilmgandhi 18:6a4db94011d3 259 #define UART_MODE_RX ((uint32_t)USART_CR1_RE)
sahilmgandhi 18:6a4db94011d3 260 #define UART_MODE_TX ((uint32_t)USART_CR1_TE)
sahilmgandhi 18:6a4db94011d3 261 #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
sahilmgandhi 18:6a4db94011d3 262 /**
sahilmgandhi 18:6a4db94011d3 263 * @}
sahilmgandhi 18:6a4db94011d3 264 */
sahilmgandhi 18:6a4db94011d3 265
sahilmgandhi 18:6a4db94011d3 266 /** @defgroup UART_State UART State
sahilmgandhi 18:6a4db94011d3 267 * @{
sahilmgandhi 18:6a4db94011d3 268 */
sahilmgandhi 18:6a4db94011d3 269 #define UART_STATE_DISABLE ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 270 #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
sahilmgandhi 18:6a4db94011d3 271 /**
sahilmgandhi 18:6a4db94011d3 272 * @}
sahilmgandhi 18:6a4db94011d3 273 */
sahilmgandhi 18:6a4db94011d3 274
sahilmgandhi 18:6a4db94011d3 275 /** @defgroup UART_Over_Sampling UART Over Sampling
sahilmgandhi 18:6a4db94011d3 276 * @{
sahilmgandhi 18:6a4db94011d3 277 */
sahilmgandhi 18:6a4db94011d3 278 #define UART_OVERSAMPLING_16 ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 279 #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
sahilmgandhi 18:6a4db94011d3 280 /**
sahilmgandhi 18:6a4db94011d3 281 * @}
sahilmgandhi 18:6a4db94011d3 282 */
sahilmgandhi 18:6a4db94011d3 283
sahilmgandhi 18:6a4db94011d3 284 /** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length
sahilmgandhi 18:6a4db94011d3 285 * @{
sahilmgandhi 18:6a4db94011d3 286 */
sahilmgandhi 18:6a4db94011d3 287 #define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 288 #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)0x00000020U)
sahilmgandhi 18:6a4db94011d3 289 /**
sahilmgandhi 18:6a4db94011d3 290 * @}
sahilmgandhi 18:6a4db94011d3 291 */
sahilmgandhi 18:6a4db94011d3 292
sahilmgandhi 18:6a4db94011d3 293 /** @defgroup UART_WakeUp_functions UART Wakeup Functions
sahilmgandhi 18:6a4db94011d3 294 * @{
sahilmgandhi 18:6a4db94011d3 295 */
sahilmgandhi 18:6a4db94011d3 296 #define UART_WAKEUPMETHOD_IDLELINE ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 297 #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)0x00000800U)
sahilmgandhi 18:6a4db94011d3 298 /**
sahilmgandhi 18:6a4db94011d3 299 * @}
sahilmgandhi 18:6a4db94011d3 300 */
sahilmgandhi 18:6a4db94011d3 301
sahilmgandhi 18:6a4db94011d3 302 /** @defgroup UART_Flags UART FLags
sahilmgandhi 18:6a4db94011d3 303 * Elements values convention: 0xXXXX
sahilmgandhi 18:6a4db94011d3 304 * - 0xXXXX : Flag mask in the SR register
sahilmgandhi 18:6a4db94011d3 305 * @{
sahilmgandhi 18:6a4db94011d3 306 */
sahilmgandhi 18:6a4db94011d3 307 #define UART_FLAG_CTS ((uint32_t)USART_SR_CTS)
sahilmgandhi 18:6a4db94011d3 308 #define UART_FLAG_LBD ((uint32_t)USART_SR_LBD)
sahilmgandhi 18:6a4db94011d3 309 #define UART_FLAG_TXE ((uint32_t)USART_SR_TXE)
sahilmgandhi 18:6a4db94011d3 310 #define UART_FLAG_TC ((uint32_t)USART_SR_TC)
sahilmgandhi 18:6a4db94011d3 311 #define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE)
sahilmgandhi 18:6a4db94011d3 312 #define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE)
sahilmgandhi 18:6a4db94011d3 313 #define UART_FLAG_ORE ((uint32_t)USART_SR_ORE)
sahilmgandhi 18:6a4db94011d3 314 #define UART_FLAG_NE ((uint32_t)USART_SR_NE)
sahilmgandhi 18:6a4db94011d3 315 #define UART_FLAG_FE ((uint32_t)USART_SR_FE)
sahilmgandhi 18:6a4db94011d3 316 #define UART_FLAG_PE ((uint32_t)USART_SR_PE)
sahilmgandhi 18:6a4db94011d3 317 /**
sahilmgandhi 18:6a4db94011d3 318 * @}
sahilmgandhi 18:6a4db94011d3 319 */
sahilmgandhi 18:6a4db94011d3 320
sahilmgandhi 18:6a4db94011d3 321 /** @defgroup UART_Interrupt_definition UART Interrupt Definitions
sahilmgandhi 18:6a4db94011d3 322 * Elements values convention: 0xY000XXXX
sahilmgandhi 18:6a4db94011d3 323 * - XXXX : Interrupt mask (16 bits) in the Y register
sahilmgandhi 18:6a4db94011d3 324 * - Y : Interrupt source register (2bits)
sahilmgandhi 18:6a4db94011d3 325 * - 0001: CR1 register
sahilmgandhi 18:6a4db94011d3 326 * - 0010: CR2 register
sahilmgandhi 18:6a4db94011d3 327 * - 0011: CR3 register
sahilmgandhi 18:6a4db94011d3 328 *
sahilmgandhi 18:6a4db94011d3 329 * @{
sahilmgandhi 18:6a4db94011d3 330 */
sahilmgandhi 18:6a4db94011d3 331
sahilmgandhi 18:6a4db94011d3 332 #define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE))
sahilmgandhi 18:6a4db94011d3 333 #define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE))
sahilmgandhi 18:6a4db94011d3 334 #define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE))
sahilmgandhi 18:6a4db94011d3 335 #define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE))
sahilmgandhi 18:6a4db94011d3 336 #define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE))
sahilmgandhi 18:6a4db94011d3 337
sahilmgandhi 18:6a4db94011d3 338 #define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE))
sahilmgandhi 18:6a4db94011d3 339
sahilmgandhi 18:6a4db94011d3 340 #define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE))
sahilmgandhi 18:6a4db94011d3 341 #define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE))
sahilmgandhi 18:6a4db94011d3 342 /**
sahilmgandhi 18:6a4db94011d3 343 * @}
sahilmgandhi 18:6a4db94011d3 344 */
sahilmgandhi 18:6a4db94011d3 345
sahilmgandhi 18:6a4db94011d3 346 /**
sahilmgandhi 18:6a4db94011d3 347 * @}
sahilmgandhi 18:6a4db94011d3 348 */
sahilmgandhi 18:6a4db94011d3 349
sahilmgandhi 18:6a4db94011d3 350 /* Exported macro ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 351 /** @defgroup UART_Exported_Macros UART Exported Macros
sahilmgandhi 18:6a4db94011d3 352 * @{
sahilmgandhi 18:6a4db94011d3 353 */
sahilmgandhi 18:6a4db94011d3 354
sahilmgandhi 18:6a4db94011d3 355 /** @brief Reset UART handle gstate & RxState
sahilmgandhi 18:6a4db94011d3 356 * @param __HANDLE__: specifies the UART Handle.
sahilmgandhi 18:6a4db94011d3 357 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 358 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 359 * @retval None
sahilmgandhi 18:6a4db94011d3 360 */
sahilmgandhi 18:6a4db94011d3 361 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
sahilmgandhi 18:6a4db94011d3 362 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
sahilmgandhi 18:6a4db94011d3 363 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
sahilmgandhi 18:6a4db94011d3 364 } while(0)
sahilmgandhi 18:6a4db94011d3 365
sahilmgandhi 18:6a4db94011d3 366 /** @brief Flushes the UART DR register
sahilmgandhi 18:6a4db94011d3 367 * @param __HANDLE__: specifies the UART Handle.
sahilmgandhi 18:6a4db94011d3 368 */
sahilmgandhi 18:6a4db94011d3 369 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
sahilmgandhi 18:6a4db94011d3 370
sahilmgandhi 18:6a4db94011d3 371 /** @brief Checks whether the specified UART flag is set or not.
sahilmgandhi 18:6a4db94011d3 372 * @param __HANDLE__: specifies the UART Handle.
sahilmgandhi 18:6a4db94011d3 373 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 374 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 375 * @param __FLAG__: specifies the flag to check.
sahilmgandhi 18:6a4db94011d3 376 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 377 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
sahilmgandhi 18:6a4db94011d3 378 * @arg UART_FLAG_LBD: LIN Break detection flag
sahilmgandhi 18:6a4db94011d3 379 * @arg UART_FLAG_TXE: Transmit data register empty flag
sahilmgandhi 18:6a4db94011d3 380 * @arg UART_FLAG_TC: Transmission Complete flag
sahilmgandhi 18:6a4db94011d3 381 * @arg UART_FLAG_RXNE: Receive data register not empty flag
sahilmgandhi 18:6a4db94011d3 382 * @arg UART_FLAG_IDLE: Idle Line detection flag
sahilmgandhi 18:6a4db94011d3 383 * @arg UART_FLAG_ORE: Overrun Error flag
sahilmgandhi 18:6a4db94011d3 384 * @arg UART_FLAG_NE: Noise Error flag
sahilmgandhi 18:6a4db94011d3 385 * @arg UART_FLAG_FE: Framing Error flag
sahilmgandhi 18:6a4db94011d3 386 * @arg UART_FLAG_PE: Parity Error flag
sahilmgandhi 18:6a4db94011d3 387 * @retval The new state of __FLAG__ (TRUE or FALSE).
sahilmgandhi 18:6a4db94011d3 388 */
sahilmgandhi 18:6a4db94011d3 389
sahilmgandhi 18:6a4db94011d3 390 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
sahilmgandhi 18:6a4db94011d3 391
sahilmgandhi 18:6a4db94011d3 392 /** @brief Clears the specified UART pending flag.
sahilmgandhi 18:6a4db94011d3 393 * @param __HANDLE__: specifies the UART Handle.
sahilmgandhi 18:6a4db94011d3 394 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 395 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 396 * @param __FLAG__: specifies the flag to check.
sahilmgandhi 18:6a4db94011d3 397 * This parameter can be any combination of the following values:
sahilmgandhi 18:6a4db94011d3 398 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5).
sahilmgandhi 18:6a4db94011d3 399 * @arg UART_FLAG_LBD: LIN Break detection flag.
sahilmgandhi 18:6a4db94011d3 400 * @arg UART_FLAG_TC: Transmission Complete flag.
sahilmgandhi 18:6a4db94011d3 401 * @arg UART_FLAG_RXNE: Receive data register not empty flag.
sahilmgandhi 18:6a4db94011d3 402 *
sahilmgandhi 18:6a4db94011d3 403 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun
sahilmgandhi 18:6a4db94011d3 404 * error) and IDLE (Idle line detected) flags are cleared by software
sahilmgandhi 18:6a4db94011d3 405 * sequence: a read operation to USART_SR register followed by a read
sahilmgandhi 18:6a4db94011d3 406 * operation to USART_DR register.
sahilmgandhi 18:6a4db94011d3 407 * @note RXNE flag can be also cleared by a read to the USART_DR register.
sahilmgandhi 18:6a4db94011d3 408 * @note TC flag can be also cleared by software sequence: a read operation to
sahilmgandhi 18:6a4db94011d3 409 * USART_SR register followed by a write operation to USART_DR register.
sahilmgandhi 18:6a4db94011d3 410 * @note TXE flag is cleared only by a write to the USART_DR register.
sahilmgandhi 18:6a4db94011d3 411 *
sahilmgandhi 18:6a4db94011d3 412 * @retval None
sahilmgandhi 18:6a4db94011d3 413 */
sahilmgandhi 18:6a4db94011d3 414 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
sahilmgandhi 18:6a4db94011d3 415
sahilmgandhi 18:6a4db94011d3 416 /** @brief Clear the UART PE pending flag.
sahilmgandhi 18:6a4db94011d3 417 * @param __HANDLE__: specifies the UART Handle.
sahilmgandhi 18:6a4db94011d3 418 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 419 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 420 * @retval None
sahilmgandhi 18:6a4db94011d3 421 */
sahilmgandhi 18:6a4db94011d3 422 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \
sahilmgandhi 18:6a4db94011d3 423 do{ \
sahilmgandhi 18:6a4db94011d3 424 __IO uint32_t tmpreg = 0x00U; \
sahilmgandhi 18:6a4db94011d3 425 tmpreg = (__HANDLE__)->Instance->SR; \
sahilmgandhi 18:6a4db94011d3 426 tmpreg = (__HANDLE__)->Instance->DR; \
sahilmgandhi 18:6a4db94011d3 427 UNUSED(tmpreg); \
sahilmgandhi 18:6a4db94011d3 428 } while(0)
sahilmgandhi 18:6a4db94011d3 429
sahilmgandhi 18:6a4db94011d3 430 /** @brief Clear the UART FE pending flag.
sahilmgandhi 18:6a4db94011d3 431 * @param __HANDLE__: specifies the UART Handle.
sahilmgandhi 18:6a4db94011d3 432 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 433 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 434 * @retval None
sahilmgandhi 18:6a4db94011d3 435 */
sahilmgandhi 18:6a4db94011d3 436 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
sahilmgandhi 18:6a4db94011d3 437
sahilmgandhi 18:6a4db94011d3 438 /** @brief Clear the UART NE pending flag.
sahilmgandhi 18:6a4db94011d3 439 * @param __HANDLE__: specifies the UART Handle.
sahilmgandhi 18:6a4db94011d3 440 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 441 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 442 * @retval None
sahilmgandhi 18:6a4db94011d3 443 */
sahilmgandhi 18:6a4db94011d3 444 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
sahilmgandhi 18:6a4db94011d3 445
sahilmgandhi 18:6a4db94011d3 446 /** @brief Clear the UART ORE pending flag.
sahilmgandhi 18:6a4db94011d3 447 * @param __HANDLE__: specifies the UART Handle.
sahilmgandhi 18:6a4db94011d3 448 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 449 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 450 * @retval None
sahilmgandhi 18:6a4db94011d3 451 */
sahilmgandhi 18:6a4db94011d3 452 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
sahilmgandhi 18:6a4db94011d3 453
sahilmgandhi 18:6a4db94011d3 454 /** @brief Clear the UART IDLE pending flag.
sahilmgandhi 18:6a4db94011d3 455 * @param __HANDLE__: specifies the UART Handle.
sahilmgandhi 18:6a4db94011d3 456 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 457 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 458 * @retval None
sahilmgandhi 18:6a4db94011d3 459 */
sahilmgandhi 18:6a4db94011d3 460 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
sahilmgandhi 18:6a4db94011d3 461
sahilmgandhi 18:6a4db94011d3 462 /** @brief Enable the specified UART interrupt.
sahilmgandhi 18:6a4db94011d3 463 * @param __HANDLE__: specifies the UART Handle.
sahilmgandhi 18:6a4db94011d3 464 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 465 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 466 * @param __INTERRUPT__: specifies the UART interrupt source to enable.
sahilmgandhi 18:6a4db94011d3 467 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 468 * @arg UART_IT_CTS: CTS change interrupt
sahilmgandhi 18:6a4db94011d3 469 * @arg UART_IT_LBD: LIN Break detection interrupt
sahilmgandhi 18:6a4db94011d3 470 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
sahilmgandhi 18:6a4db94011d3 471 * @arg UART_IT_TC: Transmission complete interrupt
sahilmgandhi 18:6a4db94011d3 472 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
sahilmgandhi 18:6a4db94011d3 473 * @arg UART_IT_IDLE: Idle line detection interrupt
sahilmgandhi 18:6a4db94011d3 474 * @arg UART_IT_PE: Parity Error interrupt
sahilmgandhi 18:6a4db94011d3 475 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
sahilmgandhi 18:6a4db94011d3 476 * @retval None
sahilmgandhi 18:6a4db94011d3 477 */
sahilmgandhi 18:6a4db94011d3 478 #define UART_IT_MASK ((uint32_t)0x0000FFFFU)
sahilmgandhi 18:6a4db94011d3 479 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \
sahilmgandhi 18:6a4db94011d3 480 (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \
sahilmgandhi 18:6a4db94011d3 481 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK)))
sahilmgandhi 18:6a4db94011d3 482 /** @brief Disable the specified UART interrupt.
sahilmgandhi 18:6a4db94011d3 483 * @param __HANDLE__: specifies the UART Handle.
sahilmgandhi 18:6a4db94011d3 484 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 485 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 486 * @param __INTERRUPT__: specifies the UART interrupt source to disable.
sahilmgandhi 18:6a4db94011d3 487 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 488 * @arg UART_IT_CTS: CTS change interrupt
sahilmgandhi 18:6a4db94011d3 489 * @arg UART_IT_LBD: LIN Break detection interrupt
sahilmgandhi 18:6a4db94011d3 490 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
sahilmgandhi 18:6a4db94011d3 491 * @arg UART_IT_TC: Transmission complete interrupt
sahilmgandhi 18:6a4db94011d3 492 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
sahilmgandhi 18:6a4db94011d3 493 * @arg UART_IT_IDLE: Idle line detection interrupt
sahilmgandhi 18:6a4db94011d3 494 * @arg UART_IT_PE: Parity Error interrupt
sahilmgandhi 18:6a4db94011d3 495 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
sahilmgandhi 18:6a4db94011d3 496 * @retval None
sahilmgandhi 18:6a4db94011d3 497 */
sahilmgandhi 18:6a4db94011d3 498 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
sahilmgandhi 18:6a4db94011d3 499 (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
sahilmgandhi 18:6a4db94011d3 500 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK)))
sahilmgandhi 18:6a4db94011d3 501
sahilmgandhi 18:6a4db94011d3 502 /** @brief Checks whether the specified UART interrupt has occurred or not.
sahilmgandhi 18:6a4db94011d3 503 * @param __HANDLE__: specifies the UART Handle.
sahilmgandhi 18:6a4db94011d3 504 * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 505 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 506 * @param __IT__: specifies the UART interrupt source to check.
sahilmgandhi 18:6a4db94011d3 507 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 508 * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
sahilmgandhi 18:6a4db94011d3 509 * @arg UART_IT_LBD: LIN Break detection interrupt
sahilmgandhi 18:6a4db94011d3 510 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
sahilmgandhi 18:6a4db94011d3 511 * @arg UART_IT_TC: Transmission complete interrupt
sahilmgandhi 18:6a4db94011d3 512 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
sahilmgandhi 18:6a4db94011d3 513 * @arg UART_IT_IDLE: Idle line detection interrupt
sahilmgandhi 18:6a4db94011d3 514 * @arg USART_IT_ERR: Error interrupt
sahilmgandhi 18:6a4db94011d3 515 * @retval The new state of __IT__ (TRUE or FALSE).
sahilmgandhi 18:6a4db94011d3 516 */
sahilmgandhi 18:6a4db94011d3 517 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == 2U)? \
sahilmgandhi 18:6a4db94011d3 518 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK))
sahilmgandhi 18:6a4db94011d3 519
sahilmgandhi 18:6a4db94011d3 520 /** @brief Enable CTS flow control
sahilmgandhi 18:6a4db94011d3 521 * This macro allows to enable CTS hardware flow control for a given UART instance,
sahilmgandhi 18:6a4db94011d3 522 * without need to call HAL_UART_Init() function.
sahilmgandhi 18:6a4db94011d3 523 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
sahilmgandhi 18:6a4db94011d3 524 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
sahilmgandhi 18:6a4db94011d3 525 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
sahilmgandhi 18:6a4db94011d3 526 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
sahilmgandhi 18:6a4db94011d3 527 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
sahilmgandhi 18:6a4db94011d3 528 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
sahilmgandhi 18:6a4db94011d3 529 * @param __HANDLE__: specifies the UART Handle.
sahilmgandhi 18:6a4db94011d3 530 * The Handle Instance can be USART1, USART2 or LPUART.
sahilmgandhi 18:6a4db94011d3 531 * @retval None
sahilmgandhi 18:6a4db94011d3 532 */
sahilmgandhi 18:6a4db94011d3 533 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
sahilmgandhi 18:6a4db94011d3 534 do{ \
sahilmgandhi 18:6a4db94011d3 535 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
sahilmgandhi 18:6a4db94011d3 536 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
sahilmgandhi 18:6a4db94011d3 537 } while(0)
sahilmgandhi 18:6a4db94011d3 538
sahilmgandhi 18:6a4db94011d3 539 /** @brief Disable CTS flow control
sahilmgandhi 18:6a4db94011d3 540 * This macro allows to disable CTS hardware flow control for a given UART instance,
sahilmgandhi 18:6a4db94011d3 541 * without need to call HAL_UART_Init() function.
sahilmgandhi 18:6a4db94011d3 542 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
sahilmgandhi 18:6a4db94011d3 543 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
sahilmgandhi 18:6a4db94011d3 544 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
sahilmgandhi 18:6a4db94011d3 545 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
sahilmgandhi 18:6a4db94011d3 546 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
sahilmgandhi 18:6a4db94011d3 547 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
sahilmgandhi 18:6a4db94011d3 548 * @param __HANDLE__: specifies the UART Handle.
sahilmgandhi 18:6a4db94011d3 549 * The Handle Instance can be USART1, USART2 or LPUART.
sahilmgandhi 18:6a4db94011d3 550 * @retval None
sahilmgandhi 18:6a4db94011d3 551 */
sahilmgandhi 18:6a4db94011d3 552 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
sahilmgandhi 18:6a4db94011d3 553 do{ \
sahilmgandhi 18:6a4db94011d3 554 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
sahilmgandhi 18:6a4db94011d3 555 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
sahilmgandhi 18:6a4db94011d3 556 } while(0)
sahilmgandhi 18:6a4db94011d3 557
sahilmgandhi 18:6a4db94011d3 558 /** @brief Enable RTS flow control
sahilmgandhi 18:6a4db94011d3 559 * This macro allows to enable RTS hardware flow control for a given UART instance,
sahilmgandhi 18:6a4db94011d3 560 * without need to call HAL_UART_Init() function.
sahilmgandhi 18:6a4db94011d3 561 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
sahilmgandhi 18:6a4db94011d3 562 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
sahilmgandhi 18:6a4db94011d3 563 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
sahilmgandhi 18:6a4db94011d3 564 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
sahilmgandhi 18:6a4db94011d3 565 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
sahilmgandhi 18:6a4db94011d3 566 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
sahilmgandhi 18:6a4db94011d3 567 * @param __HANDLE__: specifies the UART Handle.
sahilmgandhi 18:6a4db94011d3 568 * The Handle Instance can be USART1, USART2 or LPUART.
sahilmgandhi 18:6a4db94011d3 569 * @retval None
sahilmgandhi 18:6a4db94011d3 570 */
sahilmgandhi 18:6a4db94011d3 571 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
sahilmgandhi 18:6a4db94011d3 572 do{ \
sahilmgandhi 18:6a4db94011d3 573 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
sahilmgandhi 18:6a4db94011d3 574 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
sahilmgandhi 18:6a4db94011d3 575 } while(0)
sahilmgandhi 18:6a4db94011d3 576
sahilmgandhi 18:6a4db94011d3 577 /** @brief Disable RTS flow control
sahilmgandhi 18:6a4db94011d3 578 * This macro allows to disable RTS hardware flow control for a given UART instance,
sahilmgandhi 18:6a4db94011d3 579 * without need to call HAL_UART_Init() function.
sahilmgandhi 18:6a4db94011d3 580 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
sahilmgandhi 18:6a4db94011d3 581 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
sahilmgandhi 18:6a4db94011d3 582 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
sahilmgandhi 18:6a4db94011d3 583 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
sahilmgandhi 18:6a4db94011d3 584 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
sahilmgandhi 18:6a4db94011d3 585 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
sahilmgandhi 18:6a4db94011d3 586 * @param __HANDLE__: specifies the UART Handle.
sahilmgandhi 18:6a4db94011d3 587 * The Handle Instance can be USART1, USART2 or LPUART.
sahilmgandhi 18:6a4db94011d3 588 * @retval None
sahilmgandhi 18:6a4db94011d3 589 */
sahilmgandhi 18:6a4db94011d3 590 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
sahilmgandhi 18:6a4db94011d3 591 do{ \
sahilmgandhi 18:6a4db94011d3 592 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
sahilmgandhi 18:6a4db94011d3 593 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
sahilmgandhi 18:6a4db94011d3 594 } while(0)
sahilmgandhi 18:6a4db94011d3 595
sahilmgandhi 18:6a4db94011d3 596 /** @brief macros to enables the UART's one bit sample method
sahilmgandhi 18:6a4db94011d3 597 * @param __HANDLE__: specifies the UART Handle.
sahilmgandhi 18:6a4db94011d3 598 * @retval None
sahilmgandhi 18:6a4db94011d3 599 */
sahilmgandhi 18:6a4db94011d3 600 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
sahilmgandhi 18:6a4db94011d3 601
sahilmgandhi 18:6a4db94011d3 602 /** @brief macros to disables the UART's one bit sample method
sahilmgandhi 18:6a4db94011d3 603 * @param __HANDLE__: specifies the UART Handle.
sahilmgandhi 18:6a4db94011d3 604 * @retval None
sahilmgandhi 18:6a4db94011d3 605 */
sahilmgandhi 18:6a4db94011d3 606 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
sahilmgandhi 18:6a4db94011d3 607
sahilmgandhi 18:6a4db94011d3 608 /** @brief Enable UART
sahilmgandhi 18:6a4db94011d3 609 * @param __HANDLE__: specifies the UART Handle.
sahilmgandhi 18:6a4db94011d3 610 * @retval None
sahilmgandhi 18:6a4db94011d3 611 */
sahilmgandhi 18:6a4db94011d3 612 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
sahilmgandhi 18:6a4db94011d3 613
sahilmgandhi 18:6a4db94011d3 614 /** @brief Disable UART
sahilmgandhi 18:6a4db94011d3 615 * @param __HANDLE__: specifies the UART Handle.
sahilmgandhi 18:6a4db94011d3 616 * @retval None
sahilmgandhi 18:6a4db94011d3 617 */
sahilmgandhi 18:6a4db94011d3 618 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
sahilmgandhi 18:6a4db94011d3 619 /**
sahilmgandhi 18:6a4db94011d3 620 * @}
sahilmgandhi 18:6a4db94011d3 621 */
sahilmgandhi 18:6a4db94011d3 622
sahilmgandhi 18:6a4db94011d3 623 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 624 /** @addtogroup UART_Exported_Functions
sahilmgandhi 18:6a4db94011d3 625 * @{
sahilmgandhi 18:6a4db94011d3 626 */
sahilmgandhi 18:6a4db94011d3 627
sahilmgandhi 18:6a4db94011d3 628 /** @addtogroup UART_Exported_Functions_Group1
sahilmgandhi 18:6a4db94011d3 629 * @{
sahilmgandhi 18:6a4db94011d3 630 */
sahilmgandhi 18:6a4db94011d3 631 /* Initialization/de-initialization functions **********************************/
sahilmgandhi 18:6a4db94011d3 632 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
sahilmgandhi 18:6a4db94011d3 633 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
sahilmgandhi 18:6a4db94011d3 634 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
sahilmgandhi 18:6a4db94011d3 635 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
sahilmgandhi 18:6a4db94011d3 636 HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
sahilmgandhi 18:6a4db94011d3 637 void HAL_UART_MspInit(UART_HandleTypeDef *huart);
sahilmgandhi 18:6a4db94011d3 638 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
sahilmgandhi 18:6a4db94011d3 639 /**
sahilmgandhi 18:6a4db94011d3 640 * @}
sahilmgandhi 18:6a4db94011d3 641 */
sahilmgandhi 18:6a4db94011d3 642
sahilmgandhi 18:6a4db94011d3 643 /** @addtogroup UART_Exported_Functions_Group2
sahilmgandhi 18:6a4db94011d3 644 * @{
sahilmgandhi 18:6a4db94011d3 645 */
sahilmgandhi 18:6a4db94011d3 646 /* IO operation functions *******************************************************/
sahilmgandhi 18:6a4db94011d3 647 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 648 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 649 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 650 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 651 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 652 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 653 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
sahilmgandhi 18:6a4db94011d3 654 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
sahilmgandhi 18:6a4db94011d3 655 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
sahilmgandhi 18:6a4db94011d3 656
sahilmgandhi 18:6a4db94011d3 657 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
sahilmgandhi 18:6a4db94011d3 658 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
sahilmgandhi 18:6a4db94011d3 659 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
sahilmgandhi 18:6a4db94011d3 660 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
sahilmgandhi 18:6a4db94011d3 661 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
sahilmgandhi 18:6a4db94011d3 662 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
sahilmgandhi 18:6a4db94011d3 663 /**
sahilmgandhi 18:6a4db94011d3 664 * @}
sahilmgandhi 18:6a4db94011d3 665 */
sahilmgandhi 18:6a4db94011d3 666
sahilmgandhi 18:6a4db94011d3 667 /** @addtogroup UART_Exported_Functions_Group3
sahilmgandhi 18:6a4db94011d3 668 * @{
sahilmgandhi 18:6a4db94011d3 669 */
sahilmgandhi 18:6a4db94011d3 670 /* Peripheral Control functions ************************************************/
sahilmgandhi 18:6a4db94011d3 671 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
sahilmgandhi 18:6a4db94011d3 672 HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
sahilmgandhi 18:6a4db94011d3 673 HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart);
sahilmgandhi 18:6a4db94011d3 674 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
sahilmgandhi 18:6a4db94011d3 675 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
sahilmgandhi 18:6a4db94011d3 676 /**
sahilmgandhi 18:6a4db94011d3 677 * @}
sahilmgandhi 18:6a4db94011d3 678 */
sahilmgandhi 18:6a4db94011d3 679
sahilmgandhi 18:6a4db94011d3 680 /** @addtogroup UART_Exported_Functions_Group4
sahilmgandhi 18:6a4db94011d3 681 * @{
sahilmgandhi 18:6a4db94011d3 682 */
sahilmgandhi 18:6a4db94011d3 683 /* Peripheral State functions **************************************************/
sahilmgandhi 18:6a4db94011d3 684 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
sahilmgandhi 18:6a4db94011d3 685 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
sahilmgandhi 18:6a4db94011d3 686 /**
sahilmgandhi 18:6a4db94011d3 687 * @}
sahilmgandhi 18:6a4db94011d3 688 */
sahilmgandhi 18:6a4db94011d3 689
sahilmgandhi 18:6a4db94011d3 690 /**
sahilmgandhi 18:6a4db94011d3 691 * @}
sahilmgandhi 18:6a4db94011d3 692 */
sahilmgandhi 18:6a4db94011d3 693 /* Private types -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 694 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 695 /* Private constants ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 696 /** @defgroup UART_Private_Constants UART Private Constants
sahilmgandhi 18:6a4db94011d3 697 * @{
sahilmgandhi 18:6a4db94011d3 698 */
sahilmgandhi 18:6a4db94011d3 699 /** @brief UART interruptions flag mask
sahilmgandhi 18:6a4db94011d3 700 *
sahilmgandhi 18:6a4db94011d3 701 */
sahilmgandhi 18:6a4db94011d3 702 #define UART_CR1_REG_INDEX 1U
sahilmgandhi 18:6a4db94011d3 703 #define UART_CR2_REG_INDEX 2U
sahilmgandhi 18:6a4db94011d3 704 #define UART_CR3_REG_INDEX 3U
sahilmgandhi 18:6a4db94011d3 705 /**
sahilmgandhi 18:6a4db94011d3 706 * @}
sahilmgandhi 18:6a4db94011d3 707 */
sahilmgandhi 18:6a4db94011d3 708
sahilmgandhi 18:6a4db94011d3 709 /* Private macros ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 710 /** @defgroup UART_Private_Macros UART Private Macros
sahilmgandhi 18:6a4db94011d3 711 * @{
sahilmgandhi 18:6a4db94011d3 712 */
sahilmgandhi 18:6a4db94011d3 713 #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \
sahilmgandhi 18:6a4db94011d3 714 ((LENGTH) == UART_WORDLENGTH_9B))
sahilmgandhi 18:6a4db94011d3 715 #define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B))
sahilmgandhi 18:6a4db94011d3 716 #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \
sahilmgandhi 18:6a4db94011d3 717 ((STOPBITS) == UART_STOPBITS_2))
sahilmgandhi 18:6a4db94011d3 718 #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \
sahilmgandhi 18:6a4db94011d3 719 ((PARITY) == UART_PARITY_EVEN) || \
sahilmgandhi 18:6a4db94011d3 720 ((PARITY) == UART_PARITY_ODD))
sahilmgandhi 18:6a4db94011d3 721 #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
sahilmgandhi 18:6a4db94011d3 722 (((CONTROL) == UART_HWCONTROL_NONE) || \
sahilmgandhi 18:6a4db94011d3 723 ((CONTROL) == UART_HWCONTROL_RTS) || \
sahilmgandhi 18:6a4db94011d3 724 ((CONTROL) == UART_HWCONTROL_CTS) || \
sahilmgandhi 18:6a4db94011d3 725 ((CONTROL) == UART_HWCONTROL_RTS_CTS))
sahilmgandhi 18:6a4db94011d3 726 #define IS_UART_MODE(MODE) ((((MODE) & (uint32_t)0x0000FFF3U) == 0x00U) && ((MODE) != (uint32_t)0x00U))
sahilmgandhi 18:6a4db94011d3 727 #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \
sahilmgandhi 18:6a4db94011d3 728 ((STATE) == UART_STATE_ENABLE))
sahilmgandhi 18:6a4db94011d3 729 #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \
sahilmgandhi 18:6a4db94011d3 730 ((SAMPLING) == UART_OVERSAMPLING_8))
sahilmgandhi 18:6a4db94011d3 731 #define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16))
sahilmgandhi 18:6a4db94011d3 732 #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \
sahilmgandhi 18:6a4db94011d3 733 ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
sahilmgandhi 18:6a4db94011d3 734 #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \
sahilmgandhi 18:6a4db94011d3 735 ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK))
sahilmgandhi 18:6a4db94011d3 736 #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 10500001U)
sahilmgandhi 18:6a4db94011d3 737 #define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU)
sahilmgandhi 18:6a4db94011d3 738
sahilmgandhi 18:6a4db94011d3 739 #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_)))
sahilmgandhi 18:6a4db94011d3 740 #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U)
sahilmgandhi 18:6a4db94011d3 741 #define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U + 50U) / 100U)
sahilmgandhi 18:6a4db94011d3 742 /* UART BRR = mantissa + overflow + fraction
sahilmgandhi 18:6a4db94011d3 743 = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */
sahilmgandhi 18:6a4db94011d3 744 #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \
sahilmgandhi 18:6a4db94011d3 745 (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U)) + \
sahilmgandhi 18:6a4db94011d3 746 (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU))
sahilmgandhi 18:6a4db94011d3 747
sahilmgandhi 18:6a4db94011d3 748 #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_)))
sahilmgandhi 18:6a4db94011d3 749 #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U)
sahilmgandhi 18:6a4db94011d3 750 #define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U + 50U) / 100U)
sahilmgandhi 18:6a4db94011d3 751 /* UART BRR = mantissa + overflow + fraction
sahilmgandhi 18:6a4db94011d3 752 = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */
sahilmgandhi 18:6a4db94011d3 753 #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \
sahilmgandhi 18:6a4db94011d3 754 ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \
sahilmgandhi 18:6a4db94011d3 755 (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U))
sahilmgandhi 18:6a4db94011d3 756
sahilmgandhi 18:6a4db94011d3 757 /**
sahilmgandhi 18:6a4db94011d3 758 * @}
sahilmgandhi 18:6a4db94011d3 759 */
sahilmgandhi 18:6a4db94011d3 760
sahilmgandhi 18:6a4db94011d3 761 /* Private functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 762 /** @defgroup UART_Private_Functions UART Private Functions
sahilmgandhi 18:6a4db94011d3 763 * @{
sahilmgandhi 18:6a4db94011d3 764 */
sahilmgandhi 18:6a4db94011d3 765
sahilmgandhi 18:6a4db94011d3 766 /**
sahilmgandhi 18:6a4db94011d3 767 * @}
sahilmgandhi 18:6a4db94011d3 768 */
sahilmgandhi 18:6a4db94011d3 769
sahilmgandhi 18:6a4db94011d3 770 /**
sahilmgandhi 18:6a4db94011d3 771 * @}
sahilmgandhi 18:6a4db94011d3 772 */
sahilmgandhi 18:6a4db94011d3 773
sahilmgandhi 18:6a4db94011d3 774 /**
sahilmgandhi 18:6a4db94011d3 775 * @}
sahilmgandhi 18:6a4db94011d3 776 */
sahilmgandhi 18:6a4db94011d3 777
sahilmgandhi 18:6a4db94011d3 778 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 779 }
sahilmgandhi 18:6a4db94011d3 780 #endif
sahilmgandhi 18:6a4db94011d3 781
sahilmgandhi 18:6a4db94011d3 782 #endif /* __STM32F4xx_HAL_UART_H */
sahilmgandhi 18:6a4db94011d3 783
sahilmgandhi 18:6a4db94011d3 784 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/