Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f4xx_hal_tim_ex.h
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.5.0
sahilmgandhi 18:6a4db94011d3 6 * @date 06-May-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief Header file of TIM HAL Extension module.
sahilmgandhi 18:6a4db94011d3 8 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 9 * @attention
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 12 *
sahilmgandhi 18:6a4db94011d3 13 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 14 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 15 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 16 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 18 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 19 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 21 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 22 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 23 *
sahilmgandhi 18:6a4db94011d3 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 34 *
sahilmgandhi 18:6a4db94011d3 35 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 36 */
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 /* Define to prevent recursive inclusion -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 39 #ifndef __STM32F4xx_HAL_TIM_EX_H
sahilmgandhi 18:6a4db94011d3 40 #define __STM32F4xx_HAL_TIM_EX_H
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 43 extern "C" {
sahilmgandhi 18:6a4db94011d3 44 #endif
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 47 #include "stm32f4xx_hal_def.h"
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 /** @addtogroup STM32F4xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 50 * @{
sahilmgandhi 18:6a4db94011d3 51 */
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 /** @addtogroup TIMEx
sahilmgandhi 18:6a4db94011d3 54 * @{
sahilmgandhi 18:6a4db94011d3 55 */
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 /* Exported types ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 58 /** @defgroup TIMEx_Exported_Types TIM Exported Types
sahilmgandhi 18:6a4db94011d3 59 * @{
sahilmgandhi 18:6a4db94011d3 60 */
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 /**
sahilmgandhi 18:6a4db94011d3 63 * @brief TIM Hall sensor Configuration Structure definition
sahilmgandhi 18:6a4db94011d3 64 */
sahilmgandhi 18:6a4db94011d3 65
sahilmgandhi 18:6a4db94011d3 66 typedef struct
sahilmgandhi 18:6a4db94011d3 67 {
sahilmgandhi 18:6a4db94011d3 68
sahilmgandhi 18:6a4db94011d3 69 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
sahilmgandhi 18:6a4db94011d3 70 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
sahilmgandhi 18:6a4db94011d3 71
sahilmgandhi 18:6a4db94011d3 72 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
sahilmgandhi 18:6a4db94011d3 73 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 uint32_t IC1Filter; /*!< Specifies the input capture filter.
sahilmgandhi 18:6a4db94011d3 76 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
sahilmgandhi 18:6a4db94011d3 77
sahilmgandhi 18:6a4db94011d3 78 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
sahilmgandhi 18:6a4db94011d3 79 This parameter can be a number between Min_Data = 0x0000U and Max_Data = 0xFFFFU */
sahilmgandhi 18:6a4db94011d3 80 } TIM_HallSensor_InitTypeDef;
sahilmgandhi 18:6a4db94011d3 81
sahilmgandhi 18:6a4db94011d3 82 /**
sahilmgandhi 18:6a4db94011d3 83 * @brief TIM Master configuration Structure definition
sahilmgandhi 18:6a4db94011d3 84 */
sahilmgandhi 18:6a4db94011d3 85 typedef struct {
sahilmgandhi 18:6a4db94011d3 86 uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection.
sahilmgandhi 18:6a4db94011d3 87 This parameter can be a value of @ref TIM_Master_Mode_Selection */
sahilmgandhi 18:6a4db94011d3 88
sahilmgandhi 18:6a4db94011d3 89 uint32_t MasterSlaveMode; /*!< Master/slave mode selection.
sahilmgandhi 18:6a4db94011d3 90 This parameter can be a value of @ref TIM_Master_Slave_Mode */
sahilmgandhi 18:6a4db94011d3 91 }TIM_MasterConfigTypeDef;
sahilmgandhi 18:6a4db94011d3 92
sahilmgandhi 18:6a4db94011d3 93 /**
sahilmgandhi 18:6a4db94011d3 94 * @brief TIM Break and Dead time configuration Structure definition
sahilmgandhi 18:6a4db94011d3 95 */
sahilmgandhi 18:6a4db94011d3 96 typedef struct
sahilmgandhi 18:6a4db94011d3 97 {
sahilmgandhi 18:6a4db94011d3 98 uint32_t OffStateRunMode; /*!< TIM off state in run mode.
sahilmgandhi 18:6a4db94011d3 99 This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
sahilmgandhi 18:6a4db94011d3 100 uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode.
sahilmgandhi 18:6a4db94011d3 101 This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
sahilmgandhi 18:6a4db94011d3 102 uint32_t LockLevel; /*!< TIM Lock level.
sahilmgandhi 18:6a4db94011d3 103 This parameter can be a value of @ref TIM_Lock_level */
sahilmgandhi 18:6a4db94011d3 104 uint32_t DeadTime; /*!< TIM dead Time.
sahilmgandhi 18:6a4db94011d3 105 This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
sahilmgandhi 18:6a4db94011d3 106 uint32_t BreakState; /*!< TIM Break State.
sahilmgandhi 18:6a4db94011d3 107 This parameter can be a value of @ref TIM_Break_Input_enable_disable */
sahilmgandhi 18:6a4db94011d3 108 uint32_t BreakPolarity; /*!< TIM Break input polarity.
sahilmgandhi 18:6a4db94011d3 109 This parameter can be a value of @ref TIM_Break_Polarity */
sahilmgandhi 18:6a4db94011d3 110 uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state.
sahilmgandhi 18:6a4db94011d3 111 This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
sahilmgandhi 18:6a4db94011d3 112 }TIM_BreakDeadTimeConfigTypeDef;
sahilmgandhi 18:6a4db94011d3 113 /**
sahilmgandhi 18:6a4db94011d3 114 * @}
sahilmgandhi 18:6a4db94011d3 115 */
sahilmgandhi 18:6a4db94011d3 116
sahilmgandhi 18:6a4db94011d3 117 /* Exported constants --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 118 /** @defgroup TIMEx_Exported_Constants TIM Exported Constants
sahilmgandhi 18:6a4db94011d3 119 * @{
sahilmgandhi 18:6a4db94011d3 120 */
sahilmgandhi 18:6a4db94011d3 121
sahilmgandhi 18:6a4db94011d3 122 /** @defgroup TIMEx_Remap TIM Remap
sahilmgandhi 18:6a4db94011d3 123 * @{
sahilmgandhi 18:6a4db94011d3 124 */
sahilmgandhi 18:6a4db94011d3 125 #define TIM_TIM2_TIM8_TRGO (0x00000000U)
sahilmgandhi 18:6a4db94011d3 126 #define TIM_TIM2_ETH_PTP (0x00000400U)
sahilmgandhi 18:6a4db94011d3 127 #define TIM_TIM2_USBFS_SOF (0x00000800U)
sahilmgandhi 18:6a4db94011d3 128 #define TIM_TIM2_USBHS_SOF (0x00000C00U)
sahilmgandhi 18:6a4db94011d3 129 #define TIM_TIM5_GPIO (0x00000000U)
sahilmgandhi 18:6a4db94011d3 130 #define TIM_TIM5_LSI (0x00000040U)
sahilmgandhi 18:6a4db94011d3 131 #define TIM_TIM5_LSE (0x00000080U)
sahilmgandhi 18:6a4db94011d3 132 #define TIM_TIM5_RTC (0x000000C0U)
sahilmgandhi 18:6a4db94011d3 133 #define TIM_TIM11_GPIO (0x00000000U)
sahilmgandhi 18:6a4db94011d3 134 #define TIM_TIM11_HSE (0x00000002U)
sahilmgandhi 18:6a4db94011d3 135
sahilmgandhi 18:6a4db94011d3 136 #if defined (STM32F446xx)
sahilmgandhi 18:6a4db94011d3 137 #define TIM_TIM11_SPDIFRX (0x00000001U)
sahilmgandhi 18:6a4db94011d3 138 #endif /* STM32F446xx */
sahilmgandhi 18:6a4db94011d3 139 /**
sahilmgandhi 18:6a4db94011d3 140 * @}
sahilmgandhi 18:6a4db94011d3 141 */
sahilmgandhi 18:6a4db94011d3 142
sahilmgandhi 18:6a4db94011d3 143 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
sahilmgandhi 18:6a4db94011d3 144 /** @defgroup TIMEx_SystemBreakInput TIM System Break Input
sahilmgandhi 18:6a4db94011d3 145 * @{
sahilmgandhi 18:6a4db94011d3 146 */
sahilmgandhi 18:6a4db94011d3 147 #define TIM_SYSTEMBREAKINPUT_HARDFAULT ((uint32_t)0x00000001U) /* Core Lockup lock output(Hardfault) is connected to Break Input of TIM1 and TIM8 */
sahilmgandhi 18:6a4db94011d3 148 #define TIM_SYSTEMBREAKINPUT_PVD ((uint32_t)0x00000004U) /* PVD Interrupt is connected to Break Input of TIM1 and TIM8 */
sahilmgandhi 18:6a4db94011d3 149 #define TIM_SYSTEMBREAKINPUT_HARDFAULT_PVD ((uint32_t)0x00000005U) /* Core Lockup lock output(Hardfault) and PVD Interrupt are connected to Break Input of TIM1 and TIM8 */
sahilmgandhi 18:6a4db94011d3 150 /**
sahilmgandhi 18:6a4db94011d3 151 * @}
sahilmgandhi 18:6a4db94011d3 152 */
sahilmgandhi 18:6a4db94011d3 153 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
sahilmgandhi 18:6a4db94011d3 154
sahilmgandhi 18:6a4db94011d3 155 /**
sahilmgandhi 18:6a4db94011d3 156 * @}
sahilmgandhi 18:6a4db94011d3 157 */
sahilmgandhi 18:6a4db94011d3 158 /* Exported macro ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 159 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 160 /** @addtogroup TIMEx_Exported_Functions
sahilmgandhi 18:6a4db94011d3 161 * @{
sahilmgandhi 18:6a4db94011d3 162 */
sahilmgandhi 18:6a4db94011d3 163
sahilmgandhi 18:6a4db94011d3 164 /** @addtogroup TIMEx_Exported_Functions_Group1
sahilmgandhi 18:6a4db94011d3 165 * @{
sahilmgandhi 18:6a4db94011d3 166 */
sahilmgandhi 18:6a4db94011d3 167 /* Timer Hall Sensor functions **********************************************/
sahilmgandhi 18:6a4db94011d3 168 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef* htim, TIM_HallSensor_InitTypeDef* sConfig);
sahilmgandhi 18:6a4db94011d3 169 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef* htim);
sahilmgandhi 18:6a4db94011d3 170
sahilmgandhi 18:6a4db94011d3 171 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef* htim);
sahilmgandhi 18:6a4db94011d3 172 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef* htim);
sahilmgandhi 18:6a4db94011d3 173
sahilmgandhi 18:6a4db94011d3 174 /* Blocking mode: Polling */
sahilmgandhi 18:6a4db94011d3 175 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef* htim);
sahilmgandhi 18:6a4db94011d3 176 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef* htim);
sahilmgandhi 18:6a4db94011d3 177 /* Non-Blocking mode: Interrupt */
sahilmgandhi 18:6a4db94011d3 178 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef* htim);
sahilmgandhi 18:6a4db94011d3 179 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef* htim);
sahilmgandhi 18:6a4db94011d3 180 /* Non-Blocking mode: DMA */
sahilmgandhi 18:6a4db94011d3 181 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef* htim, uint32_t *pData, uint16_t Length);
sahilmgandhi 18:6a4db94011d3 182 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef* htim);
sahilmgandhi 18:6a4db94011d3 183 /**
sahilmgandhi 18:6a4db94011d3 184 * @}
sahilmgandhi 18:6a4db94011d3 185 */
sahilmgandhi 18:6a4db94011d3 186
sahilmgandhi 18:6a4db94011d3 187 /** @addtogroup TIMEx_Exported_Functions_Group2
sahilmgandhi 18:6a4db94011d3 188 * @{
sahilmgandhi 18:6a4db94011d3 189 */
sahilmgandhi 18:6a4db94011d3 190 /* Timer Complementary Output Compare functions *****************************/
sahilmgandhi 18:6a4db94011d3 191 /* Blocking mode: Polling */
sahilmgandhi 18:6a4db94011d3 192 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
sahilmgandhi 18:6a4db94011d3 193 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
sahilmgandhi 18:6a4db94011d3 194
sahilmgandhi 18:6a4db94011d3 195 /* Non-Blocking mode: Interrupt */
sahilmgandhi 18:6a4db94011d3 196 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
sahilmgandhi 18:6a4db94011d3 197 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
sahilmgandhi 18:6a4db94011d3 198
sahilmgandhi 18:6a4db94011d3 199 /* Non-Blocking mode: DMA */
sahilmgandhi 18:6a4db94011d3 200 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
sahilmgandhi 18:6a4db94011d3 201 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
sahilmgandhi 18:6a4db94011d3 202 /**
sahilmgandhi 18:6a4db94011d3 203 * @}
sahilmgandhi 18:6a4db94011d3 204 */
sahilmgandhi 18:6a4db94011d3 205
sahilmgandhi 18:6a4db94011d3 206 /** @addtogroup TIMEx_Exported_Functions_Group3
sahilmgandhi 18:6a4db94011d3 207 * @{
sahilmgandhi 18:6a4db94011d3 208 */
sahilmgandhi 18:6a4db94011d3 209 /* Timer Complementary PWM functions ****************************************/
sahilmgandhi 18:6a4db94011d3 210 /* Blocking mode: Polling */
sahilmgandhi 18:6a4db94011d3 211 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
sahilmgandhi 18:6a4db94011d3 212 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
sahilmgandhi 18:6a4db94011d3 213
sahilmgandhi 18:6a4db94011d3 214 /* Non-Blocking mode: Interrupt */
sahilmgandhi 18:6a4db94011d3 215 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
sahilmgandhi 18:6a4db94011d3 216 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
sahilmgandhi 18:6a4db94011d3 217 /* Non-Blocking mode: DMA */
sahilmgandhi 18:6a4db94011d3 218 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
sahilmgandhi 18:6a4db94011d3 219 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
sahilmgandhi 18:6a4db94011d3 220 /**
sahilmgandhi 18:6a4db94011d3 221 * @}
sahilmgandhi 18:6a4db94011d3 222 */
sahilmgandhi 18:6a4db94011d3 223
sahilmgandhi 18:6a4db94011d3 224 /** @addtogroup TIMEx_Exported_Functions_Group4
sahilmgandhi 18:6a4db94011d3 225 * @{
sahilmgandhi 18:6a4db94011d3 226 */
sahilmgandhi 18:6a4db94011d3 227 /* Timer Complementary One Pulse functions **********************************/
sahilmgandhi 18:6a4db94011d3 228 /* Blocking mode: Polling */
sahilmgandhi 18:6a4db94011d3 229 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
sahilmgandhi 18:6a4db94011d3 230 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
sahilmgandhi 18:6a4db94011d3 231
sahilmgandhi 18:6a4db94011d3 232 /* Non-Blocking mode: Interrupt */
sahilmgandhi 18:6a4db94011d3 233 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
sahilmgandhi 18:6a4db94011d3 234 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
sahilmgandhi 18:6a4db94011d3 235 /**
sahilmgandhi 18:6a4db94011d3 236 * @}
sahilmgandhi 18:6a4db94011d3 237 */
sahilmgandhi 18:6a4db94011d3 238
sahilmgandhi 18:6a4db94011d3 239 /** @addtogroup TIMEx_Exported_Functions_Group5
sahilmgandhi 18:6a4db94011d3 240 * @{
sahilmgandhi 18:6a4db94011d3 241 */
sahilmgandhi 18:6a4db94011d3 242 /* Extension Control functions ************************************************/
sahilmgandhi 18:6a4db94011d3 243 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
sahilmgandhi 18:6a4db94011d3 244 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
sahilmgandhi 18:6a4db94011d3 245 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
sahilmgandhi 18:6a4db94011d3 246 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef* htim, TIM_MasterConfigTypeDef * sMasterConfig);
sahilmgandhi 18:6a4db94011d3 247 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef* htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
sahilmgandhi 18:6a4db94011d3 248 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef* htim, uint32_t Remap);
sahilmgandhi 18:6a4db94011d3 249 /**
sahilmgandhi 18:6a4db94011d3 250 * @}
sahilmgandhi 18:6a4db94011d3 251 */
sahilmgandhi 18:6a4db94011d3 252
sahilmgandhi 18:6a4db94011d3 253 /** @addtogroup TIMEx_Exported_Functions_Group6
sahilmgandhi 18:6a4db94011d3 254 * @{
sahilmgandhi 18:6a4db94011d3 255 */
sahilmgandhi 18:6a4db94011d3 256 /* Extension Callback *********************************************************/
sahilmgandhi 18:6a4db94011d3 257 void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef* htim);
sahilmgandhi 18:6a4db94011d3 258 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef* htim);
sahilmgandhi 18:6a4db94011d3 259 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi 18:6a4db94011d3 260 /**
sahilmgandhi 18:6a4db94011d3 261 * @}
sahilmgandhi 18:6a4db94011d3 262 */
sahilmgandhi 18:6a4db94011d3 263
sahilmgandhi 18:6a4db94011d3 264 /** @addtogroup TIMEx_Exported_Functions_Group7
sahilmgandhi 18:6a4db94011d3 265 * @{
sahilmgandhi 18:6a4db94011d3 266 */
sahilmgandhi 18:6a4db94011d3 267 /* Extension Peripheral State functions **************************************/
sahilmgandhi 18:6a4db94011d3 268 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef* htim);
sahilmgandhi 18:6a4db94011d3 269 /**
sahilmgandhi 18:6a4db94011d3 270 * @}
sahilmgandhi 18:6a4db94011d3 271 */
sahilmgandhi 18:6a4db94011d3 272
sahilmgandhi 18:6a4db94011d3 273 /**
sahilmgandhi 18:6a4db94011d3 274 * @}
sahilmgandhi 18:6a4db94011d3 275 */
sahilmgandhi 18:6a4db94011d3 276
sahilmgandhi 18:6a4db94011d3 277 /* Private types -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 278 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 279 /* Private constants ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 280 /* Private macros ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 281 /** @defgroup TIMEx_Private_Macros TIM Private Macros
sahilmgandhi 18:6a4db94011d3 282 * @{
sahilmgandhi 18:6a4db94011d3 283 */
sahilmgandhi 18:6a4db94011d3 284 #if defined (STM32F446xx)
sahilmgandhi 18:6a4db94011d3 285 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\
sahilmgandhi 18:6a4db94011d3 286 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\
sahilmgandhi 18:6a4db94011d3 287 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\
sahilmgandhi 18:6a4db94011d3 288 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\
sahilmgandhi 18:6a4db94011d3 289 ((TIM_REMAP) == TIM_TIM5_GPIO)||\
sahilmgandhi 18:6a4db94011d3 290 ((TIM_REMAP) == TIM_TIM5_LSI)||\
sahilmgandhi 18:6a4db94011d3 291 ((TIM_REMAP) == TIM_TIM5_LSE)||\
sahilmgandhi 18:6a4db94011d3 292 ((TIM_REMAP) == TIM_TIM5_RTC)||\
sahilmgandhi 18:6a4db94011d3 293 ((TIM_REMAP) == TIM_TIM11_GPIO)||\
sahilmgandhi 18:6a4db94011d3 294 ((TIM_REMAP) == TIM_TIM11_SPDIFRX)||\
sahilmgandhi 18:6a4db94011d3 295 ((TIM_REMAP) == TIM_TIM11_HSE))
sahilmgandhi 18:6a4db94011d3 296 #else
sahilmgandhi 18:6a4db94011d3 297 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\
sahilmgandhi 18:6a4db94011d3 298 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\
sahilmgandhi 18:6a4db94011d3 299 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\
sahilmgandhi 18:6a4db94011d3 300 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\
sahilmgandhi 18:6a4db94011d3 301 ((TIM_REMAP) == TIM_TIM5_GPIO)||\
sahilmgandhi 18:6a4db94011d3 302 ((TIM_REMAP) == TIM_TIM5_LSI)||\
sahilmgandhi 18:6a4db94011d3 303 ((TIM_REMAP) == TIM_TIM5_LSE)||\
sahilmgandhi 18:6a4db94011d3 304 ((TIM_REMAP) == TIM_TIM5_RTC)||\
sahilmgandhi 18:6a4db94011d3 305 ((TIM_REMAP) == TIM_TIM11_GPIO)||\
sahilmgandhi 18:6a4db94011d3 306 ((TIM_REMAP) == TIM_TIM11_HSE))
sahilmgandhi 18:6a4db94011d3 307 #endif /* STM32F446xx */
sahilmgandhi 18:6a4db94011d3 308
sahilmgandhi 18:6a4db94011d3 309 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
sahilmgandhi 18:6a4db94011d3 310 #define IS_TIM_SYSTEMBREAKINPUT(BREAKINPUT) (((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_HARDFAULT)||\
sahilmgandhi 18:6a4db94011d3 311 ((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_PVD)||\
sahilmgandhi 18:6a4db94011d3 312 ((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_HARDFAULT_PVD))
sahilmgandhi 18:6a4db94011d3 313
sahilmgandhi 18:6a4db94011d3 314 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
sahilmgandhi 18:6a4db94011d3 315
sahilmgandhi 18:6a4db94011d3 316 #define IS_TIM_DEADTIME(DEADTIME) ((DEADTIME) <= 0xFFU)
sahilmgandhi 18:6a4db94011d3 317 /**
sahilmgandhi 18:6a4db94011d3 318 * @}
sahilmgandhi 18:6a4db94011d3 319 */
sahilmgandhi 18:6a4db94011d3 320
sahilmgandhi 18:6a4db94011d3 321 /* Private functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 322 /** @defgroup TIMEx_Private_Functions TIM Private Functions
sahilmgandhi 18:6a4db94011d3 323 * @{
sahilmgandhi 18:6a4db94011d3 324 */
sahilmgandhi 18:6a4db94011d3 325
sahilmgandhi 18:6a4db94011d3 326 /**
sahilmgandhi 18:6a4db94011d3 327 * @}
sahilmgandhi 18:6a4db94011d3 328 */
sahilmgandhi 18:6a4db94011d3 329
sahilmgandhi 18:6a4db94011d3 330 /**
sahilmgandhi 18:6a4db94011d3 331 * @}
sahilmgandhi 18:6a4db94011d3 332 */
sahilmgandhi 18:6a4db94011d3 333
sahilmgandhi 18:6a4db94011d3 334 /**
sahilmgandhi 18:6a4db94011d3 335 * @}
sahilmgandhi 18:6a4db94011d3 336 */
sahilmgandhi 18:6a4db94011d3 337
sahilmgandhi 18:6a4db94011d3 338 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 339 }
sahilmgandhi 18:6a4db94011d3 340 #endif
sahilmgandhi 18:6a4db94011d3 341
sahilmgandhi 18:6a4db94011d3 342 #endif /* __STM32F4xx_HAL_TIM_EX_H */
sahilmgandhi 18:6a4db94011d3 343
sahilmgandhi 18:6a4db94011d3 344 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/