MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_spdifrx.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f4xx_hal_spdifrx.h
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.5.0
sahilmgandhi 18:6a4db94011d3 6 * @date 06-May-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief Header file of SPDIFRX HAL module.
sahilmgandhi 18:6a4db94011d3 8 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 9 * @attention
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 12 *
sahilmgandhi 18:6a4db94011d3 13 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 14 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 15 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 16 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 18 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 19 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 21 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 22 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 23 *
sahilmgandhi 18:6a4db94011d3 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 34 *
sahilmgandhi 18:6a4db94011d3 35 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 36 */
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 /* Define to prevent recursive inclusion -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 39 #ifndef __STM32F4xx_HAL_SPDIFRX_H
sahilmgandhi 18:6a4db94011d3 40 #define __STM32F4xx_HAL_SPDIFRX_H
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 43 extern "C" {
sahilmgandhi 18:6a4db94011d3 44 #endif
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 #if defined(STM32F446xx)
sahilmgandhi 18:6a4db94011d3 47
sahilmgandhi 18:6a4db94011d3 48 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 49 #include "stm32f4xx_hal_def.h"
sahilmgandhi 18:6a4db94011d3 50
sahilmgandhi 18:6a4db94011d3 51 /** @addtogroup STM32F4xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 52 * @{
sahilmgandhi 18:6a4db94011d3 53 */
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 /** @addtogroup SPDIFRX
sahilmgandhi 18:6a4db94011d3 56 * @{
sahilmgandhi 18:6a4db94011d3 57 */
sahilmgandhi 18:6a4db94011d3 58
sahilmgandhi 18:6a4db94011d3 59 /* Exported types ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 60 /** @defgroup SPDIFRX_Exported_Types SPDIFRX Exported Types
sahilmgandhi 18:6a4db94011d3 61 * @{
sahilmgandhi 18:6a4db94011d3 62 */
sahilmgandhi 18:6a4db94011d3 63
sahilmgandhi 18:6a4db94011d3 64 /**
sahilmgandhi 18:6a4db94011d3 65 * @brief SPDIFRX Init structure definition
sahilmgandhi 18:6a4db94011d3 66 */
sahilmgandhi 18:6a4db94011d3 67 typedef struct
sahilmgandhi 18:6a4db94011d3 68 {
sahilmgandhi 18:6a4db94011d3 69 uint32_t InputSelection; /*!< Specifies the SPDIF input selection.
sahilmgandhi 18:6a4db94011d3 70 This parameter can be a value of @ref SPDIFRX_Input_Selection */
sahilmgandhi 18:6a4db94011d3 71
sahilmgandhi 18:6a4db94011d3 72 uint32_t Retries; /*!< Specifies the Maximum allowed re-tries during synchronization phase.
sahilmgandhi 18:6a4db94011d3 73 This parameter can be a value of @ref SPDIFRX_Max_Retries */
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 uint32_t WaitForActivity; /*!< Specifies the wait for activity on SPDIF selected input.
sahilmgandhi 18:6a4db94011d3 76 This parameter can be a value of @ref SPDIFRX_Wait_For_Activity. */
sahilmgandhi 18:6a4db94011d3 77
sahilmgandhi 18:6a4db94011d3 78 uint32_t ChannelSelection; /*!< Specifies whether the control flow will take the channel status from channel A or B.
sahilmgandhi 18:6a4db94011d3 79 This parameter can be a value of @ref SPDIFRX_Channel_Selection */
sahilmgandhi 18:6a4db94011d3 80
sahilmgandhi 18:6a4db94011d3 81 uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...).
sahilmgandhi 18:6a4db94011d3 82 This parameter can be a value of @ref SPDIFRX_Data_Format */
sahilmgandhi 18:6a4db94011d3 83
sahilmgandhi 18:6a4db94011d3 84 uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode.
sahilmgandhi 18:6a4db94011d3 85 This parameter can be a value of @ref SPDIFRX_Stereo_Mode */
sahilmgandhi 18:6a4db94011d3 86
sahilmgandhi 18:6a4db94011d3 87 uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not into the received frame.
sahilmgandhi 18:6a4db94011d3 88 This parameter can be a value of @ref SPDIFRX_PT_Mask */
sahilmgandhi 18:6a4db94011d3 89
sahilmgandhi 18:6a4db94011d3 90 uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not into the received frame.
sahilmgandhi 18:6a4db94011d3 91 This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */
sahilmgandhi 18:6a4db94011d3 92
sahilmgandhi 18:6a4db94011d3 93 uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame.
sahilmgandhi 18:6a4db94011d3 94 This parameter can be a value of @ref SPDIFRX_V_Mask */
sahilmgandhi 18:6a4db94011d3 95
sahilmgandhi 18:6a4db94011d3 96 uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not into the received frame.
sahilmgandhi 18:6a4db94011d3 97 This parameter can be a value of @ref SPDIFRX_PE_Mask */
sahilmgandhi 18:6a4db94011d3 98 }SPDIFRX_InitTypeDef;
sahilmgandhi 18:6a4db94011d3 99
sahilmgandhi 18:6a4db94011d3 100 /**
sahilmgandhi 18:6a4db94011d3 101 * @brief SPDIFRX SetDataFormat structure definition
sahilmgandhi 18:6a4db94011d3 102 */
sahilmgandhi 18:6a4db94011d3 103 typedef struct
sahilmgandhi 18:6a4db94011d3 104 {
sahilmgandhi 18:6a4db94011d3 105 uint32_t DataFormat; /*!< Specifies the Data samples format (LSB, MSB, ...).
sahilmgandhi 18:6a4db94011d3 106 This parameter can be a value of @ref SPDIFRX_Data_Format */
sahilmgandhi 18:6a4db94011d3 107
sahilmgandhi 18:6a4db94011d3 108 uint32_t StereoMode; /*!< Specifies whether the peripheral is in stereo or mono mode.
sahilmgandhi 18:6a4db94011d3 109 This parameter can be a value of @ref SPDIFRX_Stereo_Mode */
sahilmgandhi 18:6a4db94011d3 110
sahilmgandhi 18:6a4db94011d3 111 uint32_t PreambleTypeMask; /*!< Specifies whether The preamble type bits are copied or not into the received frame.
sahilmgandhi 18:6a4db94011d3 112 This parameter can be a value of @ref SPDIFRX_PT_Mask */
sahilmgandhi 18:6a4db94011d3 113
sahilmgandhi 18:6a4db94011d3 114 uint32_t ChannelStatusMask; /*!< Specifies whether the channel status and user bits are copied or not into the received frame.
sahilmgandhi 18:6a4db94011d3 115 This parameter can be a value of @ref SPDIFRX_ChannelStatus_Mask */
sahilmgandhi 18:6a4db94011d3 116
sahilmgandhi 18:6a4db94011d3 117 uint32_t ValidityBitMask; /*!< Specifies whether the validity bit is copied or not into the received frame.
sahilmgandhi 18:6a4db94011d3 118 This parameter can be a value of @ref SPDIFRX_V_Mask */
sahilmgandhi 18:6a4db94011d3 119
sahilmgandhi 18:6a4db94011d3 120 uint32_t ParityErrorMask; /*!< Specifies whether the parity error bit is copied or not into the received frame.
sahilmgandhi 18:6a4db94011d3 121 This parameter can be a value of @ref SPDIFRX_PE_Mask */
sahilmgandhi 18:6a4db94011d3 122 }SPDIFRX_SetDataFormatTypeDef;
sahilmgandhi 18:6a4db94011d3 123
sahilmgandhi 18:6a4db94011d3 124 /**
sahilmgandhi 18:6a4db94011d3 125 * @brief HAL State structures definition
sahilmgandhi 18:6a4db94011d3 126 */
sahilmgandhi 18:6a4db94011d3 127 typedef enum
sahilmgandhi 18:6a4db94011d3 128 {
sahilmgandhi 18:6a4db94011d3 129 HAL_SPDIFRX_STATE_RESET = 0x00U, /*!< SPDIFRX not yet initialized or disabled */
sahilmgandhi 18:6a4db94011d3 130 HAL_SPDIFRX_STATE_READY = 0x01U, /*!< SPDIFRX initialized and ready for use */
sahilmgandhi 18:6a4db94011d3 131 HAL_SPDIFRX_STATE_BUSY = 0x02U, /*!< SPDIFRX internal process is ongoing */
sahilmgandhi 18:6a4db94011d3 132 HAL_SPDIFRX_STATE_BUSY_RX = 0x03U, /*!< SPDIFRX internal Data Flow RX process is ongoing */
sahilmgandhi 18:6a4db94011d3 133 HAL_SPDIFRX_STATE_BUSY_CX = 0x04U, /*!< SPDIFRX internal Control Flow RX process is ongoing */
sahilmgandhi 18:6a4db94011d3 134 HAL_SPDIFRX_STATE_ERROR = 0x07U /*!< SPDIFRX error state */
sahilmgandhi 18:6a4db94011d3 135 }HAL_SPDIFRX_StateTypeDef;
sahilmgandhi 18:6a4db94011d3 136
sahilmgandhi 18:6a4db94011d3 137 /**
sahilmgandhi 18:6a4db94011d3 138 * @brief SPDIFRX handle Structure definition
sahilmgandhi 18:6a4db94011d3 139 */
sahilmgandhi 18:6a4db94011d3 140 typedef struct
sahilmgandhi 18:6a4db94011d3 141 {
sahilmgandhi 18:6a4db94011d3 142 SPDIFRX_TypeDef *Instance; /* SPDIFRX registers base address */
sahilmgandhi 18:6a4db94011d3 143
sahilmgandhi 18:6a4db94011d3 144 SPDIFRX_InitTypeDef Init; /* SPDIFRX communication parameters */
sahilmgandhi 18:6a4db94011d3 145
sahilmgandhi 18:6a4db94011d3 146 uint32_t *pRxBuffPtr; /* Pointer to SPDIFRX Rx transfer buffer */
sahilmgandhi 18:6a4db94011d3 147
sahilmgandhi 18:6a4db94011d3 148 uint32_t *pCsBuffPtr; /* Pointer to SPDIFRX Cx transfer buffer */
sahilmgandhi 18:6a4db94011d3 149
sahilmgandhi 18:6a4db94011d3 150 __IO uint16_t RxXferSize; /* SPDIFRX Rx transfer size */
sahilmgandhi 18:6a4db94011d3 151
sahilmgandhi 18:6a4db94011d3 152 __IO uint16_t RxXferCount; /* SPDIFRX Rx transfer counter
sahilmgandhi 18:6a4db94011d3 153 (This field is initialized at the
sahilmgandhi 18:6a4db94011d3 154 same value as transfer size at the
sahilmgandhi 18:6a4db94011d3 155 beginning of the transfer and
sahilmgandhi 18:6a4db94011d3 156 decremented when a sample is received.
sahilmgandhi 18:6a4db94011d3 157 NbSamplesReceived = RxBufferSize-RxBufferCount) */
sahilmgandhi 18:6a4db94011d3 158
sahilmgandhi 18:6a4db94011d3 159 __IO uint16_t CsXferSize; /* SPDIFRX Rx transfer size */
sahilmgandhi 18:6a4db94011d3 160
sahilmgandhi 18:6a4db94011d3 161 __IO uint16_t CsXferCount; /* SPDIFRX Rx transfer counter
sahilmgandhi 18:6a4db94011d3 162 (This field is initialized at the
sahilmgandhi 18:6a4db94011d3 163 same value as transfer size at the
sahilmgandhi 18:6a4db94011d3 164 beginning of the transfer and
sahilmgandhi 18:6a4db94011d3 165 decremented when a sample is received.
sahilmgandhi 18:6a4db94011d3 166 NbSamplesReceived = RxBufferSize-RxBufferCount) */
sahilmgandhi 18:6a4db94011d3 167
sahilmgandhi 18:6a4db94011d3 168 DMA_HandleTypeDef *hdmaCsRx; /* SPDIFRX EC60958_channel_status and user_information DMA handle parameters */
sahilmgandhi 18:6a4db94011d3 169
sahilmgandhi 18:6a4db94011d3 170 DMA_HandleTypeDef *hdmaDrRx; /* SPDIFRX Rx DMA handle parameters */
sahilmgandhi 18:6a4db94011d3 171
sahilmgandhi 18:6a4db94011d3 172 __IO HAL_LockTypeDef Lock; /* SPDIFRX locking object */
sahilmgandhi 18:6a4db94011d3 173
sahilmgandhi 18:6a4db94011d3 174 __IO HAL_SPDIFRX_StateTypeDef State; /* SPDIFRX communication state */
sahilmgandhi 18:6a4db94011d3 175
sahilmgandhi 18:6a4db94011d3 176 __IO uint32_t ErrorCode; /* SPDIFRX Error code */
sahilmgandhi 18:6a4db94011d3 177 }SPDIFRX_HandleTypeDef;
sahilmgandhi 18:6a4db94011d3 178 /**
sahilmgandhi 18:6a4db94011d3 179 * @}
sahilmgandhi 18:6a4db94011d3 180 */
sahilmgandhi 18:6a4db94011d3 181
sahilmgandhi 18:6a4db94011d3 182 /* Exported constants --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 183 /** @defgroup SPDIFRX_Exported_Constants SPDIFRX Exported Constants
sahilmgandhi 18:6a4db94011d3 184 * @{
sahilmgandhi 18:6a4db94011d3 185 */
sahilmgandhi 18:6a4db94011d3 186 /** @defgroup SPDIFRX_ErrorCode SPDIFRX Error Code
sahilmgandhi 18:6a4db94011d3 187 * @{
sahilmgandhi 18:6a4db94011d3 188 */
sahilmgandhi 18:6a4db94011d3 189 #define HAL_SPDIFRX_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
sahilmgandhi 18:6a4db94011d3 190 #define HAL_SPDIFRX_ERROR_TIMEOUT ((uint32_t)0x00000001U) /*!< Timeout error */
sahilmgandhi 18:6a4db94011d3 191 #define HAL_SPDIFRX_ERROR_OVR ((uint32_t)0x00000002U) /*!< OVR error */
sahilmgandhi 18:6a4db94011d3 192 #define HAL_SPDIFRX_ERROR_PE ((uint32_t)0x00000004U) /*!< Parity error */
sahilmgandhi 18:6a4db94011d3 193 #define HAL_SPDIFRX_ERROR_DMA ((uint32_t)0x00000008U) /*!< DMA transfer error */
sahilmgandhi 18:6a4db94011d3 194 #define HAL_SPDIFRX_ERROR_UNKNOWN ((uint32_t)0x00000010U) /*!< Unknown Error error */
sahilmgandhi 18:6a4db94011d3 195 /**
sahilmgandhi 18:6a4db94011d3 196 * @}
sahilmgandhi 18:6a4db94011d3 197 */
sahilmgandhi 18:6a4db94011d3 198
sahilmgandhi 18:6a4db94011d3 199 /** @defgroup SPDIFRX_Input_Selection SPDIFRX Input Selection
sahilmgandhi 18:6a4db94011d3 200 * @{
sahilmgandhi 18:6a4db94011d3 201 */
sahilmgandhi 18:6a4db94011d3 202 #define SPDIFRX_INPUT_IN0 ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 203 #define SPDIFRX_INPUT_IN1 ((uint32_t)0x00010000U)
sahilmgandhi 18:6a4db94011d3 204 #define SPDIFRX_INPUT_IN2 ((uint32_t)0x00020000U)
sahilmgandhi 18:6a4db94011d3 205 #define SPDIFRX_INPUT_IN3 ((uint32_t)0x00030000U)
sahilmgandhi 18:6a4db94011d3 206 /**
sahilmgandhi 18:6a4db94011d3 207 * @}
sahilmgandhi 18:6a4db94011d3 208 */
sahilmgandhi 18:6a4db94011d3 209
sahilmgandhi 18:6a4db94011d3 210 /** @defgroup SPDIFRX_Max_Retries SPDIFRX Maximum Retries
sahilmgandhi 18:6a4db94011d3 211 * @{
sahilmgandhi 18:6a4db94011d3 212 */
sahilmgandhi 18:6a4db94011d3 213 #define SPDIFRX_MAXRETRIES_NONE ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 214 #define SPDIFRX_MAXRETRIES_3 ((uint32_t)0x00001000U)
sahilmgandhi 18:6a4db94011d3 215 #define SPDIFRX_MAXRETRIES_15 ((uint32_t)0x00002000U)
sahilmgandhi 18:6a4db94011d3 216 #define SPDIFRX_MAXRETRIES_63 ((uint32_t)0x00003000U)
sahilmgandhi 18:6a4db94011d3 217 /**
sahilmgandhi 18:6a4db94011d3 218 * @}
sahilmgandhi 18:6a4db94011d3 219 */
sahilmgandhi 18:6a4db94011d3 220
sahilmgandhi 18:6a4db94011d3 221 /** @defgroup SPDIFRX_Wait_For_Activity SPDIFRX Wait For Activity
sahilmgandhi 18:6a4db94011d3 222 * @{
sahilmgandhi 18:6a4db94011d3 223 */
sahilmgandhi 18:6a4db94011d3 224 #define SPDIFRX_WAITFORACTIVITY_OFF ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 225 #define SPDIFRX_WAITFORACTIVITY_ON ((uint32_t)SPDIFRX_CR_WFA)
sahilmgandhi 18:6a4db94011d3 226 /**
sahilmgandhi 18:6a4db94011d3 227 * @}
sahilmgandhi 18:6a4db94011d3 228 */
sahilmgandhi 18:6a4db94011d3 229
sahilmgandhi 18:6a4db94011d3 230 /** @defgroup SPDIFRX_PT_Mask SPDIFRX Preamble Type Mask
sahilmgandhi 18:6a4db94011d3 231 * @{
sahilmgandhi 18:6a4db94011d3 232 */
sahilmgandhi 18:6a4db94011d3 233 #define SPDIFRX_PREAMBLETYPEMASK_OFF ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 234 #define SPDIFRX_PREAMBLETYPEMASK_ON ((uint32_t)SPDIFRX_CR_PTMSK)
sahilmgandhi 18:6a4db94011d3 235 /**
sahilmgandhi 18:6a4db94011d3 236 * @}
sahilmgandhi 18:6a4db94011d3 237 */
sahilmgandhi 18:6a4db94011d3 238
sahilmgandhi 18:6a4db94011d3 239 /** @defgroup SPDIFRX_ChannelStatus_Mask SPDIFRX Channel Status Mask
sahilmgandhi 18:6a4db94011d3 240 * @{
sahilmgandhi 18:6a4db94011d3 241 */
sahilmgandhi 18:6a4db94011d3 242 #define SPDIFRX_CHANNELSTATUS_OFF ((uint32_t)0x00000000U) /* The channel status and user bits are copied into the SPDIF_DR */
sahilmgandhi 18:6a4db94011d3 243 #define SPDIFRX_CHANNELSTATUS_ON ((uint32_t)SPDIFRX_CR_CUMSK) /* The channel status and user bits are not copied into the SPDIF_DR, zeros are written instead*/
sahilmgandhi 18:6a4db94011d3 244 /**
sahilmgandhi 18:6a4db94011d3 245 * @}
sahilmgandhi 18:6a4db94011d3 246 */
sahilmgandhi 18:6a4db94011d3 247
sahilmgandhi 18:6a4db94011d3 248 /** @defgroup SPDIFRX_V_Mask SPDIFRX Validity Mask
sahilmgandhi 18:6a4db94011d3 249 * @{
sahilmgandhi 18:6a4db94011d3 250 */
sahilmgandhi 18:6a4db94011d3 251 #define SPDIFRX_VALIDITYMASK_OFF ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 252 #define SPDIFRX_VALIDITYMASK_ON ((uint32_t)SPDIFRX_CR_VMSK)
sahilmgandhi 18:6a4db94011d3 253 /**
sahilmgandhi 18:6a4db94011d3 254 * @}
sahilmgandhi 18:6a4db94011d3 255 */
sahilmgandhi 18:6a4db94011d3 256
sahilmgandhi 18:6a4db94011d3 257 /** @defgroup SPDIFRX_PE_Mask SPDIFRX Parity Error Mask
sahilmgandhi 18:6a4db94011d3 258 * @{
sahilmgandhi 18:6a4db94011d3 259 */
sahilmgandhi 18:6a4db94011d3 260 #define SPDIFRX_PARITYERRORMASK_OFF ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 261 #define SPDIFRX_PARITYERRORMASK_ON ((uint32_t)SPDIFRX_CR_PMSK)
sahilmgandhi 18:6a4db94011d3 262 /**
sahilmgandhi 18:6a4db94011d3 263 * @}
sahilmgandhi 18:6a4db94011d3 264 */
sahilmgandhi 18:6a4db94011d3 265
sahilmgandhi 18:6a4db94011d3 266 /** @defgroup SPDIFRX_Channel_Selection SPDIFRX Channel Selection
sahilmgandhi 18:6a4db94011d3 267 * @{
sahilmgandhi 18:6a4db94011d3 268 */
sahilmgandhi 18:6a4db94011d3 269 #define SPDIFRX_CHANNEL_A ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 270 #define SPDIFRX_CHANNEL_B ((uint32_t)SPDIFRX_CR_CHSEL)
sahilmgandhi 18:6a4db94011d3 271 /**
sahilmgandhi 18:6a4db94011d3 272 * @}
sahilmgandhi 18:6a4db94011d3 273 */
sahilmgandhi 18:6a4db94011d3 274
sahilmgandhi 18:6a4db94011d3 275 /** @defgroup SPDIFRX_Data_Format SPDIFRX Data Format
sahilmgandhi 18:6a4db94011d3 276 * @{
sahilmgandhi 18:6a4db94011d3 277 */
sahilmgandhi 18:6a4db94011d3 278 #define SPDIFRX_DATAFORMAT_LSB ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 279 #define SPDIFRX_DATAFORMAT_MSB ((uint32_t)0x00000010U)
sahilmgandhi 18:6a4db94011d3 280 #define SPDIFRX_DATAFORMAT_32BITS ((uint32_t)0x00000020U)
sahilmgandhi 18:6a4db94011d3 281 /**
sahilmgandhi 18:6a4db94011d3 282 * @}
sahilmgandhi 18:6a4db94011d3 283 */
sahilmgandhi 18:6a4db94011d3 284
sahilmgandhi 18:6a4db94011d3 285 /** @defgroup SPDIFRX_Stereo_Mode SPDIFRX Stereo Mode
sahilmgandhi 18:6a4db94011d3 286 * @{
sahilmgandhi 18:6a4db94011d3 287 */
sahilmgandhi 18:6a4db94011d3 288 #define SPDIFRX_STEREOMODE_DISABLE ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 289 #define SPDIFRX_STEREOMODE_ENABLE ((uint32_t)SPDIFRX_CR_RXSTEO)
sahilmgandhi 18:6a4db94011d3 290 /**
sahilmgandhi 18:6a4db94011d3 291 * @}
sahilmgandhi 18:6a4db94011d3 292 */
sahilmgandhi 18:6a4db94011d3 293
sahilmgandhi 18:6a4db94011d3 294 /** @defgroup SPDIFRX_State SPDIFRX State
sahilmgandhi 18:6a4db94011d3 295 * @{
sahilmgandhi 18:6a4db94011d3 296 */
sahilmgandhi 18:6a4db94011d3 297
sahilmgandhi 18:6a4db94011d3 298 #define SPDIFRX_STATE_IDLE ((uint32_t)0xFFFFFFFCU)
sahilmgandhi 18:6a4db94011d3 299 #define SPDIFRX_STATE_SYNC ((uint32_t)0x00000001U)
sahilmgandhi 18:6a4db94011d3 300 #define SPDIFRX_STATE_RCV ((uint32_t)SPDIFRX_CR_SPDIFEN)
sahilmgandhi 18:6a4db94011d3 301 /**
sahilmgandhi 18:6a4db94011d3 302 * @}
sahilmgandhi 18:6a4db94011d3 303 */
sahilmgandhi 18:6a4db94011d3 304
sahilmgandhi 18:6a4db94011d3 305 /** @defgroup SPDIFRX_Interrupts_Definition SPDIFRX Interrupts Definition
sahilmgandhi 18:6a4db94011d3 306 * @{
sahilmgandhi 18:6a4db94011d3 307 */
sahilmgandhi 18:6a4db94011d3 308 #define SPDIFRX_IT_RXNE ((uint32_t)SPDIFRX_IMR_RXNEIE)
sahilmgandhi 18:6a4db94011d3 309 #define SPDIFRX_IT_CSRNE ((uint32_t)SPDIFRX_IMR_CSRNEIE)
sahilmgandhi 18:6a4db94011d3 310 #define SPDIFRX_IT_PERRIE ((uint32_t)SPDIFRX_IMR_PERRIE)
sahilmgandhi 18:6a4db94011d3 311 #define SPDIFRX_IT_OVRIE ((uint32_t)SPDIFRX_IMR_OVRIE)
sahilmgandhi 18:6a4db94011d3 312 #define SPDIFRX_IT_SBLKIE ((uint32_t)SPDIFRX_IMR_SBLKIE)
sahilmgandhi 18:6a4db94011d3 313 #define SPDIFRX_IT_SYNCDIE ((uint32_t)SPDIFRX_IMR_SYNCDIE)
sahilmgandhi 18:6a4db94011d3 314 #define SPDIFRX_IT_IFEIE ((uint32_t)SPDIFRX_IMR_IFEIE )
sahilmgandhi 18:6a4db94011d3 315 /**
sahilmgandhi 18:6a4db94011d3 316 * @}
sahilmgandhi 18:6a4db94011d3 317 */
sahilmgandhi 18:6a4db94011d3 318
sahilmgandhi 18:6a4db94011d3 319 /** @defgroup SPDIFRX_Flags_Definition SPDIFRX Flags Definition
sahilmgandhi 18:6a4db94011d3 320 * @{
sahilmgandhi 18:6a4db94011d3 321 */
sahilmgandhi 18:6a4db94011d3 322 #define SPDIFRX_FLAG_RXNE ((uint32_t)SPDIFRX_SR_RXNE)
sahilmgandhi 18:6a4db94011d3 323 #define SPDIFRX_FLAG_CSRNE ((uint32_t)SPDIFRX_SR_CSRNE)
sahilmgandhi 18:6a4db94011d3 324 #define SPDIFRX_FLAG_PERR ((uint32_t)SPDIFRX_SR_PERR)
sahilmgandhi 18:6a4db94011d3 325 #define SPDIFRX_FLAG_OVR ((uint32_t)SPDIFRX_SR_OVR)
sahilmgandhi 18:6a4db94011d3 326 #define SPDIFRX_FLAG_SBD ((uint32_t)SPDIFRX_SR_SBD)
sahilmgandhi 18:6a4db94011d3 327 #define SPDIFRX_FLAG_SYNCD ((uint32_t)SPDIFRX_SR_SYNCD)
sahilmgandhi 18:6a4db94011d3 328 #define SPDIFRX_FLAG_FERR ((uint32_t)SPDIFRX_SR_FERR)
sahilmgandhi 18:6a4db94011d3 329 #define SPDIFRX_FLAG_SERR ((uint32_t)SPDIFRX_SR_SERR)
sahilmgandhi 18:6a4db94011d3 330 #define SPDIFRX_FLAG_TERR ((uint32_t)SPDIFRX_SR_TERR)
sahilmgandhi 18:6a4db94011d3 331 /**
sahilmgandhi 18:6a4db94011d3 332 * @}
sahilmgandhi 18:6a4db94011d3 333 */
sahilmgandhi 18:6a4db94011d3 334
sahilmgandhi 18:6a4db94011d3 335 /**
sahilmgandhi 18:6a4db94011d3 336 * @}
sahilmgandhi 18:6a4db94011d3 337 */
sahilmgandhi 18:6a4db94011d3 338
sahilmgandhi 18:6a4db94011d3 339 /* Exported macros -----------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 340 /** @defgroup SPDIFRX_Exported_macros SPDIFRX Exported Macros
sahilmgandhi 18:6a4db94011d3 341 * @{
sahilmgandhi 18:6a4db94011d3 342 */
sahilmgandhi 18:6a4db94011d3 343
sahilmgandhi 18:6a4db94011d3 344 /** @brief Reset SPDIFRX handle state
sahilmgandhi 18:6a4db94011d3 345 * @param __HANDLE__: SPDIFRX handle.
sahilmgandhi 18:6a4db94011d3 346 * @retval None
sahilmgandhi 18:6a4db94011d3 347 */
sahilmgandhi 18:6a4db94011d3 348 #define __HAL_SPDIFRX_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = (uint16_t)SPDIFRX_CR_SPDIFEN)
sahilmgandhi 18:6a4db94011d3 349
sahilmgandhi 18:6a4db94011d3 350 /** @brief Disable the specified SPDIFRX peripheral (IDLE State).
sahilmgandhi 18:6a4db94011d3 351 * @param __HANDLE__: specifies the SPDIFRX Handle.
sahilmgandhi 18:6a4db94011d3 352 * @retval None
sahilmgandhi 18:6a4db94011d3 353 */
sahilmgandhi 18:6a4db94011d3 354 #define __HAL_SPDIFRX_IDLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= SPDIFRX_STATE_IDLE)
sahilmgandhi 18:6a4db94011d3 355
sahilmgandhi 18:6a4db94011d3 356 /** @brief Enable the specified SPDIFRX peripheral (SYNC State).
sahilmgandhi 18:6a4db94011d3 357 * @param __HANDLE__: specifies the SPDIFRX Handle.
sahilmgandhi 18:6a4db94011d3 358 * @retval None
sahilmgandhi 18:6a4db94011d3 359 */
sahilmgandhi 18:6a4db94011d3 360 #define __HAL_SPDIFRX_SYNC(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_SYNC)
sahilmgandhi 18:6a4db94011d3 361
sahilmgandhi 18:6a4db94011d3 362
sahilmgandhi 18:6a4db94011d3 363 /** @brief Enable the specified SPDIFRX peripheral (RCV State).
sahilmgandhi 18:6a4db94011d3 364 * @param __HANDLE__: specifies the SPDIFRX Handle.
sahilmgandhi 18:6a4db94011d3 365 * @retval None
sahilmgandhi 18:6a4db94011d3 366 */
sahilmgandhi 18:6a4db94011d3 367 #define __HAL_SPDIFRX_RCV(__HANDLE__) ((__HANDLE__)->Instance->CR |= SPDIFRX_STATE_RCV)
sahilmgandhi 18:6a4db94011d3 368
sahilmgandhi 18:6a4db94011d3 369 /** @brief Enable or disable the specified SPDIFRX interrupts.
sahilmgandhi 18:6a4db94011d3 370 * @param __HANDLE__: specifies the SPDIFRX Handle.
sahilmgandhi 18:6a4db94011d3 371 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
sahilmgandhi 18:6a4db94011d3 372 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 373 * @arg SPDIFRX_IT_RXNE
sahilmgandhi 18:6a4db94011d3 374 * @arg SPDIFRX_IT_CSRNE
sahilmgandhi 18:6a4db94011d3 375 * @arg SPDIFRX_IT_PERRIE
sahilmgandhi 18:6a4db94011d3 376 * @arg SPDIFRX_IT_OVRIE
sahilmgandhi 18:6a4db94011d3 377 * @arg SPDIFRX_IT_SBLKIE
sahilmgandhi 18:6a4db94011d3 378 * @arg SPDIFRX_IT_SYNCDIE
sahilmgandhi 18:6a4db94011d3 379 * @arg SPDIFRX_IT_IFEIE
sahilmgandhi 18:6a4db94011d3 380 * @retval None
sahilmgandhi 18:6a4db94011d3 381 */
sahilmgandhi 18:6a4db94011d3 382 #define __HAL_SPDIFRX_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 383 #define __HAL_SPDIFRX_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (uint16_t)(~(__INTERRUPT__)))
sahilmgandhi 18:6a4db94011d3 384
sahilmgandhi 18:6a4db94011d3 385 /** @brief Checks if the specified SPDIFRX interrupt source is enabled or disabled.
sahilmgandhi 18:6a4db94011d3 386 * @param __HANDLE__: specifies the SPDIFRX Handle.
sahilmgandhi 18:6a4db94011d3 387 * @param __INTERRUPT__: specifies the SPDIFRX interrupt source to check.
sahilmgandhi 18:6a4db94011d3 388 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 389 * @arg SPDIFRX_IT_RXNE
sahilmgandhi 18:6a4db94011d3 390 * @arg SPDIFRX_IT_CSRNE
sahilmgandhi 18:6a4db94011d3 391 * @arg SPDIFRX_IT_PERRIE
sahilmgandhi 18:6a4db94011d3 392 * @arg SPDIFRX_IT_OVRIE
sahilmgandhi 18:6a4db94011d3 393 * @arg SPDIFRX_IT_SBLKIE
sahilmgandhi 18:6a4db94011d3 394 * @arg SPDIFRX_IT_SYNCDIE
sahilmgandhi 18:6a4db94011d3 395 * @arg SPDIFRX_IT_IFEIE
sahilmgandhi 18:6a4db94011d3 396 * @retval The new state of __IT__ (TRUE or FALSE).
sahilmgandhi 18:6a4db94011d3 397 */
sahilmgandhi 18:6a4db94011d3 398 #define __HAL_SPDIFRX_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
sahilmgandhi 18:6a4db94011d3 399
sahilmgandhi 18:6a4db94011d3 400 /** @brief Checks whether the specified SPDIFRX flag is set or not.
sahilmgandhi 18:6a4db94011d3 401 * @param __HANDLE__: specifies the SPDIFRX Handle.
sahilmgandhi 18:6a4db94011d3 402 * @param __FLAG__: specifies the flag to check.
sahilmgandhi 18:6a4db94011d3 403 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 404 * @arg SPDIFRX_FLAG_RXNE
sahilmgandhi 18:6a4db94011d3 405 * @arg SPDIFRX_FLAG_CSRNE
sahilmgandhi 18:6a4db94011d3 406 * @arg SPDIFRX_FLAG_PERR
sahilmgandhi 18:6a4db94011d3 407 * @arg SPDIFRX_FLAG_OVR
sahilmgandhi 18:6a4db94011d3 408 * @arg SPDIFRX_FLAG_SBD
sahilmgandhi 18:6a4db94011d3 409 * @arg SPDIFRX_FLAG_SYNCD
sahilmgandhi 18:6a4db94011d3 410 * @arg SPDIFRX_FLAG_FERR
sahilmgandhi 18:6a4db94011d3 411 * @arg SPDIFRX_FLAG_SERR
sahilmgandhi 18:6a4db94011d3 412 * @arg SPDIFRX_FLAG_TERR
sahilmgandhi 18:6a4db94011d3 413 * @retval The new state of __FLAG__ (TRUE or FALSE).
sahilmgandhi 18:6a4db94011d3 414 */
sahilmgandhi 18:6a4db94011d3 415 #define __HAL_SPDIFRX_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
sahilmgandhi 18:6a4db94011d3 416
sahilmgandhi 18:6a4db94011d3 417 /** @brief Clears the specified SPDIFRX SR flag, in setting the proper IFCR register bit.
sahilmgandhi 18:6a4db94011d3 418 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 419 * @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
sahilmgandhi 18:6a4db94011d3 420 * to clear the corresponding interrupt
sahilmgandhi 18:6a4db94011d3 421 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 422 * @arg SPDIFRX_FLAG_PERR
sahilmgandhi 18:6a4db94011d3 423 * @arg SPDIFRX_FLAG_OVR
sahilmgandhi 18:6a4db94011d3 424 * @arg SPDIFRX_SR_SBD
sahilmgandhi 18:6a4db94011d3 425 * @arg SPDIFRX_SR_SYNCD
sahilmgandhi 18:6a4db94011d3 426 * @retval None
sahilmgandhi 18:6a4db94011d3 427 */
sahilmgandhi 18:6a4db94011d3 428 #define __HAL_SPDIFRX_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->IFCR = (uint32_t)(__IT_CLEAR__))
sahilmgandhi 18:6a4db94011d3 429
sahilmgandhi 18:6a4db94011d3 430 /**
sahilmgandhi 18:6a4db94011d3 431 * @}
sahilmgandhi 18:6a4db94011d3 432 */
sahilmgandhi 18:6a4db94011d3 433
sahilmgandhi 18:6a4db94011d3 434 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 435 /** @addtogroup SPDIFRX_Exported_Functions
sahilmgandhi 18:6a4db94011d3 436 * @{
sahilmgandhi 18:6a4db94011d3 437 */
sahilmgandhi 18:6a4db94011d3 438
sahilmgandhi 18:6a4db94011d3 439 /** @addtogroup SPDIFRX_Exported_Functions_Group1
sahilmgandhi 18:6a4db94011d3 440 * @{
sahilmgandhi 18:6a4db94011d3 441 */
sahilmgandhi 18:6a4db94011d3 442 /* Initialization/de-initialization functions **********************************/
sahilmgandhi 18:6a4db94011d3 443 HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif);
sahilmgandhi 18:6a4db94011d3 444 HAL_StatusTypeDef HAL_SPDIFRX_DeInit (SPDIFRX_HandleTypeDef *hspdif);
sahilmgandhi 18:6a4db94011d3 445 void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif);
sahilmgandhi 18:6a4db94011d3 446 void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif);
sahilmgandhi 18:6a4db94011d3 447 HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat);
sahilmgandhi 18:6a4db94011d3 448 /**
sahilmgandhi 18:6a4db94011d3 449 * @}
sahilmgandhi 18:6a4db94011d3 450 */
sahilmgandhi 18:6a4db94011d3 451
sahilmgandhi 18:6a4db94011d3 452 /** @addtogroup SPDIFRX_Exported_Functions_Group2
sahilmgandhi 18:6a4db94011d3 453 * @{
sahilmgandhi 18:6a4db94011d3 454 */
sahilmgandhi 18:6a4db94011d3 455 /* I/O operation functions ***************************************************/
sahilmgandhi 18:6a4db94011d3 456 /* Blocking mode: Polling */
sahilmgandhi 18:6a4db94011d3 457 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 458 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 459
sahilmgandhi 18:6a4db94011d3 460 /* Non-Blocking mode: Interrupt */
sahilmgandhi 18:6a4db94011d3 461 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 462 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 463 void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif);
sahilmgandhi 18:6a4db94011d3 464
sahilmgandhi 18:6a4db94011d3 465 /* Non-Blocking mode: DMA */
sahilmgandhi 18:6a4db94011d3 466 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 467 HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 468
sahilmgandhi 18:6a4db94011d3 469 HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif);
sahilmgandhi 18:6a4db94011d3 470
sahilmgandhi 18:6a4db94011d3 471 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
sahilmgandhi 18:6a4db94011d3 472 void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
sahilmgandhi 18:6a4db94011d3 473 void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
sahilmgandhi 18:6a4db94011d3 474 void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif);
sahilmgandhi 18:6a4db94011d3 475 void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
sahilmgandhi 18:6a4db94011d3 476 void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif);
sahilmgandhi 18:6a4db94011d3 477 /**
sahilmgandhi 18:6a4db94011d3 478 * @}
sahilmgandhi 18:6a4db94011d3 479 */
sahilmgandhi 18:6a4db94011d3 480
sahilmgandhi 18:6a4db94011d3 481 /** @addtogroup SPDIFRX_Exported_Functions_Group3
sahilmgandhi 18:6a4db94011d3 482 * @{
sahilmgandhi 18:6a4db94011d3 483 */
sahilmgandhi 18:6a4db94011d3 484 /* Peripheral Control and State functions ************************************/
sahilmgandhi 18:6a4db94011d3 485 HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef *hspdif);
sahilmgandhi 18:6a4db94011d3 486 uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef *hspdif);
sahilmgandhi 18:6a4db94011d3 487 /**
sahilmgandhi 18:6a4db94011d3 488 * @}
sahilmgandhi 18:6a4db94011d3 489 */
sahilmgandhi 18:6a4db94011d3 490
sahilmgandhi 18:6a4db94011d3 491 /**
sahilmgandhi 18:6a4db94011d3 492 * @}
sahilmgandhi 18:6a4db94011d3 493 */
sahilmgandhi 18:6a4db94011d3 494 /* Private types -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 495 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 496 /* Private constants ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 497 /* Private macros ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 498 /** @defgroup SPDIFRX_Private_Macros SPDIFRX Private Macros
sahilmgandhi 18:6a4db94011d3 499 * @{
sahilmgandhi 18:6a4db94011d3 500 */
sahilmgandhi 18:6a4db94011d3 501 #define IS_SPDIFRX_INPUT_SELECT(INPUT) (((INPUT) == SPDIFRX_INPUT_IN1) || \
sahilmgandhi 18:6a4db94011d3 502 ((INPUT) == SPDIFRX_INPUT_IN2) || \
sahilmgandhi 18:6a4db94011d3 503 ((INPUT) == SPDIFRX_INPUT_IN3) || \
sahilmgandhi 18:6a4db94011d3 504 ((INPUT) == SPDIFRX_INPUT_IN0))
sahilmgandhi 18:6a4db94011d3 505 #define IS_SPDIFRX_MAX_RETRIES(RET) (((RET) == SPDIFRX_MAXRETRIES_NONE) || \
sahilmgandhi 18:6a4db94011d3 506 ((RET) == SPDIFRX_MAXRETRIES_3) || \
sahilmgandhi 18:6a4db94011d3 507 ((RET) == SPDIFRX_MAXRETRIES_15) || \
sahilmgandhi 18:6a4db94011d3 508 ((RET) == SPDIFRX_MAXRETRIES_63))
sahilmgandhi 18:6a4db94011d3 509 #define IS_SPDIFRX_WAIT_FOR_ACTIVITY(VAL) (((VAL) == SPDIFRX_WAITFORACTIVITY_ON) || \
sahilmgandhi 18:6a4db94011d3 510 ((VAL) == SPDIFRX_WAITFORACTIVITY_OFF))
sahilmgandhi 18:6a4db94011d3 511 #define IS_PREAMBLE_TYPE_MASK(VAL) (((VAL) == SPDIFRX_PREAMBLETYPEMASK_ON) || \
sahilmgandhi 18:6a4db94011d3 512 ((VAL) == SPDIFRX_PREAMBLETYPEMASK_OFF))
sahilmgandhi 18:6a4db94011d3 513 #define IS_VALIDITY_MASK(VAL) (((VAL) == SPDIFRX_VALIDITYMASK_OFF) || \
sahilmgandhi 18:6a4db94011d3 514 ((VAL) == SPDIFRX_VALIDITYMASK_ON))
sahilmgandhi 18:6a4db94011d3 515 #define IS_PARITY_ERROR_MASK(VAL) (((VAL) == SPDIFRX_PARITYERRORMASK_OFF) || \
sahilmgandhi 18:6a4db94011d3 516 ((VAL) == SPDIFRX_PARITYERRORMASK_ON))
sahilmgandhi 18:6a4db94011d3 517 #define IS_SPDIFRX_CHANNEL(CHANNEL) (((CHANNEL) == SPDIFRX_CHANNEL_A) || \
sahilmgandhi 18:6a4db94011d3 518 ((CHANNEL) == SPDIFRX_CHANNEL_B))
sahilmgandhi 18:6a4db94011d3 519 #define IS_SPDIFRX_DATA_FORMAT(FORMAT) (((FORMAT) == SPDIFRX_DATAFORMAT_LSB) || \
sahilmgandhi 18:6a4db94011d3 520 ((FORMAT) == SPDIFRX_DATAFORMAT_MSB) || \
sahilmgandhi 18:6a4db94011d3 521 ((FORMAT) == SPDIFRX_DATAFORMAT_32BITS))
sahilmgandhi 18:6a4db94011d3 522 #define IS_STEREO_MODE(MODE) (((MODE) == SPDIFRX_STEREOMODE_DISABLE) || \
sahilmgandhi 18:6a4db94011d3 523 ((MODE) == SPDIFRX_STEREOMODE_ENABLE))
sahilmgandhi 18:6a4db94011d3 524
sahilmgandhi 18:6a4db94011d3 525 #define IS_CHANNEL_STATUS_MASK(VAL) (((VAL) == SPDIFRX_CHANNELSTATUS_ON) || \
sahilmgandhi 18:6a4db94011d3 526 ((VAL) == SPDIFRX_CHANNELSTATUS_OFF))
sahilmgandhi 18:6a4db94011d3 527 /**
sahilmgandhi 18:6a4db94011d3 528 * @}
sahilmgandhi 18:6a4db94011d3 529 */
sahilmgandhi 18:6a4db94011d3 530
sahilmgandhi 18:6a4db94011d3 531 /* Private functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 532 /** @defgroup SPDIFRX_Private_Functions SPDIFRX Private Functions
sahilmgandhi 18:6a4db94011d3 533 * @{
sahilmgandhi 18:6a4db94011d3 534 */
sahilmgandhi 18:6a4db94011d3 535 /**
sahilmgandhi 18:6a4db94011d3 536 * @}
sahilmgandhi 18:6a4db94011d3 537 */
sahilmgandhi 18:6a4db94011d3 538
sahilmgandhi 18:6a4db94011d3 539 /**
sahilmgandhi 18:6a4db94011d3 540 * @}
sahilmgandhi 18:6a4db94011d3 541 */
sahilmgandhi 18:6a4db94011d3 542
sahilmgandhi 18:6a4db94011d3 543 /**
sahilmgandhi 18:6a4db94011d3 544 * @}
sahilmgandhi 18:6a4db94011d3 545 */
sahilmgandhi 18:6a4db94011d3 546 #endif /* STM32F446xx */
sahilmgandhi 18:6a4db94011d3 547
sahilmgandhi 18:6a4db94011d3 548 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 549 }
sahilmgandhi 18:6a4db94011d3 550 #endif
sahilmgandhi 18:6a4db94011d3 551
sahilmgandhi 18:6a4db94011d3 552
sahilmgandhi 18:6a4db94011d3 553 #endif /* __STM32F4xx_HAL_SPDIFRX_H */
sahilmgandhi 18:6a4db94011d3 554
sahilmgandhi 18:6a4db94011d3 555 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/