MouseCode - Mouse code for the MacroRat

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Mouse code for the MacroRat

Dependencies: ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_spdifrx.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:: sahilmgandhi
Date:: Sat Jun 03 00:22:44 2017 +0000
Revision:: 46:b156ef445742
Parent:: 18:6a4db94011d3

Final code for internal battlebot competition.

Who changed what in which revision?

User	Revision	Line number	New contents of line
sahilmgandhi	18:6a4db94011d3	1	/**
sahilmgandhi	18:6a4db94011d3	2	******************************************************************************
sahilmgandhi	18:6a4db94011d3	3	* @file stm32f4xx_hal_spdifrx.c
sahilmgandhi	18:6a4db94011d3	4	* @author MCD Application Team
sahilmgandhi	18:6a4db94011d3	5	* @version V1.5.0
sahilmgandhi	18:6a4db94011d3	6	* @date 06-May-2016
sahilmgandhi	18:6a4db94011d3	7	* @brief This file provides firmware functions to manage the following
sahilmgandhi	18:6a4db94011d3	8	* functionalities of the SPDIFRX audio interface:
sahilmgandhi	18:6a4db94011d3	9	* + Initialization and Configuration
sahilmgandhi	18:6a4db94011d3	10	* + Data transfers functions
sahilmgandhi	18:6a4db94011d3	11	* + DMA transfers management
sahilmgandhi	18:6a4db94011d3	12	* + Interrupts and flags management
sahilmgandhi	18:6a4db94011d3	13	@verbatim
sahilmgandhi	18:6a4db94011d3	14	===============================================================================
sahilmgandhi	18:6a4db94011d3	15	##### How to use this driver #####
sahilmgandhi	18:6a4db94011d3	16	===============================================================================
sahilmgandhi	18:6a4db94011d3	17	[..]
sahilmgandhi	18:6a4db94011d3	18	The SPDIFRX HAL driver can be used as follow:
sahilmgandhi	18:6a4db94011d3	19
sahilmgandhi	18:6a4db94011d3	20	(#) Declare SPDIFRX_HandleTypeDef handle structure.
sahilmgandhi	18:6a4db94011d3	21	(#) Initialize the SPDIFRX low level resources by implement the HAL_SPDIFRX_MspInit() API:
sahilmgandhi	18:6a4db94011d3	22	(##) Enable the SPDIFRX interface clock.
sahilmgandhi	18:6a4db94011d3	23	(##) SPDIFRX pins configuration:
sahilmgandhi	18:6a4db94011d3	24	(+++) Enable the clock for the SPDIFRX GPIOs.
sahilmgandhi	18:6a4db94011d3	25	(+++) Configure these SPDIFRX pins as alternate function pull-up.
sahilmgandhi	18:6a4db94011d3	26	(##) NVIC configuration if you need to use interrupt process (HAL_SPDIFRX_ReceiveControlFlow_IT() and HAL_SPDIFRX_ReceiveDataFlow_IT() API's).
sahilmgandhi	18:6a4db94011d3	27	(+++) Configure the SPDIFRX interrupt priority.
sahilmgandhi	18:6a4db94011d3	28	(+++) Enable the NVIC SPDIFRX IRQ handle.
sahilmgandhi	18:6a4db94011d3	29	(##) DMA Configuration if you need to use DMA process (HAL_SPDIFRX_ReceiveDataFlow_DMA() and HAL_SPDIFRX_ReceiveControlFlow_DMA() API's).
sahilmgandhi	18:6a4db94011d3	30	(+++) Declare a DMA handle structure for the reception of the Data Flow channel.
sahilmgandhi	18:6a4db94011d3	31	(+++) Declare a DMA handle structure for the reception of the Control Flow channel.
sahilmgandhi	18:6a4db94011d3	32	(+++) Enable the DMAx interface clock.
sahilmgandhi	18:6a4db94011d3	33	(+++) Configure the declared DMA handle structure CtrlRx/DataRx with the required parameters.
sahilmgandhi	18:6a4db94011d3	34	(+++) Configure the DMA Channel.
sahilmgandhi	18:6a4db94011d3	35	(+++) Associate the initialized DMA handle to the SPDIFRX DMA CtrlRx/DataRx handle.
sahilmgandhi	18:6a4db94011d3	36	(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
sahilmgandhi	18:6a4db94011d3	37	DMA CtrlRx/DataRx channel.
sahilmgandhi	18:6a4db94011d3	38
sahilmgandhi	18:6a4db94011d3	39	(#) Program the input selection, re-tries number, wait for activity, channel status selection, data format, stereo mode and masking of user bits
sahilmgandhi	18:6a4db94011d3	40	using HAL_SPDIFRX_Init() function.
sahilmgandhi	18:6a4db94011d3	41
sahilmgandhi	18:6a4db94011d3	42	-@- The specific SPDIFRX interrupts (RXNE/CSRNE and Error Interrupts) will be managed using the macros
sahilmgandhi	18:6a4db94011d3	43	__SPDIFRX_ENABLE_IT() and __SPDIFRX_DISABLE_IT() inside the receive process.
sahilmgandhi	18:6a4db94011d3	44	-@- Make sure that ck_spdif clock is configured.
sahilmgandhi	18:6a4db94011d3	45
sahilmgandhi	18:6a4db94011d3	46	(#) Three operation modes are available within this driver :
sahilmgandhi	18:6a4db94011d3	47
sahilmgandhi	18:6a4db94011d3	48	* Polling mode for reception operation (for debug purpose) *
sahilmgandhi	18:6a4db94011d3	49	================================================================
sahilmgandhi	18:6a4db94011d3	50	[..]
sahilmgandhi	18:6a4db94011d3	51	(+) Receive data flow in blocking mode using HAL_SPDIFRX_ReceiveDataFlow()
sahilmgandhi	18:6a4db94011d3	52	(+) Receive control flow of data in blocking mode using HAL_SPDIFRX_ReceiveControlFlow()
sahilmgandhi	18:6a4db94011d3	53
sahilmgandhi	18:6a4db94011d3	54	* Interrupt mode for reception operation *
sahilmgandhi	18:6a4db94011d3	55	=========================================
sahilmgandhi	18:6a4db94011d3	56	[..]
sahilmgandhi	18:6a4db94011d3	57	(+) Receive an amount of data (Data Flow) in non blocking mode using HAL_SPDIFRX_ReceiveDataFlow_IT()
sahilmgandhi	18:6a4db94011d3	58	(+) Receive an amount of data (Control Flow) in non blocking mode using HAL_SPDIFRX_ReceiveControlFlow_IT()
sahilmgandhi	18:6a4db94011d3	59	(+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	60	add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
sahilmgandhi	18:6a4db94011d3	61	(+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	62	add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
sahilmgandhi	18:6a4db94011d3	63	(+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
sahilmgandhi	18:6a4db94011d3	64	add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
sahilmgandhi	18:6a4db94011d3	65
sahilmgandhi	18:6a4db94011d3	66	* DMA mode for reception operation *
sahilmgandhi	18:6a4db94011d3	67	========================================
sahilmgandhi	18:6a4db94011d3	68	[..]
sahilmgandhi	18:6a4db94011d3	69	(+) Receive an amount of data (Data Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveDataFlow_DMA()
sahilmgandhi	18:6a4db94011d3	70	(+) Receive an amount of data (Control Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveControlFlow_DMA()
sahilmgandhi	18:6a4db94011d3	71	(+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	72	add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
sahilmgandhi	18:6a4db94011d3	73	(+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	74	add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
sahilmgandhi	18:6a4db94011d3	75	(+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
sahilmgandhi	18:6a4db94011d3	76	add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
sahilmgandhi	18:6a4db94011d3	77	(+) Stop the DMA Transfer using HAL_SPDIFRX_DMAStop()
sahilmgandhi	18:6a4db94011d3	78
sahilmgandhi	18:6a4db94011d3	79	* SPDIFRX HAL driver macros list *
sahilmgandhi	18:6a4db94011d3	80	=============================================
sahilmgandhi	18:6a4db94011d3	81	[..]
sahilmgandhi	18:6a4db94011d3	82	Below the list of most used macros in SPDIFRX HAL driver.
sahilmgandhi	18:6a4db94011d3	83	(+) __HAL_SPDIFRX_IDLE: Disable the specified SPDIFRX peripheral (IDEL State)
sahilmgandhi	18:6a4db94011d3	84	(+) __HAL_SPDIFRX_SYNC: Enable the synchronization state of the specified SPDIFRX peripheral (SYNC State)
sahilmgandhi	18:6a4db94011d3	85	(+) __HAL_SPDIFRX_RCV: Enable the receive state of the specified SPDIFRX peripheral (RCV State)
sahilmgandhi	18:6a4db94011d3	86	(+) __HAL_SPDIFRX_ENABLE_IT : Enable the specified SPDIFRX interrupts
sahilmgandhi	18:6a4db94011d3	87	(+) __HAL_SPDIFRX_DISABLE_IT : Disable the specified SPDIFRX interrupts
sahilmgandhi	18:6a4db94011d3	88	(+) __HAL_SPDIFRX_GET_FLAG: Check whether the specified SPDIFRX flag is set or not.
sahilmgandhi	18:6a4db94011d3	89
sahilmgandhi	18:6a4db94011d3	90	[..]
sahilmgandhi	18:6a4db94011d3	91	(@) You can refer to the SPDIFRX HAL driver header file for more useful macros
sahilmgandhi	18:6a4db94011d3	92
sahilmgandhi	18:6a4db94011d3	93	@endverbatim
sahilmgandhi	18:6a4db94011d3	94	******************************************************************************
sahilmgandhi	18:6a4db94011d3	95	* @attention
sahilmgandhi	18:6a4db94011d3	96	*
sahilmgandhi	18:6a4db94011d3	97	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi	18:6a4db94011d3	98	*
sahilmgandhi	18:6a4db94011d3	99	* Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi	18:6a4db94011d3	100	* are permitted provided that the following conditions are met:
sahilmgandhi	18:6a4db94011d3	101	* 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi	18:6a4db94011d3	102	* this list of conditions and the following disclaimer.
sahilmgandhi	18:6a4db94011d3	103	* 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi	18:6a4db94011d3	104	* this list of conditions and the following disclaimer in the documentation
sahilmgandhi	18:6a4db94011d3	105	* and/or other materials provided with the distribution.
sahilmgandhi	18:6a4db94011d3	106	* 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi	18:6a4db94011d3	107	* may be used to endorse or promote products derived from this software
sahilmgandhi	18:6a4db94011d3	108	* without specific prior written permission.
sahilmgandhi	18:6a4db94011d3	109	*
sahilmgandhi	18:6a4db94011d3	110	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi	18:6a4db94011d3	111	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi	18:6a4db94011d3	112	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi	18:6a4db94011d3	113	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi	18:6a4db94011d3	114	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi	18:6a4db94011d3	115	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi	18:6a4db94011d3	116	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi	18:6a4db94011d3	117	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi	18:6a4db94011d3	118	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi	18:6a4db94011d3	119	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi	18:6a4db94011d3	120	*
sahilmgandhi	18:6a4db94011d3	121	******************************************************************************
sahilmgandhi	18:6a4db94011d3	122	*/
sahilmgandhi	18:6a4db94011d3	123
sahilmgandhi	18:6a4db94011d3	124	/* Includes ------------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	125	#include "stm32f4xx_hal.h"
sahilmgandhi	18:6a4db94011d3	126
sahilmgandhi	18:6a4db94011d3	127	/** @addtogroup STM32F4xx_HAL_Driver
sahilmgandhi	18:6a4db94011d3	128	* @{
sahilmgandhi	18:6a4db94011d3	129	*/
sahilmgandhi	18:6a4db94011d3	130	/** @defgroup SPDIFRX SPDIFRX
sahilmgandhi	18:6a4db94011d3	131	* @brief SPDIFRX HAL module driver
sahilmgandhi	18:6a4db94011d3	132	* @{
sahilmgandhi	18:6a4db94011d3	133	*/
sahilmgandhi	18:6a4db94011d3	134
sahilmgandhi	18:6a4db94011d3	135	#ifdef HAL_SPDIFRX_MODULE_ENABLED
sahilmgandhi	18:6a4db94011d3	136
sahilmgandhi	18:6a4db94011d3	137	#if defined(STM32F446xx)
sahilmgandhi	18:6a4db94011d3	138
sahilmgandhi	18:6a4db94011d3	139	/* Private typedef -----------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	140	/* Private define ------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	141	#define SPDIFRX_TIMEOUT_VALUE 0xFFFF
sahilmgandhi	18:6a4db94011d3	142
sahilmgandhi	18:6a4db94011d3	143	/* Private macro -------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	144	/* Private variables ---------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	145	/* Private function prototypes -----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	146
sahilmgandhi	18:6a4db94011d3	147	/** @addtogroup SPDIFRX_Private_Functions
sahilmgandhi	18:6a4db94011d3	148	* @{
sahilmgandhi	18:6a4db94011d3	149	*/
sahilmgandhi	18:6a4db94011d3	150	static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	151	static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	152	static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	153	static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	154	static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	155	static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
sahilmgandhi	18:6a4db94011d3	156	static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
sahilmgandhi	18:6a4db94011d3	157	static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
sahilmgandhi	18:6a4db94011d3	158
sahilmgandhi	18:6a4db94011d3	159	/**
sahilmgandhi	18:6a4db94011d3	160	* @}
sahilmgandhi	18:6a4db94011d3	161	*/
sahilmgandhi	18:6a4db94011d3	162	/* Exported functions ---------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	163
sahilmgandhi	18:6a4db94011d3	164	/** @defgroup SPDIFRX_Exported_Functions SPDIFRX Exported Functions
sahilmgandhi	18:6a4db94011d3	165	* @{
sahilmgandhi	18:6a4db94011d3	166	*/
sahilmgandhi	18:6a4db94011d3	167
sahilmgandhi	18:6a4db94011d3	168	/** @defgroup SPDIFRX_Exported_Functions_Group1 Initialization and de-initialization functions
sahilmgandhi	18:6a4db94011d3	169	* @brief Initialization and Configuration functions
sahilmgandhi	18:6a4db94011d3	170	*
sahilmgandhi	18:6a4db94011d3	171	@verbatim
sahilmgandhi	18:6a4db94011d3	172	===============================================================================
sahilmgandhi	18:6a4db94011d3	173	##### Initialization and de-initialization functions #####
sahilmgandhi	18:6a4db94011d3	174	===============================================================================
sahilmgandhi	18:6a4db94011d3	175	[..] This subsection provides a set of functions allowing to initialize and
sahilmgandhi	18:6a4db94011d3	176	de-initialize the SPDIFRX peripheral:
sahilmgandhi	18:6a4db94011d3	177
sahilmgandhi	18:6a4db94011d3	178	(+) User must Implement HAL_SPDIFRX_MspInit() function in which he configures
sahilmgandhi	18:6a4db94011d3	179	all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
sahilmgandhi	18:6a4db94011d3	180
sahilmgandhi	18:6a4db94011d3	181	(+) Call the function HAL_SPDIFRX_Init() to configure the SPDIFRX peripheral with
sahilmgandhi	18:6a4db94011d3	182	the selected configuration:
sahilmgandhi	18:6a4db94011d3	183	(++) Input Selection (IN0, IN1,...)
sahilmgandhi	18:6a4db94011d3	184	(++) Maximum allowed re-tries during synchronization phase
sahilmgandhi	18:6a4db94011d3	185	(++) Wait for activity on SPDIF selected input
sahilmgandhi	18:6a4db94011d3	186	(++) Channel status selection (from channel A or B)
sahilmgandhi	18:6a4db94011d3	187	(++) Data format (LSB, MSB, ...)
sahilmgandhi	18:6a4db94011d3	188	(++) Stereo mode
sahilmgandhi	18:6a4db94011d3	189	(++) User bits masking (PT,C,U,V,...)
sahilmgandhi	18:6a4db94011d3	190
sahilmgandhi	18:6a4db94011d3	191	(+) Call the function HAL_SPDIFRX_DeInit() to restore the default configuration
sahilmgandhi	18:6a4db94011d3	192	of the selected SPDIFRXx peripheral.
sahilmgandhi	18:6a4db94011d3	193	@endverbatim
sahilmgandhi	18:6a4db94011d3	194	* @{
sahilmgandhi	18:6a4db94011d3	195	*/
sahilmgandhi	18:6a4db94011d3	196
sahilmgandhi	18:6a4db94011d3	197	/**
sahilmgandhi	18:6a4db94011d3	198	* @brief Initializes the SPDIFRX according to the specified parameters
sahilmgandhi	18:6a4db94011d3	199	* in the SPDIFRX_InitTypeDef and create the associated handle.
sahilmgandhi	18:6a4db94011d3	200	* @param hspdif: SPDIFRX handle
sahilmgandhi	18:6a4db94011d3	201	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	202	*/
sahilmgandhi	18:6a4db94011d3	203	HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif)
sahilmgandhi	18:6a4db94011d3	204	{
sahilmgandhi	18:6a4db94011d3	205	uint32_t tmpreg = 0U;
sahilmgandhi	18:6a4db94011d3	206
sahilmgandhi	18:6a4db94011d3	207	/* Check the SPDIFRX handle allocation */
sahilmgandhi	18:6a4db94011d3	208	if(hspdif == NULL)
sahilmgandhi	18:6a4db94011d3	209	{
sahilmgandhi	18:6a4db94011d3	210	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	211	}
sahilmgandhi	18:6a4db94011d3	212
sahilmgandhi	18:6a4db94011d3	213	/* Check the SPDIFRX parameters */
sahilmgandhi	18:6a4db94011d3	214	assert_param(IS_STEREO_MODE(hspdif->Init.StereoMode));
sahilmgandhi	18:6a4db94011d3	215	assert_param(IS_SPDIFRX_INPUT_SELECT(hspdif->Init.InputSelection));
sahilmgandhi	18:6a4db94011d3	216	assert_param(IS_SPDIFRX_MAX_RETRIES(hspdif->Init.Retries));
sahilmgandhi	18:6a4db94011d3	217	assert_param(IS_SPDIFRX_WAIT_FOR_ACTIVITY(hspdif->Init.WaitForActivity));
sahilmgandhi	18:6a4db94011d3	218	assert_param(IS_SPDIFRX_CHANNEL(hspdif->Init.ChannelSelection));
sahilmgandhi	18:6a4db94011d3	219	assert_param(IS_SPDIFRX_DATA_FORMAT(hspdif->Init.DataFormat));
sahilmgandhi	18:6a4db94011d3	220	assert_param(IS_PREAMBLE_TYPE_MASK(hspdif->Init.PreambleTypeMask));
sahilmgandhi	18:6a4db94011d3	221	assert_param(IS_CHANNEL_STATUS_MASK(hspdif->Init.ChannelStatusMask));
sahilmgandhi	18:6a4db94011d3	222	assert_param(IS_VALIDITY_MASK(hspdif->Init.ValidityBitMask));
sahilmgandhi	18:6a4db94011d3	223	assert_param(IS_PARITY_ERROR_MASK(hspdif->Init.ParityErrorMask));
sahilmgandhi	18:6a4db94011d3	224
sahilmgandhi	18:6a4db94011d3	225	if(hspdif->State == HAL_SPDIFRX_STATE_RESET)
sahilmgandhi	18:6a4db94011d3	226	{
sahilmgandhi	18:6a4db94011d3	227	/* Allocate lock resource and initialize it */
sahilmgandhi	18:6a4db94011d3	228	hspdif->Lock = HAL_UNLOCKED;
sahilmgandhi	18:6a4db94011d3	229	/* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
sahilmgandhi	18:6a4db94011d3	230	HAL_SPDIFRX_MspInit(hspdif);
sahilmgandhi	18:6a4db94011d3	231	}
sahilmgandhi	18:6a4db94011d3	232
sahilmgandhi	18:6a4db94011d3	233	/* SPDIFRX peripheral state is BUSY*/
sahilmgandhi	18:6a4db94011d3	234	hspdif->State = HAL_SPDIFRX_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	235
sahilmgandhi	18:6a4db94011d3	236	/* Disable SPDIFRX interface (IDLE State) */
sahilmgandhi	18:6a4db94011d3	237	__HAL_SPDIFRX_IDLE(hspdif);
sahilmgandhi	18:6a4db94011d3	238
sahilmgandhi	18:6a4db94011d3	239	/* Reset the old SPDIFRX CR configuration */
sahilmgandhi	18:6a4db94011d3	240	tmpreg = hspdif->Instance->CR;
sahilmgandhi	18:6a4db94011d3	241
sahilmgandhi	18:6a4db94011d3	242	tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO \| SPDIFRX_CR_DRFMT \| SPDIFRX_CR_PMSK \|
sahilmgandhi	18:6a4db94011d3	243	SPDIFRX_CR_VMSK \| SPDIFRX_CR_CUMSK \| SPDIFRX_CR_PTMSK \|
sahilmgandhi	18:6a4db94011d3	244	SPDIFRX_CR_CHSEL \| SPDIFRX_CR_NBTR \| SPDIFRX_CR_WFA \|
sahilmgandhi	18:6a4db94011d3	245	SPDIFRX_CR_INSEL);
sahilmgandhi	18:6a4db94011d3	246
sahilmgandhi	18:6a4db94011d3	247	/* Sets the new configuration of the SPDIFRX peripheral */
sahilmgandhi	18:6a4db94011d3	248	tmpreg \|= ((uint16_t) hspdif->Init.StereoMode \|
sahilmgandhi	18:6a4db94011d3	249	hspdif->Init.InputSelection \|
sahilmgandhi	18:6a4db94011d3	250	hspdif->Init.Retries \|
sahilmgandhi	18:6a4db94011d3	251	hspdif->Init.WaitForActivity \|
sahilmgandhi	18:6a4db94011d3	252	hspdif->Init.ChannelSelection \|
sahilmgandhi	18:6a4db94011d3	253	hspdif->Init.DataFormat \|
sahilmgandhi	18:6a4db94011d3	254	hspdif->Init.PreambleTypeMask \|
sahilmgandhi	18:6a4db94011d3	255	hspdif->Init.ChannelStatusMask \|
sahilmgandhi	18:6a4db94011d3	256	hspdif->Init.ValidityBitMask \|
sahilmgandhi	18:6a4db94011d3	257	hspdif->Init.ParityErrorMask);
sahilmgandhi	18:6a4db94011d3	258
sahilmgandhi	18:6a4db94011d3	259	hspdif->Instance->CR = tmpreg;
sahilmgandhi	18:6a4db94011d3	260
sahilmgandhi	18:6a4db94011d3	261	hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	262
sahilmgandhi	18:6a4db94011d3	263	/* SPDIFRX peripheral state is READY*/
sahilmgandhi	18:6a4db94011d3	264	hspdif->State = HAL_SPDIFRX_STATE_READY;
sahilmgandhi	18:6a4db94011d3	265
sahilmgandhi	18:6a4db94011d3	266	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	267	}
sahilmgandhi	18:6a4db94011d3	268
sahilmgandhi	18:6a4db94011d3	269	/**
sahilmgandhi	18:6a4db94011d3	270	* @brief DeInitializes the SPDIFRX peripheral
sahilmgandhi	18:6a4db94011d3	271	* @param hspdif: SPDIFRX handle
sahilmgandhi	18:6a4db94011d3	272	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	273	*/
sahilmgandhi	18:6a4db94011d3	274	HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif)
sahilmgandhi	18:6a4db94011d3	275	{
sahilmgandhi	18:6a4db94011d3	276	/* Check the SPDIFRX handle allocation */
sahilmgandhi	18:6a4db94011d3	277	if(hspdif == NULL)
sahilmgandhi	18:6a4db94011d3	278	{
sahilmgandhi	18:6a4db94011d3	279	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	280	}
sahilmgandhi	18:6a4db94011d3	281
sahilmgandhi	18:6a4db94011d3	282	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	283	assert_param(IS_SPDIFRX_ALL_INSTANCE(hspdif->Instance));
sahilmgandhi	18:6a4db94011d3	284
sahilmgandhi	18:6a4db94011d3	285	hspdif->State = HAL_SPDIFRX_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	286
sahilmgandhi	18:6a4db94011d3	287	/* Disable SPDIFRX interface (IDLE state) */
sahilmgandhi	18:6a4db94011d3	288	__HAL_SPDIFRX_IDLE(hspdif);
sahilmgandhi	18:6a4db94011d3	289
sahilmgandhi	18:6a4db94011d3	290	/* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
sahilmgandhi	18:6a4db94011d3	291	HAL_SPDIFRX_MspDeInit(hspdif);
sahilmgandhi	18:6a4db94011d3	292
sahilmgandhi	18:6a4db94011d3	293	hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	294
sahilmgandhi	18:6a4db94011d3	295	/* SPDIFRX peripheral state is RESET*/
sahilmgandhi	18:6a4db94011d3	296	hspdif->State = HAL_SPDIFRX_STATE_RESET;
sahilmgandhi	18:6a4db94011d3	297
sahilmgandhi	18:6a4db94011d3	298	/* Release Lock */
sahilmgandhi	18:6a4db94011d3	299	__HAL_UNLOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	300
sahilmgandhi	18:6a4db94011d3	301	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	302	}
sahilmgandhi	18:6a4db94011d3	303
sahilmgandhi	18:6a4db94011d3	304	/**
sahilmgandhi	18:6a4db94011d3	305	* @brief SPDIFRX MSP Init
sahilmgandhi	18:6a4db94011d3	306	* @param hspdif: SPDIFRX handle
sahilmgandhi	18:6a4db94011d3	307	* @retval None
sahilmgandhi	18:6a4db94011d3	308	*/
sahilmgandhi	18:6a4db94011d3	309	__weak void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif)
sahilmgandhi	18:6a4db94011d3	310	{
sahilmgandhi	18:6a4db94011d3	311	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	312	UNUSED(hspdif);
sahilmgandhi	18:6a4db94011d3	313	/* NOTE : This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	314	the HAL_SPDIFRX_MspInit could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	315	*/
sahilmgandhi	18:6a4db94011d3	316	}
sahilmgandhi	18:6a4db94011d3	317
sahilmgandhi	18:6a4db94011d3	318	/**
sahilmgandhi	18:6a4db94011d3	319	* @brief SPDIFRX MSP DeInit
sahilmgandhi	18:6a4db94011d3	320	* @param hspdif: SPDIFRX handle
sahilmgandhi	18:6a4db94011d3	321	* @retval None
sahilmgandhi	18:6a4db94011d3	322	*/
sahilmgandhi	18:6a4db94011d3	323	__weak void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif)
sahilmgandhi	18:6a4db94011d3	324	{
sahilmgandhi	18:6a4db94011d3	325	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	326	UNUSED(hspdif);
sahilmgandhi	18:6a4db94011d3	327	/* NOTE : This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	328	the HAL_SPDIFRX_MspDeInit could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	329	*/
sahilmgandhi	18:6a4db94011d3	330	}
sahilmgandhi	18:6a4db94011d3	331
sahilmgandhi	18:6a4db94011d3	332	/**
sahilmgandhi	18:6a4db94011d3	333	* @brief Sets the SPDIFRX dtat format according to the specified parameters
sahilmgandhi	18:6a4db94011d3	334	* in the SPDIFRX_InitTypeDef.
sahilmgandhi	18:6a4db94011d3	335	* @param hspdif: SPDIFRX handle
sahilmgandhi	18:6a4db94011d3	336	* @param sDataFormat: SPDIFRX data format
sahilmgandhi	18:6a4db94011d3	337	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	338	*/
sahilmgandhi	18:6a4db94011d3	339	HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat)
sahilmgandhi	18:6a4db94011d3	340	{
sahilmgandhi	18:6a4db94011d3	341	uint32_t tmpreg = 0U;
sahilmgandhi	18:6a4db94011d3	342
sahilmgandhi	18:6a4db94011d3	343	/* Check the SPDIFRX handle allocation */
sahilmgandhi	18:6a4db94011d3	344	if(hspdif == NULL)
sahilmgandhi	18:6a4db94011d3	345	{
sahilmgandhi	18:6a4db94011d3	346	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	347	}
sahilmgandhi	18:6a4db94011d3	348
sahilmgandhi	18:6a4db94011d3	349	/* Check the SPDIFRX parameters */
sahilmgandhi	18:6a4db94011d3	350	assert_param(IS_STEREO_MODE(sDataFormat.StereoMode));
sahilmgandhi	18:6a4db94011d3	351	assert_param(IS_SPDIFRX_DATA_FORMAT(sDataFormat.DataFormat));
sahilmgandhi	18:6a4db94011d3	352	assert_param(IS_PREAMBLE_TYPE_MASK(sDataFormat.PreambleTypeMask));
sahilmgandhi	18:6a4db94011d3	353	assert_param(IS_CHANNEL_STATUS_MASK(sDataFormat.ChannelStatusMask));
sahilmgandhi	18:6a4db94011d3	354	assert_param(IS_VALIDITY_MASK(sDataFormat.ValidityBitMask));
sahilmgandhi	18:6a4db94011d3	355	assert_param(IS_PARITY_ERROR_MASK(sDataFormat.ParityErrorMask));
sahilmgandhi	18:6a4db94011d3	356
sahilmgandhi	18:6a4db94011d3	357	/* Reset the old SPDIFRX CR configuration */
sahilmgandhi	18:6a4db94011d3	358	tmpreg = hspdif->Instance->CR;
sahilmgandhi	18:6a4db94011d3	359
sahilmgandhi	18:6a4db94011d3	360	if(((tmpreg & SPDIFRX_STATE_RCV) == SPDIFRX_STATE_RCV) &&
sahilmgandhi	18:6a4db94011d3	361	(((tmpreg & SPDIFRX_CR_DRFMT) != sDataFormat.DataFormat) \|\|
sahilmgandhi	18:6a4db94011d3	362	((tmpreg & SPDIFRX_CR_RXSTEO) != sDataFormat.StereoMode)))
sahilmgandhi	18:6a4db94011d3	363	{
sahilmgandhi	18:6a4db94011d3	364	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	365	}
sahilmgandhi	18:6a4db94011d3	366
sahilmgandhi	18:6a4db94011d3	367	tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO \| SPDIFRX_CR_DRFMT \| SPDIFRX_CR_PMSK \|
sahilmgandhi	18:6a4db94011d3	368	SPDIFRX_CR_VMSK \| SPDIFRX_CR_CUMSK \| SPDIFRX_CR_PTMSK);
sahilmgandhi	18:6a4db94011d3	369
sahilmgandhi	18:6a4db94011d3	370	/* Sets the new configuration of the SPDIFRX peripheral */
sahilmgandhi	18:6a4db94011d3	371	tmpreg \|= ((uint16_t) sDataFormat.StereoMode \|
sahilmgandhi	18:6a4db94011d3	372	sDataFormat.DataFormat \|
sahilmgandhi	18:6a4db94011d3	373	sDataFormat.PreambleTypeMask \|
sahilmgandhi	18:6a4db94011d3	374	sDataFormat.ChannelStatusMask \|
sahilmgandhi	18:6a4db94011d3	375	sDataFormat.ValidityBitMask \|
sahilmgandhi	18:6a4db94011d3	376	sDataFormat.ParityErrorMask);
sahilmgandhi	18:6a4db94011d3	377
sahilmgandhi	18:6a4db94011d3	378	hspdif->Instance->CR = tmpreg;
sahilmgandhi	18:6a4db94011d3	379
sahilmgandhi	18:6a4db94011d3	380	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	381	}
sahilmgandhi	18:6a4db94011d3	382
sahilmgandhi	18:6a4db94011d3	383	/**
sahilmgandhi	18:6a4db94011d3	384	* @}
sahilmgandhi	18:6a4db94011d3	385	*/
sahilmgandhi	18:6a4db94011d3	386
sahilmgandhi	18:6a4db94011d3	387	/** @defgroup SPDIFRX_Exported_Functions_Group2 IO operation functions
sahilmgandhi	18:6a4db94011d3	388	* @brief Data transfers functions
sahilmgandhi	18:6a4db94011d3	389	*
sahilmgandhi	18:6a4db94011d3	390	@verbatim
sahilmgandhi	18:6a4db94011d3	391	===============================================================================
sahilmgandhi	18:6a4db94011d3	392	##### IO operation functions #####
sahilmgandhi	18:6a4db94011d3	393	===============================================================================
sahilmgandhi	18:6a4db94011d3	394	[..]
sahilmgandhi	18:6a4db94011d3	395	This subsection provides a set of functions allowing to manage the SPDIFRX data
sahilmgandhi	18:6a4db94011d3	396	transfers.
sahilmgandhi	18:6a4db94011d3	397
sahilmgandhi	18:6a4db94011d3	398	(#) There is two mode of transfer:
sahilmgandhi	18:6a4db94011d3	399	(++) Blocking mode : The communication is performed in the polling mode.
sahilmgandhi	18:6a4db94011d3	400	The status of all data processing is returned by the same function
sahilmgandhi	18:6a4db94011d3	401	after finishing transfer.
sahilmgandhi	18:6a4db94011d3	402	(++) No-Blocking mode : The communication is performed using Interrupts
sahilmgandhi	18:6a4db94011d3	403	or DMA. These functions return the status of the transfer start-up.
sahilmgandhi	18:6a4db94011d3	404	The end of the data processing will be indicated through the
sahilmgandhi	18:6a4db94011d3	405	dedicated SPDIFRX IRQ when using Interrupt mode or the DMA IRQ when
sahilmgandhi	18:6a4db94011d3	406	using DMA mode.
sahilmgandhi	18:6a4db94011d3	407
sahilmgandhi	18:6a4db94011d3	408	(#) Blocking mode functions are :
sahilmgandhi	18:6a4db94011d3	409	(++) HAL_SPDIFRX_ReceiveDataFlow()
sahilmgandhi	18:6a4db94011d3	410	(++) HAL_SPDIFRX_ReceiveControlFlow()
sahilmgandhi	18:6a4db94011d3	411	(+@) Do not use blocking mode to receive both control and data flow at the same time.
sahilmgandhi	18:6a4db94011d3	412
sahilmgandhi	18:6a4db94011d3	413	(#) No-Blocking mode functions with Interrupt are :
sahilmgandhi	18:6a4db94011d3	414	(++) HAL_SPDIFRX_ReceiveControlFlow_IT()
sahilmgandhi	18:6a4db94011d3	415	(++) HAL_SPDIFRX_ReceiveDataFlow_IT()
sahilmgandhi	18:6a4db94011d3	416
sahilmgandhi	18:6a4db94011d3	417	(#) No-Blocking mode functions with DMA are :
sahilmgandhi	18:6a4db94011d3	418	(++) HAL_SPDIFRX_ReceiveControlFlow_DMA()
sahilmgandhi	18:6a4db94011d3	419	(++) HAL_SPDIFRX_ReceiveDataFlow_DMA()
sahilmgandhi	18:6a4db94011d3	420
sahilmgandhi	18:6a4db94011d3	421	(#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
sahilmgandhi	18:6a4db94011d3	422	(++) HAL_SPDIFRX_RxCpltCallback()
sahilmgandhi	18:6a4db94011d3	423	(++) HAL_SPDIFRX_ErrorCallback()
sahilmgandhi	18:6a4db94011d3	424
sahilmgandhi	18:6a4db94011d3	425	@endverbatim
sahilmgandhi	18:6a4db94011d3	426	* @{
sahilmgandhi	18:6a4db94011d3	427	*/
sahilmgandhi	18:6a4db94011d3	428
sahilmgandhi	18:6a4db94011d3	429	/**
sahilmgandhi	18:6a4db94011d3	430	* @brief Receives an amount of data (Data Flow) in blocking mode.
sahilmgandhi	18:6a4db94011d3	431	* @param hspdif: pointer to SPDIFRX_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	432	* the configuration information for SPDIFRX module.
sahilmgandhi	18:6a4db94011d3	433	* @param pData: Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	434	* @param Size: Amount of data to be received
sahilmgandhi	18:6a4db94011d3	435	* @param Timeout: Timeout duration
sahilmgandhi	18:6a4db94011d3	436	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	437	*/
sahilmgandhi	18:6a4db94011d3	438	HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef hspdif, uint32_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	439	{
sahilmgandhi	18:6a4db94011d3	440	if((pData == NULL ) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	441	{
sahilmgandhi	18:6a4db94011d3	442	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	443	}
sahilmgandhi	18:6a4db94011d3	444
sahilmgandhi	18:6a4db94011d3	445	if(hspdif->State == HAL_SPDIFRX_STATE_READY)
sahilmgandhi	18:6a4db94011d3	446	{
sahilmgandhi	18:6a4db94011d3	447	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	448	__HAL_LOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	449
sahilmgandhi	18:6a4db94011d3	450	hspdif->State = HAL_SPDIFRX_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	451
sahilmgandhi	18:6a4db94011d3	452	/* Start synchronisation */
sahilmgandhi	18:6a4db94011d3	453	__HAL_SPDIFRX_SYNC(hspdif);
sahilmgandhi	18:6a4db94011d3	454
sahilmgandhi	18:6a4db94011d3	455	/* Wait until SYNCD flag is set */
sahilmgandhi	18:6a4db94011d3	456	if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	457	{
sahilmgandhi	18:6a4db94011d3	458	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	459	}
sahilmgandhi	18:6a4db94011d3	460
sahilmgandhi	18:6a4db94011d3	461	/* Start reception */
sahilmgandhi	18:6a4db94011d3	462	__HAL_SPDIFRX_RCV(hspdif);
sahilmgandhi	18:6a4db94011d3	463
sahilmgandhi	18:6a4db94011d3	464	/* Receive data flow */
sahilmgandhi	18:6a4db94011d3	465	while(Size > 0U)
sahilmgandhi	18:6a4db94011d3	466	{
sahilmgandhi	18:6a4db94011d3	467	/* Wait until RXNE flag is set */
sahilmgandhi	18:6a4db94011d3	468	if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_RXNE, RESET, Timeout) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	469	{
sahilmgandhi	18:6a4db94011d3	470	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	471	}
sahilmgandhi	18:6a4db94011d3	472
sahilmgandhi	18:6a4db94011d3	473	(*pData++) = hspdif->Instance->DR;
sahilmgandhi	18:6a4db94011d3	474	Size--;
sahilmgandhi	18:6a4db94011d3	475	}
sahilmgandhi	18:6a4db94011d3	476
sahilmgandhi	18:6a4db94011d3	477	/* SPDIFRX ready */
sahilmgandhi	18:6a4db94011d3	478	hspdif->State = HAL_SPDIFRX_STATE_READY;
sahilmgandhi	18:6a4db94011d3	479
sahilmgandhi	18:6a4db94011d3	480	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	481	__HAL_UNLOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	482
sahilmgandhi	18:6a4db94011d3	483	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	484	}
sahilmgandhi	18:6a4db94011d3	485	else
sahilmgandhi	18:6a4db94011d3	486	{
sahilmgandhi	18:6a4db94011d3	487	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	488	}
sahilmgandhi	18:6a4db94011d3	489	}
sahilmgandhi	18:6a4db94011d3	490
sahilmgandhi	18:6a4db94011d3	491	/**
sahilmgandhi	18:6a4db94011d3	492	* @brief Receives an amount of data (Control Flow) in blocking mode.
sahilmgandhi	18:6a4db94011d3	493	* @param hspdif: pointer to a SPDIFRX_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	494	* the configuration information for SPDIFRX module.
sahilmgandhi	18:6a4db94011d3	495	* @param pData: Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	496	* @param Size: Amount of data to be received
sahilmgandhi	18:6a4db94011d3	497	* @param Timeout: Timeout duration
sahilmgandhi	18:6a4db94011d3	498	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	499	*/
sahilmgandhi	18:6a4db94011d3	500	HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef hspdif, uint32_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	501	{
sahilmgandhi	18:6a4db94011d3	502	if((pData == NULL ) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	503	{
sahilmgandhi	18:6a4db94011d3	504	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	505	}
sahilmgandhi	18:6a4db94011d3	506
sahilmgandhi	18:6a4db94011d3	507	if(hspdif->State == HAL_SPDIFRX_STATE_READY)
sahilmgandhi	18:6a4db94011d3	508	{
sahilmgandhi	18:6a4db94011d3	509	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	510	__HAL_LOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	511
sahilmgandhi	18:6a4db94011d3	512	hspdif->State = HAL_SPDIFRX_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	513
sahilmgandhi	18:6a4db94011d3	514	/* Start synchronization */
sahilmgandhi	18:6a4db94011d3	515	__HAL_SPDIFRX_SYNC(hspdif);
sahilmgandhi	18:6a4db94011d3	516
sahilmgandhi	18:6a4db94011d3	517	/* Wait until SYNCD flag is set */
sahilmgandhi	18:6a4db94011d3	518	if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	519	{
sahilmgandhi	18:6a4db94011d3	520	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	521	}
sahilmgandhi	18:6a4db94011d3	522
sahilmgandhi	18:6a4db94011d3	523	/* Start reception */
sahilmgandhi	18:6a4db94011d3	524	__HAL_SPDIFRX_RCV(hspdif);
sahilmgandhi	18:6a4db94011d3	525
sahilmgandhi	18:6a4db94011d3	526	/* Receive control flow */
sahilmgandhi	18:6a4db94011d3	527	while(Size > 0U)
sahilmgandhi	18:6a4db94011d3	528	{
sahilmgandhi	18:6a4db94011d3	529	/* Wait until CSRNE flag is set */
sahilmgandhi	18:6a4db94011d3	530	if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_CSRNE, RESET, Timeout) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	531	{
sahilmgandhi	18:6a4db94011d3	532	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	533	}
sahilmgandhi	18:6a4db94011d3	534
sahilmgandhi	18:6a4db94011d3	535	(*pData++) = hspdif->Instance->CSR;
sahilmgandhi	18:6a4db94011d3	536	Size--;
sahilmgandhi	18:6a4db94011d3	537	}
sahilmgandhi	18:6a4db94011d3	538
sahilmgandhi	18:6a4db94011d3	539	/* SPDIFRX ready */
sahilmgandhi	18:6a4db94011d3	540	hspdif->State = HAL_SPDIFRX_STATE_READY;
sahilmgandhi	18:6a4db94011d3	541
sahilmgandhi	18:6a4db94011d3	542	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	543	__HAL_UNLOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	544
sahilmgandhi	18:6a4db94011d3	545	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	546	}
sahilmgandhi	18:6a4db94011d3	547	else
sahilmgandhi	18:6a4db94011d3	548	{
sahilmgandhi	18:6a4db94011d3	549	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	550	}
sahilmgandhi	18:6a4db94011d3	551	}
sahilmgandhi	18:6a4db94011d3	552	/**
sahilmgandhi	18:6a4db94011d3	553	* @brief Receive an amount of data (Data Flow) in non-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	554	* @param hspdif: SPDIFRX handle
sahilmgandhi	18:6a4db94011d3	555	* @param pData: a 32-bit pointer to the Receive data buffer.
sahilmgandhi	18:6a4db94011d3	556	* @param Size: number of data sample to be received .
sahilmgandhi	18:6a4db94011d3	557	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	558	*/
sahilmgandhi	18:6a4db94011d3	559	HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef hspdif, uint32_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	560	{
sahilmgandhi	18:6a4db94011d3	561	__IO uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
sahilmgandhi	18:6a4db94011d3	562
sahilmgandhi	18:6a4db94011d3	563	if((hspdif->State == HAL_SPDIFRX_STATE_READY) \|\| (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX))
sahilmgandhi	18:6a4db94011d3	564	{
sahilmgandhi	18:6a4db94011d3	565	if((pData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	566	{
sahilmgandhi	18:6a4db94011d3	567	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	568	}
sahilmgandhi	18:6a4db94011d3	569
sahilmgandhi	18:6a4db94011d3	570	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	571	__HAL_LOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	572
sahilmgandhi	18:6a4db94011d3	573	hspdif->pRxBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	574	hspdif->RxXferSize = Size;
sahilmgandhi	18:6a4db94011d3	575	hspdif->RxXferCount = Size;
sahilmgandhi	18:6a4db94011d3	576
sahilmgandhi	18:6a4db94011d3	577	hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	578
sahilmgandhi	18:6a4db94011d3	579	/* Check if a receive process is ongoing or not */
sahilmgandhi	18:6a4db94011d3	580	hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	581
sahilmgandhi	18:6a4db94011d3	582	/* Enable the SPDIFRX PE Error Interrupt */
sahilmgandhi	18:6a4db94011d3	583	__HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
sahilmgandhi	18:6a4db94011d3	584
sahilmgandhi	18:6a4db94011d3	585	/* Enable the SPDIFRX OVR Error Interrupt */
sahilmgandhi	18:6a4db94011d3	586	__HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
sahilmgandhi	18:6a4db94011d3	587
sahilmgandhi	18:6a4db94011d3	588	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	589	__HAL_UNLOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	590
sahilmgandhi	18:6a4db94011d3	591	/* Enable the SPDIFRX RXNE interrupt */
sahilmgandhi	18:6a4db94011d3	592	__HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_RXNE);
sahilmgandhi	18:6a4db94011d3	593
sahilmgandhi	18:6a4db94011d3	594	if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC \|\| (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U)
sahilmgandhi	18:6a4db94011d3	595	{
sahilmgandhi	18:6a4db94011d3	596	/* Start synchronization */
sahilmgandhi	18:6a4db94011d3	597	__HAL_SPDIFRX_SYNC(hspdif);
sahilmgandhi	18:6a4db94011d3	598
sahilmgandhi	18:6a4db94011d3	599	/* Wait until SYNCD flag is set */
sahilmgandhi	18:6a4db94011d3	600	do
sahilmgandhi	18:6a4db94011d3	601	{
sahilmgandhi	18:6a4db94011d3	602	if (count-- == 0)
sahilmgandhi	18:6a4db94011d3	603	{
sahilmgandhi	18:6a4db94011d3	604	/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
sahilmgandhi	18:6a4db94011d3	605	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
sahilmgandhi	18:6a4db94011d3	606	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
sahilmgandhi	18:6a4db94011d3	607	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
sahilmgandhi	18:6a4db94011d3	608	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
sahilmgandhi	18:6a4db94011d3	609	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
sahilmgandhi	18:6a4db94011d3	610	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
sahilmgandhi	18:6a4db94011d3	611	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
sahilmgandhi	18:6a4db94011d3	612
sahilmgandhi	18:6a4db94011d3	613	hspdif->State= HAL_SPDIFRX_STATE_READY;
sahilmgandhi	18:6a4db94011d3	614
sahilmgandhi	18:6a4db94011d3	615	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	616	__HAL_UNLOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	617
sahilmgandhi	18:6a4db94011d3	618	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	619	}
sahilmgandhi	18:6a4db94011d3	620	}
sahilmgandhi	18:6a4db94011d3	621	while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
sahilmgandhi	18:6a4db94011d3	622
sahilmgandhi	18:6a4db94011d3	623	/* Start reception */
sahilmgandhi	18:6a4db94011d3	624	__HAL_SPDIFRX_RCV(hspdif);
sahilmgandhi	18:6a4db94011d3	625	}
sahilmgandhi	18:6a4db94011d3	626
sahilmgandhi	18:6a4db94011d3	627	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	628	}
sahilmgandhi	18:6a4db94011d3	629	else
sahilmgandhi	18:6a4db94011d3	630	{
sahilmgandhi	18:6a4db94011d3	631	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	632	}
sahilmgandhi	18:6a4db94011d3	633	}
sahilmgandhi	18:6a4db94011d3	634
sahilmgandhi	18:6a4db94011d3	635	/**
sahilmgandhi	18:6a4db94011d3	636	* @brief Receive an amount of data (Control Flow) with Interrupt
sahilmgandhi	18:6a4db94011d3	637	* @param hspdif: SPDIFRX handle
sahilmgandhi	18:6a4db94011d3	638	* @param pData: a 32-bit pointer to the Receive data buffer.
sahilmgandhi	18:6a4db94011d3	639	* @param Size: number of data sample (Control Flow) to be received :
sahilmgandhi	18:6a4db94011d3	640	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	641	*/
sahilmgandhi	18:6a4db94011d3	642	HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef hspdif, uint32_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	643	{
sahilmgandhi	18:6a4db94011d3	644	__IO uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
sahilmgandhi	18:6a4db94011d3	645
sahilmgandhi	18:6a4db94011d3	646	if((hspdif->State == HAL_SPDIFRX_STATE_READY) \|\| (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX))
sahilmgandhi	18:6a4db94011d3	647	{
sahilmgandhi	18:6a4db94011d3	648	if((pData == NULL ) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	649	{
sahilmgandhi	18:6a4db94011d3	650	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	651	}
sahilmgandhi	18:6a4db94011d3	652
sahilmgandhi	18:6a4db94011d3	653	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	654	__HAL_LOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	655
sahilmgandhi	18:6a4db94011d3	656	hspdif->pCsBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	657	hspdif->CsXferSize = Size;
sahilmgandhi	18:6a4db94011d3	658	hspdif->CsXferCount = Size;
sahilmgandhi	18:6a4db94011d3	659
sahilmgandhi	18:6a4db94011d3	660	hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	661
sahilmgandhi	18:6a4db94011d3	662	/* Check if a receive process is ongoing or not */
sahilmgandhi	18:6a4db94011d3	663	hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
sahilmgandhi	18:6a4db94011d3	664
sahilmgandhi	18:6a4db94011d3	665	/* Enable the SPDIFRX PE Error Interrupt */
sahilmgandhi	18:6a4db94011d3	666	__HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
sahilmgandhi	18:6a4db94011d3	667
sahilmgandhi	18:6a4db94011d3	668	/* Enable the SPDIFRX OVR Error Interrupt */
sahilmgandhi	18:6a4db94011d3	669	__HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
sahilmgandhi	18:6a4db94011d3	670
sahilmgandhi	18:6a4db94011d3	671	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	672	__HAL_UNLOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	673
sahilmgandhi	18:6a4db94011d3	674	/* Enable the SPDIFRX CSRNE interrupt */
sahilmgandhi	18:6a4db94011d3	675	__HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
sahilmgandhi	18:6a4db94011d3	676
sahilmgandhi	18:6a4db94011d3	677	if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC \|\| (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U)
sahilmgandhi	18:6a4db94011d3	678	{
sahilmgandhi	18:6a4db94011d3	679	/* Start synchronization */
sahilmgandhi	18:6a4db94011d3	680	__HAL_SPDIFRX_SYNC(hspdif);
sahilmgandhi	18:6a4db94011d3	681
sahilmgandhi	18:6a4db94011d3	682	/* Wait until SYNCD flag is set */
sahilmgandhi	18:6a4db94011d3	683	do
sahilmgandhi	18:6a4db94011d3	684	{
sahilmgandhi	18:6a4db94011d3	685	if (count-- == 0)
sahilmgandhi	18:6a4db94011d3	686	{
sahilmgandhi	18:6a4db94011d3	687	/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
sahilmgandhi	18:6a4db94011d3	688	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
sahilmgandhi	18:6a4db94011d3	689	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
sahilmgandhi	18:6a4db94011d3	690	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
sahilmgandhi	18:6a4db94011d3	691	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
sahilmgandhi	18:6a4db94011d3	692	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
sahilmgandhi	18:6a4db94011d3	693	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
sahilmgandhi	18:6a4db94011d3	694	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
sahilmgandhi	18:6a4db94011d3	695
sahilmgandhi	18:6a4db94011d3	696	hspdif->State= HAL_SPDIFRX_STATE_READY;
sahilmgandhi	18:6a4db94011d3	697
sahilmgandhi	18:6a4db94011d3	698	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	699	__HAL_UNLOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	700
sahilmgandhi	18:6a4db94011d3	701	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	702	}
sahilmgandhi	18:6a4db94011d3	703	}
sahilmgandhi	18:6a4db94011d3	704	while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
sahilmgandhi	18:6a4db94011d3	705
sahilmgandhi	18:6a4db94011d3	706	/* Start reception */
sahilmgandhi	18:6a4db94011d3	707	__HAL_SPDIFRX_RCV(hspdif);
sahilmgandhi	18:6a4db94011d3	708	}
sahilmgandhi	18:6a4db94011d3	709
sahilmgandhi	18:6a4db94011d3	710	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	711	}
sahilmgandhi	18:6a4db94011d3	712	else
sahilmgandhi	18:6a4db94011d3	713	{
sahilmgandhi	18:6a4db94011d3	714	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	715	}
sahilmgandhi	18:6a4db94011d3	716	}
sahilmgandhi	18:6a4db94011d3	717
sahilmgandhi	18:6a4db94011d3	718	/**
sahilmgandhi	18:6a4db94011d3	719	* @brief Receive an amount of data (Data Flow) mode with DMA
sahilmgandhi	18:6a4db94011d3	720	* @param hspdif: SPDIFRX handle
sahilmgandhi	18:6a4db94011d3	721	* @param pData: a 32-bit pointer to the Receive data buffer.
sahilmgandhi	18:6a4db94011d3	722	* @param Size: number of data sample to be received :
sahilmgandhi	18:6a4db94011d3	723	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	724	*/
sahilmgandhi	18:6a4db94011d3	725	HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef hspdif, uint32_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	726	{
sahilmgandhi	18:6a4db94011d3	727	__IO uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
sahilmgandhi	18:6a4db94011d3	728
sahilmgandhi	18:6a4db94011d3	729	if((pData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	730	{
sahilmgandhi	18:6a4db94011d3	731	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	732	}
sahilmgandhi	18:6a4db94011d3	733
sahilmgandhi	18:6a4db94011d3	734	if((hspdif->State == HAL_SPDIFRX_STATE_READY) \|\| (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX))
sahilmgandhi	18:6a4db94011d3	735	{
sahilmgandhi	18:6a4db94011d3	736	hspdif->pRxBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	737	hspdif->RxXferSize = Size;
sahilmgandhi	18:6a4db94011d3	738	hspdif->RxXferCount = Size;
sahilmgandhi	18:6a4db94011d3	739
sahilmgandhi	18:6a4db94011d3	740	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	741	__HAL_LOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	742
sahilmgandhi	18:6a4db94011d3	743	hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	744	hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	745
sahilmgandhi	18:6a4db94011d3	746	/* Set the SPDIFRX Rx DMA Half transfer complete callback */
sahilmgandhi	18:6a4db94011d3	747	hspdif->hdmaDrRx->XferHalfCpltCallback = SPDIFRX_DMARxHalfCplt;
sahilmgandhi	18:6a4db94011d3	748
sahilmgandhi	18:6a4db94011d3	749	/* Set the SPDIFRX Rx DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	750	hspdif->hdmaDrRx->XferCpltCallback = SPDIFRX_DMARxCplt;
sahilmgandhi	18:6a4db94011d3	751
sahilmgandhi	18:6a4db94011d3	752	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	753	hspdif->hdmaDrRx->XferErrorCallback = SPDIFRX_DMAError;
sahilmgandhi	18:6a4db94011d3	754
sahilmgandhi	18:6a4db94011d3	755	/* Enable the DMA request */
sahilmgandhi	18:6a4db94011d3	756	HAL_DMA_Start_IT(hspdif->hdmaDrRx, (uint32_t)&hspdif->Instance->DR, (uint32_t)hspdif->pRxBuffPtr, Size);
sahilmgandhi	18:6a4db94011d3	757
sahilmgandhi	18:6a4db94011d3	758	/* Enable RXDMAEN bit in SPDIFRX CR register for data flow reception*/
sahilmgandhi	18:6a4db94011d3	759	hspdif->Instance->CR \|= SPDIFRX_CR_RXDMAEN;
sahilmgandhi	18:6a4db94011d3	760
sahilmgandhi	18:6a4db94011d3	761	if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC \|\| (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U)
sahilmgandhi	18:6a4db94011d3	762	{
sahilmgandhi	18:6a4db94011d3	763	/* Start synchronization */
sahilmgandhi	18:6a4db94011d3	764	__HAL_SPDIFRX_SYNC(hspdif);
sahilmgandhi	18:6a4db94011d3	765
sahilmgandhi	18:6a4db94011d3	766	/* Wait until SYNCD flag is set */
sahilmgandhi	18:6a4db94011d3	767	do
sahilmgandhi	18:6a4db94011d3	768	{
sahilmgandhi	18:6a4db94011d3	769	if (count-- == 0)
sahilmgandhi	18:6a4db94011d3	770	{
sahilmgandhi	18:6a4db94011d3	771	/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
sahilmgandhi	18:6a4db94011d3	772	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
sahilmgandhi	18:6a4db94011d3	773	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
sahilmgandhi	18:6a4db94011d3	774	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
sahilmgandhi	18:6a4db94011d3	775	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
sahilmgandhi	18:6a4db94011d3	776	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
sahilmgandhi	18:6a4db94011d3	777	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
sahilmgandhi	18:6a4db94011d3	778	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
sahilmgandhi	18:6a4db94011d3	779
sahilmgandhi	18:6a4db94011d3	780	hspdif->State= HAL_SPDIFRX_STATE_READY;
sahilmgandhi	18:6a4db94011d3	781
sahilmgandhi	18:6a4db94011d3	782	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	783	__HAL_UNLOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	784
sahilmgandhi	18:6a4db94011d3	785	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	786	}
sahilmgandhi	18:6a4db94011d3	787	}
sahilmgandhi	18:6a4db94011d3	788	while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
sahilmgandhi	18:6a4db94011d3	789
sahilmgandhi	18:6a4db94011d3	790	/* Start reception */
sahilmgandhi	18:6a4db94011d3	791	__HAL_SPDIFRX_RCV(hspdif);
sahilmgandhi	18:6a4db94011d3	792	}
sahilmgandhi	18:6a4db94011d3	793
sahilmgandhi	18:6a4db94011d3	794	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	795	__HAL_UNLOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	796
sahilmgandhi	18:6a4db94011d3	797	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	798	}
sahilmgandhi	18:6a4db94011d3	799	else
sahilmgandhi	18:6a4db94011d3	800	{
sahilmgandhi	18:6a4db94011d3	801	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	802	}
sahilmgandhi	18:6a4db94011d3	803	}
sahilmgandhi	18:6a4db94011d3	804
sahilmgandhi	18:6a4db94011d3	805	/**
sahilmgandhi	18:6a4db94011d3	806	* @brief Receive an amount of data (Control Flow) with DMA
sahilmgandhi	18:6a4db94011d3	807	* @param hspdif: SPDIFRX handle
sahilmgandhi	18:6a4db94011d3	808	* @param pData: a 32-bit pointer to the Receive data buffer.
sahilmgandhi	18:6a4db94011d3	809	* @param Size: number of data (Control Flow) sample to be received :
sahilmgandhi	18:6a4db94011d3	810	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	811	*/
sahilmgandhi	18:6a4db94011d3	812	HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef hspdif, uint32_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	813	{
sahilmgandhi	18:6a4db94011d3	814	__IO uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
sahilmgandhi	18:6a4db94011d3	815
sahilmgandhi	18:6a4db94011d3	816	if((pData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	817	{
sahilmgandhi	18:6a4db94011d3	818	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	819	}
sahilmgandhi	18:6a4db94011d3	820
sahilmgandhi	18:6a4db94011d3	821	if((hspdif->State == HAL_SPDIFRX_STATE_READY) \|\| (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX))
sahilmgandhi	18:6a4db94011d3	822	{
sahilmgandhi	18:6a4db94011d3	823	hspdif->pCsBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	824	hspdif->CsXferSize = Size;
sahilmgandhi	18:6a4db94011d3	825	hspdif->CsXferCount = Size;
sahilmgandhi	18:6a4db94011d3	826
sahilmgandhi	18:6a4db94011d3	827	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	828	__HAL_LOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	829
sahilmgandhi	18:6a4db94011d3	830	hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	831	hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
sahilmgandhi	18:6a4db94011d3	832
sahilmgandhi	18:6a4db94011d3	833	/* Set the SPDIFRX Rx DMA Half transfer complete callback */
sahilmgandhi	18:6a4db94011d3	834	hspdif->hdmaCsRx->XferHalfCpltCallback = SPDIFRX_DMACxHalfCplt;
sahilmgandhi	18:6a4db94011d3	835
sahilmgandhi	18:6a4db94011d3	836	/* Set the SPDIFRX Rx DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	837	hspdif->hdmaCsRx->XferCpltCallback = SPDIFRX_DMACxCplt;
sahilmgandhi	18:6a4db94011d3	838
sahilmgandhi	18:6a4db94011d3	839	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	840	hspdif->hdmaCsRx->XferErrorCallback = SPDIFRX_DMAError;
sahilmgandhi	18:6a4db94011d3	841
sahilmgandhi	18:6a4db94011d3	842	/* Enable the DMA request */
sahilmgandhi	18:6a4db94011d3	843	HAL_DMA_Start_IT(hspdif->hdmaCsRx, (uint32_t)&hspdif->Instance->CSR, (uint32_t)hspdif->pCsBuffPtr, Size);
sahilmgandhi	18:6a4db94011d3	844
sahilmgandhi	18:6a4db94011d3	845	/* Enable CBDMAEN bit in SPDIFRX CR register for control flow reception*/
sahilmgandhi	18:6a4db94011d3	846	hspdif->Instance->CR \|= SPDIFRX_CR_CBDMAEN;
sahilmgandhi	18:6a4db94011d3	847
sahilmgandhi	18:6a4db94011d3	848	if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC \|\| (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U)
sahilmgandhi	18:6a4db94011d3	849	{
sahilmgandhi	18:6a4db94011d3	850	/* Start synchronization */
sahilmgandhi	18:6a4db94011d3	851	__HAL_SPDIFRX_SYNC(hspdif);
sahilmgandhi	18:6a4db94011d3	852
sahilmgandhi	18:6a4db94011d3	853	/* Wait until SYNCD flag is set */
sahilmgandhi	18:6a4db94011d3	854	do
sahilmgandhi	18:6a4db94011d3	855	{
sahilmgandhi	18:6a4db94011d3	856	if (count-- == 0)
sahilmgandhi	18:6a4db94011d3	857	{
sahilmgandhi	18:6a4db94011d3	858	/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
sahilmgandhi	18:6a4db94011d3	859	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
sahilmgandhi	18:6a4db94011d3	860	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
sahilmgandhi	18:6a4db94011d3	861	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
sahilmgandhi	18:6a4db94011d3	862	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
sahilmgandhi	18:6a4db94011d3	863	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
sahilmgandhi	18:6a4db94011d3	864	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
sahilmgandhi	18:6a4db94011d3	865	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
sahilmgandhi	18:6a4db94011d3	866
sahilmgandhi	18:6a4db94011d3	867	hspdif->State= HAL_SPDIFRX_STATE_READY;
sahilmgandhi	18:6a4db94011d3	868
sahilmgandhi	18:6a4db94011d3	869	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	870	__HAL_UNLOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	871
sahilmgandhi	18:6a4db94011d3	872	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	873	}
sahilmgandhi	18:6a4db94011d3	874	}
sahilmgandhi	18:6a4db94011d3	875	while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
sahilmgandhi	18:6a4db94011d3	876
sahilmgandhi	18:6a4db94011d3	877	/* Start reception */
sahilmgandhi	18:6a4db94011d3	878	__HAL_SPDIFRX_RCV(hspdif);
sahilmgandhi	18:6a4db94011d3	879	}
sahilmgandhi	18:6a4db94011d3	880
sahilmgandhi	18:6a4db94011d3	881	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	882	__HAL_UNLOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	883
sahilmgandhi	18:6a4db94011d3	884	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	885	}
sahilmgandhi	18:6a4db94011d3	886	else
sahilmgandhi	18:6a4db94011d3	887	{
sahilmgandhi	18:6a4db94011d3	888	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	889	}
sahilmgandhi	18:6a4db94011d3	890	}
sahilmgandhi	18:6a4db94011d3	891
sahilmgandhi	18:6a4db94011d3	892	/**
sahilmgandhi	18:6a4db94011d3	893	* @brief stop the audio stream receive from the Media.
sahilmgandhi	18:6a4db94011d3	894	* @param hspdif: SPDIFRX handle
sahilmgandhi	18:6a4db94011d3	895	* @retval None
sahilmgandhi	18:6a4db94011d3	896	*/
sahilmgandhi	18:6a4db94011d3	897	HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif)
sahilmgandhi	18:6a4db94011d3	898	{
sahilmgandhi	18:6a4db94011d3	899	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	900	__HAL_LOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	901
sahilmgandhi	18:6a4db94011d3	902	/* Disable the SPDIFRX DMA requests */
sahilmgandhi	18:6a4db94011d3	903	hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
sahilmgandhi	18:6a4db94011d3	904	hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
sahilmgandhi	18:6a4db94011d3	905
sahilmgandhi	18:6a4db94011d3	906	/* Disable the SPDIFRX DMA channel */
sahilmgandhi	18:6a4db94011d3	907	__HAL_DMA_DISABLE(hspdif->hdmaDrRx);
sahilmgandhi	18:6a4db94011d3	908	__HAL_DMA_DISABLE(hspdif->hdmaCsRx);
sahilmgandhi	18:6a4db94011d3	909
sahilmgandhi	18:6a4db94011d3	910	/* Disable SPDIFRX peripheral */
sahilmgandhi	18:6a4db94011d3	911	__HAL_SPDIFRX_IDLE(hspdif);
sahilmgandhi	18:6a4db94011d3	912
sahilmgandhi	18:6a4db94011d3	913	hspdif->State = HAL_SPDIFRX_STATE_READY;
sahilmgandhi	18:6a4db94011d3	914
sahilmgandhi	18:6a4db94011d3	915	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	916	__HAL_UNLOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	917
sahilmgandhi	18:6a4db94011d3	918	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	919	}
sahilmgandhi	18:6a4db94011d3	920
sahilmgandhi	18:6a4db94011d3	921	/**
sahilmgandhi	18:6a4db94011d3	922	* @brief This function handles SPDIFRX interrupt request.
sahilmgandhi	18:6a4db94011d3	923	* @param hspdif: SPDIFRX handle
sahilmgandhi	18:6a4db94011d3	924	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	925	*/
sahilmgandhi	18:6a4db94011d3	926	void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif)
sahilmgandhi	18:6a4db94011d3	927	{
sahilmgandhi	18:6a4db94011d3	928	/* SPDIFRX in mode Data Flow Reception ------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	929	if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_RXNE) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_RXNE) != RESET))
sahilmgandhi	18:6a4db94011d3	930	{
sahilmgandhi	18:6a4db94011d3	931	__HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_RXNE);
sahilmgandhi	18:6a4db94011d3	932	SPDIFRX_ReceiveDataFlow_IT(hspdif);
sahilmgandhi	18:6a4db94011d3	933	}
sahilmgandhi	18:6a4db94011d3	934
sahilmgandhi	18:6a4db94011d3	935	/* SPDIFRX in mode Control Flow Reception ------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	936	if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_CSRNE) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_CSRNE) != RESET))
sahilmgandhi	18:6a4db94011d3	937	{
sahilmgandhi	18:6a4db94011d3	938	__HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_CSRNE);
sahilmgandhi	18:6a4db94011d3	939	SPDIFRX_ReceiveControlFlow_IT(hspdif);
sahilmgandhi	18:6a4db94011d3	940	}
sahilmgandhi	18:6a4db94011d3	941
sahilmgandhi	18:6a4db94011d3	942	/* SPDIFRX Overrun error interrupt occurred ---------------------------------*/
sahilmgandhi	18:6a4db94011d3	943	if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_OVR) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_OVRIE) != RESET))
sahilmgandhi	18:6a4db94011d3	944	{
sahilmgandhi	18:6a4db94011d3	945	__HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_FLAG_OVR);
sahilmgandhi	18:6a4db94011d3	946
sahilmgandhi	18:6a4db94011d3	947	/* Change the SPDIFRX error code */
sahilmgandhi	18:6a4db94011d3	948	hspdif->ErrorCode \|= HAL_SPDIFRX_ERROR_OVR;
sahilmgandhi	18:6a4db94011d3	949
sahilmgandhi	18:6a4db94011d3	950	/* the transfer is not stopped */
sahilmgandhi	18:6a4db94011d3	951	HAL_SPDIFRX_ErrorCallback(hspdif);
sahilmgandhi	18:6a4db94011d3	952	}
sahilmgandhi	18:6a4db94011d3	953
sahilmgandhi	18:6a4db94011d3	954	/* SPDIFRX Parity error interrupt occurred ---------------------------------*/
sahilmgandhi	18:6a4db94011d3	955	if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_PERR) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_PERRIE) != RESET))
sahilmgandhi	18:6a4db94011d3	956	{
sahilmgandhi	18:6a4db94011d3	957	__HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_FLAG_PERR);
sahilmgandhi	18:6a4db94011d3	958
sahilmgandhi	18:6a4db94011d3	959	/* Change the SPDIFRX error code */
sahilmgandhi	18:6a4db94011d3	960	hspdif->ErrorCode \|= HAL_SPDIFRX_ERROR_PE;
sahilmgandhi	18:6a4db94011d3	961
sahilmgandhi	18:6a4db94011d3	962	/* the transfer is not stopped */
sahilmgandhi	18:6a4db94011d3	963	HAL_SPDIFRX_ErrorCallback(hspdif);
sahilmgandhi	18:6a4db94011d3	964	}
sahilmgandhi	18:6a4db94011d3	965	}
sahilmgandhi	18:6a4db94011d3	966
sahilmgandhi	18:6a4db94011d3	967	/**
sahilmgandhi	18:6a4db94011d3	968	* @brief Rx Transfer (Data flow) half completed callbacks
sahilmgandhi	18:6a4db94011d3	969	* @param hspdif: SPDIFRX handle
sahilmgandhi	18:6a4db94011d3	970	* @retval None
sahilmgandhi	18:6a4db94011d3	971	*/
sahilmgandhi	18:6a4db94011d3	972	__weak void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
sahilmgandhi	18:6a4db94011d3	973	{
sahilmgandhi	18:6a4db94011d3	974	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	975	UNUSED(hspdif);
sahilmgandhi	18:6a4db94011d3	976	/* NOTE : This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	977	the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	978	*/
sahilmgandhi	18:6a4db94011d3	979	}
sahilmgandhi	18:6a4db94011d3	980
sahilmgandhi	18:6a4db94011d3	981	/**
sahilmgandhi	18:6a4db94011d3	982	* @brief Rx Transfer (Data flow) completed callbacks
sahilmgandhi	18:6a4db94011d3	983	* @param hspdif: SPDIFRX handle
sahilmgandhi	18:6a4db94011d3	984	* @retval None
sahilmgandhi	18:6a4db94011d3	985	*/
sahilmgandhi	18:6a4db94011d3	986	__weak void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
sahilmgandhi	18:6a4db94011d3	987	{
sahilmgandhi	18:6a4db94011d3	988	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	989	UNUSED(hspdif);
sahilmgandhi	18:6a4db94011d3	990	/* NOTE : This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	991	the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	992	*/
sahilmgandhi	18:6a4db94011d3	993	}
sahilmgandhi	18:6a4db94011d3	994
sahilmgandhi	18:6a4db94011d3	995	/**
sahilmgandhi	18:6a4db94011d3	996	* @brief Rx (Control flow) Transfer half completed callbacks
sahilmgandhi	18:6a4db94011d3	997	* @param hspdif: SPDIFRX handle
sahilmgandhi	18:6a4db94011d3	998	* @retval None
sahilmgandhi	18:6a4db94011d3	999	*/
sahilmgandhi	18:6a4db94011d3	1000	__weak void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
sahilmgandhi	18:6a4db94011d3	1001	{
sahilmgandhi	18:6a4db94011d3	1002	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	1003	UNUSED(hspdif);
sahilmgandhi	18:6a4db94011d3	1004	/* NOTE : This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	1005	the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	1006	*/
sahilmgandhi	18:6a4db94011d3	1007	}
sahilmgandhi	18:6a4db94011d3	1008
sahilmgandhi	18:6a4db94011d3	1009	/**
sahilmgandhi	18:6a4db94011d3	1010	* @brief Rx Transfer (Control flow) completed callbacks
sahilmgandhi	18:6a4db94011d3	1011	* @param hspdif: SPDIFRX handle
sahilmgandhi	18:6a4db94011d3	1012	* @retval None
sahilmgandhi	18:6a4db94011d3	1013	*/
sahilmgandhi	18:6a4db94011d3	1014	__weak void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
sahilmgandhi	18:6a4db94011d3	1015	{
sahilmgandhi	18:6a4db94011d3	1016	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	1017	UNUSED(hspdif);
sahilmgandhi	18:6a4db94011d3	1018	/* NOTE : This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	1019	the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	1020	*/
sahilmgandhi	18:6a4db94011d3	1021	}
sahilmgandhi	18:6a4db94011d3	1022
sahilmgandhi	18:6a4db94011d3	1023	/**
sahilmgandhi	18:6a4db94011d3	1024	* @brief SPDIFRX error callbacks
sahilmgandhi	18:6a4db94011d3	1025	* @param hspdif: SPDIFRX handle
sahilmgandhi	18:6a4db94011d3	1026	* @retval None
sahilmgandhi	18:6a4db94011d3	1027	*/
sahilmgandhi	18:6a4db94011d3	1028	__weak void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif)
sahilmgandhi	18:6a4db94011d3	1029	{
sahilmgandhi	18:6a4db94011d3	1030	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	1031	UNUSED(hspdif);
sahilmgandhi	18:6a4db94011d3	1032	/* NOTE : This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	1033	the HAL_SPDIFRX_ErrorCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	1034	*/
sahilmgandhi	18:6a4db94011d3	1035	}
sahilmgandhi	18:6a4db94011d3	1036
sahilmgandhi	18:6a4db94011d3	1037	/**
sahilmgandhi	18:6a4db94011d3	1038	* @}
sahilmgandhi	18:6a4db94011d3	1039	*/
sahilmgandhi	18:6a4db94011d3	1040
sahilmgandhi	18:6a4db94011d3	1041	/** @defgroup SPDIFRX_Exported_Functions_Group3 Peripheral State and Errors functions
sahilmgandhi	18:6a4db94011d3	1042	* @brief Peripheral State functions
sahilmgandhi	18:6a4db94011d3	1043	*
sahilmgandhi	18:6a4db94011d3	1044	@verbatim
sahilmgandhi	18:6a4db94011d3	1045	===============================================================================
sahilmgandhi	18:6a4db94011d3	1046	##### Peripheral State and Errors functions #####
sahilmgandhi	18:6a4db94011d3	1047	===============================================================================
sahilmgandhi	18:6a4db94011d3	1048	[..]
sahilmgandhi	18:6a4db94011d3	1049	This subsection permit to get in run-time the status of the peripheral
sahilmgandhi	18:6a4db94011d3	1050	and the data flow.
sahilmgandhi	18:6a4db94011d3	1051
sahilmgandhi	18:6a4db94011d3	1052	@endverbatim
sahilmgandhi	18:6a4db94011d3	1053	* @{
sahilmgandhi	18:6a4db94011d3	1054	*/
sahilmgandhi	18:6a4db94011d3	1055
sahilmgandhi	18:6a4db94011d3	1056	/**
sahilmgandhi	18:6a4db94011d3	1057	* @brief Return the SPDIFRX state
sahilmgandhi	18:6a4db94011d3	1058	* @param hspdif : SPDIFRX handle
sahilmgandhi	18:6a4db94011d3	1059	* @retval HAL state
sahilmgandhi	18:6a4db94011d3	1060	*/
sahilmgandhi	18:6a4db94011d3	1061	HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef *hspdif)
sahilmgandhi	18:6a4db94011d3	1062	{
sahilmgandhi	18:6a4db94011d3	1063	return hspdif->State;
sahilmgandhi	18:6a4db94011d3	1064	}
sahilmgandhi	18:6a4db94011d3	1065
sahilmgandhi	18:6a4db94011d3	1066	/**
sahilmgandhi	18:6a4db94011d3	1067	* @brief Return the SPDIFRX error code
sahilmgandhi	18:6a4db94011d3	1068	* @param hspdif : SPDIFRX handle
sahilmgandhi	18:6a4db94011d3	1069	* @retval SPDIFRX Error Code
sahilmgandhi	18:6a4db94011d3	1070	*/
sahilmgandhi	18:6a4db94011d3	1071	uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef *hspdif)
sahilmgandhi	18:6a4db94011d3	1072	{
sahilmgandhi	18:6a4db94011d3	1073	return hspdif->ErrorCode;
sahilmgandhi	18:6a4db94011d3	1074	}
sahilmgandhi	18:6a4db94011d3	1075
sahilmgandhi	18:6a4db94011d3	1076	/**
sahilmgandhi	18:6a4db94011d3	1077	* @}
sahilmgandhi	18:6a4db94011d3	1078	*/
sahilmgandhi	18:6a4db94011d3	1079
sahilmgandhi	18:6a4db94011d3	1080	/**
sahilmgandhi	18:6a4db94011d3	1081	* @brief DMA SPDIFRX receive process (Data flow) complete callback
sahilmgandhi	18:6a4db94011d3	1082	* @param hdma : DMA handle
sahilmgandhi	18:6a4db94011d3	1083	* @retval None
sahilmgandhi	18:6a4db94011d3	1084	*/
sahilmgandhi	18:6a4db94011d3	1085	static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	1086	{
sahilmgandhi	18:6a4db94011d3	1087	SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	1088
sahilmgandhi	18:6a4db94011d3	1089	/* Disable Rx DMA Request */
sahilmgandhi	18:6a4db94011d3	1090	hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
sahilmgandhi	18:6a4db94011d3	1091	hspdif->RxXferCount = 0U;
sahilmgandhi	18:6a4db94011d3	1092
sahilmgandhi	18:6a4db94011d3	1093	hspdif->State = HAL_SPDIFRX_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1094	HAL_SPDIFRX_RxCpltCallback(hspdif);
sahilmgandhi	18:6a4db94011d3	1095	}
sahilmgandhi	18:6a4db94011d3	1096
sahilmgandhi	18:6a4db94011d3	1097	/**
sahilmgandhi	18:6a4db94011d3	1098	* @brief DMA SPDIFRX receive process (Data flow) half complete callback
sahilmgandhi	18:6a4db94011d3	1099	* @param hdma : DMA handle
sahilmgandhi	18:6a4db94011d3	1100	* @retval None
sahilmgandhi	18:6a4db94011d3	1101	*/
sahilmgandhi	18:6a4db94011d3	1102	static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	1103	{
sahilmgandhi	18:6a4db94011d3	1104	SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	1105
sahilmgandhi	18:6a4db94011d3	1106	HAL_SPDIFRX_RxHalfCpltCallback(hspdif);
sahilmgandhi	18:6a4db94011d3	1107	}
sahilmgandhi	18:6a4db94011d3	1108
sahilmgandhi	18:6a4db94011d3	1109	/**
sahilmgandhi	18:6a4db94011d3	1110	* @brief DMA SPDIFRX receive process (Control flow) complete callback
sahilmgandhi	18:6a4db94011d3	1111	* @param hdma : DMA handle
sahilmgandhi	18:6a4db94011d3	1112	* @retval None
sahilmgandhi	18:6a4db94011d3	1113	*/
sahilmgandhi	18:6a4db94011d3	1114	static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	1115	{
sahilmgandhi	18:6a4db94011d3	1116	SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	1117
sahilmgandhi	18:6a4db94011d3	1118	/* Disable Cb DMA Request */
sahilmgandhi	18:6a4db94011d3	1119	hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
sahilmgandhi	18:6a4db94011d3	1120	hspdif->CsXferCount = 0U;
sahilmgandhi	18:6a4db94011d3	1121
sahilmgandhi	18:6a4db94011d3	1122	hspdif->State = HAL_SPDIFRX_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1123	HAL_SPDIFRX_CxCpltCallback(hspdif);
sahilmgandhi	18:6a4db94011d3	1124	}
sahilmgandhi	18:6a4db94011d3	1125
sahilmgandhi	18:6a4db94011d3	1126	/**
sahilmgandhi	18:6a4db94011d3	1127	* @brief DMA SPDIFRX receive process (Control flow) half complete callback
sahilmgandhi	18:6a4db94011d3	1128	* @param hdma : DMA handle
sahilmgandhi	18:6a4db94011d3	1129	* @retval None
sahilmgandhi	18:6a4db94011d3	1130	*/
sahilmgandhi	18:6a4db94011d3	1131	static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	1132	{
sahilmgandhi	18:6a4db94011d3	1133	SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	1134
sahilmgandhi	18:6a4db94011d3	1135	HAL_SPDIFRX_CxHalfCpltCallback(hspdif);
sahilmgandhi	18:6a4db94011d3	1136	}
sahilmgandhi	18:6a4db94011d3	1137
sahilmgandhi	18:6a4db94011d3	1138	/**
sahilmgandhi	18:6a4db94011d3	1139	* @brief DMA SPDIFRX communication error callback
sahilmgandhi	18:6a4db94011d3	1140	* @param hdma : DMA handle
sahilmgandhi	18:6a4db94011d3	1141	* @retval None
sahilmgandhi	18:6a4db94011d3	1142	*/
sahilmgandhi	18:6a4db94011d3	1143	static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	1144	{
sahilmgandhi	18:6a4db94011d3	1145	SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	1146
sahilmgandhi	18:6a4db94011d3	1147	/* Disable Rx and Cb DMA Request */
sahilmgandhi	18:6a4db94011d3	1148	hspdif->Instance->CR &= (uint16_t)(~(SPDIFRX_CR_RXDMAEN \| SPDIFRX_CR_CBDMAEN));
sahilmgandhi	18:6a4db94011d3	1149	hspdif->RxXferCount = 0U;
sahilmgandhi	18:6a4db94011d3	1150
sahilmgandhi	18:6a4db94011d3	1151	hspdif->State= HAL_SPDIFRX_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1152
sahilmgandhi	18:6a4db94011d3	1153	/* Set the error code and execute error callback*/
sahilmgandhi	18:6a4db94011d3	1154	hspdif->ErrorCode \|= HAL_SPDIFRX_ERROR_DMA;
sahilmgandhi	18:6a4db94011d3	1155	HAL_SPDIFRX_ErrorCallback(hspdif);
sahilmgandhi	18:6a4db94011d3	1156	}
sahilmgandhi	18:6a4db94011d3	1157
sahilmgandhi	18:6a4db94011d3	1158	/**
sahilmgandhi	18:6a4db94011d3	1159	* @brief Receive an amount of data (Data Flow) with Interrupt
sahilmgandhi	18:6a4db94011d3	1160	* @param hspdif: SPDIFRX handle
sahilmgandhi	18:6a4db94011d3	1161	* @retval None
sahilmgandhi	18:6a4db94011d3	1162	*/
sahilmgandhi	18:6a4db94011d3	1163	static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
sahilmgandhi	18:6a4db94011d3	1164	{
sahilmgandhi	18:6a4db94011d3	1165	/* Receive data */
sahilmgandhi	18:6a4db94011d3	1166	(*hspdif->pRxBuffPtr++) = hspdif->Instance->DR;
sahilmgandhi	18:6a4db94011d3	1167	hspdif->RxXferCount--;
sahilmgandhi	18:6a4db94011d3	1168
sahilmgandhi	18:6a4db94011d3	1169	if(hspdif->RxXferCount == 0U)
sahilmgandhi	18:6a4db94011d3	1170	{
sahilmgandhi	18:6a4db94011d3	1171	/* Disable RXNE/PE and OVR interrupts */
sahilmgandhi	18:6a4db94011d3	1172	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE \| SPDIFRX_IT_PERRIE \| SPDIFRX_IT_RXNE);
sahilmgandhi	18:6a4db94011d3	1173
sahilmgandhi	18:6a4db94011d3	1174	hspdif->State = HAL_SPDIFRX_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1175
sahilmgandhi	18:6a4db94011d3	1176	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1177	__HAL_UNLOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	1178
sahilmgandhi	18:6a4db94011d3	1179	HAL_SPDIFRX_RxCpltCallback(hspdif);
sahilmgandhi	18:6a4db94011d3	1180	}
sahilmgandhi	18:6a4db94011d3	1181	}
sahilmgandhi	18:6a4db94011d3	1182
sahilmgandhi	18:6a4db94011d3	1183	/**
sahilmgandhi	18:6a4db94011d3	1184	* @brief Receive an amount of data (Control Flow) with Interrupt
sahilmgandhi	18:6a4db94011d3	1185	* @param hspdif: SPDIFRX handle
sahilmgandhi	18:6a4db94011d3	1186	* @retval None
sahilmgandhi	18:6a4db94011d3	1187	*/
sahilmgandhi	18:6a4db94011d3	1188	static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
sahilmgandhi	18:6a4db94011d3	1189	{
sahilmgandhi	18:6a4db94011d3	1190	/* Receive data */
sahilmgandhi	18:6a4db94011d3	1191	(*hspdif->pCsBuffPtr++) = hspdif->Instance->CSR;
sahilmgandhi	18:6a4db94011d3	1192	hspdif->CsXferCount--;
sahilmgandhi	18:6a4db94011d3	1193
sahilmgandhi	18:6a4db94011d3	1194	if(hspdif->CsXferCount == 0U)
sahilmgandhi	18:6a4db94011d3	1195	{
sahilmgandhi	18:6a4db94011d3	1196	/* Disable CSRNE interrupt */
sahilmgandhi	18:6a4db94011d3	1197	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
sahilmgandhi	18:6a4db94011d3	1198
sahilmgandhi	18:6a4db94011d3	1199	hspdif->State = HAL_SPDIFRX_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1200
sahilmgandhi	18:6a4db94011d3	1201	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1202	__HAL_UNLOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	1203
sahilmgandhi	18:6a4db94011d3	1204	HAL_SPDIFRX_CxCpltCallback(hspdif);
sahilmgandhi	18:6a4db94011d3	1205	}
sahilmgandhi	18:6a4db94011d3	1206	}
sahilmgandhi	18:6a4db94011d3	1207
sahilmgandhi	18:6a4db94011d3	1208	/**
sahilmgandhi	18:6a4db94011d3	1209	* @brief This function handles SPDIFRX Communication Timeout.
sahilmgandhi	18:6a4db94011d3	1210	* @param hspdif: SPDIFRX handle
sahilmgandhi	18:6a4db94011d3	1211	* @param Flag: Flag checked
sahilmgandhi	18:6a4db94011d3	1212	* @param Status: Value of the flag expected
sahilmgandhi	18:6a4db94011d3	1213	* @param Timeout: Duration of the timeout
sahilmgandhi	18:6a4db94011d3	1214	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1215	*/
sahilmgandhi	18:6a4db94011d3	1216	static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	1217	{
sahilmgandhi	18:6a4db94011d3	1218	uint32_t tickstart = 0U;
sahilmgandhi	18:6a4db94011d3	1219
sahilmgandhi	18:6a4db94011d3	1220	/* Get tick */
sahilmgandhi	18:6a4db94011d3	1221	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	1222
sahilmgandhi	18:6a4db94011d3	1223	/* Wait until flag is set */
sahilmgandhi	18:6a4db94011d3	1224	if(Status == RESET)
sahilmgandhi	18:6a4db94011d3	1225	{
sahilmgandhi	18:6a4db94011d3	1226	while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) == RESET)
sahilmgandhi	18:6a4db94011d3	1227	{
sahilmgandhi	18:6a4db94011d3	1228	/* Check for the Timeout */
sahilmgandhi	18:6a4db94011d3	1229	if(Timeout != HAL_MAX_DELAY)
sahilmgandhi	18:6a4db94011d3	1230	{
sahilmgandhi	18:6a4db94011d3	1231	if((Timeout == 0U)\|\|((HAL_GetTick() - tickstart ) > Timeout))
sahilmgandhi	18:6a4db94011d3	1232	{
sahilmgandhi	18:6a4db94011d3	1233	/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
sahilmgandhi	18:6a4db94011d3	1234	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
sahilmgandhi	18:6a4db94011d3	1235	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
sahilmgandhi	18:6a4db94011d3	1236	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
sahilmgandhi	18:6a4db94011d3	1237	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
sahilmgandhi	18:6a4db94011d3	1238	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
sahilmgandhi	18:6a4db94011d3	1239	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
sahilmgandhi	18:6a4db94011d3	1240	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
sahilmgandhi	18:6a4db94011d3	1241
sahilmgandhi	18:6a4db94011d3	1242	hspdif->State= HAL_SPDIFRX_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1243
sahilmgandhi	18:6a4db94011d3	1244	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1245	__HAL_UNLOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	1246
sahilmgandhi	18:6a4db94011d3	1247	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1248	}
sahilmgandhi	18:6a4db94011d3	1249	}
sahilmgandhi	18:6a4db94011d3	1250	}
sahilmgandhi	18:6a4db94011d3	1251	}
sahilmgandhi	18:6a4db94011d3	1252	else
sahilmgandhi	18:6a4db94011d3	1253	{
sahilmgandhi	18:6a4db94011d3	1254	while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) != RESET)
sahilmgandhi	18:6a4db94011d3	1255	{
sahilmgandhi	18:6a4db94011d3	1256	/* Check for the Timeout */
sahilmgandhi	18:6a4db94011d3	1257	if(Timeout != HAL_MAX_DELAY)
sahilmgandhi	18:6a4db94011d3	1258	{
sahilmgandhi	18:6a4db94011d3	1259	if((Timeout == 0U)\|\|((HAL_GetTick() - tickstart ) > Timeout))
sahilmgandhi	18:6a4db94011d3	1260	{
sahilmgandhi	18:6a4db94011d3	1261	/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
sahilmgandhi	18:6a4db94011d3	1262	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
sahilmgandhi	18:6a4db94011d3	1263	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
sahilmgandhi	18:6a4db94011d3	1264	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
sahilmgandhi	18:6a4db94011d3	1265	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
sahilmgandhi	18:6a4db94011d3	1266	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
sahilmgandhi	18:6a4db94011d3	1267	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
sahilmgandhi	18:6a4db94011d3	1268	__HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
sahilmgandhi	18:6a4db94011d3	1269
sahilmgandhi	18:6a4db94011d3	1270	hspdif->State= HAL_SPDIFRX_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1271
sahilmgandhi	18:6a4db94011d3	1272	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1273	__HAL_UNLOCK(hspdif);
sahilmgandhi	18:6a4db94011d3	1274
sahilmgandhi	18:6a4db94011d3	1275	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1276	}
sahilmgandhi	18:6a4db94011d3	1277	}
sahilmgandhi	18:6a4db94011d3	1278	}
sahilmgandhi	18:6a4db94011d3	1279	}
sahilmgandhi	18:6a4db94011d3	1280	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1281	}
sahilmgandhi	18:6a4db94011d3	1282
sahilmgandhi	18:6a4db94011d3	1283	/**
sahilmgandhi	18:6a4db94011d3	1284	* @}
sahilmgandhi	18:6a4db94011d3	1285	*/
sahilmgandhi	18:6a4db94011d3	1286	#endif /* STM32F446xx */
sahilmgandhi	18:6a4db94011d3	1287
sahilmgandhi	18:6a4db94011d3	1288	#endif /* HAL_SPDIFRX_MODULE_ENABLED */
sahilmgandhi	18:6a4db94011d3	1289	/**
sahilmgandhi	18:6a4db94011d3	1290	* @}
sahilmgandhi	18:6a4db94011d3	1291	*/
sahilmgandhi	18:6a4db94011d3	1292
sahilmgandhi	18:6a4db94011d3	1293	/**
sahilmgandhi	18:6a4db94011d3	1294	* @}
sahilmgandhi	18:6a4db94011d3	1295	*/
sahilmgandhi	18:6a4db94011d3	1296
sahilmgandhi	18:6a4db94011d3	1297	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
sahilmgandhi	18:6a4db94011d3	1298

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Type:	Program
Created:	25 Apr 2017
Imports:	29
Forks:	0
Commits:	47
Dependents:	0
Dependencies:	2
Followers:	5

The code in this repository is Apache licensed.

mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_spdifrx.c@46:b156ef445742, 2017-06-03 (annotated)

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