MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_irda.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f4xx_hal_irda.h
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.5.0
sahilmgandhi 18:6a4db94011d3 6 * @date 06-May-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief Header file of IRDA HAL module.
sahilmgandhi 18:6a4db94011d3 8 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 9 * @attention
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 12 *
sahilmgandhi 18:6a4db94011d3 13 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 14 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 15 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 16 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 18 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 19 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 21 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 22 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 23 *
sahilmgandhi 18:6a4db94011d3 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 34 *
sahilmgandhi 18:6a4db94011d3 35 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 36 */
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 /* Define to prevent recursive inclusion -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 39 #ifndef __STM32F4xx_HAL_IRDA_H
sahilmgandhi 18:6a4db94011d3 40 #define __STM32F4xx_HAL_IRDA_H
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 43 extern "C" {
sahilmgandhi 18:6a4db94011d3 44 #endif
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 47 #include "stm32f4xx_hal_def.h"
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 /** @addtogroup STM32F4xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 50 * @{
sahilmgandhi 18:6a4db94011d3 51 */
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 /** @addtogroup IRDA
sahilmgandhi 18:6a4db94011d3 54 * @{
sahilmgandhi 18:6a4db94011d3 55 */
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 /* Exported types ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 58 /** @defgroup IRDA_Exported_Types IRDA Exported Types
sahilmgandhi 18:6a4db94011d3 59 * @{
sahilmgandhi 18:6a4db94011d3 60 */
sahilmgandhi 18:6a4db94011d3 61 /**
sahilmgandhi 18:6a4db94011d3 62 * @brief IRDA Init Structure definition
sahilmgandhi 18:6a4db94011d3 63 */
sahilmgandhi 18:6a4db94011d3 64 typedef struct
sahilmgandhi 18:6a4db94011d3 65 {
sahilmgandhi 18:6a4db94011d3 66 uint32_t BaudRate; /*!< This member configures the IRDA communication baud rate.
sahilmgandhi 18:6a4db94011d3 67 The baud rate is computed using the following formula:
sahilmgandhi 18:6a4db94011d3 68 - IntegerDivider = ((PCLKx) / (8 * (hirda->Init.BaudRate)))
sahilmgandhi 18:6a4db94011d3 69 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8) + 0.5 */
sahilmgandhi 18:6a4db94011d3 70
sahilmgandhi 18:6a4db94011d3 71 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
sahilmgandhi 18:6a4db94011d3 72 This parameter can be a value of @ref IRDA_Word_Length */
sahilmgandhi 18:6a4db94011d3 73
sahilmgandhi 18:6a4db94011d3 74 uint32_t Parity; /*!< Specifies the parity mode.
sahilmgandhi 18:6a4db94011d3 75 This parameter can be a value of @ref IRDA_Parity
sahilmgandhi 18:6a4db94011d3 76 @note When parity is enabled, the computed parity is inserted
sahilmgandhi 18:6a4db94011d3 77 at the MSB position of the transmitted data (9th bit when
sahilmgandhi 18:6a4db94011d3 78 the word length is set to 9 data bits; 8th bit when the
sahilmgandhi 18:6a4db94011d3 79 word length is set to 8 data bits). */
sahilmgandhi 18:6a4db94011d3 80
sahilmgandhi 18:6a4db94011d3 81 uint32_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
sahilmgandhi 18:6a4db94011d3 82 This parameter can be a value of @ref IRDA_Mode */
sahilmgandhi 18:6a4db94011d3 83
sahilmgandhi 18:6a4db94011d3 84 uint8_t Prescaler; /*!< Specifies the Prescaler */
sahilmgandhi 18:6a4db94011d3 85
sahilmgandhi 18:6a4db94011d3 86 uint32_t IrDAMode; /*!< Specifies the IrDA mode
sahilmgandhi 18:6a4db94011d3 87 This parameter can be a value of @ref IRDA_Low_Power */
sahilmgandhi 18:6a4db94011d3 88 }IRDA_InitTypeDef;
sahilmgandhi 18:6a4db94011d3 89
sahilmgandhi 18:6a4db94011d3 90 /**
sahilmgandhi 18:6a4db94011d3 91 * @brief HAL IRDA State structures definition
sahilmgandhi 18:6a4db94011d3 92 * @note HAL IRDA State value is a combination of 2 different substates: gState and RxState.
sahilmgandhi 18:6a4db94011d3 93 * - gState contains IRDA state information related to global Handle management
sahilmgandhi 18:6a4db94011d3 94 * and also information related to Tx operations.
sahilmgandhi 18:6a4db94011d3 95 * gState value coding follow below described bitmap :
sahilmgandhi 18:6a4db94011d3 96 * b7-b6 Error information
sahilmgandhi 18:6a4db94011d3 97 * 00 : No Error
sahilmgandhi 18:6a4db94011d3 98 * 01 : (Not Used)
sahilmgandhi 18:6a4db94011d3 99 * 10 : Timeout
sahilmgandhi 18:6a4db94011d3 100 * 11 : Error
sahilmgandhi 18:6a4db94011d3 101 * b5 IP initilisation status
sahilmgandhi 18:6a4db94011d3 102 * 0 : Reset (IP not initialized)
sahilmgandhi 18:6a4db94011d3 103 * 1 : Init done (IP not initialized. HAL IRDA Init function already called)
sahilmgandhi 18:6a4db94011d3 104 * b4-b3 (not used)
sahilmgandhi 18:6a4db94011d3 105 * xx : Should be set to 00
sahilmgandhi 18:6a4db94011d3 106 * b2 Intrinsic process state
sahilmgandhi 18:6a4db94011d3 107 * 0 : Ready
sahilmgandhi 18:6a4db94011d3 108 * 1 : Busy (IP busy with some configuration or internal operations)
sahilmgandhi 18:6a4db94011d3 109 * b1 (not used)
sahilmgandhi 18:6a4db94011d3 110 * x : Should be set to 0
sahilmgandhi 18:6a4db94011d3 111 * b0 Tx state
sahilmgandhi 18:6a4db94011d3 112 * 0 : Ready (no Tx operation ongoing)
sahilmgandhi 18:6a4db94011d3 113 * 1 : Busy (Tx operation ongoing)
sahilmgandhi 18:6a4db94011d3 114 * - RxState contains information related to Rx operations.
sahilmgandhi 18:6a4db94011d3 115 * RxState value coding follow below described bitmap :
sahilmgandhi 18:6a4db94011d3 116 * b7-b6 (not used)
sahilmgandhi 18:6a4db94011d3 117 * xx : Should be set to 00
sahilmgandhi 18:6a4db94011d3 118 * b5 IP initilisation status
sahilmgandhi 18:6a4db94011d3 119 * 0 : Reset (IP not initialized)
sahilmgandhi 18:6a4db94011d3 120 * 1 : Init done (IP not initialized)
sahilmgandhi 18:6a4db94011d3 121 * b4-b2 (not used)
sahilmgandhi 18:6a4db94011d3 122 * xxx : Should be set to 000
sahilmgandhi 18:6a4db94011d3 123 * b1 Rx state
sahilmgandhi 18:6a4db94011d3 124 * 0 : Ready (no Rx operation ongoing)
sahilmgandhi 18:6a4db94011d3 125 * 1 : Busy (Rx operation ongoing)
sahilmgandhi 18:6a4db94011d3 126 * b0 (not used)
sahilmgandhi 18:6a4db94011d3 127 * x : Should be set to 0.
sahilmgandhi 18:6a4db94011d3 128 */
sahilmgandhi 18:6a4db94011d3 129 typedef enum
sahilmgandhi 18:6a4db94011d3 130 {
sahilmgandhi 18:6a4db94011d3 131 HAL_IRDA_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized
sahilmgandhi 18:6a4db94011d3 132 Value is allowed for gState and RxState */
sahilmgandhi 18:6a4db94011d3 133 HAL_IRDA_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
sahilmgandhi 18:6a4db94011d3 134 Value is allowed for gState and RxState */
sahilmgandhi 18:6a4db94011d3 135 HAL_IRDA_STATE_BUSY = 0x24U, /*!< An internal process is ongoing
sahilmgandhi 18:6a4db94011d3 136 Value is allowed for gState only */
sahilmgandhi 18:6a4db94011d3 137 HAL_IRDA_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
sahilmgandhi 18:6a4db94011d3 138 Value is allowed for gState only */
sahilmgandhi 18:6a4db94011d3 139 HAL_IRDA_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
sahilmgandhi 18:6a4db94011d3 140 Value is allowed for RxState only */
sahilmgandhi 18:6a4db94011d3 141 HAL_IRDA_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
sahilmgandhi 18:6a4db94011d3 142 Not to be used for neither gState nor RxState.
sahilmgandhi 18:6a4db94011d3 143 Value is result of combination (Or) between gState and RxState values */
sahilmgandhi 18:6a4db94011d3 144 HAL_IRDA_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
sahilmgandhi 18:6a4db94011d3 145 Value is allowed for gState only */
sahilmgandhi 18:6a4db94011d3 146 HAL_IRDA_STATE_ERROR = 0xE0U /*!< Error
sahilmgandhi 18:6a4db94011d3 147 Value is allowed for gState only */
sahilmgandhi 18:6a4db94011d3 148 }HAL_IRDA_StateTypeDef;
sahilmgandhi 18:6a4db94011d3 149
sahilmgandhi 18:6a4db94011d3 150 /**
sahilmgandhi 18:6a4db94011d3 151 * @brief IRDA handle Structure definition
sahilmgandhi 18:6a4db94011d3 152 */
sahilmgandhi 18:6a4db94011d3 153 typedef struct
sahilmgandhi 18:6a4db94011d3 154 {
sahilmgandhi 18:6a4db94011d3 155 USART_TypeDef *Instance; /* USART registers base address */
sahilmgandhi 18:6a4db94011d3 156
sahilmgandhi 18:6a4db94011d3 157 IRDA_InitTypeDef Init; /* IRDA communication parameters */
sahilmgandhi 18:6a4db94011d3 158
sahilmgandhi 18:6a4db94011d3 159 uint8_t *pTxBuffPtr; /* Pointer to IRDA Tx transfer Buffer */
sahilmgandhi 18:6a4db94011d3 160
sahilmgandhi 18:6a4db94011d3 161 uint16_t TxXferSize; /* IRDA Tx Transfer size */
sahilmgandhi 18:6a4db94011d3 162
sahilmgandhi 18:6a4db94011d3 163 uint16_t TxXferCount; /* IRDA Tx Transfer Counter */
sahilmgandhi 18:6a4db94011d3 164
sahilmgandhi 18:6a4db94011d3 165 uint8_t *pRxBuffPtr; /* Pointer to IRDA Rx transfer Buffer */
sahilmgandhi 18:6a4db94011d3 166
sahilmgandhi 18:6a4db94011d3 167 uint16_t RxXferSize; /* IRDA Rx Transfer size */
sahilmgandhi 18:6a4db94011d3 168
sahilmgandhi 18:6a4db94011d3 169 uint16_t RxXferCount; /* IRDA Rx Transfer Counter */
sahilmgandhi 18:6a4db94011d3 170
sahilmgandhi 18:6a4db94011d3 171 DMA_HandleTypeDef *hdmatx; /* IRDA Tx DMA Handle parameters */
sahilmgandhi 18:6a4db94011d3 172
sahilmgandhi 18:6a4db94011d3 173 DMA_HandleTypeDef *hdmarx; /* IRDA Rx DMA Handle parameters */
sahilmgandhi 18:6a4db94011d3 174
sahilmgandhi 18:6a4db94011d3 175 HAL_LockTypeDef Lock; /* Locking object */
sahilmgandhi 18:6a4db94011d3 176
sahilmgandhi 18:6a4db94011d3 177 __IO HAL_IRDA_StateTypeDef gState; /* IRDA state information related to global Handle management
sahilmgandhi 18:6a4db94011d3 178 and also related to Tx operations.
sahilmgandhi 18:6a4db94011d3 179 This parameter can be a value of @ref HAL_IRDA_StateTypeDef */
sahilmgandhi 18:6a4db94011d3 180
sahilmgandhi 18:6a4db94011d3 181 __IO HAL_IRDA_StateTypeDef RxState; /* IRDA state information related to Rx operations.
sahilmgandhi 18:6a4db94011d3 182 This parameter can be a value of @ref HAL_IRDA_StateTypeDef */
sahilmgandhi 18:6a4db94011d3 183
sahilmgandhi 18:6a4db94011d3 184 __IO uint32_t ErrorCode; /* IRDA Error code */
sahilmgandhi 18:6a4db94011d3 185
sahilmgandhi 18:6a4db94011d3 186 }IRDA_HandleTypeDef;
sahilmgandhi 18:6a4db94011d3 187 /**
sahilmgandhi 18:6a4db94011d3 188 * @}
sahilmgandhi 18:6a4db94011d3 189 */
sahilmgandhi 18:6a4db94011d3 190
sahilmgandhi 18:6a4db94011d3 191 /* Exported constants --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 192 /** @defgroup IRDA_Exported_Constants IRDA Exported constants
sahilmgandhi 18:6a4db94011d3 193 * @{
sahilmgandhi 18:6a4db94011d3 194 */
sahilmgandhi 18:6a4db94011d3 195 /** @defgroup IRDA_Error_Code IRDA Error Code
sahilmgandhi 18:6a4db94011d3 196 * @brief IRDA Error Code
sahilmgandhi 18:6a4db94011d3 197 * @{
sahilmgandhi 18:6a4db94011d3 198 */
sahilmgandhi 18:6a4db94011d3 199 #define HAL_IRDA_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
sahilmgandhi 18:6a4db94011d3 200 #define HAL_IRDA_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */
sahilmgandhi 18:6a4db94011d3 201 #define HAL_IRDA_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */
sahilmgandhi 18:6a4db94011d3 202 #define HAL_IRDA_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */
sahilmgandhi 18:6a4db94011d3 203 #define HAL_IRDA_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */
sahilmgandhi 18:6a4db94011d3 204 #define HAL_IRDA_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */
sahilmgandhi 18:6a4db94011d3 205 /**
sahilmgandhi 18:6a4db94011d3 206 * @}
sahilmgandhi 18:6a4db94011d3 207 */
sahilmgandhi 18:6a4db94011d3 208
sahilmgandhi 18:6a4db94011d3 209 /** @defgroup IRDA_Word_Length IRDA Word Length
sahilmgandhi 18:6a4db94011d3 210 * @{
sahilmgandhi 18:6a4db94011d3 211 */
sahilmgandhi 18:6a4db94011d3 212 #define IRDA_WORDLENGTH_8B ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 213 #define IRDA_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
sahilmgandhi 18:6a4db94011d3 214 /**
sahilmgandhi 18:6a4db94011d3 215 * @}
sahilmgandhi 18:6a4db94011d3 216 */
sahilmgandhi 18:6a4db94011d3 217
sahilmgandhi 18:6a4db94011d3 218 /** @defgroup IRDA_Parity IRDA Parity
sahilmgandhi 18:6a4db94011d3 219 * @{
sahilmgandhi 18:6a4db94011d3 220 */
sahilmgandhi 18:6a4db94011d3 221 #define IRDA_PARITY_NONE ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 222 #define IRDA_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
sahilmgandhi 18:6a4db94011d3 223 #define IRDA_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
sahilmgandhi 18:6a4db94011d3 224 /**
sahilmgandhi 18:6a4db94011d3 225 * @}
sahilmgandhi 18:6a4db94011d3 226 */
sahilmgandhi 18:6a4db94011d3 227
sahilmgandhi 18:6a4db94011d3 228 /** @defgroup IRDA_Mode IRDA Transfer Mode
sahilmgandhi 18:6a4db94011d3 229 * @{
sahilmgandhi 18:6a4db94011d3 230 */
sahilmgandhi 18:6a4db94011d3 231 #define IRDA_MODE_RX ((uint32_t)USART_CR1_RE)
sahilmgandhi 18:6a4db94011d3 232 #define IRDA_MODE_TX ((uint32_t)USART_CR1_TE)
sahilmgandhi 18:6a4db94011d3 233 #define IRDA_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
sahilmgandhi 18:6a4db94011d3 234 /**
sahilmgandhi 18:6a4db94011d3 235 * @}
sahilmgandhi 18:6a4db94011d3 236 */
sahilmgandhi 18:6a4db94011d3 237
sahilmgandhi 18:6a4db94011d3 238 /** @defgroup IRDA_Low_Power IRDA Low Power
sahilmgandhi 18:6a4db94011d3 239 * @{
sahilmgandhi 18:6a4db94011d3 240 */
sahilmgandhi 18:6a4db94011d3 241 #define IRDA_POWERMODE_LOWPOWER ((uint32_t)USART_CR3_IRLP)
sahilmgandhi 18:6a4db94011d3 242 #define IRDA_POWERMODE_NORMAL ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 243 /**
sahilmgandhi 18:6a4db94011d3 244 * @}
sahilmgandhi 18:6a4db94011d3 245 */
sahilmgandhi 18:6a4db94011d3 246
sahilmgandhi 18:6a4db94011d3 247 /** @defgroup IRDA_Flags IRDA Flags
sahilmgandhi 18:6a4db94011d3 248 * Elements values convention: 0xXXXX
sahilmgandhi 18:6a4db94011d3 249 * - 0xXXXX : Flag mask in the SR register
sahilmgandhi 18:6a4db94011d3 250 * @{
sahilmgandhi 18:6a4db94011d3 251 */
sahilmgandhi 18:6a4db94011d3 252 #define IRDA_FLAG_TXE ((uint32_t)0x00000080U)
sahilmgandhi 18:6a4db94011d3 253 #define IRDA_FLAG_TC ((uint32_t)0x00000040U)
sahilmgandhi 18:6a4db94011d3 254 #define IRDA_FLAG_RXNE ((uint32_t)0x00000020U)
sahilmgandhi 18:6a4db94011d3 255 #define IRDA_FLAG_IDLE ((uint32_t)0x00000010U)
sahilmgandhi 18:6a4db94011d3 256 #define IRDA_FLAG_ORE ((uint32_t)0x00000008U)
sahilmgandhi 18:6a4db94011d3 257 #define IRDA_FLAG_NE ((uint32_t)0x00000004U)
sahilmgandhi 18:6a4db94011d3 258 #define IRDA_FLAG_FE ((uint32_t)0x00000002U)
sahilmgandhi 18:6a4db94011d3 259 #define IRDA_FLAG_PE ((uint32_t)0x00000001U)
sahilmgandhi 18:6a4db94011d3 260 /**
sahilmgandhi 18:6a4db94011d3 261 * @}
sahilmgandhi 18:6a4db94011d3 262 */
sahilmgandhi 18:6a4db94011d3 263
sahilmgandhi 18:6a4db94011d3 264 /** @defgroup IRDA_Interrupt_definition IRDA Interrupt Definitions
sahilmgandhi 18:6a4db94011d3 265 * Elements values convention: 0xY000XXXX
sahilmgandhi 18:6a4db94011d3 266 * - XXXX : Interrupt mask in the XX register
sahilmgandhi 18:6a4db94011d3 267 * - Y : Interrupt source register (2bits)
sahilmgandhi 18:6a4db94011d3 268 * - 01: CR1 register
sahilmgandhi 18:6a4db94011d3 269 * - 10: CR2 register
sahilmgandhi 18:6a4db94011d3 270 * - 11: CR3 register
sahilmgandhi 18:6a4db94011d3 271 * @{
sahilmgandhi 18:6a4db94011d3 272 */
sahilmgandhi 18:6a4db94011d3 273 #define IRDA_IT_PE ((uint32_t)(IRDA_CR1_REG_INDEX << 28U | USART_CR1_PEIE))
sahilmgandhi 18:6a4db94011d3 274 #define IRDA_IT_TXE ((uint32_t)(IRDA_CR1_REG_INDEX << 28U | USART_CR1_TXEIE))
sahilmgandhi 18:6a4db94011d3 275 #define IRDA_IT_TC ((uint32_t)(IRDA_CR1_REG_INDEX << 28U | USART_CR1_TCIE))
sahilmgandhi 18:6a4db94011d3 276 #define IRDA_IT_RXNE ((uint32_t)(IRDA_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE))
sahilmgandhi 18:6a4db94011d3 277 #define IRDA_IT_IDLE ((uint32_t)(IRDA_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE))
sahilmgandhi 18:6a4db94011d3 278
sahilmgandhi 18:6a4db94011d3 279 #define IRDA_IT_LBD ((uint32_t)(IRDA_CR2_REG_INDEX << 28U | USART_CR2_LBDIE))
sahilmgandhi 18:6a4db94011d3 280
sahilmgandhi 18:6a4db94011d3 281 #define IRDA_IT_CTS ((uint32_t)(IRDA_CR3_REG_INDEX << 28U | USART_CR3_CTSIE))
sahilmgandhi 18:6a4db94011d3 282 #define IRDA_IT_ERR ((uint32_t)(IRDA_CR3_REG_INDEX << 28U | USART_CR3_EIE))
sahilmgandhi 18:6a4db94011d3 283 /**
sahilmgandhi 18:6a4db94011d3 284 * @}
sahilmgandhi 18:6a4db94011d3 285 */
sahilmgandhi 18:6a4db94011d3 286
sahilmgandhi 18:6a4db94011d3 287 /**
sahilmgandhi 18:6a4db94011d3 288 * @}
sahilmgandhi 18:6a4db94011d3 289 */
sahilmgandhi 18:6a4db94011d3 290
sahilmgandhi 18:6a4db94011d3 291 /* Exported macro ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 292 /** @defgroup IRDA_Exported_Macros IRDA Exported Macros
sahilmgandhi 18:6a4db94011d3 293 * @{
sahilmgandhi 18:6a4db94011d3 294 */
sahilmgandhi 18:6a4db94011d3 295
sahilmgandhi 18:6a4db94011d3 296 /** @brief Reset IRDA handle gstate & RxState
sahilmgandhi 18:6a4db94011d3 297 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 298 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 299 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 300 * @retval None
sahilmgandhi 18:6a4db94011d3 301 */
sahilmgandhi 18:6a4db94011d3 302 #define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__) do{ \
sahilmgandhi 18:6a4db94011d3 303 (__HANDLE__)->gState = HAL_IRDA_STATE_RESET; \
sahilmgandhi 18:6a4db94011d3 304 (__HANDLE__)->RxState = HAL_IRDA_STATE_RESET; \
sahilmgandhi 18:6a4db94011d3 305 } while(0)
sahilmgandhi 18:6a4db94011d3 306
sahilmgandhi 18:6a4db94011d3 307 /** @brief Flushs the IRDA DR register
sahilmgandhi 18:6a4db94011d3 308 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 309 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 310 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 311 */
sahilmgandhi 18:6a4db94011d3 312 #define __HAL_IRDA_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
sahilmgandhi 18:6a4db94011d3 313
sahilmgandhi 18:6a4db94011d3 314 /** @brief Checks whether the specified IRDA flag is set or not.
sahilmgandhi 18:6a4db94011d3 315 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 316 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 317 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 318 * @param __FLAG__: specifies the flag to check.
sahilmgandhi 18:6a4db94011d3 319 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 320 * @arg IRDA_FLAG_TXE: Transmit data register empty flag
sahilmgandhi 18:6a4db94011d3 321 * @arg IRDA_FLAG_TC: Transmission Complete flag
sahilmgandhi 18:6a4db94011d3 322 * @arg IRDA_FLAG_RXNE: Receive data register not empty flag
sahilmgandhi 18:6a4db94011d3 323 * @arg IRDA_FLAG_IDLE: Idle Line detection flag
sahilmgandhi 18:6a4db94011d3 324 * @arg IRDA_FLAG_ORE: OverRun Error flag
sahilmgandhi 18:6a4db94011d3 325 * @arg IRDA_FLAG_NE: Noise Error flag
sahilmgandhi 18:6a4db94011d3 326 * @arg IRDA_FLAG_FE: Framing Error flag
sahilmgandhi 18:6a4db94011d3 327 * @arg IRDA_FLAG_PE: Parity Error flag
sahilmgandhi 18:6a4db94011d3 328 * @retval The new state of __FLAG__ (TRUE or FALSE).
sahilmgandhi 18:6a4db94011d3 329 */
sahilmgandhi 18:6a4db94011d3 330 #define __HAL_IRDA_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
sahilmgandhi 18:6a4db94011d3 331
sahilmgandhi 18:6a4db94011d3 332 /** @brief Clears the specified IRDA pending flag.
sahilmgandhi 18:6a4db94011d3 333 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 334 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 335 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 336 * @param __FLAG__: specifies the flag to check.
sahilmgandhi 18:6a4db94011d3 337 * This parameter can be any combination of the following values:
sahilmgandhi 18:6a4db94011d3 338 * @arg IRDA_FLAG_TC: Transmission Complete flag.
sahilmgandhi 18:6a4db94011d3 339 * @arg IRDA_FLAG_RXNE: Receive data register not empty flag.
sahilmgandhi 18:6a4db94011d3 340 *
sahilmgandhi 18:6a4db94011d3 341 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
sahilmgandhi 18:6a4db94011d3 342 * error) and IDLE (Idle line detected) flags are cleared by software
sahilmgandhi 18:6a4db94011d3 343 * sequence: a read operation to USART_SR register followed by a read
sahilmgandhi 18:6a4db94011d3 344 * operation to USART_DR register.
sahilmgandhi 18:6a4db94011d3 345 * @note RXNE flag can be also cleared by a read to the USART_DR register.
sahilmgandhi 18:6a4db94011d3 346 * @note TC flag can be also cleared by software sequence: a read operation to
sahilmgandhi 18:6a4db94011d3 347 * USART_SR register followed by a write operation to USART_DR register.
sahilmgandhi 18:6a4db94011d3 348 * @note TXE flag is cleared only by a write to the USART_DR register.
sahilmgandhi 18:6a4db94011d3 349 *
sahilmgandhi 18:6a4db94011d3 350 * @retval None
sahilmgandhi 18:6a4db94011d3 351 */
sahilmgandhi 18:6a4db94011d3 352 #define __HAL_IRDA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
sahilmgandhi 18:6a4db94011d3 353
sahilmgandhi 18:6a4db94011d3 354 /** @brief Clear the IRDA PE pending flag.
sahilmgandhi 18:6a4db94011d3 355 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 356 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 357 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 358 * @retval None
sahilmgandhi 18:6a4db94011d3 359 */
sahilmgandhi 18:6a4db94011d3 360 #define __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__) \
sahilmgandhi 18:6a4db94011d3 361 do{ \
sahilmgandhi 18:6a4db94011d3 362 __IO uint32_t tmpreg = 0x00U; \
sahilmgandhi 18:6a4db94011d3 363 tmpreg = (__HANDLE__)->Instance->SR; \
sahilmgandhi 18:6a4db94011d3 364 UNUSED(tmpreg); \
sahilmgandhi 18:6a4db94011d3 365 } while(0)
sahilmgandhi 18:6a4db94011d3 366
sahilmgandhi 18:6a4db94011d3 367 /** @brief Clear the IRDA FE pending flag.
sahilmgandhi 18:6a4db94011d3 368 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 369 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 370 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 371 * @retval None
sahilmgandhi 18:6a4db94011d3 372 */
sahilmgandhi 18:6a4db94011d3 373 #define __HAL_IRDA_CLEAR_FEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
sahilmgandhi 18:6a4db94011d3 374
sahilmgandhi 18:6a4db94011d3 375 /** @brief Clear the IRDA NE pending flag.
sahilmgandhi 18:6a4db94011d3 376 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 377 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 378 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 379 * @retval None
sahilmgandhi 18:6a4db94011d3 380 */
sahilmgandhi 18:6a4db94011d3 381 #define __HAL_IRDA_CLEAR_NEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
sahilmgandhi 18:6a4db94011d3 382
sahilmgandhi 18:6a4db94011d3 383 /** @brief Clear the IRDA ORE pending flag.
sahilmgandhi 18:6a4db94011d3 384 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 385 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 386 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 387 * @retval None
sahilmgandhi 18:6a4db94011d3 388 */
sahilmgandhi 18:6a4db94011d3 389 #define __HAL_IRDA_CLEAR_OREFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
sahilmgandhi 18:6a4db94011d3 390
sahilmgandhi 18:6a4db94011d3 391 /** @brief Clear the IRDA IDLE pending flag.
sahilmgandhi 18:6a4db94011d3 392 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 393 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 394 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 395 * @retval None
sahilmgandhi 18:6a4db94011d3 396 */
sahilmgandhi 18:6a4db94011d3 397 #define __HAL_IRDA_CLEAR_IDLEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__)
sahilmgandhi 18:6a4db94011d3 398
sahilmgandhi 18:6a4db94011d3 399 /** @brief Enables or disables the specified IRDA interrupt.
sahilmgandhi 18:6a4db94011d3 400 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 401 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 402 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 403 * @param __INTERRUPT__: specifies the IRDA interrupt source to check.
sahilmgandhi 18:6a4db94011d3 404 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 405 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
sahilmgandhi 18:6a4db94011d3 406 * @arg IRDA_IT_TC: Transmission complete interrupt
sahilmgandhi 18:6a4db94011d3 407 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
sahilmgandhi 18:6a4db94011d3 408 * @arg IRDA_IT_IDLE: Idle line detection interrupt
sahilmgandhi 18:6a4db94011d3 409 * @arg IRDA_IT_PE: Parity Error interrupt
sahilmgandhi 18:6a4db94011d3 410 * @arg IRDA_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
sahilmgandhi 18:6a4db94011d3 411 * @retval None
sahilmgandhi 18:6a4db94011d3 412 */
sahilmgandhi 18:6a4db94011d3 413 #define __HAL_IRDA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & IRDA_IT_MASK)): \
sahilmgandhi 18:6a4db94011d3 414 (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & IRDA_IT_MASK)): \
sahilmgandhi 18:6a4db94011d3 415 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & IRDA_IT_MASK)))
sahilmgandhi 18:6a4db94011d3 416 #define __HAL_IRDA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & IRDA_IT_MASK)): \
sahilmgandhi 18:6a4db94011d3 417 (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & IRDA_IT_MASK)): \
sahilmgandhi 18:6a4db94011d3 418 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & IRDA_IT_MASK)))
sahilmgandhi 18:6a4db94011d3 419
sahilmgandhi 18:6a4db94011d3 420 /** @brief Checks whether the specified IRDA interrupt has occurred or not.
sahilmgandhi 18:6a4db94011d3 421 * @param __HANDLE__: specifies the USART Handle.
sahilmgandhi 18:6a4db94011d3 422 * This parameter can be USARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or
sahilmgandhi 18:6a4db94011d3 423 * UART peripheral.
sahilmgandhi 18:6a4db94011d3 424 * @param __IT__: specifies the IRDA interrupt source to check.
sahilmgandhi 18:6a4db94011d3 425 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 426 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
sahilmgandhi 18:6a4db94011d3 427 * @arg IRDA_IT_TC: Transmission complete interrupt
sahilmgandhi 18:6a4db94011d3 428 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
sahilmgandhi 18:6a4db94011d3 429 * @arg IRDA_IT_IDLE: Idle line detection interrupt
sahilmgandhi 18:6a4db94011d3 430 * @arg USART_IT_ERR: Error interrupt
sahilmgandhi 18:6a4db94011d3 431 * @arg IRDA_IT_PE: Parity Error interrupt
sahilmgandhi 18:6a4db94011d3 432 * @retval The new state of __IT__ (TRUE or FALSE).
sahilmgandhi 18:6a4db94011d3 433 */
sahilmgandhi 18:6a4db94011d3 434 #define __HAL_IRDA_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == 2U)? \
sahilmgandhi 18:6a4db94011d3 435 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & IRDA_IT_MASK))
sahilmgandhi 18:6a4db94011d3 436
sahilmgandhi 18:6a4db94011d3 437 /** @brief Macro to enable the IRDA's one bit sample method
sahilmgandhi 18:6a4db94011d3 438 * @param __HANDLE__: specifies the IRDA Handle.
sahilmgandhi 18:6a4db94011d3 439 * @retval None
sahilmgandhi 18:6a4db94011d3 440 */
sahilmgandhi 18:6a4db94011d3 441 #define __HAL_IRDA_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
sahilmgandhi 18:6a4db94011d3 442
sahilmgandhi 18:6a4db94011d3 443 /** @brief Macro to disable the IRDA's one bit sample method
sahilmgandhi 18:6a4db94011d3 444 * @param __HANDLE__: specifies the IRDA Handle.
sahilmgandhi 18:6a4db94011d3 445 * @retval None
sahilmgandhi 18:6a4db94011d3 446 */
sahilmgandhi 18:6a4db94011d3 447 #define __HAL_IRDA_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
sahilmgandhi 18:6a4db94011d3 448
sahilmgandhi 18:6a4db94011d3 449 /** @brief Enable UART/USART associated to IRDA Handle
sahilmgandhi 18:6a4db94011d3 450 * @param __HANDLE__: specifies the IRDA Handle.
sahilmgandhi 18:6a4db94011d3 451 * IRDA Handle selects the USARTx or UARTy peripheral
sahilmgandhi 18:6a4db94011d3 452 * (USART,UART availability and x,y values depending on device).
sahilmgandhi 18:6a4db94011d3 453 * @retval None
sahilmgandhi 18:6a4db94011d3 454 */
sahilmgandhi 18:6a4db94011d3 455 #define __HAL_IRDA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
sahilmgandhi 18:6a4db94011d3 456
sahilmgandhi 18:6a4db94011d3 457 /** @brief Disable UART/USART associated to IRDA Handle
sahilmgandhi 18:6a4db94011d3 458 * @param __HANDLE__: specifies the IRDA Handle.
sahilmgandhi 18:6a4db94011d3 459 * IRDA Handle selects the USARTx or UARTy peripheral
sahilmgandhi 18:6a4db94011d3 460 * (USART,UART availability and x,y values depending on device).
sahilmgandhi 18:6a4db94011d3 461 * @retval None
sahilmgandhi 18:6a4db94011d3 462 */
sahilmgandhi 18:6a4db94011d3 463 #define __HAL_IRDA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
sahilmgandhi 18:6a4db94011d3 464
sahilmgandhi 18:6a4db94011d3 465 /**
sahilmgandhi 18:6a4db94011d3 466 * @}
sahilmgandhi 18:6a4db94011d3 467 */
sahilmgandhi 18:6a4db94011d3 468
sahilmgandhi 18:6a4db94011d3 469 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 470 /** @addtogroup IRDA_Exported_Functions
sahilmgandhi 18:6a4db94011d3 471 * @{
sahilmgandhi 18:6a4db94011d3 472 */
sahilmgandhi 18:6a4db94011d3 473
sahilmgandhi 18:6a4db94011d3 474 /** @addtogroup IRDA_Exported_Functions_Group1
sahilmgandhi 18:6a4db94011d3 475 * @{
sahilmgandhi 18:6a4db94011d3 476 */
sahilmgandhi 18:6a4db94011d3 477 /* Initialization/de-initialization functions **********************************/
sahilmgandhi 18:6a4db94011d3 478 HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda);
sahilmgandhi 18:6a4db94011d3 479 HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda);
sahilmgandhi 18:6a4db94011d3 480 void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda);
sahilmgandhi 18:6a4db94011d3 481 void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda);
sahilmgandhi 18:6a4db94011d3 482 /**
sahilmgandhi 18:6a4db94011d3 483 * @}
sahilmgandhi 18:6a4db94011d3 484 */
sahilmgandhi 18:6a4db94011d3 485
sahilmgandhi 18:6a4db94011d3 486 /** @addtogroup IRDA_Exported_Functions_Group2
sahilmgandhi 18:6a4db94011d3 487 * @{
sahilmgandhi 18:6a4db94011d3 488 */
sahilmgandhi 18:6a4db94011d3 489 /* IO operation functions *******************************************************/
sahilmgandhi 18:6a4db94011d3 490 HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 491 HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 492 HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 493 HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 494 HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 495 HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 496 HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda);
sahilmgandhi 18:6a4db94011d3 497 HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda);
sahilmgandhi 18:6a4db94011d3 498 HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda);
sahilmgandhi 18:6a4db94011d3 499
sahilmgandhi 18:6a4db94011d3 500 void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda);
sahilmgandhi 18:6a4db94011d3 501 void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda);
sahilmgandhi 18:6a4db94011d3 502 void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda);
sahilmgandhi 18:6a4db94011d3 503 void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
sahilmgandhi 18:6a4db94011d3 504 void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
sahilmgandhi 18:6a4db94011d3 505 void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda);
sahilmgandhi 18:6a4db94011d3 506 /**
sahilmgandhi 18:6a4db94011d3 507 * @}
sahilmgandhi 18:6a4db94011d3 508 */
sahilmgandhi 18:6a4db94011d3 509
sahilmgandhi 18:6a4db94011d3 510 /** @addtogroup IRDA_Exported_Functions_Group3
sahilmgandhi 18:6a4db94011d3 511 * @{
sahilmgandhi 18:6a4db94011d3 512 */
sahilmgandhi 18:6a4db94011d3 513 /* Peripheral State functions **************************************************/
sahilmgandhi 18:6a4db94011d3 514 HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda);
sahilmgandhi 18:6a4db94011d3 515 uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda);
sahilmgandhi 18:6a4db94011d3 516 /**
sahilmgandhi 18:6a4db94011d3 517 * @}
sahilmgandhi 18:6a4db94011d3 518 */
sahilmgandhi 18:6a4db94011d3 519
sahilmgandhi 18:6a4db94011d3 520 /**
sahilmgandhi 18:6a4db94011d3 521 * @}
sahilmgandhi 18:6a4db94011d3 522 */
sahilmgandhi 18:6a4db94011d3 523
sahilmgandhi 18:6a4db94011d3 524 /* Private types -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 525 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 526 /* Private constants ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 527 /** @defgroup IRDA_Private_Constants IRDA Private Constants
sahilmgandhi 18:6a4db94011d3 528 * @{
sahilmgandhi 18:6a4db94011d3 529 */
sahilmgandhi 18:6a4db94011d3 530
sahilmgandhi 18:6a4db94011d3 531 /** @brief IRDA interruptions flag mask
sahilmgandhi 18:6a4db94011d3 532 *
sahilmgandhi 18:6a4db94011d3 533 */
sahilmgandhi 18:6a4db94011d3 534 #define IRDA_IT_MASK ((uint32_t) USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RXNEIE | \
sahilmgandhi 18:6a4db94011d3 535 USART_CR1_IDLEIE | USART_CR2_LBDIE | USART_CR3_CTSIE | USART_CR3_EIE )
sahilmgandhi 18:6a4db94011d3 536
sahilmgandhi 18:6a4db94011d3 537 #define IRDA_CR1_REG_INDEX 1U
sahilmgandhi 18:6a4db94011d3 538 #define IRDA_CR2_REG_INDEX 2U
sahilmgandhi 18:6a4db94011d3 539 #define IRDA_CR3_REG_INDEX 3U
sahilmgandhi 18:6a4db94011d3 540 /**
sahilmgandhi 18:6a4db94011d3 541 * @}
sahilmgandhi 18:6a4db94011d3 542 */
sahilmgandhi 18:6a4db94011d3 543
sahilmgandhi 18:6a4db94011d3 544 /* Private macros --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 545 /** @defgroup IRDA_Private_Macros IRDA Private Macros
sahilmgandhi 18:6a4db94011d3 546 * @{
sahilmgandhi 18:6a4db94011d3 547 */
sahilmgandhi 18:6a4db94011d3 548 #define IS_IRDA_WORD_LENGTH(LENGTH) (((LENGTH) == IRDA_WORDLENGTH_8B) || \
sahilmgandhi 18:6a4db94011d3 549 ((LENGTH) == IRDA_WORDLENGTH_9B))
sahilmgandhi 18:6a4db94011d3 550 #define IS_IRDA_PARITY(PARITY) (((PARITY) == IRDA_PARITY_NONE) || \
sahilmgandhi 18:6a4db94011d3 551 ((PARITY) == IRDA_PARITY_EVEN) || \
sahilmgandhi 18:6a4db94011d3 552 ((PARITY) == IRDA_PARITY_ODD))
sahilmgandhi 18:6a4db94011d3 553 #define IS_IRDA_MODE(MODE) ((((MODE) & (uint32_t)0x0000FFF3U) == 0x00U) && ((MODE) != (uint32_t)0x00000000U))
sahilmgandhi 18:6a4db94011d3 554 #define IS_IRDA_POWERMODE(MODE) (((MODE) == IRDA_POWERMODE_LOWPOWER) || \
sahilmgandhi 18:6a4db94011d3 555 ((MODE) == IRDA_POWERMODE_NORMAL))
sahilmgandhi 18:6a4db94011d3 556 #define IS_IRDA_BAUDRATE(BAUDRATE) ((BAUDRATE) < 115201U)
sahilmgandhi 18:6a4db94011d3 557
sahilmgandhi 18:6a4db94011d3 558 #define IRDA_DIV(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_)))
sahilmgandhi 18:6a4db94011d3 559 #define IRDA_DIVMANT(_PCLK_, _BAUD_) (IRDA_DIV((_PCLK_), (_BAUD_))/100U)
sahilmgandhi 18:6a4db94011d3 560 #define IRDA_DIVFRAQ(_PCLK_, _BAUD_) (((IRDA_DIV((_PCLK_), (_BAUD_)) - (IRDA_DIVMANT((_PCLK_), (_BAUD_)) * 100U)) * 16U + 50U) / 100U)
sahilmgandhi 18:6a4db94011d3 561 /* UART BRR = mantissa + overflow + fraction
sahilmgandhi 18:6a4db94011d3 562 = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */
sahilmgandhi 18:6a4db94011d3 563 #define IRDA_BRR(_PCLK_, _BAUD_) (((IRDA_DIVMANT((_PCLK_), (_BAUD_)) << 4U) + \
sahilmgandhi 18:6a4db94011d3 564 (IRDA_DIVFRAQ((_PCLK_), (_BAUD_)) & 0xF0U)) + \
sahilmgandhi 18:6a4db94011d3 565 (IRDA_DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0FU))
sahilmgandhi 18:6a4db94011d3 566
sahilmgandhi 18:6a4db94011d3 567 /**
sahilmgandhi 18:6a4db94011d3 568 * @}
sahilmgandhi 18:6a4db94011d3 569 */
sahilmgandhi 18:6a4db94011d3 570
sahilmgandhi 18:6a4db94011d3 571 /* Private functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 572 /** @defgroup IRDA_Private_Functions IRDA Private Functions
sahilmgandhi 18:6a4db94011d3 573 * @{
sahilmgandhi 18:6a4db94011d3 574 */
sahilmgandhi 18:6a4db94011d3 575
sahilmgandhi 18:6a4db94011d3 576 /**
sahilmgandhi 18:6a4db94011d3 577 * @}
sahilmgandhi 18:6a4db94011d3 578 */
sahilmgandhi 18:6a4db94011d3 579
sahilmgandhi 18:6a4db94011d3 580 /**
sahilmgandhi 18:6a4db94011d3 581 * @}
sahilmgandhi 18:6a4db94011d3 582 */
sahilmgandhi 18:6a4db94011d3 583
sahilmgandhi 18:6a4db94011d3 584 /**
sahilmgandhi 18:6a4db94011d3 585 * @}
sahilmgandhi 18:6a4db94011d3 586 */
sahilmgandhi 18:6a4db94011d3 587
sahilmgandhi 18:6a4db94011d3 588 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 589 }
sahilmgandhi 18:6a4db94011d3 590 #endif
sahilmgandhi 18:6a4db94011d3 591
sahilmgandhi 18:6a4db94011d3 592 #endif /* __STM32F4xx_HAL_IRDA_H */
sahilmgandhi 18:6a4db94011d3 593
sahilmgandhi 18:6a4db94011d3 594 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/