MouseCode - Mouse code for the MacroRat

MacroRat » Code » MouseCode

Mouse code for the MacroRat

Dependencies: ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dfsdm.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:: sahilmgandhi
Date:: Sat Jun 03 00:22:44 2017 +0000
Revision:: 46:b156ef445742
Parent:: 18:6a4db94011d3

Final code for internal battlebot competition.

Who changed what in which revision?

User	Revision	Line number	New contents of line
sahilmgandhi	18:6a4db94011d3	1	/**
sahilmgandhi	18:6a4db94011d3	2	******************************************************************************
sahilmgandhi	18:6a4db94011d3	3	* @file stm32f4xx_hal_dfsdm.c
sahilmgandhi	18:6a4db94011d3	4	* @author MCD Application Team
sahilmgandhi	18:6a4db94011d3	5	* @version V1.5.0
sahilmgandhi	18:6a4db94011d3	6	* @date 06-May-2016
sahilmgandhi	18:6a4db94011d3	7	* @brief This file provides firmware functions to manage the following
sahilmgandhi	18:6a4db94011d3	8	* functionalities of the Digital Filter for Sigma-Delta Modulators
sahilmgandhi	18:6a4db94011d3	9	* (DFSDM) peripherals:
sahilmgandhi	18:6a4db94011d3	10	* + Initialization and configuration of channels and filters
sahilmgandhi	18:6a4db94011d3	11	* + Regular channels configuration
sahilmgandhi	18:6a4db94011d3	12	* + Injected channels configuration
sahilmgandhi	18:6a4db94011d3	13	* + Regular/Injected Channels DMA Configuration
sahilmgandhi	18:6a4db94011d3	14	* + Interrupts and flags management
sahilmgandhi	18:6a4db94011d3	15	* + Analog watchdog feature
sahilmgandhi	18:6a4db94011d3	16	* + Short-circuit detector feature
sahilmgandhi	18:6a4db94011d3	17	* + Extremes detector feature
sahilmgandhi	18:6a4db94011d3	18	* + Clock absence detector feature
sahilmgandhi	18:6a4db94011d3	19	* + Break generation on analog watchdog or short-circuit event
sahilmgandhi	18:6a4db94011d3	20	*
sahilmgandhi	18:6a4db94011d3	21	@verbatim
sahilmgandhi	18:6a4db94011d3	22	==============================================================================
sahilmgandhi	18:6a4db94011d3	23	##### How to use this driver #####
sahilmgandhi	18:6a4db94011d3	24	==============================================================================
sahilmgandhi	18:6a4db94011d3	25	[..]
sahilmgandhi	18:6a4db94011d3	26	* Channel initialization *
sahilmgandhi	18:6a4db94011d3	27	==============================
sahilmgandhi	18:6a4db94011d3	28	[..]
sahilmgandhi	18:6a4db94011d3	29	(#) User has first to initialize channels (before filters initialization).
sahilmgandhi	18:6a4db94011d3	30	(#) As prerequisite, fill in the HAL_DFSDM_ChannelMspInit() :
sahilmgandhi	18:6a4db94011d3	31	(++) Enable DFSDMz clock interface with __HAL_RCC_DFSDMz_CLK_ENABLE().
sahilmgandhi	18:6a4db94011d3	32	(++) Enable the clocks for the DFSDMz GPIOS with __HAL_RCC_GPIOx_CLK_ENABLE().
sahilmgandhi	18:6a4db94011d3	33	(++) Configure these DFSDMz pins in alternate mode using HAL_GPIO_Init().
sahilmgandhi	18:6a4db94011d3	34	(++) If interrupt mode is used, enable and configure DFSDMz_FLT0 global
sahilmgandhi	18:6a4db94011d3	35	interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
sahilmgandhi	18:6a4db94011d3	36	(#) Configure the output clock, input, serial interface, analog watchdog,
sahilmgandhi	18:6a4db94011d3	37	offset and data right bit shift parameters for this channel using the
sahilmgandhi	18:6a4db94011d3	38	HAL_DFSDM_ChannelInit() function.
sahilmgandhi	18:6a4db94011d3	39
sahilmgandhi	18:6a4db94011d3	40	* Channel clock absence detector *
sahilmgandhi	18:6a4db94011d3	41	======================================
sahilmgandhi	18:6a4db94011d3	42	[..]
sahilmgandhi	18:6a4db94011d3	43	(#) Start clock absence detector using HAL_DFSDM_ChannelCkabStart() or
sahilmgandhi	18:6a4db94011d3	44	HAL_DFSDM_ChannelCkabStart_IT().
sahilmgandhi	18:6a4db94011d3	45	(#) In polling mode, use HAL_DFSDM_ChannelPollForCkab() to detect the clock
sahilmgandhi	18:6a4db94011d3	46	absence.
sahilmgandhi	18:6a4db94011d3	47	(#) In interrupt mode, HAL_DFSDM_ChannelCkabCallback() will be called if
sahilmgandhi	18:6a4db94011d3	48	clock absence is detected.
sahilmgandhi	18:6a4db94011d3	49	(#) Stop clock absence detector using HAL_DFSDM_ChannelCkabStop() or
sahilmgandhi	18:6a4db94011d3	50	HAL_DFSDM_ChannelCkabStop_IT().
sahilmgandhi	18:6a4db94011d3	51	(#) Please note that the same mode (polling or interrupt) has to be used
sahilmgandhi	18:6a4db94011d3	52	for all channels because the channels are sharing the same interrupt.
sahilmgandhi	18:6a4db94011d3	53	(#) Please note also that in interrupt mode, if clock absence detector is
sahilmgandhi	18:6a4db94011d3	54	stopped for one channel, interrupt will be disabled for all channels.
sahilmgandhi	18:6a4db94011d3	55
sahilmgandhi	18:6a4db94011d3	56	* Channel short circuit detector *
sahilmgandhi	18:6a4db94011d3	57	======================================
sahilmgandhi	18:6a4db94011d3	58	[..]
sahilmgandhi	18:6a4db94011d3	59	(#) Start short circuit detector using HAL_DFSDM_ChannelScdStart() or
sahilmgandhi	18:6a4db94011d3	60	or HAL_DFSDM_ChannelScdStart_IT().
sahilmgandhi	18:6a4db94011d3	61	(#) In polling mode, use HAL_DFSDM_ChannelPollForScd() to detect short
sahilmgandhi	18:6a4db94011d3	62	circuit.
sahilmgandhi	18:6a4db94011d3	63	(#) In interrupt mode, HAL_DFSDM_ChannelScdCallback() will be called if
sahilmgandhi	18:6a4db94011d3	64	short circuit is detected.
sahilmgandhi	18:6a4db94011d3	65	(#) Stop short circuit detector using HAL_DFSDM_ChannelScdStop() or
sahilmgandhi	18:6a4db94011d3	66	or HAL_DFSDM_ChannelScdStop_IT().
sahilmgandhi	18:6a4db94011d3	67	(#) Please note that the same mode (polling or interrupt) has to be used
sahilmgandhi	18:6a4db94011d3	68	for all channels because the channels are sharing the same interrupt.
sahilmgandhi	18:6a4db94011d3	69	(#) Please note also that in interrupt mode, if short circuit detector is
sahilmgandhi	18:6a4db94011d3	70	stopped for one channel, interrupt will be disabled for all channels.
sahilmgandhi	18:6a4db94011d3	71
sahilmgandhi	18:6a4db94011d3	72	* Channel analog watchdog value *
sahilmgandhi	18:6a4db94011d3	73	=====================================
sahilmgandhi	18:6a4db94011d3	74	[..]
sahilmgandhi	18:6a4db94011d3	75	(#) Get analog watchdog filter value of a channel using
sahilmgandhi	18:6a4db94011d3	76	HAL_DFSDM_ChannelGetAwdValue().
sahilmgandhi	18:6a4db94011d3	77
sahilmgandhi	18:6a4db94011d3	78	* Channel offset value *
sahilmgandhi	18:6a4db94011d3	79	=====================================
sahilmgandhi	18:6a4db94011d3	80	[..]
sahilmgandhi	18:6a4db94011d3	81	(#) Modify offset value of a channel using HAL_DFSDM_ChannelModifyOffset().
sahilmgandhi	18:6a4db94011d3	82
sahilmgandhi	18:6a4db94011d3	83	* Filter initialization *
sahilmgandhi	18:6a4db94011d3	84	=============================
sahilmgandhi	18:6a4db94011d3	85	[..]
sahilmgandhi	18:6a4db94011d3	86	(#) After channel initialization, user has to init filters.
sahilmgandhi	18:6a4db94011d3	87	(#) As prerequisite, fill in the HAL_DFSDM_FilterMspInit() :
sahilmgandhi	18:6a4db94011d3	88	(++) If interrupt mode is used , enable and configure DFSDMz_FLTx global
sahilmgandhi	18:6a4db94011d3	89	interrupt with HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ().
sahilmgandhi	18:6a4db94011d3	90	Please note that DFSDMz_FLT0 global interrupt could be already
sahilmgandhi	18:6a4db94011d3	91	enabled if interrupt is used for channel.
sahilmgandhi	18:6a4db94011d3	92	(++) If DMA mode is used, configure DMA with HAL_DMA_Init() and link it
sahilmgandhi	18:6a4db94011d3	93	with DFSDMz filter handle using __HAL_LINKDMA().
sahilmgandhi	18:6a4db94011d3	94	(#) Configure the regular conversion, injected conversion and filter
sahilmgandhi	18:6a4db94011d3	95	parameters for this filter using the HAL_DFSDM_FilterInit() function.
sahilmgandhi	18:6a4db94011d3	96
sahilmgandhi	18:6a4db94011d3	97	* Filter regular channel conversion *
sahilmgandhi	18:6a4db94011d3	98	=========================================
sahilmgandhi	18:6a4db94011d3	99	[..]
sahilmgandhi	18:6a4db94011d3	100	(#) Select regular channel and enable/disable continuous mode using
sahilmgandhi	18:6a4db94011d3	101	HAL_DFSDM_FilterConfigRegChannel().
sahilmgandhi	18:6a4db94011d3	102	(#) Start regular conversion using HAL_DFSDM_FilterRegularStart(),
sahilmgandhi	18:6a4db94011d3	103	HAL_DFSDM_FilterRegularStart_IT(), HAL_DFSDM_FilterRegularStart_DMA() or
sahilmgandhi	18:6a4db94011d3	104	HAL_DFSDM_FilterRegularMsbStart_DMA().
sahilmgandhi	18:6a4db94011d3	105	(#) In polling mode, use HAL_DFSDM_FilterPollForRegConversion() to detect
sahilmgandhi	18:6a4db94011d3	106	the end of regular conversion.
sahilmgandhi	18:6a4db94011d3	107	(#) In interrupt mode, HAL_DFSDM_FilterRegConvCpltCallback() will be called
sahilmgandhi	18:6a4db94011d3	108	at the end of regular conversion.
sahilmgandhi	18:6a4db94011d3	109	(#) Get value of regular conversion and corresponding channel using
sahilmgandhi	18:6a4db94011d3	110	HAL_DFSDM_FilterGetRegularValue().
sahilmgandhi	18:6a4db94011d3	111	(#) In DMA mode, HAL_DFSDM_FilterRegConvHalfCpltCallback() and
sahilmgandhi	18:6a4db94011d3	112	HAL_DFSDM_FilterRegConvCpltCallback() will be called respectively at the
sahilmgandhi	18:6a4db94011d3	113	half transfer and at the transfer complete. Please note that
sahilmgandhi	18:6a4db94011d3	114	HAL_DFSDM_FilterRegConvHalfCpltCallback() will be called only in DMA
sahilmgandhi	18:6a4db94011d3	115	circular mode.
sahilmgandhi	18:6a4db94011d3	116	(#) Stop regular conversion using HAL_DFSDM_FilterRegularStop(),
sahilmgandhi	18:6a4db94011d3	117	HAL_DFSDM_FilterRegularStop_IT() or HAL_DFSDM_FilterRegularStop_DMA().
sahilmgandhi	18:6a4db94011d3	118
sahilmgandhi	18:6a4db94011d3	119	* Filter injected channels conversion *
sahilmgandhi	18:6a4db94011d3	120	===========================================
sahilmgandhi	18:6a4db94011d3	121	[..]
sahilmgandhi	18:6a4db94011d3	122	(#) Select injected channels using HAL_DFSDM_FilterConfigInjChannel().
sahilmgandhi	18:6a4db94011d3	123	(#) Start injected conversion using HAL_DFSDM_FilterInjectedStart(),
sahilmgandhi	18:6a4db94011d3	124	HAL_DFSDM_FilterInjectedStart_IT(), HAL_DFSDM_FilterInjectedStart_DMA() or
sahilmgandhi	18:6a4db94011d3	125	HAL_DFSDM_FilterInjectedMsbStart_DMA().
sahilmgandhi	18:6a4db94011d3	126	(#) In polling mode, use HAL_DFSDM_FilterPollForInjConversion() to detect
sahilmgandhi	18:6a4db94011d3	127	the end of injected conversion.
sahilmgandhi	18:6a4db94011d3	128	(#) In interrupt mode, HAL_DFSDM_FilterInjConvCpltCallback() will be called
sahilmgandhi	18:6a4db94011d3	129	at the end of injected conversion.
sahilmgandhi	18:6a4db94011d3	130	(#) Get value of injected conversion and corresponding channel using
sahilmgandhi	18:6a4db94011d3	131	HAL_DFSDM_FilterGetInjectedValue().
sahilmgandhi	18:6a4db94011d3	132	(#) In DMA mode, HAL_DFSDM_FilterInjConvHalfCpltCallback() and
sahilmgandhi	18:6a4db94011d3	133	HAL_DFSDM_FilterInjConvCpltCallback() will be called respectively at the
sahilmgandhi	18:6a4db94011d3	134	half transfer and at the transfer complete. Please note that
sahilmgandhi	18:6a4db94011d3	135	HAL_DFSDM_FilterInjConvCpltCallback() will be called only in DMA
sahilmgandhi	18:6a4db94011d3	136	circular mode.
sahilmgandhi	18:6a4db94011d3	137	(#) Stop injected conversion using HAL_DFSDM_FilterInjectedStop(),
sahilmgandhi	18:6a4db94011d3	138	HAL_DFSDM_FilterInjectedStop_IT() or HAL_DFSDM_FilterInjectedStop_DMA().
sahilmgandhi	18:6a4db94011d3	139
sahilmgandhi	18:6a4db94011d3	140	* Filter analog watchdog *
sahilmgandhi	18:6a4db94011d3	141	==============================
sahilmgandhi	18:6a4db94011d3	142	[..]
sahilmgandhi	18:6a4db94011d3	143	(#) Start filter analog watchdog using HAL_DFSDM_FilterAwdStart_IT().
sahilmgandhi	18:6a4db94011d3	144	(#) HAL_DFSDM_FilterAwdCallback() will be called if analog watchdog occurs.
sahilmgandhi	18:6a4db94011d3	145	(#) Stop filter analog watchdog using HAL_DFSDM_FilterAwdStop_IT().
sahilmgandhi	18:6a4db94011d3	146
sahilmgandhi	18:6a4db94011d3	147	* Filter extreme detector *
sahilmgandhi	18:6a4db94011d3	148	===============================
sahilmgandhi	18:6a4db94011d3	149	[..]
sahilmgandhi	18:6a4db94011d3	150	(#) Start filter extreme detector using HAL_DFSDM_FilterExdStart().
sahilmgandhi	18:6a4db94011d3	151	(#) Get extreme detector maximum value using HAL_DFSDM_FilterGetExdMaxValue().
sahilmgandhi	18:6a4db94011d3	152	(#) Get extreme detector minimum value using HAL_DFSDM_FilterGetExdMinValue().
sahilmgandhi	18:6a4db94011d3	153	(#) Start filter extreme detector using HAL_DFSDM_FilterExdStop().
sahilmgandhi	18:6a4db94011d3	154
sahilmgandhi	18:6a4db94011d3	155	* Filter conversion time *
sahilmgandhi	18:6a4db94011d3	156	==============================
sahilmgandhi	18:6a4db94011d3	157	[..]
sahilmgandhi	18:6a4db94011d3	158	(#) Get conversion time value using HAL_DFSDM_FilterGetConvTimeValue().
sahilmgandhi	18:6a4db94011d3	159
sahilmgandhi	18:6a4db94011d3	160	@endverbatim
sahilmgandhi	18:6a4db94011d3	161	******************************************************************************
sahilmgandhi	18:6a4db94011d3	162	* @attention
sahilmgandhi	18:6a4db94011d3	163	*
sahilmgandhi	18:6a4db94011d3	164	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi	18:6a4db94011d3	165	*
sahilmgandhi	18:6a4db94011d3	166	* Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi	18:6a4db94011d3	167	* are permitted provided that the following conditions are met:
sahilmgandhi	18:6a4db94011d3	168	* 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi	18:6a4db94011d3	169	* this list of conditions and the following disclaimer.
sahilmgandhi	18:6a4db94011d3	170	* 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi	18:6a4db94011d3	171	* this list of conditions and the following disclaimer in the documentation
sahilmgandhi	18:6a4db94011d3	172	* and/or other materials provided with the distribution.
sahilmgandhi	18:6a4db94011d3	173	* 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi	18:6a4db94011d3	174	* may be used to endorse or promote products derived from this software
sahilmgandhi	18:6a4db94011d3	175	* without specific prior written permission.
sahilmgandhi	18:6a4db94011d3	176	*
sahilmgandhi	18:6a4db94011d3	177	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi	18:6a4db94011d3	178	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi	18:6a4db94011d3	179	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi	18:6a4db94011d3	180	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi	18:6a4db94011d3	181	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi	18:6a4db94011d3	182	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi	18:6a4db94011d3	183	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi	18:6a4db94011d3	184	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi	18:6a4db94011d3	185	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi	18:6a4db94011d3	186	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi	18:6a4db94011d3	187	*
sahilmgandhi	18:6a4db94011d3	188	******************************************************************************
sahilmgandhi	18:6a4db94011d3	189	*/
sahilmgandhi	18:6a4db94011d3	190
sahilmgandhi	18:6a4db94011d3	191	/* Includes ------------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	192	#include "stm32f4xx_hal.h"
sahilmgandhi	18:6a4db94011d3	193
sahilmgandhi	18:6a4db94011d3	194	/** @addtogroup STM32F4xx_HAL_Driver
sahilmgandhi	18:6a4db94011d3	195	* @{
sahilmgandhi	18:6a4db94011d3	196	*/
sahilmgandhi	18:6a4db94011d3	197	#ifdef HAL_DFSDM_MODULE_ENABLED
sahilmgandhi	18:6a4db94011d3	198	#if defined(STM32F412Zx) \|\| defined(STM32F412Vx) \|\| defined(STM32F412Rx) \|\| defined(STM32F412Cx)
sahilmgandhi	18:6a4db94011d3	199	/** @defgroup DFSDM DFSDM
sahilmgandhi	18:6a4db94011d3	200	* @brief DFSDM HAL driver module
sahilmgandhi	18:6a4db94011d3	201	* @{
sahilmgandhi	18:6a4db94011d3	202	*/
sahilmgandhi	18:6a4db94011d3	203
sahilmgandhi	18:6a4db94011d3	204	/* Private typedef -----------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	205	/* Private define ------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	206	/** @defgroup DFSDM_Private_Define DFSDM Private Define
sahilmgandhi	18:6a4db94011d3	207	* @{
sahilmgandhi	18:6a4db94011d3	208	*/
sahilmgandhi	18:6a4db94011d3	209	#define DFSDM_CHCFGR1_CLK_DIV_OFFSET POSITION_VAL(DFSDM_CHCFGR1_CKOUTDIV)
sahilmgandhi	18:6a4db94011d3	210	#define DFSDM_CHAWSCDR_BKSCD_OFFSET POSITION_VAL(DFSDM_CHAWSCDR_BKSCD)
sahilmgandhi	18:6a4db94011d3	211	#define DFSDM_CHAWSCDR_FOSR_OFFSET POSITION_VAL(DFSDM_CHAWSCDR_AWFOSR)
sahilmgandhi	18:6a4db94011d3	212	#define DFSDM_CHCFGR2_OFFSET_OFFSET POSITION_VAL(DFSDM_CHCFGR2_OFFSET)
sahilmgandhi	18:6a4db94011d3	213	#define DFSDM_CHCFGR2_DTRBS_OFFSET POSITION_VAL(DFSDM_CHCFGR2_DTRBS)
sahilmgandhi	18:6a4db94011d3	214	#define DFSDM_FLTFCR_FOSR_OFFSET POSITION_VAL(DFSDM_FLTFCR_FOSR)
sahilmgandhi	18:6a4db94011d3	215	#define DFSDM_FLTCR1_MSB_RCH_OFFSET 8U
sahilmgandhi	18:6a4db94011d3	216	#define DFSDM_FLTCR2_EXCH_OFFSET POSITION_VAL(DFSDM_FLTCR2_EXCH)
sahilmgandhi	18:6a4db94011d3	217	#define DFSDM_FLTCR2_AWDCH_OFFSET POSITION_VAL(DFSDM_FLTCR2_AWDCH)
sahilmgandhi	18:6a4db94011d3	218	#define DFSDM_FLTISR_CKABF_OFFSET POSITION_VAL(DFSDM_FLTISR_CKABF)
sahilmgandhi	18:6a4db94011d3	219	#define DFSDM_FLTISR_SCDF_OFFSET POSITION_VAL(DFSDM_FLTISR_SCDF)
sahilmgandhi	18:6a4db94011d3	220	#define DFSDM_FLTICR_CLRCKABF_OFFSET POSITION_VAL(DFSDM_FLTICR_CLRCKABF)
sahilmgandhi	18:6a4db94011d3	221	#define DFSDM_FLTICR_CLRSCDF_OFFSET POSITION_VAL(DFSDM_FLTICR_CLRSCSDF)
sahilmgandhi	18:6a4db94011d3	222	#define DFSDM_FLTRDATAR_DATA_OFFSET POSITION_VAL(DFSDM_FLTRDATAR_RDATA)
sahilmgandhi	18:6a4db94011d3	223	#define DFSDM_FLTJDATAR_DATA_OFFSET POSITION_VAL(DFSDM_FLTJDATAR_JDATA)
sahilmgandhi	18:6a4db94011d3	224	#define DFSDM_FLTAWHTR_THRESHOLD_OFFSET POSITION_VAL(DFSDM_FLTAWHTR_AWHT)
sahilmgandhi	18:6a4db94011d3	225	#define DFSDM_FLTAWLTR_THRESHOLD_OFFSET POSITION_VAL(DFSDM_FLTAWLTR_AWLT)
sahilmgandhi	18:6a4db94011d3	226	#define DFSDM_FLTEXMAX_DATA_OFFSET POSITION_VAL(DFSDM_FLTEXMAX_EXMAX)
sahilmgandhi	18:6a4db94011d3	227	#define DFSDM_FLTEXMIN_DATA_OFFSET POSITION_VAL(DFSDM_FLTEXMIN_EXMIN)
sahilmgandhi	18:6a4db94011d3	228	#define DFSDM_FLTCNVTIMR_DATA_OFFSET POSITION_VAL(DFSDM_FLTCNVTIMR_CNVCNT)
sahilmgandhi	18:6a4db94011d3	229	#define DFSDM_FLTAWSR_HIGH_OFFSET POSITION_VAL(DFSDM_FLTAWSR_AWHTF)
sahilmgandhi	18:6a4db94011d3	230	#define DFSDM_MSB_MASK 0xFFFF0000U
sahilmgandhi	18:6a4db94011d3	231	#define DFSDM_LSB_MASK 0x0000FFFFU
sahilmgandhi	18:6a4db94011d3	232	#define DFSDM_CKAB_TIMEOUT 5000U
sahilmgandhi	18:6a4db94011d3	233	#define DFSDM1_CHANNEL_NUMBER 4U
sahilmgandhi	18:6a4db94011d3	234	/**
sahilmgandhi	18:6a4db94011d3	235	* @}
sahilmgandhi	18:6a4db94011d3	236	*/
sahilmgandhi	18:6a4db94011d3	237
sahilmgandhi	18:6a4db94011d3	238	/* Private macro -------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	239	/* Private variables ---------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	240	/** @defgroup DFSDM_Private_Variables DFSDM Private Variables
sahilmgandhi	18:6a4db94011d3	241	* @{
sahilmgandhi	18:6a4db94011d3	242	*/
sahilmgandhi	18:6a4db94011d3	243	__IO uint32_t v_dfsdm1ChannelCounter = 0U;
sahilmgandhi	18:6a4db94011d3	244	DFSDM_Channel_HandleTypeDef* a_dfsdm1ChannelHandle[DFSDM1_CHANNEL_NUMBER] = {NULL};
sahilmgandhi	18:6a4db94011d3	245	/**
sahilmgandhi	18:6a4db94011d3	246	* @}
sahilmgandhi	18:6a4db94011d3	247	*/
sahilmgandhi	18:6a4db94011d3	248
sahilmgandhi	18:6a4db94011d3	249	/* Private function prototypes -----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	250	/** @defgroup DFSDM_Private_Functions DFSDM Private Functions
sahilmgandhi	18:6a4db94011d3	251	* @{
sahilmgandhi	18:6a4db94011d3	252	*/
sahilmgandhi	18:6a4db94011d3	253	static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels);
sahilmgandhi	18:6a4db94011d3	254	static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance);
sahilmgandhi	18:6a4db94011d3	255	static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	256	static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	257	static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	258	static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	259	static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	260	static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	261	static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	262	static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	263	static void DFSDM_DMAError(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	264	/**
sahilmgandhi	18:6a4db94011d3	265	* @}
sahilmgandhi	18:6a4db94011d3	266	*/
sahilmgandhi	18:6a4db94011d3	267
sahilmgandhi	18:6a4db94011d3	268	/* Exported functions --------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	269	/** @defgroup DFSDM_Exported_Functions DFSDM Exported Functions
sahilmgandhi	18:6a4db94011d3	270	* @{
sahilmgandhi	18:6a4db94011d3	271	*/
sahilmgandhi	18:6a4db94011d3	272
sahilmgandhi	18:6a4db94011d3	273	/** @defgroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions
sahilmgandhi	18:6a4db94011d3	274	* @brief Channel initialization and de-initialization functions
sahilmgandhi	18:6a4db94011d3	275	*
sahilmgandhi	18:6a4db94011d3	276	@verbatim
sahilmgandhi	18:6a4db94011d3	277	==============================================================================
sahilmgandhi	18:6a4db94011d3	278	##### Channel initialization and de-initialization functions #####
sahilmgandhi	18:6a4db94011d3	279	==============================================================================
sahilmgandhi	18:6a4db94011d3	280	[..] This section provides functions allowing to:
sahilmgandhi	18:6a4db94011d3	281	(+) Initialize the DFSDM channel.
sahilmgandhi	18:6a4db94011d3	282	(+) De-initialize the DFSDM channel.
sahilmgandhi	18:6a4db94011d3	283	@endverbatim
sahilmgandhi	18:6a4db94011d3	284	* @{
sahilmgandhi	18:6a4db94011d3	285	*/
sahilmgandhi	18:6a4db94011d3	286
sahilmgandhi	18:6a4db94011d3	287	/**
sahilmgandhi	18:6a4db94011d3	288	* @brief Initialize the DFSDM channel according to the specified parameters
sahilmgandhi	18:6a4db94011d3	289	* in the DFSDM_ChannelInitTypeDef structure and initialize the associated handle.
sahilmgandhi	18:6a4db94011d3	290	* @param hdfsdm_channel : DFSDM channel handle.
sahilmgandhi	18:6a4db94011d3	291	* @retval HAL status.
sahilmgandhi	18:6a4db94011d3	292	*/
sahilmgandhi	18:6a4db94011d3	293	HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
sahilmgandhi	18:6a4db94011d3	294	{
sahilmgandhi	18:6a4db94011d3	295	/* Check DFSDM Channel handle */
sahilmgandhi	18:6a4db94011d3	296	if(hdfsdm_channel == NULL)
sahilmgandhi	18:6a4db94011d3	297	{
sahilmgandhi	18:6a4db94011d3	298	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	299	}
sahilmgandhi	18:6a4db94011d3	300
sahilmgandhi	18:6a4db94011d3	301	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	302	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
sahilmgandhi	18:6a4db94011d3	303	assert_param(IS_FUNCTIONAL_STATE(hdfsdm_channel->Init.OutputClock.Activation));
sahilmgandhi	18:6a4db94011d3	304	assert_param(IS_DFSDM_CHANNEL_INPUT(hdfsdm_channel->Init.Input.Multiplexer));
sahilmgandhi	18:6a4db94011d3	305	assert_param(IS_DFSDM_CHANNEL_DATA_PACKING(hdfsdm_channel->Init.Input.DataPacking));
sahilmgandhi	18:6a4db94011d3	306	assert_param(IS_DFSDM_CHANNEL_INPUT_PINS(hdfsdm_channel->Init.Input.Pins));
sahilmgandhi	18:6a4db94011d3	307	assert_param(IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(hdfsdm_channel->Init.SerialInterface.Type));
sahilmgandhi	18:6a4db94011d3	308	assert_param(IS_DFSDM_CHANNEL_SPI_CLOCK(hdfsdm_channel->Init.SerialInterface.SpiClock));
sahilmgandhi	18:6a4db94011d3	309	assert_param(IS_DFSDM_CHANNEL_FILTER_ORDER(hdfsdm_channel->Init.Awd.FilterOrder));
sahilmgandhi	18:6a4db94011d3	310	assert_param(IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(hdfsdm_channel->Init.Awd.Oversampling));
sahilmgandhi	18:6a4db94011d3	311	assert_param(IS_DFSDM_CHANNEL_OFFSET(hdfsdm_channel->Init.Offset));
sahilmgandhi	18:6a4db94011d3	312	assert_param(IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(hdfsdm_channel->Init.RightBitShift));
sahilmgandhi	18:6a4db94011d3	313
sahilmgandhi	18:6a4db94011d3	314	/* Check that channel has not been already initialized */
sahilmgandhi	18:6a4db94011d3	315	if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] != NULL)
sahilmgandhi	18:6a4db94011d3	316	{
sahilmgandhi	18:6a4db94011d3	317	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	318	}
sahilmgandhi	18:6a4db94011d3	319
sahilmgandhi	18:6a4db94011d3	320	/* Call MSP init function */
sahilmgandhi	18:6a4db94011d3	321	HAL_DFSDM_ChannelMspInit(hdfsdm_channel);
sahilmgandhi	18:6a4db94011d3	322
sahilmgandhi	18:6a4db94011d3	323	/* Update the channel counter */
sahilmgandhi	18:6a4db94011d3	324	v_dfsdm1ChannelCounter++;
sahilmgandhi	18:6a4db94011d3	325
sahilmgandhi	18:6a4db94011d3	326	/* Configure output serial clock and enable global DFSDM interface only for first channel */
sahilmgandhi	18:6a4db94011d3	327	if(v_dfsdm1ChannelCounter == 1U)
sahilmgandhi	18:6a4db94011d3	328	{
sahilmgandhi	18:6a4db94011d3	329	assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK(hdfsdm_channel->Init.OutputClock.Selection));
sahilmgandhi	18:6a4db94011d3	330	/* Set the output serial clock source */
sahilmgandhi	18:6a4db94011d3	331	DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTSRC);
sahilmgandhi	18:6a4db94011d3	332	DFSDM1_Channel0->CHCFGR1 \|= hdfsdm_channel->Init.OutputClock.Selection;
sahilmgandhi	18:6a4db94011d3	333
sahilmgandhi	18:6a4db94011d3	334	/* Reset clock divider */
sahilmgandhi	18:6a4db94011d3	335	DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKOUTDIV);
sahilmgandhi	18:6a4db94011d3	336	if(hdfsdm_channel->Init.OutputClock.Activation == ENABLE)
sahilmgandhi	18:6a4db94011d3	337	{
sahilmgandhi	18:6a4db94011d3	338	assert_param(IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(hdfsdm_channel->Init.OutputClock.Divider));
sahilmgandhi	18:6a4db94011d3	339	/* Set the output clock divider */
sahilmgandhi	18:6a4db94011d3	340	DFSDM1_Channel0->CHCFGR1 \|= (uint32_t) ((hdfsdm_channel->Init.OutputClock.Divider - 1U) <<
sahilmgandhi	18:6a4db94011d3	341	DFSDM_CHCFGR1_CLK_DIV_OFFSET);
sahilmgandhi	18:6a4db94011d3	342	}
sahilmgandhi	18:6a4db94011d3	343
sahilmgandhi	18:6a4db94011d3	344	/* enable the DFSDM global interface */
sahilmgandhi	18:6a4db94011d3	345	DFSDM1_Channel0->CHCFGR1 \|= DFSDM_CHCFGR1_DFSDMEN;
sahilmgandhi	18:6a4db94011d3	346	}
sahilmgandhi	18:6a4db94011d3	347
sahilmgandhi	18:6a4db94011d3	348	/* Set channel input parameters */
sahilmgandhi	18:6a4db94011d3	349	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_DATPACK \| DFSDM_CHCFGR1_DATMPX \|
sahilmgandhi	18:6a4db94011d3	350	DFSDM_CHCFGR1_CHINSEL);
sahilmgandhi	18:6a4db94011d3	351	hdfsdm_channel->Instance->CHCFGR1 \|= (hdfsdm_channel->Init.Input.Multiplexer \|
sahilmgandhi	18:6a4db94011d3	352	hdfsdm_channel->Init.Input.DataPacking \|
sahilmgandhi	18:6a4db94011d3	353	hdfsdm_channel->Init.Input.Pins);
sahilmgandhi	18:6a4db94011d3	354
sahilmgandhi	18:6a4db94011d3	355	/* Set serial interface parameters */
sahilmgandhi	18:6a4db94011d3	356	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SITP \| DFSDM_CHCFGR1_SPICKSEL);
sahilmgandhi	18:6a4db94011d3	357	hdfsdm_channel->Instance->CHCFGR1 \|= (hdfsdm_channel->Init.SerialInterface.Type \|
sahilmgandhi	18:6a4db94011d3	358	hdfsdm_channel->Init.SerialInterface.SpiClock);
sahilmgandhi	18:6a4db94011d3	359
sahilmgandhi	18:6a4db94011d3	360	/* Set analog watchdog parameters */
sahilmgandhi	18:6a4db94011d3	361	hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_AWFORD \| DFSDM_CHAWSCDR_AWFOSR);
sahilmgandhi	18:6a4db94011d3	362	hdfsdm_channel->Instance->CHAWSCDR \|= (hdfsdm_channel->Init.Awd.FilterOrder \|
sahilmgandhi	18:6a4db94011d3	363	((hdfsdm_channel->Init.Awd.Oversampling - 1U) << DFSDM_CHAWSCDR_FOSR_OFFSET));
sahilmgandhi	18:6a4db94011d3	364
sahilmgandhi	18:6a4db94011d3	365	/* Set channel offset and right bit shift */
sahilmgandhi	18:6a4db94011d3	366	hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET \| DFSDM_CHCFGR2_DTRBS);
sahilmgandhi	18:6a4db94011d3	367	hdfsdm_channel->Instance->CHCFGR2 \|= (((uint32_t) hdfsdm_channel->Init.Offset << DFSDM_CHCFGR2_OFFSET_OFFSET) \|
sahilmgandhi	18:6a4db94011d3	368	(hdfsdm_channel->Init.RightBitShift << DFSDM_CHCFGR2_DTRBS_OFFSET));
sahilmgandhi	18:6a4db94011d3	369
sahilmgandhi	18:6a4db94011d3	370	/* Enable DFSDM channel */
sahilmgandhi	18:6a4db94011d3	371	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_CHEN;
sahilmgandhi	18:6a4db94011d3	372
sahilmgandhi	18:6a4db94011d3	373	/* Set DFSDM Channel to ready state */
sahilmgandhi	18:6a4db94011d3	374	hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_READY;
sahilmgandhi	18:6a4db94011d3	375
sahilmgandhi	18:6a4db94011d3	376	/* Store channel handle in DFSDM channel handle table */
sahilmgandhi	18:6a4db94011d3	377	a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = hdfsdm_channel;
sahilmgandhi	18:6a4db94011d3	378
sahilmgandhi	18:6a4db94011d3	379	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	380	}
sahilmgandhi	18:6a4db94011d3	381
sahilmgandhi	18:6a4db94011d3	382	/**
sahilmgandhi	18:6a4db94011d3	383	* @brief De-initialize the DFSDM channel.
sahilmgandhi	18:6a4db94011d3	384	* @param hdfsdm_channel : DFSDM channel handle.
sahilmgandhi	18:6a4db94011d3	385	* @retval HAL status.
sahilmgandhi	18:6a4db94011d3	386	*/
sahilmgandhi	18:6a4db94011d3	387	HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
sahilmgandhi	18:6a4db94011d3	388	{
sahilmgandhi	18:6a4db94011d3	389	/* Check DFSDM Channel handle */
sahilmgandhi	18:6a4db94011d3	390	if(hdfsdm_channel == NULL)
sahilmgandhi	18:6a4db94011d3	391	{
sahilmgandhi	18:6a4db94011d3	392	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	393	}
sahilmgandhi	18:6a4db94011d3	394
sahilmgandhi	18:6a4db94011d3	395	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	396	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
sahilmgandhi	18:6a4db94011d3	397
sahilmgandhi	18:6a4db94011d3	398	/* Check that channel has not been already deinitialized */
sahilmgandhi	18:6a4db94011d3	399	if(a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] == NULL)
sahilmgandhi	18:6a4db94011d3	400	{
sahilmgandhi	18:6a4db94011d3	401	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	402	}
sahilmgandhi	18:6a4db94011d3	403
sahilmgandhi	18:6a4db94011d3	404	/* Disable the DFSDM channel */
sahilmgandhi	18:6a4db94011d3	405	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CHEN);
sahilmgandhi	18:6a4db94011d3	406
sahilmgandhi	18:6a4db94011d3	407	/* Update the channel counter */
sahilmgandhi	18:6a4db94011d3	408	v_dfsdm1ChannelCounter--;
sahilmgandhi	18:6a4db94011d3	409
sahilmgandhi	18:6a4db94011d3	410	/* Disable global DFSDM at deinit of last channel */
sahilmgandhi	18:6a4db94011d3	411	if(v_dfsdm1ChannelCounter == 0U)
sahilmgandhi	18:6a4db94011d3	412	{
sahilmgandhi	18:6a4db94011d3	413	DFSDM1_Channel0->CHCFGR1 &= ~(DFSDM_CHCFGR1_DFSDMEN);
sahilmgandhi	18:6a4db94011d3	414	}
sahilmgandhi	18:6a4db94011d3	415
sahilmgandhi	18:6a4db94011d3	416	/* Call MSP deinit function */
sahilmgandhi	18:6a4db94011d3	417	HAL_DFSDM_ChannelMspDeInit(hdfsdm_channel);
sahilmgandhi	18:6a4db94011d3	418
sahilmgandhi	18:6a4db94011d3	419	/* Set DFSDM Channel in reset state */
sahilmgandhi	18:6a4db94011d3	420	hdfsdm_channel->State = HAL_DFSDM_CHANNEL_STATE_RESET;
sahilmgandhi	18:6a4db94011d3	421
sahilmgandhi	18:6a4db94011d3	422	/* Reset channel handle in DFSDM channel handle table */
sahilmgandhi	18:6a4db94011d3	423	a_dfsdm1ChannelHandle[DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance)] = (DFSDM_Channel_HandleTypeDef *) NULL;
sahilmgandhi	18:6a4db94011d3	424
sahilmgandhi	18:6a4db94011d3	425	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	426	}
sahilmgandhi	18:6a4db94011d3	427
sahilmgandhi	18:6a4db94011d3	428	/**
sahilmgandhi	18:6a4db94011d3	429	* @brief Initialize the DFSDM channel MSP.
sahilmgandhi	18:6a4db94011d3	430	* @param hdfsdm_channel : DFSDM channel handle.
sahilmgandhi	18:6a4db94011d3	431	* @retval None
sahilmgandhi	18:6a4db94011d3	432	*/
sahilmgandhi	18:6a4db94011d3	433	__weak void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
sahilmgandhi	18:6a4db94011d3	434	{
sahilmgandhi	18:6a4db94011d3	435	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	436	UNUSED(hdfsdm_channel);
sahilmgandhi	18:6a4db94011d3	437	/* NOTE : This function should not be modified, when the function is needed,
sahilmgandhi	18:6a4db94011d3	438	the HAL_DFSDM_ChannelMspInit could be implemented in the user file.
sahilmgandhi	18:6a4db94011d3	439	*/
sahilmgandhi	18:6a4db94011d3	440	}
sahilmgandhi	18:6a4db94011d3	441
sahilmgandhi	18:6a4db94011d3	442	/**
sahilmgandhi	18:6a4db94011d3	443	* @brief De-initialize the DFSDM channel MSP.
sahilmgandhi	18:6a4db94011d3	444	* @param hdfsdm_channel : DFSDM channel handle.
sahilmgandhi	18:6a4db94011d3	445	* @retval None
sahilmgandhi	18:6a4db94011d3	446	*/
sahilmgandhi	18:6a4db94011d3	447	__weak void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
sahilmgandhi	18:6a4db94011d3	448	{
sahilmgandhi	18:6a4db94011d3	449	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	450	UNUSED(hdfsdm_channel);
sahilmgandhi	18:6a4db94011d3	451	/* NOTE : This function should not be modified, when the function is needed,
sahilmgandhi	18:6a4db94011d3	452	the HAL_DFSDM_ChannelMspDeInit could be implemented in the user file.
sahilmgandhi	18:6a4db94011d3	453	*/
sahilmgandhi	18:6a4db94011d3	454	}
sahilmgandhi	18:6a4db94011d3	455
sahilmgandhi	18:6a4db94011d3	456	/**
sahilmgandhi	18:6a4db94011d3	457	* @}
sahilmgandhi	18:6a4db94011d3	458	*/
sahilmgandhi	18:6a4db94011d3	459
sahilmgandhi	18:6a4db94011d3	460	/** @defgroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions
sahilmgandhi	18:6a4db94011d3	461	* @brief Channel operation functions
sahilmgandhi	18:6a4db94011d3	462	*
sahilmgandhi	18:6a4db94011d3	463	@verbatim
sahilmgandhi	18:6a4db94011d3	464	==============================================================================
sahilmgandhi	18:6a4db94011d3	465	##### Channel operation functions #####
sahilmgandhi	18:6a4db94011d3	466	==============================================================================
sahilmgandhi	18:6a4db94011d3	467	[..] This section provides functions allowing to:
sahilmgandhi	18:6a4db94011d3	468	(+) Manage clock absence detector feature.
sahilmgandhi	18:6a4db94011d3	469	(+) Manage short circuit detector feature.
sahilmgandhi	18:6a4db94011d3	470	(+) Get analog watchdog value.
sahilmgandhi	18:6a4db94011d3	471	(+) Modify offset value.
sahilmgandhi	18:6a4db94011d3	472	@endverbatim
sahilmgandhi	18:6a4db94011d3	473	* @{
sahilmgandhi	18:6a4db94011d3	474	*/
sahilmgandhi	18:6a4db94011d3	475
sahilmgandhi	18:6a4db94011d3	476	/**
sahilmgandhi	18:6a4db94011d3	477	* @brief This function allows to start clock absence detection in polling mode.
sahilmgandhi	18:6a4db94011d3	478	* @note Same mode has to be used for all channels.
sahilmgandhi	18:6a4db94011d3	479	* @note If clock is not available on this channel during 5 seconds,
sahilmgandhi	18:6a4db94011d3	480	* clock absence detection will not be activated and function
sahilmgandhi	18:6a4db94011d3	481	* will return HAL_TIMEOUT error.
sahilmgandhi	18:6a4db94011d3	482	* @param hdfsdm_channel : DFSDM channel handle.
sahilmgandhi	18:6a4db94011d3	483	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	484	*/
sahilmgandhi	18:6a4db94011d3	485	HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
sahilmgandhi	18:6a4db94011d3	486	{
sahilmgandhi	18:6a4db94011d3	487	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	488	uint32_t channel;
sahilmgandhi	18:6a4db94011d3	489	uint32_t tickstart;
sahilmgandhi	18:6a4db94011d3	490
sahilmgandhi	18:6a4db94011d3	491	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	492	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
sahilmgandhi	18:6a4db94011d3	493
sahilmgandhi	18:6a4db94011d3	494	/* Check DFSDM channel state */
sahilmgandhi	18:6a4db94011d3	495	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
sahilmgandhi	18:6a4db94011d3	496	{
sahilmgandhi	18:6a4db94011d3	497	/* Return error status */
sahilmgandhi	18:6a4db94011d3	498	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	499	}
sahilmgandhi	18:6a4db94011d3	500	else
sahilmgandhi	18:6a4db94011d3	501	{
sahilmgandhi	18:6a4db94011d3	502	/* Get channel number from channel instance */
sahilmgandhi	18:6a4db94011d3	503	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
sahilmgandhi	18:6a4db94011d3	504
sahilmgandhi	18:6a4db94011d3	505	/* Get timeout */
sahilmgandhi	18:6a4db94011d3	506	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	507
sahilmgandhi	18:6a4db94011d3	508	/* Clear clock absence flag */
sahilmgandhi	18:6a4db94011d3	509	while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1U) != 0U)
sahilmgandhi	18:6a4db94011d3	510	{
sahilmgandhi	18:6a4db94011d3	511	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
sahilmgandhi	18:6a4db94011d3	512
sahilmgandhi	18:6a4db94011d3	513	/* Check the Timeout */
sahilmgandhi	18:6a4db94011d3	514	if((HAL_GetTick()-tickstart) > DFSDM_CKAB_TIMEOUT)
sahilmgandhi	18:6a4db94011d3	515	{
sahilmgandhi	18:6a4db94011d3	516	/* Set timeout status */
sahilmgandhi	18:6a4db94011d3	517	status = HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	518	break;
sahilmgandhi	18:6a4db94011d3	519	}
sahilmgandhi	18:6a4db94011d3	520	}
sahilmgandhi	18:6a4db94011d3	521
sahilmgandhi	18:6a4db94011d3	522	if(status == HAL_OK)
sahilmgandhi	18:6a4db94011d3	523	{
sahilmgandhi	18:6a4db94011d3	524	/* Start clock absence detection */
sahilmgandhi	18:6a4db94011d3	525	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_CKABEN;
sahilmgandhi	18:6a4db94011d3	526	}
sahilmgandhi	18:6a4db94011d3	527	}
sahilmgandhi	18:6a4db94011d3	528	/* Return function status */
sahilmgandhi	18:6a4db94011d3	529	return status;
sahilmgandhi	18:6a4db94011d3	530	}
sahilmgandhi	18:6a4db94011d3	531
sahilmgandhi	18:6a4db94011d3	532	/**
sahilmgandhi	18:6a4db94011d3	533	* @brief This function allows to poll for the clock absence detection.
sahilmgandhi	18:6a4db94011d3	534	* @param hdfsdm_channel : DFSDM channel handle.
sahilmgandhi	18:6a4db94011d3	535	* @param Timeout : Timeout value in milliseconds.
sahilmgandhi	18:6a4db94011d3	536	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	537	*/
sahilmgandhi	18:6a4db94011d3	538	HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
sahilmgandhi	18:6a4db94011d3	539	uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	540	{
sahilmgandhi	18:6a4db94011d3	541	uint32_t tickstart;
sahilmgandhi	18:6a4db94011d3	542	uint32_t channel;
sahilmgandhi	18:6a4db94011d3	543
sahilmgandhi	18:6a4db94011d3	544	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	545	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
sahilmgandhi	18:6a4db94011d3	546
sahilmgandhi	18:6a4db94011d3	547	/* Check DFSDM channel state */
sahilmgandhi	18:6a4db94011d3	548	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
sahilmgandhi	18:6a4db94011d3	549	{
sahilmgandhi	18:6a4db94011d3	550	/* Return error status */
sahilmgandhi	18:6a4db94011d3	551	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	552	}
sahilmgandhi	18:6a4db94011d3	553	else
sahilmgandhi	18:6a4db94011d3	554	{
sahilmgandhi	18:6a4db94011d3	555	/* Get channel number from channel instance */
sahilmgandhi	18:6a4db94011d3	556	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
sahilmgandhi	18:6a4db94011d3	557
sahilmgandhi	18:6a4db94011d3	558	/* Get timeout */
sahilmgandhi	18:6a4db94011d3	559	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	560
sahilmgandhi	18:6a4db94011d3	561	/* Wait clock absence detection */
sahilmgandhi	18:6a4db94011d3	562	while((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1U) == 0U)
sahilmgandhi	18:6a4db94011d3	563	{
sahilmgandhi	18:6a4db94011d3	564	/* Check the Timeout */
sahilmgandhi	18:6a4db94011d3	565	if(Timeout != HAL_MAX_DELAY)
sahilmgandhi	18:6a4db94011d3	566	{
sahilmgandhi	18:6a4db94011d3	567	if((Timeout == 0U) \|\| ((HAL_GetTick()-tickstart) > Timeout))
sahilmgandhi	18:6a4db94011d3	568	{
sahilmgandhi	18:6a4db94011d3	569	/* Return timeout status */
sahilmgandhi	18:6a4db94011d3	570	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	571	}
sahilmgandhi	18:6a4db94011d3	572	}
sahilmgandhi	18:6a4db94011d3	573	}
sahilmgandhi	18:6a4db94011d3	574
sahilmgandhi	18:6a4db94011d3	575	/* Clear clock absence detection flag */
sahilmgandhi	18:6a4db94011d3	576	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
sahilmgandhi	18:6a4db94011d3	577
sahilmgandhi	18:6a4db94011d3	578	/* Return function status */
sahilmgandhi	18:6a4db94011d3	579	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	580	}
sahilmgandhi	18:6a4db94011d3	581	}
sahilmgandhi	18:6a4db94011d3	582
sahilmgandhi	18:6a4db94011d3	583	/**
sahilmgandhi	18:6a4db94011d3	584	* @brief This function allows to stop clock absence detection in polling mode.
sahilmgandhi	18:6a4db94011d3	585	* @param hdfsdm_channel : DFSDM channel handle.
sahilmgandhi	18:6a4db94011d3	586	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	587	*/
sahilmgandhi	18:6a4db94011d3	588	HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
sahilmgandhi	18:6a4db94011d3	589	{
sahilmgandhi	18:6a4db94011d3	590	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	591	uint32_t channel;
sahilmgandhi	18:6a4db94011d3	592
sahilmgandhi	18:6a4db94011d3	593	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	594	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
sahilmgandhi	18:6a4db94011d3	595
sahilmgandhi	18:6a4db94011d3	596	/* Check DFSDM channel state */
sahilmgandhi	18:6a4db94011d3	597	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
sahilmgandhi	18:6a4db94011d3	598	{
sahilmgandhi	18:6a4db94011d3	599	/* Return error status */
sahilmgandhi	18:6a4db94011d3	600	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	601	}
sahilmgandhi	18:6a4db94011d3	602	else
sahilmgandhi	18:6a4db94011d3	603	{
sahilmgandhi	18:6a4db94011d3	604	/* Stop clock absence detection */
sahilmgandhi	18:6a4db94011d3	605	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
sahilmgandhi	18:6a4db94011d3	606
sahilmgandhi	18:6a4db94011d3	607	/* Clear clock absence flag */
sahilmgandhi	18:6a4db94011d3	608	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
sahilmgandhi	18:6a4db94011d3	609	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
sahilmgandhi	18:6a4db94011d3	610	}
sahilmgandhi	18:6a4db94011d3	611	/* Return function status */
sahilmgandhi	18:6a4db94011d3	612	return status;
sahilmgandhi	18:6a4db94011d3	613	}
sahilmgandhi	18:6a4db94011d3	614
sahilmgandhi	18:6a4db94011d3	615	/**
sahilmgandhi	18:6a4db94011d3	616	* @brief This function allows to start clock absence detection in interrupt mode.
sahilmgandhi	18:6a4db94011d3	617	* @note Same mode has to be used for all channels.
sahilmgandhi	18:6a4db94011d3	618	* @note If clock is not available on this channel during 5 seconds,
sahilmgandhi	18:6a4db94011d3	619	* clock absence detection will not be activated and function
sahilmgandhi	18:6a4db94011d3	620	* will return HAL_TIMEOUT error.
sahilmgandhi	18:6a4db94011d3	621	* @param hdfsdm_channel : DFSDM channel handle.
sahilmgandhi	18:6a4db94011d3	622	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	623	*/
sahilmgandhi	18:6a4db94011d3	624	HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
sahilmgandhi	18:6a4db94011d3	625	{
sahilmgandhi	18:6a4db94011d3	626	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	627	uint32_t channel;
sahilmgandhi	18:6a4db94011d3	628	__IO uint32_t count = DFSDM_CKAB_TIMEOUT * (SystemCoreClock / 36 / 1000);
sahilmgandhi	18:6a4db94011d3	629
sahilmgandhi	18:6a4db94011d3	630	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	631	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
sahilmgandhi	18:6a4db94011d3	632
sahilmgandhi	18:6a4db94011d3	633	/* Check DFSDM channel state */
sahilmgandhi	18:6a4db94011d3	634	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
sahilmgandhi	18:6a4db94011d3	635	{
sahilmgandhi	18:6a4db94011d3	636	/* Return error status */
sahilmgandhi	18:6a4db94011d3	637	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	638	}
sahilmgandhi	18:6a4db94011d3	639	else
sahilmgandhi	18:6a4db94011d3	640	{
sahilmgandhi	18:6a4db94011d3	641	/* Get channel number from channel instance */
sahilmgandhi	18:6a4db94011d3	642	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
sahilmgandhi	18:6a4db94011d3	643
sahilmgandhi	18:6a4db94011d3	644	/* Clear clock absence flag */
sahilmgandhi	18:6a4db94011d3	645	do
sahilmgandhi	18:6a4db94011d3	646	{
sahilmgandhi	18:6a4db94011d3	647	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
sahilmgandhi	18:6a4db94011d3	648
sahilmgandhi	18:6a4db94011d3	649	if (count-- == 0)
sahilmgandhi	18:6a4db94011d3	650	{
sahilmgandhi	18:6a4db94011d3	651	/* Set timeout status */
sahilmgandhi	18:6a4db94011d3	652	status = HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	653	break;
sahilmgandhi	18:6a4db94011d3	654	}
sahilmgandhi	18:6a4db94011d3	655	}
sahilmgandhi	18:6a4db94011d3	656	while ((((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_CKABF) >> (DFSDM_FLTISR_CKABF_OFFSET + channel)) & 1U) != 0U);
sahilmgandhi	18:6a4db94011d3	657
sahilmgandhi	18:6a4db94011d3	658	if(status == HAL_OK)
sahilmgandhi	18:6a4db94011d3	659	{
sahilmgandhi	18:6a4db94011d3	660	/* Activate clock absence detection interrupt */
sahilmgandhi	18:6a4db94011d3	661	DFSDM1_Filter0->FLTCR2 \|= DFSDM_FLTCR2_CKABIE;
sahilmgandhi	18:6a4db94011d3	662
sahilmgandhi	18:6a4db94011d3	663	/* Start clock absence detection */
sahilmgandhi	18:6a4db94011d3	664	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_CKABEN;
sahilmgandhi	18:6a4db94011d3	665	}
sahilmgandhi	18:6a4db94011d3	666	}
sahilmgandhi	18:6a4db94011d3	667	/* Return function status */
sahilmgandhi	18:6a4db94011d3	668	return status;
sahilmgandhi	18:6a4db94011d3	669	}
sahilmgandhi	18:6a4db94011d3	670
sahilmgandhi	18:6a4db94011d3	671	/**
sahilmgandhi	18:6a4db94011d3	672	* @brief Clock absence detection callback.
sahilmgandhi	18:6a4db94011d3	673	* @param hdfsdm_channel : DFSDM channel handle.
sahilmgandhi	18:6a4db94011d3	674	* @retval None
sahilmgandhi	18:6a4db94011d3	675	*/
sahilmgandhi	18:6a4db94011d3	676	__weak void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
sahilmgandhi	18:6a4db94011d3	677	{
sahilmgandhi	18:6a4db94011d3	678	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	679	UNUSED(hdfsdm_channel);
sahilmgandhi	18:6a4db94011d3	680	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	681	the HAL_DFSDM_ChannelCkabCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	682	*/
sahilmgandhi	18:6a4db94011d3	683	}
sahilmgandhi	18:6a4db94011d3	684
sahilmgandhi	18:6a4db94011d3	685	/**
sahilmgandhi	18:6a4db94011d3	686	* @brief This function allows to stop clock absence detection in interrupt mode.
sahilmgandhi	18:6a4db94011d3	687	* @note Interrupt will be disabled for all channels
sahilmgandhi	18:6a4db94011d3	688	* @param hdfsdm_channel : DFSDM channel handle.
sahilmgandhi	18:6a4db94011d3	689	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	690	*/
sahilmgandhi	18:6a4db94011d3	691	HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
sahilmgandhi	18:6a4db94011d3	692	{
sahilmgandhi	18:6a4db94011d3	693	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	694	uint32_t channel;
sahilmgandhi	18:6a4db94011d3	695
sahilmgandhi	18:6a4db94011d3	696	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	697	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
sahilmgandhi	18:6a4db94011d3	698
sahilmgandhi	18:6a4db94011d3	699	/* Check DFSDM channel state */
sahilmgandhi	18:6a4db94011d3	700	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
sahilmgandhi	18:6a4db94011d3	701	{
sahilmgandhi	18:6a4db94011d3	702	/* Return error status */
sahilmgandhi	18:6a4db94011d3	703	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	704	}
sahilmgandhi	18:6a4db94011d3	705	else
sahilmgandhi	18:6a4db94011d3	706	{
sahilmgandhi	18:6a4db94011d3	707	/* Stop clock absence detection */
sahilmgandhi	18:6a4db94011d3	708	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_CKABEN);
sahilmgandhi	18:6a4db94011d3	709
sahilmgandhi	18:6a4db94011d3	710	/* Clear clock absence flag */
sahilmgandhi	18:6a4db94011d3	711	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
sahilmgandhi	18:6a4db94011d3	712	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
sahilmgandhi	18:6a4db94011d3	713
sahilmgandhi	18:6a4db94011d3	714	/* Disable clock absence detection interrupt */
sahilmgandhi	18:6a4db94011d3	715	DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_CKABIE);
sahilmgandhi	18:6a4db94011d3	716	}
sahilmgandhi	18:6a4db94011d3	717	/* Return function status */
sahilmgandhi	18:6a4db94011d3	718	return status;
sahilmgandhi	18:6a4db94011d3	719	}
sahilmgandhi	18:6a4db94011d3	720
sahilmgandhi	18:6a4db94011d3	721	/**
sahilmgandhi	18:6a4db94011d3	722	* @brief This function allows to start short circuit detection in polling mode.
sahilmgandhi	18:6a4db94011d3	723	* @note Same mode has to be used for all channels
sahilmgandhi	18:6a4db94011d3	724	* @param hdfsdm_channel : DFSDM channel handle.
sahilmgandhi	18:6a4db94011d3	725	* @param Threshold : Short circuit detector threshold.
sahilmgandhi	18:6a4db94011d3	726	* This parameter must be a number between Min_Data = 0 and Max_Data = 255.
sahilmgandhi	18:6a4db94011d3	727	* @param BreakSignal : Break signals assigned to short circuit event.
sahilmgandhi	18:6a4db94011d3	728	* This parameter can be a values combination of @ref DFSDM_BreakSignals.
sahilmgandhi	18:6a4db94011d3	729	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	730	*/
sahilmgandhi	18:6a4db94011d3	731	HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
sahilmgandhi	18:6a4db94011d3	732	uint32_t Threshold,
sahilmgandhi	18:6a4db94011d3	733	uint32_t BreakSignal)
sahilmgandhi	18:6a4db94011d3	734	{
sahilmgandhi	18:6a4db94011d3	735	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	736
sahilmgandhi	18:6a4db94011d3	737	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	738	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
sahilmgandhi	18:6a4db94011d3	739	assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
sahilmgandhi	18:6a4db94011d3	740	assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
sahilmgandhi	18:6a4db94011d3	741
sahilmgandhi	18:6a4db94011d3	742	/* Check DFSDM channel state */
sahilmgandhi	18:6a4db94011d3	743	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
sahilmgandhi	18:6a4db94011d3	744	{
sahilmgandhi	18:6a4db94011d3	745	/* Return error status */
sahilmgandhi	18:6a4db94011d3	746	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	747	}
sahilmgandhi	18:6a4db94011d3	748	else
sahilmgandhi	18:6a4db94011d3	749	{
sahilmgandhi	18:6a4db94011d3	750	/* Configure threshold and break signals */
sahilmgandhi	18:6a4db94011d3	751	hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD \| DFSDM_CHAWSCDR_SCDT);
sahilmgandhi	18:6a4db94011d3	752	hdfsdm_channel->Instance->CHAWSCDR \|= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_OFFSET) \| \
sahilmgandhi	18:6a4db94011d3	753	Threshold);
sahilmgandhi	18:6a4db94011d3	754
sahilmgandhi	18:6a4db94011d3	755	/* Start short circuit detection */
sahilmgandhi	18:6a4db94011d3	756	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_SCDEN;
sahilmgandhi	18:6a4db94011d3	757	}
sahilmgandhi	18:6a4db94011d3	758	/* Return function status */
sahilmgandhi	18:6a4db94011d3	759	return status;
sahilmgandhi	18:6a4db94011d3	760	}
sahilmgandhi	18:6a4db94011d3	761
sahilmgandhi	18:6a4db94011d3	762	/**
sahilmgandhi	18:6a4db94011d3	763	* @brief This function allows to poll for the short circuit detection.
sahilmgandhi	18:6a4db94011d3	764	* @param hdfsdm_channel : DFSDM channel handle.
sahilmgandhi	18:6a4db94011d3	765	* @param Timeout : Timeout value in milliseconds.
sahilmgandhi	18:6a4db94011d3	766	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	767	*/
sahilmgandhi	18:6a4db94011d3	768	HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
sahilmgandhi	18:6a4db94011d3	769	uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	770	{
sahilmgandhi	18:6a4db94011d3	771	uint32_t tickstart;
sahilmgandhi	18:6a4db94011d3	772	uint32_t channel;
sahilmgandhi	18:6a4db94011d3	773
sahilmgandhi	18:6a4db94011d3	774	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	775	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
sahilmgandhi	18:6a4db94011d3	776
sahilmgandhi	18:6a4db94011d3	777	/* Check DFSDM channel state */
sahilmgandhi	18:6a4db94011d3	778	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
sahilmgandhi	18:6a4db94011d3	779	{
sahilmgandhi	18:6a4db94011d3	780	/* Return error status */
sahilmgandhi	18:6a4db94011d3	781	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	782	}
sahilmgandhi	18:6a4db94011d3	783	else
sahilmgandhi	18:6a4db94011d3	784	{
sahilmgandhi	18:6a4db94011d3	785	/* Get channel number from channel instance */
sahilmgandhi	18:6a4db94011d3	786	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
sahilmgandhi	18:6a4db94011d3	787
sahilmgandhi	18:6a4db94011d3	788	/* Get timeout */
sahilmgandhi	18:6a4db94011d3	789	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	790
sahilmgandhi	18:6a4db94011d3	791	/* Wait short circuit detection */
sahilmgandhi	18:6a4db94011d3	792	while(((DFSDM1_Filter0->FLTISR & DFSDM_FLTISR_SCDF) >> (DFSDM_FLTISR_SCDF_OFFSET + channel)) == 0U)
sahilmgandhi	18:6a4db94011d3	793	{
sahilmgandhi	18:6a4db94011d3	794	/* Check the Timeout */
sahilmgandhi	18:6a4db94011d3	795	if(Timeout != HAL_MAX_DELAY)
sahilmgandhi	18:6a4db94011d3	796	{
sahilmgandhi	18:6a4db94011d3	797	if((Timeout == 0U) \|\| ((HAL_GetTick()-tickstart) > Timeout))
sahilmgandhi	18:6a4db94011d3	798	{
sahilmgandhi	18:6a4db94011d3	799	/* Return timeout status */
sahilmgandhi	18:6a4db94011d3	800	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	801	}
sahilmgandhi	18:6a4db94011d3	802	}
sahilmgandhi	18:6a4db94011d3	803	}
sahilmgandhi	18:6a4db94011d3	804
sahilmgandhi	18:6a4db94011d3	805	/* Clear short circuit detection flag */
sahilmgandhi	18:6a4db94011d3	806	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
sahilmgandhi	18:6a4db94011d3	807
sahilmgandhi	18:6a4db94011d3	808	/* Return function status */
sahilmgandhi	18:6a4db94011d3	809	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	810	}
sahilmgandhi	18:6a4db94011d3	811	}
sahilmgandhi	18:6a4db94011d3	812
sahilmgandhi	18:6a4db94011d3	813	/**
sahilmgandhi	18:6a4db94011d3	814	* @brief This function allows to stop short circuit detection in polling mode.
sahilmgandhi	18:6a4db94011d3	815	* @param hdfsdm_channel : DFSDM channel handle.
sahilmgandhi	18:6a4db94011d3	816	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	817	*/
sahilmgandhi	18:6a4db94011d3	818	HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
sahilmgandhi	18:6a4db94011d3	819	{
sahilmgandhi	18:6a4db94011d3	820	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	821	uint32_t channel;
sahilmgandhi	18:6a4db94011d3	822
sahilmgandhi	18:6a4db94011d3	823	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	824	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
sahilmgandhi	18:6a4db94011d3	825
sahilmgandhi	18:6a4db94011d3	826	/* Check DFSDM channel state */
sahilmgandhi	18:6a4db94011d3	827	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
sahilmgandhi	18:6a4db94011d3	828	{
sahilmgandhi	18:6a4db94011d3	829	/* Return error status */
sahilmgandhi	18:6a4db94011d3	830	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	831	}
sahilmgandhi	18:6a4db94011d3	832	else
sahilmgandhi	18:6a4db94011d3	833	{
sahilmgandhi	18:6a4db94011d3	834	/* Stop short circuit detection */
sahilmgandhi	18:6a4db94011d3	835	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
sahilmgandhi	18:6a4db94011d3	836
sahilmgandhi	18:6a4db94011d3	837	/* Clear short circuit detection flag */
sahilmgandhi	18:6a4db94011d3	838	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
sahilmgandhi	18:6a4db94011d3	839	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
sahilmgandhi	18:6a4db94011d3	840	}
sahilmgandhi	18:6a4db94011d3	841	/* Return function status */
sahilmgandhi	18:6a4db94011d3	842	return status;
sahilmgandhi	18:6a4db94011d3	843	}
sahilmgandhi	18:6a4db94011d3	844
sahilmgandhi	18:6a4db94011d3	845	/**
sahilmgandhi	18:6a4db94011d3	846	* @brief This function allows to start short circuit detection in interrupt mode.
sahilmgandhi	18:6a4db94011d3	847	* @note Same mode has to be used for all channels
sahilmgandhi	18:6a4db94011d3	848	* @param hdfsdm_channel : DFSDM channel handle.
sahilmgandhi	18:6a4db94011d3	849	* @param Threshold : Short circuit detector threshold.
sahilmgandhi	18:6a4db94011d3	850	* This parameter must be a number between Min_Data = 0 and Max_Data = 255.
sahilmgandhi	18:6a4db94011d3	851	* @param BreakSignal : Break signals assigned to short circuit event.
sahilmgandhi	18:6a4db94011d3	852	* This parameter can be a values combination of @ref DFSDM_BreakSignals.
sahilmgandhi	18:6a4db94011d3	853	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	854	*/
sahilmgandhi	18:6a4db94011d3	855	HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
sahilmgandhi	18:6a4db94011d3	856	uint32_t Threshold,
sahilmgandhi	18:6a4db94011d3	857	uint32_t BreakSignal)
sahilmgandhi	18:6a4db94011d3	858	{
sahilmgandhi	18:6a4db94011d3	859	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	860
sahilmgandhi	18:6a4db94011d3	861	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	862	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
sahilmgandhi	18:6a4db94011d3	863	assert_param(IS_DFSDM_CHANNEL_SCD_THRESHOLD(Threshold));
sahilmgandhi	18:6a4db94011d3	864	assert_param(IS_DFSDM_BREAK_SIGNALS(BreakSignal));
sahilmgandhi	18:6a4db94011d3	865
sahilmgandhi	18:6a4db94011d3	866	/* Check DFSDM channel state */
sahilmgandhi	18:6a4db94011d3	867	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
sahilmgandhi	18:6a4db94011d3	868	{
sahilmgandhi	18:6a4db94011d3	869	/* Return error status */
sahilmgandhi	18:6a4db94011d3	870	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	871	}
sahilmgandhi	18:6a4db94011d3	872	else
sahilmgandhi	18:6a4db94011d3	873	{
sahilmgandhi	18:6a4db94011d3	874	/* Activate short circuit detection interrupt */
sahilmgandhi	18:6a4db94011d3	875	DFSDM1_Filter0->FLTCR2 \|= DFSDM_FLTCR2_SCDIE;
sahilmgandhi	18:6a4db94011d3	876
sahilmgandhi	18:6a4db94011d3	877	/* Configure threshold and break signals */
sahilmgandhi	18:6a4db94011d3	878	hdfsdm_channel->Instance->CHAWSCDR &= ~(DFSDM_CHAWSCDR_BKSCD \| DFSDM_CHAWSCDR_SCDT);
sahilmgandhi	18:6a4db94011d3	879	hdfsdm_channel->Instance->CHAWSCDR \|= ((BreakSignal << DFSDM_CHAWSCDR_BKSCD_OFFSET) \| \
sahilmgandhi	18:6a4db94011d3	880	Threshold);
sahilmgandhi	18:6a4db94011d3	881
sahilmgandhi	18:6a4db94011d3	882	/* Start short circuit detection */
sahilmgandhi	18:6a4db94011d3	883	hdfsdm_channel->Instance->CHCFGR1 \|= DFSDM_CHCFGR1_SCDEN;
sahilmgandhi	18:6a4db94011d3	884	}
sahilmgandhi	18:6a4db94011d3	885	/* Return function status */
sahilmgandhi	18:6a4db94011d3	886	return status;
sahilmgandhi	18:6a4db94011d3	887	}
sahilmgandhi	18:6a4db94011d3	888
sahilmgandhi	18:6a4db94011d3	889	/**
sahilmgandhi	18:6a4db94011d3	890	* @brief Short circuit detection callback.
sahilmgandhi	18:6a4db94011d3	891	* @param hdfsdm_channel : DFSDM channel handle.
sahilmgandhi	18:6a4db94011d3	892	* @retval None
sahilmgandhi	18:6a4db94011d3	893	*/
sahilmgandhi	18:6a4db94011d3	894	__weak void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
sahilmgandhi	18:6a4db94011d3	895	{
sahilmgandhi	18:6a4db94011d3	896	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	897	UNUSED(hdfsdm_channel);
sahilmgandhi	18:6a4db94011d3	898	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	899	the HAL_DFSDM_ChannelScdCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	900	*/
sahilmgandhi	18:6a4db94011d3	901	}
sahilmgandhi	18:6a4db94011d3	902
sahilmgandhi	18:6a4db94011d3	903	/**
sahilmgandhi	18:6a4db94011d3	904	* @brief This function allows to stop short circuit detection in interrupt mode.
sahilmgandhi	18:6a4db94011d3	905	* @note Interrupt will be disabled for all channels
sahilmgandhi	18:6a4db94011d3	906	* @param hdfsdm_channel : DFSDM channel handle.
sahilmgandhi	18:6a4db94011d3	907	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	908	*/
sahilmgandhi	18:6a4db94011d3	909	HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
sahilmgandhi	18:6a4db94011d3	910	{
sahilmgandhi	18:6a4db94011d3	911	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	912	uint32_t channel;
sahilmgandhi	18:6a4db94011d3	913
sahilmgandhi	18:6a4db94011d3	914	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	915	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
sahilmgandhi	18:6a4db94011d3	916
sahilmgandhi	18:6a4db94011d3	917	/* Check DFSDM channel state */
sahilmgandhi	18:6a4db94011d3	918	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
sahilmgandhi	18:6a4db94011d3	919	{
sahilmgandhi	18:6a4db94011d3	920	/* Return error status */
sahilmgandhi	18:6a4db94011d3	921	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	922	}
sahilmgandhi	18:6a4db94011d3	923	else
sahilmgandhi	18:6a4db94011d3	924	{
sahilmgandhi	18:6a4db94011d3	925	/* Stop short circuit detection */
sahilmgandhi	18:6a4db94011d3	926	hdfsdm_channel->Instance->CHCFGR1 &= ~(DFSDM_CHCFGR1_SCDEN);
sahilmgandhi	18:6a4db94011d3	927
sahilmgandhi	18:6a4db94011d3	928	/* Clear short circuit detection flag */
sahilmgandhi	18:6a4db94011d3	929	channel = DFSDM_GetChannelFromInstance(hdfsdm_channel->Instance);
sahilmgandhi	18:6a4db94011d3	930	DFSDM1_Filter0->FLTICR = (1U << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
sahilmgandhi	18:6a4db94011d3	931
sahilmgandhi	18:6a4db94011d3	932	/* Disable short circuit detection interrupt */
sahilmgandhi	18:6a4db94011d3	933	DFSDM1_Filter0->FLTCR2 &= ~(DFSDM_FLTCR2_SCDIE);
sahilmgandhi	18:6a4db94011d3	934	}
sahilmgandhi	18:6a4db94011d3	935	/* Return function status */
sahilmgandhi	18:6a4db94011d3	936	return status;
sahilmgandhi	18:6a4db94011d3	937	}
sahilmgandhi	18:6a4db94011d3	938
sahilmgandhi	18:6a4db94011d3	939	/**
sahilmgandhi	18:6a4db94011d3	940	* @brief This function allows to get channel analog watchdog value.
sahilmgandhi	18:6a4db94011d3	941	* @param hdfsdm_channel : DFSDM channel handle.
sahilmgandhi	18:6a4db94011d3	942	* @retval Channel analog watchdog value.
sahilmgandhi	18:6a4db94011d3	943	*/
sahilmgandhi	18:6a4db94011d3	944	int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
sahilmgandhi	18:6a4db94011d3	945	{
sahilmgandhi	18:6a4db94011d3	946	return (int16_t) hdfsdm_channel->Instance->CHWDATAR;
sahilmgandhi	18:6a4db94011d3	947	}
sahilmgandhi	18:6a4db94011d3	948
sahilmgandhi	18:6a4db94011d3	949	/**
sahilmgandhi	18:6a4db94011d3	950	* @brief This function allows to modify channel offset value.
sahilmgandhi	18:6a4db94011d3	951	* @param hdfsdm_channel : DFSDM channel handle.
sahilmgandhi	18:6a4db94011d3	952	* @param Offset : DFSDM channel offset.
sahilmgandhi	18:6a4db94011d3	953	* This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607.
sahilmgandhi	18:6a4db94011d3	954	* @retval HAL status.
sahilmgandhi	18:6a4db94011d3	955	*/
sahilmgandhi	18:6a4db94011d3	956	HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
sahilmgandhi	18:6a4db94011d3	957	int32_t Offset)
sahilmgandhi	18:6a4db94011d3	958	{
sahilmgandhi	18:6a4db94011d3	959	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	960
sahilmgandhi	18:6a4db94011d3	961	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	962	assert_param(IS_DFSDM_CHANNEL_ALL_INSTANCE(hdfsdm_channel->Instance));
sahilmgandhi	18:6a4db94011d3	963	assert_param(IS_DFSDM_CHANNEL_OFFSET(Offset));
sahilmgandhi	18:6a4db94011d3	964
sahilmgandhi	18:6a4db94011d3	965	/* Check DFSDM channel state */
sahilmgandhi	18:6a4db94011d3	966	if(hdfsdm_channel->State != HAL_DFSDM_CHANNEL_STATE_READY)
sahilmgandhi	18:6a4db94011d3	967	{
sahilmgandhi	18:6a4db94011d3	968	/* Return error status */
sahilmgandhi	18:6a4db94011d3	969	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	970	}
sahilmgandhi	18:6a4db94011d3	971	else
sahilmgandhi	18:6a4db94011d3	972	{
sahilmgandhi	18:6a4db94011d3	973	/* Modify channel offset */
sahilmgandhi	18:6a4db94011d3	974	hdfsdm_channel->Instance->CHCFGR2 &= ~(DFSDM_CHCFGR2_OFFSET);
sahilmgandhi	18:6a4db94011d3	975	hdfsdm_channel->Instance->CHCFGR2 \|= ((uint32_t) Offset << DFSDM_CHCFGR2_OFFSET_OFFSET);
sahilmgandhi	18:6a4db94011d3	976	}
sahilmgandhi	18:6a4db94011d3	977	/* Return function status */
sahilmgandhi	18:6a4db94011d3	978	return status;
sahilmgandhi	18:6a4db94011d3	979	}
sahilmgandhi	18:6a4db94011d3	980
sahilmgandhi	18:6a4db94011d3	981	/**
sahilmgandhi	18:6a4db94011d3	982	* @}
sahilmgandhi	18:6a4db94011d3	983	*/
sahilmgandhi	18:6a4db94011d3	984
sahilmgandhi	18:6a4db94011d3	985	/** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function
sahilmgandhi	18:6a4db94011d3	986	* @brief Channel state function
sahilmgandhi	18:6a4db94011d3	987	*
sahilmgandhi	18:6a4db94011d3	988	@verbatim
sahilmgandhi	18:6a4db94011d3	989	==============================================================================
sahilmgandhi	18:6a4db94011d3	990	##### Channel state function #####
sahilmgandhi	18:6a4db94011d3	991	==============================================================================
sahilmgandhi	18:6a4db94011d3	992	[..] This section provides function allowing to:
sahilmgandhi	18:6a4db94011d3	993	(+) Get channel handle state.
sahilmgandhi	18:6a4db94011d3	994	@endverbatim
sahilmgandhi	18:6a4db94011d3	995	* @{
sahilmgandhi	18:6a4db94011d3	996	*/
sahilmgandhi	18:6a4db94011d3	997
sahilmgandhi	18:6a4db94011d3	998	/**
sahilmgandhi	18:6a4db94011d3	999	* @brief This function allows to get the current DFSDM channel handle state.
sahilmgandhi	18:6a4db94011d3	1000	* @param hdfsdm_channel : DFSDM channel handle.
sahilmgandhi	18:6a4db94011d3	1001	* @retval DFSDM channel state.
sahilmgandhi	18:6a4db94011d3	1002	*/
sahilmgandhi	18:6a4db94011d3	1003	HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel)
sahilmgandhi	18:6a4db94011d3	1004	{
sahilmgandhi	18:6a4db94011d3	1005	/* Return DFSDM channel handle state */
sahilmgandhi	18:6a4db94011d3	1006	return hdfsdm_channel->State;
sahilmgandhi	18:6a4db94011d3	1007	}
sahilmgandhi	18:6a4db94011d3	1008
sahilmgandhi	18:6a4db94011d3	1009	/**
sahilmgandhi	18:6a4db94011d3	1010	* @}
sahilmgandhi	18:6a4db94011d3	1011	*/
sahilmgandhi	18:6a4db94011d3	1012
sahilmgandhi	18:6a4db94011d3	1013	/** @defgroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions
sahilmgandhi	18:6a4db94011d3	1014	* @brief Filter initialization and de-initialization functions
sahilmgandhi	18:6a4db94011d3	1015	*
sahilmgandhi	18:6a4db94011d3	1016	@verbatim
sahilmgandhi	18:6a4db94011d3	1017	==============================================================================
sahilmgandhi	18:6a4db94011d3	1018	##### Filter initialization and de-initialization functions #####
sahilmgandhi	18:6a4db94011d3	1019	==============================================================================
sahilmgandhi	18:6a4db94011d3	1020	[..] This section provides functions allowing to:
sahilmgandhi	18:6a4db94011d3	1021	(+) Initialize the DFSDM filter.
sahilmgandhi	18:6a4db94011d3	1022	(+) De-initialize the DFSDM filter.
sahilmgandhi	18:6a4db94011d3	1023	@endverbatim
sahilmgandhi	18:6a4db94011d3	1024	* @{
sahilmgandhi	18:6a4db94011d3	1025	*/
sahilmgandhi	18:6a4db94011d3	1026
sahilmgandhi	18:6a4db94011d3	1027	/**
sahilmgandhi	18:6a4db94011d3	1028	* @brief Initialize the DFSDM filter according to the specified parameters
sahilmgandhi	18:6a4db94011d3	1029	* in the DFSDM_FilterInitTypeDef structure and initialize the associated handle.
sahilmgandhi	18:6a4db94011d3	1030	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	1031	* @retval HAL status.
sahilmgandhi	18:6a4db94011d3	1032	*/
sahilmgandhi	18:6a4db94011d3	1033	HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	1034	{
sahilmgandhi	18:6a4db94011d3	1035	/* Check DFSDM Channel handle */
sahilmgandhi	18:6a4db94011d3	1036	if(hdfsdm_filter == NULL)
sahilmgandhi	18:6a4db94011d3	1037	{
sahilmgandhi	18:6a4db94011d3	1038	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1039	}
sahilmgandhi	18:6a4db94011d3	1040
sahilmgandhi	18:6a4db94011d3	1041	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	1042	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	1043	assert_param(IS_DFSDM_FILTER_REG_TRIGGER(hdfsdm_filter->Init.RegularParam.Trigger));
sahilmgandhi	18:6a4db94011d3	1044	assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.FastMode));
sahilmgandhi	18:6a4db94011d3	1045	assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.RegularParam.DmaMode));
sahilmgandhi	18:6a4db94011d3	1046	assert_param(IS_DFSDM_FILTER_INJ_TRIGGER(hdfsdm_filter->Init.InjectedParam.Trigger));
sahilmgandhi	18:6a4db94011d3	1047	assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.ScanMode));
sahilmgandhi	18:6a4db94011d3	1048	assert_param(IS_FUNCTIONAL_STATE(hdfsdm_filter->Init.InjectedParam.DmaMode));
sahilmgandhi	18:6a4db94011d3	1049	assert_param(IS_DFSDM_FILTER_SINC_ORDER(hdfsdm_filter->Init.FilterParam.SincOrder));
sahilmgandhi	18:6a4db94011d3	1050	assert_param(IS_DFSDM_FILTER_OVS_RATIO(hdfsdm_filter->Init.FilterParam.Oversampling));
sahilmgandhi	18:6a4db94011d3	1051	assert_param(IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(hdfsdm_filter->Init.FilterParam.IntOversampling));
sahilmgandhi	18:6a4db94011d3	1052
sahilmgandhi	18:6a4db94011d3	1053	/* Check parameters compatibility */
sahilmgandhi	18:6a4db94011d3	1054	if((hdfsdm_filter->Instance == DFSDM1_Filter0) &&
sahilmgandhi	18:6a4db94011d3	1055	((hdfsdm_filter->Init.RegularParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER) \|\|
sahilmgandhi	18:6a4db94011d3	1056	(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_SYNC_TRIGGER)))
sahilmgandhi	18:6a4db94011d3	1057	{
sahilmgandhi	18:6a4db94011d3	1058	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1059	}
sahilmgandhi	18:6a4db94011d3	1060
sahilmgandhi	18:6a4db94011d3	1061	/* Initialize DFSDM filter variables with default values */
sahilmgandhi	18:6a4db94011d3	1062	hdfsdm_filter->RegularContMode = DFSDM_CONTINUOUS_CONV_OFF;
sahilmgandhi	18:6a4db94011d3	1063	hdfsdm_filter->InjectedChannelsNbr = 1U;
sahilmgandhi	18:6a4db94011d3	1064	hdfsdm_filter->InjConvRemaining = 1U;
sahilmgandhi	18:6a4db94011d3	1065	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1066
sahilmgandhi	18:6a4db94011d3	1067	/* Call MSP init function */
sahilmgandhi	18:6a4db94011d3	1068	HAL_DFSDM_FilterMspInit(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	1069
sahilmgandhi	18:6a4db94011d3	1070	/* Set regular parameters */
sahilmgandhi	18:6a4db94011d3	1071	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
sahilmgandhi	18:6a4db94011d3	1072	if(hdfsdm_filter->Init.RegularParam.FastMode == ENABLE)
sahilmgandhi	18:6a4db94011d3	1073	{
sahilmgandhi	18:6a4db94011d3	1074	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_FAST;
sahilmgandhi	18:6a4db94011d3	1075	}
sahilmgandhi	18:6a4db94011d3	1076	else
sahilmgandhi	18:6a4db94011d3	1077	{
sahilmgandhi	18:6a4db94011d3	1078	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_FAST);
sahilmgandhi	18:6a4db94011d3	1079	}
sahilmgandhi	18:6a4db94011d3	1080
sahilmgandhi	18:6a4db94011d3	1081	if(hdfsdm_filter->Init.RegularParam.DmaMode == ENABLE)
sahilmgandhi	18:6a4db94011d3	1082	{
sahilmgandhi	18:6a4db94011d3	1083	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_RDMAEN;
sahilmgandhi	18:6a4db94011d3	1084	}
sahilmgandhi	18:6a4db94011d3	1085	else
sahilmgandhi	18:6a4db94011d3	1086	{
sahilmgandhi	18:6a4db94011d3	1087	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RDMAEN);
sahilmgandhi	18:6a4db94011d3	1088	}
sahilmgandhi	18:6a4db94011d3	1089
sahilmgandhi	18:6a4db94011d3	1090	/* Set injected parameters */
sahilmgandhi	18:6a4db94011d3	1091	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC \| DFSDM_FLTCR1_JEXTEN \| DFSDM_FLTCR1_JEXTSEL);
sahilmgandhi	18:6a4db94011d3	1092	if(hdfsdm_filter->Init.InjectedParam.Trigger == DFSDM_FILTER_EXT_TRIGGER)
sahilmgandhi	18:6a4db94011d3	1093	{
sahilmgandhi	18:6a4db94011d3	1094	assert_param(IS_DFSDM_FILTER_EXT_TRIG(hdfsdm_filter->Init.InjectedParam.ExtTrigger));
sahilmgandhi	18:6a4db94011d3	1095	assert_param(IS_DFSDM_FILTER_EXT_TRIG_EDGE(hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge));
sahilmgandhi	18:6a4db94011d3	1096	hdfsdm_filter->Instance->FLTCR1 \|= (hdfsdm_filter->Init.InjectedParam.ExtTrigger);
sahilmgandhi	18:6a4db94011d3	1097	}
sahilmgandhi	18:6a4db94011d3	1098
sahilmgandhi	18:6a4db94011d3	1099	if(hdfsdm_filter->Init.InjectedParam.ScanMode == ENABLE)
sahilmgandhi	18:6a4db94011d3	1100	{
sahilmgandhi	18:6a4db94011d3	1101	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_JSCAN;
sahilmgandhi	18:6a4db94011d3	1102	}
sahilmgandhi	18:6a4db94011d3	1103	else
sahilmgandhi	18:6a4db94011d3	1104	{
sahilmgandhi	18:6a4db94011d3	1105	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSCAN);
sahilmgandhi	18:6a4db94011d3	1106	}
sahilmgandhi	18:6a4db94011d3	1107
sahilmgandhi	18:6a4db94011d3	1108	if(hdfsdm_filter->Init.InjectedParam.DmaMode == ENABLE)
sahilmgandhi	18:6a4db94011d3	1109	{
sahilmgandhi	18:6a4db94011d3	1110	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_JDMAEN;
sahilmgandhi	18:6a4db94011d3	1111	}
sahilmgandhi	18:6a4db94011d3	1112	else
sahilmgandhi	18:6a4db94011d3	1113	{
sahilmgandhi	18:6a4db94011d3	1114	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JDMAEN);
sahilmgandhi	18:6a4db94011d3	1115	}
sahilmgandhi	18:6a4db94011d3	1116
sahilmgandhi	18:6a4db94011d3	1117	/* Set filter parameters */
sahilmgandhi	18:6a4db94011d3	1118	hdfsdm_filter->Instance->FLTFCR &= ~(DFSDM_FLTFCR_FORD \| DFSDM_FLTFCR_FOSR \| DFSDM_FLTFCR_IOSR);
sahilmgandhi	18:6a4db94011d3	1119	hdfsdm_filter->Instance->FLTFCR \|= (hdfsdm_filter->Init.FilterParam.SincOrder \|
sahilmgandhi	18:6a4db94011d3	1120	((hdfsdm_filter->Init.FilterParam.Oversampling - 1U) << DFSDM_FLTFCR_FOSR_OFFSET) \|
sahilmgandhi	18:6a4db94011d3	1121	(hdfsdm_filter->Init.FilterParam.IntOversampling - 1U));
sahilmgandhi	18:6a4db94011d3	1122
sahilmgandhi	18:6a4db94011d3	1123	/* Store regular and injected triggers and injected scan mode*/
sahilmgandhi	18:6a4db94011d3	1124	hdfsdm_filter->RegularTrigger = hdfsdm_filter->Init.RegularParam.Trigger;
sahilmgandhi	18:6a4db94011d3	1125	hdfsdm_filter->InjectedTrigger = hdfsdm_filter->Init.InjectedParam.Trigger;
sahilmgandhi	18:6a4db94011d3	1126	hdfsdm_filter->ExtTriggerEdge = hdfsdm_filter->Init.InjectedParam.ExtTriggerEdge;
sahilmgandhi	18:6a4db94011d3	1127	hdfsdm_filter->InjectedScanMode = hdfsdm_filter->Init.InjectedParam.ScanMode;
sahilmgandhi	18:6a4db94011d3	1128
sahilmgandhi	18:6a4db94011d3	1129	/* Enable DFSDM filter */
sahilmgandhi	18:6a4db94011d3	1130	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_DFEN;
sahilmgandhi	18:6a4db94011d3	1131
sahilmgandhi	18:6a4db94011d3	1132	/* Set DFSDM filter to ready state */
sahilmgandhi	18:6a4db94011d3	1133	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1134
sahilmgandhi	18:6a4db94011d3	1135	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1136	}
sahilmgandhi	18:6a4db94011d3	1137
sahilmgandhi	18:6a4db94011d3	1138	/**
sahilmgandhi	18:6a4db94011d3	1139	* @brief De-initializes the DFSDM filter.
sahilmgandhi	18:6a4db94011d3	1140	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	1141	* @retval HAL status.
sahilmgandhi	18:6a4db94011d3	1142	*/
sahilmgandhi	18:6a4db94011d3	1143	HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	1144	{
sahilmgandhi	18:6a4db94011d3	1145	/* Check DFSDM filter handle */
sahilmgandhi	18:6a4db94011d3	1146	if(hdfsdm_filter == NULL)
sahilmgandhi	18:6a4db94011d3	1147	{
sahilmgandhi	18:6a4db94011d3	1148	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1149	}
sahilmgandhi	18:6a4db94011d3	1150
sahilmgandhi	18:6a4db94011d3	1151	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	1152	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	1153
sahilmgandhi	18:6a4db94011d3	1154	/* Disable the DFSDM filter */
sahilmgandhi	18:6a4db94011d3	1155	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
sahilmgandhi	18:6a4db94011d3	1156
sahilmgandhi	18:6a4db94011d3	1157	/* Call MSP deinit function */
sahilmgandhi	18:6a4db94011d3	1158	HAL_DFSDM_FilterMspDeInit(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	1159
sahilmgandhi	18:6a4db94011d3	1160	/* Set DFSDM filter in reset state */
sahilmgandhi	18:6a4db94011d3	1161	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_RESET;
sahilmgandhi	18:6a4db94011d3	1162
sahilmgandhi	18:6a4db94011d3	1163	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1164	}
sahilmgandhi	18:6a4db94011d3	1165
sahilmgandhi	18:6a4db94011d3	1166	/**
sahilmgandhi	18:6a4db94011d3	1167	* @brief Initializes the DFSDM filter MSP.
sahilmgandhi	18:6a4db94011d3	1168	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	1169	* @retval None
sahilmgandhi	18:6a4db94011d3	1170	*/
sahilmgandhi	18:6a4db94011d3	1171	__weak void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	1172	{
sahilmgandhi	18:6a4db94011d3	1173	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	1174	UNUSED(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	1175	/* NOTE : This function should not be modified, when the function is needed,
sahilmgandhi	18:6a4db94011d3	1176	the HAL_DFSDM_FilterMspInit could be implemented in the user file.
sahilmgandhi	18:6a4db94011d3	1177	*/
sahilmgandhi	18:6a4db94011d3	1178	}
sahilmgandhi	18:6a4db94011d3	1179
sahilmgandhi	18:6a4db94011d3	1180	/**
sahilmgandhi	18:6a4db94011d3	1181	* @brief De-initializes the DFSDM filter MSP.
sahilmgandhi	18:6a4db94011d3	1182	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	1183	* @retval None
sahilmgandhi	18:6a4db94011d3	1184	*/
sahilmgandhi	18:6a4db94011d3	1185	__weak void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	1186	{
sahilmgandhi	18:6a4db94011d3	1187	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	1188	UNUSED(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	1189	/* NOTE : This function should not be modified, when the function is needed,
sahilmgandhi	18:6a4db94011d3	1190	the HAL_DFSDM_FilterMspDeInit could be implemented in the user file.
sahilmgandhi	18:6a4db94011d3	1191	*/
sahilmgandhi	18:6a4db94011d3	1192	}
sahilmgandhi	18:6a4db94011d3	1193
sahilmgandhi	18:6a4db94011d3	1194	/**
sahilmgandhi	18:6a4db94011d3	1195	* @}
sahilmgandhi	18:6a4db94011d3	1196	*/
sahilmgandhi	18:6a4db94011d3	1197
sahilmgandhi	18:6a4db94011d3	1198	/** @defgroup DFSDM_Exported_Functions_Group2_Filter Filter control functions
sahilmgandhi	18:6a4db94011d3	1199	* @brief Filter control functions
sahilmgandhi	18:6a4db94011d3	1200	*
sahilmgandhi	18:6a4db94011d3	1201	@verbatim
sahilmgandhi	18:6a4db94011d3	1202	==============================================================================
sahilmgandhi	18:6a4db94011d3	1203	##### Filter control functions #####
sahilmgandhi	18:6a4db94011d3	1204	==============================================================================
sahilmgandhi	18:6a4db94011d3	1205	[..] This section provides functions allowing to:
sahilmgandhi	18:6a4db94011d3	1206	(+) Select channel and enable/disable continuous mode for regular conversion.
sahilmgandhi	18:6a4db94011d3	1207	(+) Select channels for injected conversion.
sahilmgandhi	18:6a4db94011d3	1208	@endverbatim
sahilmgandhi	18:6a4db94011d3	1209	* @{
sahilmgandhi	18:6a4db94011d3	1210	*/
sahilmgandhi	18:6a4db94011d3	1211
sahilmgandhi	18:6a4db94011d3	1212	/**
sahilmgandhi	18:6a4db94011d3	1213	* @brief This function allows to select channel and to enable/disable
sahilmgandhi	18:6a4db94011d3	1214	* continuous mode for regular conversion.
sahilmgandhi	18:6a4db94011d3	1215	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	1216	* @param Channel : Channel for regular conversion.
sahilmgandhi	18:6a4db94011d3	1217	* This parameter can be a value of @ref DFSDM_Channel_Selection.
sahilmgandhi	18:6a4db94011d3	1218	* @param ContinuousMode : Enable/disable continuous mode for regular conversion.
sahilmgandhi	18:6a4db94011d3	1219	* This parameter can be a value of @ref DFSDM_ContinuousMode.
sahilmgandhi	18:6a4db94011d3	1220	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1221	*/
sahilmgandhi	18:6a4db94011d3	1222	HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
sahilmgandhi	18:6a4db94011d3	1223	uint32_t Channel,
sahilmgandhi	18:6a4db94011d3	1224	uint32_t ContinuousMode)
sahilmgandhi	18:6a4db94011d3	1225	{
sahilmgandhi	18:6a4db94011d3	1226	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	1227
sahilmgandhi	18:6a4db94011d3	1228	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	1229	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	1230	assert_param(IS_DFSDM_REGULAR_CHANNEL(Channel));
sahilmgandhi	18:6a4db94011d3	1231	assert_param(IS_DFSDM_CONTINUOUS_MODE(ContinuousMode));
sahilmgandhi	18:6a4db94011d3	1232
sahilmgandhi	18:6a4db94011d3	1233	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	1234	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
sahilmgandhi	18:6a4db94011d3	1235	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
sahilmgandhi	18:6a4db94011d3	1236	{
sahilmgandhi	18:6a4db94011d3	1237	/* Configure channel and continuous mode for regular conversion */
sahilmgandhi	18:6a4db94011d3	1238	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RCH \| DFSDM_FLTCR1_RCONT);
sahilmgandhi	18:6a4db94011d3	1239	if(ContinuousMode == DFSDM_CONTINUOUS_CONV_ON)
sahilmgandhi	18:6a4db94011d3	1240	{
sahilmgandhi	18:6a4db94011d3	1241	hdfsdm_filter->Instance->FLTCR1 \|= (uint32_t) (((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET) \|
sahilmgandhi	18:6a4db94011d3	1242	DFSDM_FLTCR1_RCONT);
sahilmgandhi	18:6a4db94011d3	1243	}
sahilmgandhi	18:6a4db94011d3	1244	else
sahilmgandhi	18:6a4db94011d3	1245	{
sahilmgandhi	18:6a4db94011d3	1246	hdfsdm_filter->Instance->FLTCR1 \|= (uint32_t) ((Channel & DFSDM_MSB_MASK) << DFSDM_FLTCR1_MSB_RCH_OFFSET);
sahilmgandhi	18:6a4db94011d3	1247	}
sahilmgandhi	18:6a4db94011d3	1248	/* Store continuous mode information */
sahilmgandhi	18:6a4db94011d3	1249	hdfsdm_filter->RegularContMode = ContinuousMode;
sahilmgandhi	18:6a4db94011d3	1250	}
sahilmgandhi	18:6a4db94011d3	1251	else
sahilmgandhi	18:6a4db94011d3	1252	{
sahilmgandhi	18:6a4db94011d3	1253	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1254	}
sahilmgandhi	18:6a4db94011d3	1255
sahilmgandhi	18:6a4db94011d3	1256	/* Return function status */
sahilmgandhi	18:6a4db94011d3	1257	return status;
sahilmgandhi	18:6a4db94011d3	1258	}
sahilmgandhi	18:6a4db94011d3	1259
sahilmgandhi	18:6a4db94011d3	1260	/**
sahilmgandhi	18:6a4db94011d3	1261	* @brief This function allows to select channels for injected conversion.
sahilmgandhi	18:6a4db94011d3	1262	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	1263	* @param Channel : Channels for injected conversion.
sahilmgandhi	18:6a4db94011d3	1264	* This parameter can be a values combination of @ref DFSDM_Channel_Selection.
sahilmgandhi	18:6a4db94011d3	1265	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1266	*/
sahilmgandhi	18:6a4db94011d3	1267	HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
sahilmgandhi	18:6a4db94011d3	1268	uint32_t Channel)
sahilmgandhi	18:6a4db94011d3	1269	{
sahilmgandhi	18:6a4db94011d3	1270	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	1271
sahilmgandhi	18:6a4db94011d3	1272	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	1273	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	1274	assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
sahilmgandhi	18:6a4db94011d3	1275
sahilmgandhi	18:6a4db94011d3	1276	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	1277	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_RESET) &&
sahilmgandhi	18:6a4db94011d3	1278	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_ERROR))
sahilmgandhi	18:6a4db94011d3	1279	{
sahilmgandhi	18:6a4db94011d3	1280	/* Configure channel for injected conversion */
sahilmgandhi	18:6a4db94011d3	1281	hdfsdm_filter->Instance->FLTJCHGR = (uint32_t) (Channel & DFSDM_LSB_MASK);
sahilmgandhi	18:6a4db94011d3	1282	/* Store number of injected channels */
sahilmgandhi	18:6a4db94011d3	1283	hdfsdm_filter->InjectedChannelsNbr = DFSDM_GetInjChannelsNbr(Channel);
sahilmgandhi	18:6a4db94011d3	1284	/* Update number of injected channels remaining */
sahilmgandhi	18:6a4db94011d3	1285	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
sahilmgandhi	18:6a4db94011d3	1286	hdfsdm_filter->InjectedChannelsNbr : 1U;
sahilmgandhi	18:6a4db94011d3	1287	}
sahilmgandhi	18:6a4db94011d3	1288	else
sahilmgandhi	18:6a4db94011d3	1289	{
sahilmgandhi	18:6a4db94011d3	1290	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1291	}
sahilmgandhi	18:6a4db94011d3	1292	/* Return function status */
sahilmgandhi	18:6a4db94011d3	1293	return status;
sahilmgandhi	18:6a4db94011d3	1294	}
sahilmgandhi	18:6a4db94011d3	1295
sahilmgandhi	18:6a4db94011d3	1296	/**
sahilmgandhi	18:6a4db94011d3	1297	* @}
sahilmgandhi	18:6a4db94011d3	1298	*/
sahilmgandhi	18:6a4db94011d3	1299
sahilmgandhi	18:6a4db94011d3	1300	/** @defgroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions
sahilmgandhi	18:6a4db94011d3	1301	* @brief Filter operation functions
sahilmgandhi	18:6a4db94011d3	1302	*
sahilmgandhi	18:6a4db94011d3	1303	@verbatim
sahilmgandhi	18:6a4db94011d3	1304	==============================================================================
sahilmgandhi	18:6a4db94011d3	1305	##### Filter operation functions #####
sahilmgandhi	18:6a4db94011d3	1306	==============================================================================
sahilmgandhi	18:6a4db94011d3	1307	[..] This section provides functions allowing to:
sahilmgandhi	18:6a4db94011d3	1308	(+) Start conversion of regular/injected channel.
sahilmgandhi	18:6a4db94011d3	1309	(+) Poll for the end of regular/injected conversion.
sahilmgandhi	18:6a4db94011d3	1310	(+) Stop conversion of regular/injected channel.
sahilmgandhi	18:6a4db94011d3	1311	(+) Start conversion of regular/injected channel and enable interrupt.
sahilmgandhi	18:6a4db94011d3	1312	(+) Call the callback functions at the end of regular/injected conversions.
sahilmgandhi	18:6a4db94011d3	1313	(+) Stop conversion of regular/injected channel and disable interrupt.
sahilmgandhi	18:6a4db94011d3	1314	(+) Start conversion of regular/injected channel and enable DMA transfer.
sahilmgandhi	18:6a4db94011d3	1315	(+) Stop conversion of regular/injected channel and disable DMA transfer.
sahilmgandhi	18:6a4db94011d3	1316	(+) Start analog watchdog and enable interrupt.
sahilmgandhi	18:6a4db94011d3	1317	(+) Call the callback function when analog watchdog occurs.
sahilmgandhi	18:6a4db94011d3	1318	(+) Stop analog watchdog and disable interrupt.
sahilmgandhi	18:6a4db94011d3	1319	(+) Start extreme detector.
sahilmgandhi	18:6a4db94011d3	1320	(+) Stop extreme detector.
sahilmgandhi	18:6a4db94011d3	1321	(+) Get result of regular channel conversion.
sahilmgandhi	18:6a4db94011d3	1322	(+) Get result of injected channel conversion.
sahilmgandhi	18:6a4db94011d3	1323	(+) Get extreme detector maximum and minimum values.
sahilmgandhi	18:6a4db94011d3	1324	(+) Get conversion time.
sahilmgandhi	18:6a4db94011d3	1325	(+) Handle DFSDM interrupt request.
sahilmgandhi	18:6a4db94011d3	1326	@endverbatim
sahilmgandhi	18:6a4db94011d3	1327	* @{
sahilmgandhi	18:6a4db94011d3	1328	*/
sahilmgandhi	18:6a4db94011d3	1329
sahilmgandhi	18:6a4db94011d3	1330	/**
sahilmgandhi	18:6a4db94011d3	1331	* @brief This function allows to start regular conversion in polling mode.
sahilmgandhi	18:6a4db94011d3	1332	* @note This function should be called only when DFSDM filter instance is
sahilmgandhi	18:6a4db94011d3	1333	* in idle state or if injected conversion is ongoing.
sahilmgandhi	18:6a4db94011d3	1334	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	1335	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1336	*/
sahilmgandhi	18:6a4db94011d3	1337	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	1338	{
sahilmgandhi	18:6a4db94011d3	1339	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	1340
sahilmgandhi	18:6a4db94011d3	1341	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	1342	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	1343
sahilmgandhi	18:6a4db94011d3	1344	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	1345	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
sahilmgandhi	18:6a4db94011d3	1346	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
sahilmgandhi	18:6a4db94011d3	1347	{
sahilmgandhi	18:6a4db94011d3	1348	/* Start regular conversion */
sahilmgandhi	18:6a4db94011d3	1349	DFSDM_RegConvStart(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	1350	}
sahilmgandhi	18:6a4db94011d3	1351	else
sahilmgandhi	18:6a4db94011d3	1352	{
sahilmgandhi	18:6a4db94011d3	1353	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1354	}
sahilmgandhi	18:6a4db94011d3	1355	/* Return function status */
sahilmgandhi	18:6a4db94011d3	1356	return status;
sahilmgandhi	18:6a4db94011d3	1357	}
sahilmgandhi	18:6a4db94011d3	1358
sahilmgandhi	18:6a4db94011d3	1359	/**
sahilmgandhi	18:6a4db94011d3	1360	* @brief This function allows to poll for the end of regular conversion.
sahilmgandhi	18:6a4db94011d3	1361	* @note This function should be called only if regular conversion is ongoing.
sahilmgandhi	18:6a4db94011d3	1362	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	1363	* @param Timeout : Timeout value in milliseconds.
sahilmgandhi	18:6a4db94011d3	1364	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1365	*/
sahilmgandhi	18:6a4db94011d3	1366	HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
sahilmgandhi	18:6a4db94011d3	1367	uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	1368	{
sahilmgandhi	18:6a4db94011d3	1369	uint32_t tickstart;
sahilmgandhi	18:6a4db94011d3	1370
sahilmgandhi	18:6a4db94011d3	1371	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	1372	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	1373
sahilmgandhi	18:6a4db94011d3	1374	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	1375	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
sahilmgandhi	18:6a4db94011d3	1376	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
sahilmgandhi	18:6a4db94011d3	1377	{
sahilmgandhi	18:6a4db94011d3	1378	/* Return error status */
sahilmgandhi	18:6a4db94011d3	1379	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1380	}
sahilmgandhi	18:6a4db94011d3	1381	else
sahilmgandhi	18:6a4db94011d3	1382	{
sahilmgandhi	18:6a4db94011d3	1383	/* Get timeout */
sahilmgandhi	18:6a4db94011d3	1384	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	1385
sahilmgandhi	18:6a4db94011d3	1386	/* Wait end of regular conversion */
sahilmgandhi	18:6a4db94011d3	1387	while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != DFSDM_FLTISR_REOCF)
sahilmgandhi	18:6a4db94011d3	1388	{
sahilmgandhi	18:6a4db94011d3	1389	/* Check the Timeout */
sahilmgandhi	18:6a4db94011d3	1390	if(Timeout != HAL_MAX_DELAY)
sahilmgandhi	18:6a4db94011d3	1391	{
sahilmgandhi	18:6a4db94011d3	1392	if((Timeout == 0U) \|\| ((HAL_GetTick()-tickstart) > Timeout))
sahilmgandhi	18:6a4db94011d3	1393	{
sahilmgandhi	18:6a4db94011d3	1394	/* Return timeout status */
sahilmgandhi	18:6a4db94011d3	1395	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1396	}
sahilmgandhi	18:6a4db94011d3	1397	}
sahilmgandhi	18:6a4db94011d3	1398	}
sahilmgandhi	18:6a4db94011d3	1399	/* Check if overrun occurs */
sahilmgandhi	18:6a4db94011d3	1400	if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) == DFSDM_FLTISR_ROVRF)
sahilmgandhi	18:6a4db94011d3	1401	{
sahilmgandhi	18:6a4db94011d3	1402	/* Update error code and call error callback */
sahilmgandhi	18:6a4db94011d3	1403	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
sahilmgandhi	18:6a4db94011d3	1404	HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	1405
sahilmgandhi	18:6a4db94011d3	1406	/* Clear regular overrun flag */
sahilmgandhi	18:6a4db94011d3	1407	hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
sahilmgandhi	18:6a4db94011d3	1408	}
sahilmgandhi	18:6a4db94011d3	1409	/* Update DFSDM filter state only if not continuous conversion and SW trigger */
sahilmgandhi	18:6a4db94011d3	1410	if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
sahilmgandhi	18:6a4db94011d3	1411	(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
sahilmgandhi	18:6a4db94011d3	1412	{
sahilmgandhi	18:6a4db94011d3	1413	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
sahilmgandhi	18:6a4db94011d3	1414	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
sahilmgandhi	18:6a4db94011d3	1415	}
sahilmgandhi	18:6a4db94011d3	1416	/* Return function status */
sahilmgandhi	18:6a4db94011d3	1417	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1418	}
sahilmgandhi	18:6a4db94011d3	1419	}
sahilmgandhi	18:6a4db94011d3	1420
sahilmgandhi	18:6a4db94011d3	1421	/**
sahilmgandhi	18:6a4db94011d3	1422	* @brief This function allows to stop regular conversion in polling mode.
sahilmgandhi	18:6a4db94011d3	1423	* @note This function should be called only if regular conversion is ongoing.
sahilmgandhi	18:6a4db94011d3	1424	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	1425	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1426	*/
sahilmgandhi	18:6a4db94011d3	1427	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	1428	{
sahilmgandhi	18:6a4db94011d3	1429	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	1430
sahilmgandhi	18:6a4db94011d3	1431	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	1432	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	1433
sahilmgandhi	18:6a4db94011d3	1434	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	1435	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
sahilmgandhi	18:6a4db94011d3	1436	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
sahilmgandhi	18:6a4db94011d3	1437	{
sahilmgandhi	18:6a4db94011d3	1438	/* Return error status */
sahilmgandhi	18:6a4db94011d3	1439	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1440	}
sahilmgandhi	18:6a4db94011d3	1441	else
sahilmgandhi	18:6a4db94011d3	1442	{
sahilmgandhi	18:6a4db94011d3	1443	/* Stop regular conversion */
sahilmgandhi	18:6a4db94011d3	1444	DFSDM_RegConvStop(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	1445	}
sahilmgandhi	18:6a4db94011d3	1446	/* Return function status */
sahilmgandhi	18:6a4db94011d3	1447	return status;
sahilmgandhi	18:6a4db94011d3	1448	}
sahilmgandhi	18:6a4db94011d3	1449
sahilmgandhi	18:6a4db94011d3	1450	/**
sahilmgandhi	18:6a4db94011d3	1451	* @brief This function allows to start regular conversion in interrupt mode.
sahilmgandhi	18:6a4db94011d3	1452	* @note This function should be called only when DFSDM filter instance is
sahilmgandhi	18:6a4db94011d3	1453	* in idle state or if injected conversion is ongoing.
sahilmgandhi	18:6a4db94011d3	1454	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	1455	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1456	*/
sahilmgandhi	18:6a4db94011d3	1457	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	1458	{
sahilmgandhi	18:6a4db94011d3	1459	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	1460
sahilmgandhi	18:6a4db94011d3	1461	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	1462	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	1463
sahilmgandhi	18:6a4db94011d3	1464	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	1465	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
sahilmgandhi	18:6a4db94011d3	1466	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
sahilmgandhi	18:6a4db94011d3	1467	{
sahilmgandhi	18:6a4db94011d3	1468	/* Enable interrupts for regular conversions */
sahilmgandhi	18:6a4db94011d3	1469	hdfsdm_filter->Instance->FLTCR2 \|= (DFSDM_FLTCR2_REOCIE \| DFSDM_FLTCR2_ROVRIE);
sahilmgandhi	18:6a4db94011d3	1470
sahilmgandhi	18:6a4db94011d3	1471	/* Start regular conversion */
sahilmgandhi	18:6a4db94011d3	1472	DFSDM_RegConvStart(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	1473	}
sahilmgandhi	18:6a4db94011d3	1474	else
sahilmgandhi	18:6a4db94011d3	1475	{
sahilmgandhi	18:6a4db94011d3	1476	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1477	}
sahilmgandhi	18:6a4db94011d3	1478	/* Return function status */
sahilmgandhi	18:6a4db94011d3	1479	return status;
sahilmgandhi	18:6a4db94011d3	1480	}
sahilmgandhi	18:6a4db94011d3	1481
sahilmgandhi	18:6a4db94011d3	1482	/**
sahilmgandhi	18:6a4db94011d3	1483	* @brief This function allows to stop regular conversion in interrupt mode.
sahilmgandhi	18:6a4db94011d3	1484	* @note This function should be called only if regular conversion is ongoing.
sahilmgandhi	18:6a4db94011d3	1485	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	1486	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1487	*/
sahilmgandhi	18:6a4db94011d3	1488	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	1489	{
sahilmgandhi	18:6a4db94011d3	1490	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	1491
sahilmgandhi	18:6a4db94011d3	1492	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	1493	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	1494
sahilmgandhi	18:6a4db94011d3	1495	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	1496	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
sahilmgandhi	18:6a4db94011d3	1497	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
sahilmgandhi	18:6a4db94011d3	1498	{
sahilmgandhi	18:6a4db94011d3	1499	/* Return error status */
sahilmgandhi	18:6a4db94011d3	1500	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1501	}
sahilmgandhi	18:6a4db94011d3	1502	else
sahilmgandhi	18:6a4db94011d3	1503	{
sahilmgandhi	18:6a4db94011d3	1504	/* Disable interrupts for regular conversions */
sahilmgandhi	18:6a4db94011d3	1505	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE \| DFSDM_FLTCR2_ROVRIE);
sahilmgandhi	18:6a4db94011d3	1506
sahilmgandhi	18:6a4db94011d3	1507	/* Stop regular conversion */
sahilmgandhi	18:6a4db94011d3	1508	DFSDM_RegConvStop(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	1509	}
sahilmgandhi	18:6a4db94011d3	1510	/* Return function status */
sahilmgandhi	18:6a4db94011d3	1511	return status;
sahilmgandhi	18:6a4db94011d3	1512	}
sahilmgandhi	18:6a4db94011d3	1513
sahilmgandhi	18:6a4db94011d3	1514	/**
sahilmgandhi	18:6a4db94011d3	1515	* @brief This function allows to start regular conversion in DMA mode.
sahilmgandhi	18:6a4db94011d3	1516	* @note This function should be called only when DFSDM filter instance is
sahilmgandhi	18:6a4db94011d3	1517	* in idle state or if injected conversion is ongoing.
sahilmgandhi	18:6a4db94011d3	1518	* Please note that data on buffer will contain signed regular conversion
sahilmgandhi	18:6a4db94011d3	1519	* value on 24 most significant bits and corresponding channel on 3 least
sahilmgandhi	18:6a4db94011d3	1520	* significant bits.
sahilmgandhi	18:6a4db94011d3	1521	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	1522	* @param pData : The destination buffer address.
sahilmgandhi	18:6a4db94011d3	1523	* @param Length : The length of data to be transferred from DFSDM filter to memory.
sahilmgandhi	18:6a4db94011d3	1524	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1525	*/
sahilmgandhi	18:6a4db94011d3	1526	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
sahilmgandhi	18:6a4db94011d3	1527	int32_t *pData,
sahilmgandhi	18:6a4db94011d3	1528	uint32_t Length)
sahilmgandhi	18:6a4db94011d3	1529	{
sahilmgandhi	18:6a4db94011d3	1530	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	1531
sahilmgandhi	18:6a4db94011d3	1532	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	1533	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	1534
sahilmgandhi	18:6a4db94011d3	1535	/* Check destination address and length */
sahilmgandhi	18:6a4db94011d3	1536	if((pData == NULL) \|\| (Length == 0U))
sahilmgandhi	18:6a4db94011d3	1537	{
sahilmgandhi	18:6a4db94011d3	1538	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1539	}
sahilmgandhi	18:6a4db94011d3	1540	/* Check that DMA is enabled for regular conversion */
sahilmgandhi	18:6a4db94011d3	1541	else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
sahilmgandhi	18:6a4db94011d3	1542	{
sahilmgandhi	18:6a4db94011d3	1543	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1544	}
sahilmgandhi	18:6a4db94011d3	1545	/* Check parameters compatibility */
sahilmgandhi	18:6a4db94011d3	1546	else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
sahilmgandhi	18:6a4db94011d3	1547	(hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
sahilmgandhi	18:6a4db94011d3	1548	(hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
sahilmgandhi	18:6a4db94011d3	1549	(Length != 1U))
sahilmgandhi	18:6a4db94011d3	1550	{
sahilmgandhi	18:6a4db94011d3	1551	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1552	}
sahilmgandhi	18:6a4db94011d3	1553	else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
sahilmgandhi	18:6a4db94011d3	1554	(hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
sahilmgandhi	18:6a4db94011d3	1555	(hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
sahilmgandhi	18:6a4db94011d3	1556	{
sahilmgandhi	18:6a4db94011d3	1557	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1558	}
sahilmgandhi	18:6a4db94011d3	1559	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	1560	else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
sahilmgandhi	18:6a4db94011d3	1561	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
sahilmgandhi	18:6a4db94011d3	1562	{
sahilmgandhi	18:6a4db94011d3	1563	/* Set callbacks on DMA handler */
sahilmgandhi	18:6a4db94011d3	1564	hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
sahilmgandhi	18:6a4db94011d3	1565	hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
sahilmgandhi	18:6a4db94011d3	1566	hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
sahilmgandhi	18:6a4db94011d3	1567	DFSDM_DMARegularHalfConvCplt : NULL;
sahilmgandhi	18:6a4db94011d3	1568
sahilmgandhi	18:6a4db94011d3	1569	/* Start DMA in interrupt mode */
sahilmgandhi	18:6a4db94011d3	1570	if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)&hdfsdm_filter->Instance->FLTRDATAR, \
sahilmgandhi	18:6a4db94011d3	1571	(uint32_t) pData, Length) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1572	{
sahilmgandhi	18:6a4db94011d3	1573	/* Set DFSDM filter in error state */
sahilmgandhi	18:6a4db94011d3	1574	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
sahilmgandhi	18:6a4db94011d3	1575	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1576	}
sahilmgandhi	18:6a4db94011d3	1577	else
sahilmgandhi	18:6a4db94011d3	1578	{
sahilmgandhi	18:6a4db94011d3	1579	/* Start regular conversion */
sahilmgandhi	18:6a4db94011d3	1580	DFSDM_RegConvStart(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	1581	}
sahilmgandhi	18:6a4db94011d3	1582	}
sahilmgandhi	18:6a4db94011d3	1583	else
sahilmgandhi	18:6a4db94011d3	1584	{
sahilmgandhi	18:6a4db94011d3	1585	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1586	}
sahilmgandhi	18:6a4db94011d3	1587	/* Return function status */
sahilmgandhi	18:6a4db94011d3	1588	return status;
sahilmgandhi	18:6a4db94011d3	1589	}
sahilmgandhi	18:6a4db94011d3	1590
sahilmgandhi	18:6a4db94011d3	1591	/**
sahilmgandhi	18:6a4db94011d3	1592	* @brief This function allows to start regular conversion in DMA mode and to get
sahilmgandhi	18:6a4db94011d3	1593	* only the 16 most significant bits of conversion.
sahilmgandhi	18:6a4db94011d3	1594	* @note This function should be called only when DFSDM filter instance is
sahilmgandhi	18:6a4db94011d3	1595	* in idle state or if injected conversion is ongoing.
sahilmgandhi	18:6a4db94011d3	1596	* Please note that data on buffer will contain signed 16 most significant
sahilmgandhi	18:6a4db94011d3	1597	* bits of regular conversion.
sahilmgandhi	18:6a4db94011d3	1598	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	1599	* @param pData : The destination buffer address.
sahilmgandhi	18:6a4db94011d3	1600	* @param Length : The length of data to be transferred from DFSDM filter to memory.
sahilmgandhi	18:6a4db94011d3	1601	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1602	*/
sahilmgandhi	18:6a4db94011d3	1603	HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
sahilmgandhi	18:6a4db94011d3	1604	int16_t *pData,
sahilmgandhi	18:6a4db94011d3	1605	uint32_t Length)
sahilmgandhi	18:6a4db94011d3	1606	{
sahilmgandhi	18:6a4db94011d3	1607	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	1608
sahilmgandhi	18:6a4db94011d3	1609	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	1610	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	1611
sahilmgandhi	18:6a4db94011d3	1612	/* Check destination address and length */
sahilmgandhi	18:6a4db94011d3	1613	if((pData == NULL) \|\| (Length == 0U))
sahilmgandhi	18:6a4db94011d3	1614	{
sahilmgandhi	18:6a4db94011d3	1615	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1616	}
sahilmgandhi	18:6a4db94011d3	1617	/* Check that DMA is enabled for regular conversion */
sahilmgandhi	18:6a4db94011d3	1618	else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_RDMAEN) != DFSDM_FLTCR1_RDMAEN)
sahilmgandhi	18:6a4db94011d3	1619	{
sahilmgandhi	18:6a4db94011d3	1620	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1621	}
sahilmgandhi	18:6a4db94011d3	1622	/* Check parameters compatibility */
sahilmgandhi	18:6a4db94011d3	1623	else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
sahilmgandhi	18:6a4db94011d3	1624	(hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
sahilmgandhi	18:6a4db94011d3	1625	(hdfsdm_filter->hdmaReg->Init.Mode == DMA_NORMAL) && \
sahilmgandhi	18:6a4db94011d3	1626	(Length != 1U))
sahilmgandhi	18:6a4db94011d3	1627	{
sahilmgandhi	18:6a4db94011d3	1628	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1629	}
sahilmgandhi	18:6a4db94011d3	1630	else if((hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER) && \
sahilmgandhi	18:6a4db94011d3	1631	(hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
sahilmgandhi	18:6a4db94011d3	1632	(hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR))
sahilmgandhi	18:6a4db94011d3	1633	{
sahilmgandhi	18:6a4db94011d3	1634	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1635	}
sahilmgandhi	18:6a4db94011d3	1636	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	1637	else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
sahilmgandhi	18:6a4db94011d3	1638	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ))
sahilmgandhi	18:6a4db94011d3	1639	{
sahilmgandhi	18:6a4db94011d3	1640	/* Set callbacks on DMA handler */
sahilmgandhi	18:6a4db94011d3	1641	hdfsdm_filter->hdmaReg->XferCpltCallback = DFSDM_DMARegularConvCplt;
sahilmgandhi	18:6a4db94011d3	1642	hdfsdm_filter->hdmaReg->XferErrorCallback = DFSDM_DMAError;
sahilmgandhi	18:6a4db94011d3	1643	hdfsdm_filter->hdmaReg->XferHalfCpltCallback = (hdfsdm_filter->hdmaReg->Init.Mode == DMA_CIRCULAR) ?\
sahilmgandhi	18:6a4db94011d3	1644	DFSDM_DMARegularHalfConvCplt : NULL;
sahilmgandhi	18:6a4db94011d3	1645
sahilmgandhi	18:6a4db94011d3	1646	/* Start DMA in interrupt mode */
sahilmgandhi	18:6a4db94011d3	1647	if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaReg, (uint32_t)(&hdfsdm_filter->Instance->FLTRDATAR) + 2U, \
sahilmgandhi	18:6a4db94011d3	1648	(uint32_t) pData, Length) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1649	{
sahilmgandhi	18:6a4db94011d3	1650	/* Set DFSDM filter in error state */
sahilmgandhi	18:6a4db94011d3	1651	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
sahilmgandhi	18:6a4db94011d3	1652	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1653	}
sahilmgandhi	18:6a4db94011d3	1654	else
sahilmgandhi	18:6a4db94011d3	1655	{
sahilmgandhi	18:6a4db94011d3	1656	/* Start regular conversion */
sahilmgandhi	18:6a4db94011d3	1657	DFSDM_RegConvStart(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	1658	}
sahilmgandhi	18:6a4db94011d3	1659	}
sahilmgandhi	18:6a4db94011d3	1660	else
sahilmgandhi	18:6a4db94011d3	1661	{
sahilmgandhi	18:6a4db94011d3	1662	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1663	}
sahilmgandhi	18:6a4db94011d3	1664	/* Return function status */
sahilmgandhi	18:6a4db94011d3	1665	return status;
sahilmgandhi	18:6a4db94011d3	1666	}
sahilmgandhi	18:6a4db94011d3	1667
sahilmgandhi	18:6a4db94011d3	1668	/**
sahilmgandhi	18:6a4db94011d3	1669	* @brief This function allows to stop regular conversion in DMA mode.
sahilmgandhi	18:6a4db94011d3	1670	* @note This function should be called only if regular conversion is ongoing.
sahilmgandhi	18:6a4db94011d3	1671	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	1672	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1673	*/
sahilmgandhi	18:6a4db94011d3	1674	HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	1675	{
sahilmgandhi	18:6a4db94011d3	1676	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	1677
sahilmgandhi	18:6a4db94011d3	1678	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	1679	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	1680
sahilmgandhi	18:6a4db94011d3	1681	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	1682	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG) && \
sahilmgandhi	18:6a4db94011d3	1683	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
sahilmgandhi	18:6a4db94011d3	1684	{
sahilmgandhi	18:6a4db94011d3	1685	/* Return error status */
sahilmgandhi	18:6a4db94011d3	1686	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1687	}
sahilmgandhi	18:6a4db94011d3	1688	else
sahilmgandhi	18:6a4db94011d3	1689	{
sahilmgandhi	18:6a4db94011d3	1690	/* Stop current DMA transfer */
sahilmgandhi	18:6a4db94011d3	1691	if(HAL_DMA_Abort(hdfsdm_filter->hdmaReg) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1692	{
sahilmgandhi	18:6a4db94011d3	1693	/* Set DFSDM filter in error state */
sahilmgandhi	18:6a4db94011d3	1694	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
sahilmgandhi	18:6a4db94011d3	1695	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1696	}
sahilmgandhi	18:6a4db94011d3	1697	else
sahilmgandhi	18:6a4db94011d3	1698	{
sahilmgandhi	18:6a4db94011d3	1699	/* Stop regular conversion */
sahilmgandhi	18:6a4db94011d3	1700	DFSDM_RegConvStop(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	1701	}
sahilmgandhi	18:6a4db94011d3	1702	}
sahilmgandhi	18:6a4db94011d3	1703	/* Return function status */
sahilmgandhi	18:6a4db94011d3	1704	return status;
sahilmgandhi	18:6a4db94011d3	1705	}
sahilmgandhi	18:6a4db94011d3	1706
sahilmgandhi	18:6a4db94011d3	1707	/**
sahilmgandhi	18:6a4db94011d3	1708	* @brief This function allows to get regular conversion value.
sahilmgandhi	18:6a4db94011d3	1709	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	1710	* @param Channel : Corresponding channel of regular conversion.
sahilmgandhi	18:6a4db94011d3	1711	* @retval Regular conversion value
sahilmgandhi	18:6a4db94011d3	1712	*/
sahilmgandhi	18:6a4db94011d3	1713	int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
sahilmgandhi	18:6a4db94011d3	1714	uint32_t *Channel)
sahilmgandhi	18:6a4db94011d3	1715	{
sahilmgandhi	18:6a4db94011d3	1716	uint32_t reg = 0U;
sahilmgandhi	18:6a4db94011d3	1717	int32_t value = 0U;
sahilmgandhi	18:6a4db94011d3	1718
sahilmgandhi	18:6a4db94011d3	1719	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	1720	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	1721	assert_param(Channel != NULL);
sahilmgandhi	18:6a4db94011d3	1722
sahilmgandhi	18:6a4db94011d3	1723	/* Get value of data register for regular channel */
sahilmgandhi	18:6a4db94011d3	1724	reg = hdfsdm_filter->Instance->FLTRDATAR;
sahilmgandhi	18:6a4db94011d3	1725
sahilmgandhi	18:6a4db94011d3	1726	/* Extract channel and regular conversion value */
sahilmgandhi	18:6a4db94011d3	1727	*Channel = (reg & DFSDM_FLTRDATAR_RDATACH);
sahilmgandhi	18:6a4db94011d3	1728	value = ((reg & DFSDM_FLTRDATAR_RDATA) >> DFSDM_FLTRDATAR_DATA_OFFSET);
sahilmgandhi	18:6a4db94011d3	1729
sahilmgandhi	18:6a4db94011d3	1730	/* return regular conversion value */
sahilmgandhi	18:6a4db94011d3	1731	return value;
sahilmgandhi	18:6a4db94011d3	1732	}
sahilmgandhi	18:6a4db94011d3	1733
sahilmgandhi	18:6a4db94011d3	1734	/**
sahilmgandhi	18:6a4db94011d3	1735	* @brief This function allows to start injected conversion in polling mode.
sahilmgandhi	18:6a4db94011d3	1736	* @note This function should be called only when DFSDM filter instance is
sahilmgandhi	18:6a4db94011d3	1737	* in idle state or if regular conversion is ongoing.
sahilmgandhi	18:6a4db94011d3	1738	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	1739	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1740	*/
sahilmgandhi	18:6a4db94011d3	1741	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	1742	{
sahilmgandhi	18:6a4db94011d3	1743	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	1744
sahilmgandhi	18:6a4db94011d3	1745	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	1746	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	1747
sahilmgandhi	18:6a4db94011d3	1748	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	1749	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
sahilmgandhi	18:6a4db94011d3	1750	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
sahilmgandhi	18:6a4db94011d3	1751	{
sahilmgandhi	18:6a4db94011d3	1752	/* Start injected conversion */
sahilmgandhi	18:6a4db94011d3	1753	DFSDM_InjConvStart(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	1754	}
sahilmgandhi	18:6a4db94011d3	1755	else
sahilmgandhi	18:6a4db94011d3	1756	{
sahilmgandhi	18:6a4db94011d3	1757	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1758	}
sahilmgandhi	18:6a4db94011d3	1759	/* Return function status */
sahilmgandhi	18:6a4db94011d3	1760	return status;
sahilmgandhi	18:6a4db94011d3	1761	}
sahilmgandhi	18:6a4db94011d3	1762
sahilmgandhi	18:6a4db94011d3	1763	/**
sahilmgandhi	18:6a4db94011d3	1764	* @brief This function allows to poll for the end of injected conversion.
sahilmgandhi	18:6a4db94011d3	1765	* @note This function should be called only if injected conversion is ongoing.
sahilmgandhi	18:6a4db94011d3	1766	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	1767	* @param Timeout : Timeout value in milliseconds.
sahilmgandhi	18:6a4db94011d3	1768	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1769	*/
sahilmgandhi	18:6a4db94011d3	1770	HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
sahilmgandhi	18:6a4db94011d3	1771	uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	1772	{
sahilmgandhi	18:6a4db94011d3	1773	uint32_t tickstart;
sahilmgandhi	18:6a4db94011d3	1774
sahilmgandhi	18:6a4db94011d3	1775	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	1776	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	1777
sahilmgandhi	18:6a4db94011d3	1778	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	1779	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
sahilmgandhi	18:6a4db94011d3	1780	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
sahilmgandhi	18:6a4db94011d3	1781	{
sahilmgandhi	18:6a4db94011d3	1782	/* Return error status */
sahilmgandhi	18:6a4db94011d3	1783	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1784	}
sahilmgandhi	18:6a4db94011d3	1785	else
sahilmgandhi	18:6a4db94011d3	1786	{
sahilmgandhi	18:6a4db94011d3	1787	/* Get timeout */
sahilmgandhi	18:6a4db94011d3	1788	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	1789
sahilmgandhi	18:6a4db94011d3	1790	/* Wait end of injected conversions */
sahilmgandhi	18:6a4db94011d3	1791	while((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != DFSDM_FLTISR_JEOCF)
sahilmgandhi	18:6a4db94011d3	1792	{
sahilmgandhi	18:6a4db94011d3	1793	/* Check the Timeout */
sahilmgandhi	18:6a4db94011d3	1794	if(Timeout != HAL_MAX_DELAY)
sahilmgandhi	18:6a4db94011d3	1795	{
sahilmgandhi	18:6a4db94011d3	1796	if((Timeout == 0U) \|\| ((HAL_GetTick()-tickstart) > Timeout))
sahilmgandhi	18:6a4db94011d3	1797	{
sahilmgandhi	18:6a4db94011d3	1798	/* Return timeout status */
sahilmgandhi	18:6a4db94011d3	1799	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1800	}
sahilmgandhi	18:6a4db94011d3	1801	}
sahilmgandhi	18:6a4db94011d3	1802	}
sahilmgandhi	18:6a4db94011d3	1803	/* Check if overrun occurs */
sahilmgandhi	18:6a4db94011d3	1804	if((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) == DFSDM_FLTISR_JOVRF)
sahilmgandhi	18:6a4db94011d3	1805	{
sahilmgandhi	18:6a4db94011d3	1806	/* Update error code and call error callback */
sahilmgandhi	18:6a4db94011d3	1807	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
sahilmgandhi	18:6a4db94011d3	1808	HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	1809
sahilmgandhi	18:6a4db94011d3	1810	/* Clear injected overrun flag */
sahilmgandhi	18:6a4db94011d3	1811	hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
sahilmgandhi	18:6a4db94011d3	1812	}
sahilmgandhi	18:6a4db94011d3	1813
sahilmgandhi	18:6a4db94011d3	1814	/* Update remaining injected conversions */
sahilmgandhi	18:6a4db94011d3	1815	hdfsdm_filter->InjConvRemaining--;
sahilmgandhi	18:6a4db94011d3	1816	if(hdfsdm_filter->InjConvRemaining == 0U)
sahilmgandhi	18:6a4db94011d3	1817	{
sahilmgandhi	18:6a4db94011d3	1818	/* Update DFSDM filter state only if trigger is software */
sahilmgandhi	18:6a4db94011d3	1819	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
sahilmgandhi	18:6a4db94011d3	1820	{
sahilmgandhi	18:6a4db94011d3	1821	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
sahilmgandhi	18:6a4db94011d3	1822	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
sahilmgandhi	18:6a4db94011d3	1823	}
sahilmgandhi	18:6a4db94011d3	1824
sahilmgandhi	18:6a4db94011d3	1825	/* end of injected sequence, reset the value */
sahilmgandhi	18:6a4db94011d3	1826	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
sahilmgandhi	18:6a4db94011d3	1827	hdfsdm_filter->InjectedChannelsNbr : 1U;
sahilmgandhi	18:6a4db94011d3	1828	}
sahilmgandhi	18:6a4db94011d3	1829
sahilmgandhi	18:6a4db94011d3	1830	/* Return function status */
sahilmgandhi	18:6a4db94011d3	1831	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1832	}
sahilmgandhi	18:6a4db94011d3	1833	}
sahilmgandhi	18:6a4db94011d3	1834
sahilmgandhi	18:6a4db94011d3	1835	/**
sahilmgandhi	18:6a4db94011d3	1836	* @brief This function allows to stop injected conversion in polling mode.
sahilmgandhi	18:6a4db94011d3	1837	* @note This function should be called only if injected conversion is ongoing.
sahilmgandhi	18:6a4db94011d3	1838	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	1839	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1840	*/
sahilmgandhi	18:6a4db94011d3	1841	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	1842	{
sahilmgandhi	18:6a4db94011d3	1843	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	1844
sahilmgandhi	18:6a4db94011d3	1845	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	1846	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	1847
sahilmgandhi	18:6a4db94011d3	1848	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	1849	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
sahilmgandhi	18:6a4db94011d3	1850	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
sahilmgandhi	18:6a4db94011d3	1851	{
sahilmgandhi	18:6a4db94011d3	1852	/* Return error status */
sahilmgandhi	18:6a4db94011d3	1853	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1854	}
sahilmgandhi	18:6a4db94011d3	1855	else
sahilmgandhi	18:6a4db94011d3	1856	{
sahilmgandhi	18:6a4db94011d3	1857	/* Stop injected conversion */
sahilmgandhi	18:6a4db94011d3	1858	DFSDM_InjConvStop(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	1859	}
sahilmgandhi	18:6a4db94011d3	1860	/* Return function status */
sahilmgandhi	18:6a4db94011d3	1861	return status;
sahilmgandhi	18:6a4db94011d3	1862	}
sahilmgandhi	18:6a4db94011d3	1863
sahilmgandhi	18:6a4db94011d3	1864	/**
sahilmgandhi	18:6a4db94011d3	1865	* @brief This function allows to start injected conversion in interrupt mode.
sahilmgandhi	18:6a4db94011d3	1866	* @note This function should be called only when DFSDM filter instance is
sahilmgandhi	18:6a4db94011d3	1867	* in idle state or if regular conversion is ongoing.
sahilmgandhi	18:6a4db94011d3	1868	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	1869	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1870	*/
sahilmgandhi	18:6a4db94011d3	1871	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	1872	{
sahilmgandhi	18:6a4db94011d3	1873	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	1874
sahilmgandhi	18:6a4db94011d3	1875	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	1876	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	1877
sahilmgandhi	18:6a4db94011d3	1878	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	1879	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
sahilmgandhi	18:6a4db94011d3	1880	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
sahilmgandhi	18:6a4db94011d3	1881	{
sahilmgandhi	18:6a4db94011d3	1882	/* Enable interrupts for injected conversions */
sahilmgandhi	18:6a4db94011d3	1883	hdfsdm_filter->Instance->FLTCR2 \|= (DFSDM_FLTCR2_JEOCIE \| DFSDM_FLTCR2_JOVRIE);
sahilmgandhi	18:6a4db94011d3	1884
sahilmgandhi	18:6a4db94011d3	1885	/* Start injected conversion */
sahilmgandhi	18:6a4db94011d3	1886	DFSDM_InjConvStart(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	1887	}
sahilmgandhi	18:6a4db94011d3	1888	else
sahilmgandhi	18:6a4db94011d3	1889	{
sahilmgandhi	18:6a4db94011d3	1890	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1891	}
sahilmgandhi	18:6a4db94011d3	1892	/* Return function status */
sahilmgandhi	18:6a4db94011d3	1893	return status;
sahilmgandhi	18:6a4db94011d3	1894	}
sahilmgandhi	18:6a4db94011d3	1895
sahilmgandhi	18:6a4db94011d3	1896	/**
sahilmgandhi	18:6a4db94011d3	1897	* @brief This function allows to stop injected conversion in interrupt mode.
sahilmgandhi	18:6a4db94011d3	1898	* @note This function should be called only if injected conversion is ongoing.
sahilmgandhi	18:6a4db94011d3	1899	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	1900	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1901	*/
sahilmgandhi	18:6a4db94011d3	1902	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	1903	{
sahilmgandhi	18:6a4db94011d3	1904	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	1905
sahilmgandhi	18:6a4db94011d3	1906	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	1907	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	1908
sahilmgandhi	18:6a4db94011d3	1909	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	1910	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
sahilmgandhi	18:6a4db94011d3	1911	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
sahilmgandhi	18:6a4db94011d3	1912	{
sahilmgandhi	18:6a4db94011d3	1913	/* Return error status */
sahilmgandhi	18:6a4db94011d3	1914	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1915	}
sahilmgandhi	18:6a4db94011d3	1916	else
sahilmgandhi	18:6a4db94011d3	1917	{
sahilmgandhi	18:6a4db94011d3	1918	/* Disable interrupts for injected conversions */
sahilmgandhi	18:6a4db94011d3	1919	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE \| DFSDM_FLTCR2_JOVRIE);
sahilmgandhi	18:6a4db94011d3	1920
sahilmgandhi	18:6a4db94011d3	1921	/* Stop injected conversion */
sahilmgandhi	18:6a4db94011d3	1922	DFSDM_InjConvStop(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	1923	}
sahilmgandhi	18:6a4db94011d3	1924	/* Return function status */
sahilmgandhi	18:6a4db94011d3	1925	return status;
sahilmgandhi	18:6a4db94011d3	1926	}
sahilmgandhi	18:6a4db94011d3	1927
sahilmgandhi	18:6a4db94011d3	1928	/**
sahilmgandhi	18:6a4db94011d3	1929	* @brief This function allows to start injected conversion in DMA mode.
sahilmgandhi	18:6a4db94011d3	1930	* @note This function should be called only when DFSDM filter instance is
sahilmgandhi	18:6a4db94011d3	1931	* in idle state or if regular conversion is ongoing.
sahilmgandhi	18:6a4db94011d3	1932	* Please note that data on buffer will contain signed injected conversion
sahilmgandhi	18:6a4db94011d3	1933	* value on 24 most significant bits and corresponding channel on 3 least
sahilmgandhi	18:6a4db94011d3	1934	* significant bits.
sahilmgandhi	18:6a4db94011d3	1935	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	1936	* @param pData : The destination buffer address.
sahilmgandhi	18:6a4db94011d3	1937	* @param Length : The length of data to be transferred from DFSDM filter to memory.
sahilmgandhi	18:6a4db94011d3	1938	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1939	*/
sahilmgandhi	18:6a4db94011d3	1940	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
sahilmgandhi	18:6a4db94011d3	1941	int32_t *pData,
sahilmgandhi	18:6a4db94011d3	1942	uint32_t Length)
sahilmgandhi	18:6a4db94011d3	1943	{
sahilmgandhi	18:6a4db94011d3	1944	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	1945
sahilmgandhi	18:6a4db94011d3	1946	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	1947	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	1948
sahilmgandhi	18:6a4db94011d3	1949	/* Check destination address and length */
sahilmgandhi	18:6a4db94011d3	1950	if((pData == NULL) \|\| (Length == 0U))
sahilmgandhi	18:6a4db94011d3	1951	{
sahilmgandhi	18:6a4db94011d3	1952	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1953	}
sahilmgandhi	18:6a4db94011d3	1954	/* Check that DMA is enabled for injected conversion */
sahilmgandhi	18:6a4db94011d3	1955	else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
sahilmgandhi	18:6a4db94011d3	1956	{
sahilmgandhi	18:6a4db94011d3	1957	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1958	}
sahilmgandhi	18:6a4db94011d3	1959	/* Check parameters compatibility */
sahilmgandhi	18:6a4db94011d3	1960	else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
sahilmgandhi	18:6a4db94011d3	1961	(hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
sahilmgandhi	18:6a4db94011d3	1962	(Length > hdfsdm_filter->InjConvRemaining))
sahilmgandhi	18:6a4db94011d3	1963	{
sahilmgandhi	18:6a4db94011d3	1964	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1965	}
sahilmgandhi	18:6a4db94011d3	1966	else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
sahilmgandhi	18:6a4db94011d3	1967	(hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
sahilmgandhi	18:6a4db94011d3	1968	{
sahilmgandhi	18:6a4db94011d3	1969	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1970	}
sahilmgandhi	18:6a4db94011d3	1971	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	1972	else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
sahilmgandhi	18:6a4db94011d3	1973	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
sahilmgandhi	18:6a4db94011d3	1974	{
sahilmgandhi	18:6a4db94011d3	1975	/* Set callbacks on DMA handler */
sahilmgandhi	18:6a4db94011d3	1976	hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
sahilmgandhi	18:6a4db94011d3	1977	hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
sahilmgandhi	18:6a4db94011d3	1978	hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
sahilmgandhi	18:6a4db94011d3	1979	DFSDM_DMAInjectedHalfConvCplt : NULL;
sahilmgandhi	18:6a4db94011d3	1980
sahilmgandhi	18:6a4db94011d3	1981	/* Start DMA in interrupt mode */
sahilmgandhi	18:6a4db94011d3	1982	if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)&hdfsdm_filter->Instance->FLTJDATAR, \
sahilmgandhi	18:6a4db94011d3	1983	(uint32_t) pData, Length) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1984	{
sahilmgandhi	18:6a4db94011d3	1985	/* Set DFSDM filter in error state */
sahilmgandhi	18:6a4db94011d3	1986	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
sahilmgandhi	18:6a4db94011d3	1987	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1988	}
sahilmgandhi	18:6a4db94011d3	1989	else
sahilmgandhi	18:6a4db94011d3	1990	{
sahilmgandhi	18:6a4db94011d3	1991	/* Start injected conversion */
sahilmgandhi	18:6a4db94011d3	1992	DFSDM_InjConvStart(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	1993	}
sahilmgandhi	18:6a4db94011d3	1994	}
sahilmgandhi	18:6a4db94011d3	1995	else
sahilmgandhi	18:6a4db94011d3	1996	{
sahilmgandhi	18:6a4db94011d3	1997	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1998	}
sahilmgandhi	18:6a4db94011d3	1999	/* Return function status */
sahilmgandhi	18:6a4db94011d3	2000	return status;
sahilmgandhi	18:6a4db94011d3	2001	}
sahilmgandhi	18:6a4db94011d3	2002
sahilmgandhi	18:6a4db94011d3	2003	/**
sahilmgandhi	18:6a4db94011d3	2004	* @brief This function allows to start injected conversion in DMA mode and to get
sahilmgandhi	18:6a4db94011d3	2005	* only the 16 most significant bits of conversion.
sahilmgandhi	18:6a4db94011d3	2006	* @note This function should be called only when DFSDM filter instance is
sahilmgandhi	18:6a4db94011d3	2007	* in idle state or if regular conversion is ongoing.
sahilmgandhi	18:6a4db94011d3	2008	* Please note that data on buffer will contain signed 16 most significant
sahilmgandhi	18:6a4db94011d3	2009	* bits of injected conversion.
sahilmgandhi	18:6a4db94011d3	2010	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2011	* @param pData : The destination buffer address.
sahilmgandhi	18:6a4db94011d3	2012	* @param Length : The length of data to be transferred from DFSDM filter to memory.
sahilmgandhi	18:6a4db94011d3	2013	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2014	*/
sahilmgandhi	18:6a4db94011d3	2015	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
sahilmgandhi	18:6a4db94011d3	2016	int16_t *pData,
sahilmgandhi	18:6a4db94011d3	2017	uint32_t Length)
sahilmgandhi	18:6a4db94011d3	2018	{
sahilmgandhi	18:6a4db94011d3	2019	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	2020
sahilmgandhi	18:6a4db94011d3	2021	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	2022	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	2023
sahilmgandhi	18:6a4db94011d3	2024	/* Check destination address and length */
sahilmgandhi	18:6a4db94011d3	2025	if((pData == NULL) \|\| (Length == 0U))
sahilmgandhi	18:6a4db94011d3	2026	{
sahilmgandhi	18:6a4db94011d3	2027	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2028	}
sahilmgandhi	18:6a4db94011d3	2029	/* Check that DMA is enabled for injected conversion */
sahilmgandhi	18:6a4db94011d3	2030	else if((hdfsdm_filter->Instance->FLTCR1 & DFSDM_FLTCR1_JDMAEN) != DFSDM_FLTCR1_JDMAEN)
sahilmgandhi	18:6a4db94011d3	2031	{
sahilmgandhi	18:6a4db94011d3	2032	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2033	}
sahilmgandhi	18:6a4db94011d3	2034	/* Check parameters compatibility */
sahilmgandhi	18:6a4db94011d3	2035	else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
sahilmgandhi	18:6a4db94011d3	2036	(hdfsdm_filter->hdmaInj->Init.Mode == DMA_NORMAL) && \
sahilmgandhi	18:6a4db94011d3	2037	(Length > hdfsdm_filter->InjConvRemaining))
sahilmgandhi	18:6a4db94011d3	2038	{
sahilmgandhi	18:6a4db94011d3	2039	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2040	}
sahilmgandhi	18:6a4db94011d3	2041	else if((hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER) && \
sahilmgandhi	18:6a4db94011d3	2042	(hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR))
sahilmgandhi	18:6a4db94011d3	2043	{
sahilmgandhi	18:6a4db94011d3	2044	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2045	}
sahilmgandhi	18:6a4db94011d3	2046	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	2047	else if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) \|\| \
sahilmgandhi	18:6a4db94011d3	2048	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG))
sahilmgandhi	18:6a4db94011d3	2049	{
sahilmgandhi	18:6a4db94011d3	2050	/* Set callbacks on DMA handler */
sahilmgandhi	18:6a4db94011d3	2051	hdfsdm_filter->hdmaInj->XferCpltCallback = DFSDM_DMAInjectedConvCplt;
sahilmgandhi	18:6a4db94011d3	2052	hdfsdm_filter->hdmaInj->XferErrorCallback = DFSDM_DMAError;
sahilmgandhi	18:6a4db94011d3	2053	hdfsdm_filter->hdmaInj->XferHalfCpltCallback = (hdfsdm_filter->hdmaInj->Init.Mode == DMA_CIRCULAR) ?\
sahilmgandhi	18:6a4db94011d3	2054	DFSDM_DMAInjectedHalfConvCplt : NULL;
sahilmgandhi	18:6a4db94011d3	2055
sahilmgandhi	18:6a4db94011d3	2056	/* Start DMA in interrupt mode */
sahilmgandhi	18:6a4db94011d3	2057	if(HAL_DMA_Start_IT(hdfsdm_filter->hdmaInj, (uint32_t)(&hdfsdm_filter->Instance->FLTJDATAR) + 2U, \
sahilmgandhi	18:6a4db94011d3	2058	(uint32_t) pData, Length) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2059	{
sahilmgandhi	18:6a4db94011d3	2060	/* Set DFSDM filter in error state */
sahilmgandhi	18:6a4db94011d3	2061	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
sahilmgandhi	18:6a4db94011d3	2062	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2063	}
sahilmgandhi	18:6a4db94011d3	2064	else
sahilmgandhi	18:6a4db94011d3	2065	{
sahilmgandhi	18:6a4db94011d3	2066	/* Start injected conversion */
sahilmgandhi	18:6a4db94011d3	2067	DFSDM_InjConvStart(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	2068	}
sahilmgandhi	18:6a4db94011d3	2069	}
sahilmgandhi	18:6a4db94011d3	2070	else
sahilmgandhi	18:6a4db94011d3	2071	{
sahilmgandhi	18:6a4db94011d3	2072	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2073	}
sahilmgandhi	18:6a4db94011d3	2074	/* Return function status */
sahilmgandhi	18:6a4db94011d3	2075	return status;
sahilmgandhi	18:6a4db94011d3	2076	}
sahilmgandhi	18:6a4db94011d3	2077
sahilmgandhi	18:6a4db94011d3	2078	/**
sahilmgandhi	18:6a4db94011d3	2079	* @brief This function allows to stop injected conversion in DMA mode.
sahilmgandhi	18:6a4db94011d3	2080	* @note This function should be called only if injected conversion is ongoing.
sahilmgandhi	18:6a4db94011d3	2081	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2082	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2083	*/
sahilmgandhi	18:6a4db94011d3	2084	HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	2085	{
sahilmgandhi	18:6a4db94011d3	2086	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	2087
sahilmgandhi	18:6a4db94011d3	2088	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	2089	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	2090
sahilmgandhi	18:6a4db94011d3	2091	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	2092	if((hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_INJ) && \
sahilmgandhi	18:6a4db94011d3	2093	(hdfsdm_filter->State != HAL_DFSDM_FILTER_STATE_REG_INJ))
sahilmgandhi	18:6a4db94011d3	2094	{
sahilmgandhi	18:6a4db94011d3	2095	/* Return error status */
sahilmgandhi	18:6a4db94011d3	2096	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2097	}
sahilmgandhi	18:6a4db94011d3	2098	else
sahilmgandhi	18:6a4db94011d3	2099	{
sahilmgandhi	18:6a4db94011d3	2100	/* Stop current DMA transfer */
sahilmgandhi	18:6a4db94011d3	2101	if(HAL_DMA_Abort(hdfsdm_filter->hdmaInj) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2102	{
sahilmgandhi	18:6a4db94011d3	2103	/* Set DFSDM filter in error state */
sahilmgandhi	18:6a4db94011d3	2104	hdfsdm_filter->State = HAL_DFSDM_FILTER_STATE_ERROR;
sahilmgandhi	18:6a4db94011d3	2105	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2106	}
sahilmgandhi	18:6a4db94011d3	2107	else
sahilmgandhi	18:6a4db94011d3	2108	{
sahilmgandhi	18:6a4db94011d3	2109	/* Stop regular conversion */
sahilmgandhi	18:6a4db94011d3	2110	DFSDM_InjConvStop(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	2111	}
sahilmgandhi	18:6a4db94011d3	2112	}
sahilmgandhi	18:6a4db94011d3	2113	/* Return function status */
sahilmgandhi	18:6a4db94011d3	2114	return status;
sahilmgandhi	18:6a4db94011d3	2115	}
sahilmgandhi	18:6a4db94011d3	2116
sahilmgandhi	18:6a4db94011d3	2117	/**
sahilmgandhi	18:6a4db94011d3	2118	* @brief This function allows to get injected conversion value.
sahilmgandhi	18:6a4db94011d3	2119	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2120	* @param Channel : Corresponding channel of injected conversion.
sahilmgandhi	18:6a4db94011d3	2121	* @retval Injected conversion value
sahilmgandhi	18:6a4db94011d3	2122	*/
sahilmgandhi	18:6a4db94011d3	2123	int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
sahilmgandhi	18:6a4db94011d3	2124	uint32_t *Channel)
sahilmgandhi	18:6a4db94011d3	2125	{
sahilmgandhi	18:6a4db94011d3	2126	uint32_t reg = 0U;
sahilmgandhi	18:6a4db94011d3	2127	int32_t value = 0U;
sahilmgandhi	18:6a4db94011d3	2128
sahilmgandhi	18:6a4db94011d3	2129	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	2130	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	2131	assert_param(Channel != NULL);
sahilmgandhi	18:6a4db94011d3	2132
sahilmgandhi	18:6a4db94011d3	2133	/* Get value of data register for injected channel */
sahilmgandhi	18:6a4db94011d3	2134	reg = hdfsdm_filter->Instance->FLTJDATAR;
sahilmgandhi	18:6a4db94011d3	2135
sahilmgandhi	18:6a4db94011d3	2136	/* Extract channel and injected conversion value */
sahilmgandhi	18:6a4db94011d3	2137	*Channel = (reg & DFSDM_FLTJDATAR_JDATACH);
sahilmgandhi	18:6a4db94011d3	2138	value = ((reg & DFSDM_FLTJDATAR_JDATA) >> DFSDM_FLTJDATAR_DATA_OFFSET);
sahilmgandhi	18:6a4db94011d3	2139
sahilmgandhi	18:6a4db94011d3	2140	/* return regular conversion value */
sahilmgandhi	18:6a4db94011d3	2141	return value;
sahilmgandhi	18:6a4db94011d3	2142	}
sahilmgandhi	18:6a4db94011d3	2143
sahilmgandhi	18:6a4db94011d3	2144	/**
sahilmgandhi	18:6a4db94011d3	2145	* @brief This function allows to start filter analog watchdog in interrupt mode.
sahilmgandhi	18:6a4db94011d3	2146	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2147	* @param awdParam : DFSDM filter analog watchdog parameters.
sahilmgandhi	18:6a4db94011d3	2148	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2149	*/
sahilmgandhi	18:6a4db94011d3	2150	HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
sahilmgandhi	18:6a4db94011d3	2151	DFSDM_Filter_AwdParamTypeDef *awdParam)
sahilmgandhi	18:6a4db94011d3	2152	{
sahilmgandhi	18:6a4db94011d3	2153	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	2154
sahilmgandhi	18:6a4db94011d3	2155	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	2156	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	2157	assert_param(IS_DFSDM_FILTER_AWD_DATA_SOURCE(awdParam->DataSource));
sahilmgandhi	18:6a4db94011d3	2158	assert_param(IS_DFSDM_INJECTED_CHANNEL(awdParam->Channel));
sahilmgandhi	18:6a4db94011d3	2159	assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->HighThreshold));
sahilmgandhi	18:6a4db94011d3	2160	assert_param(IS_DFSDM_FILTER_AWD_THRESHOLD(awdParam->LowThreshold));
sahilmgandhi	18:6a4db94011d3	2161	assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->HighBreakSignal));
sahilmgandhi	18:6a4db94011d3	2162	assert_param(IS_DFSDM_BREAK_SIGNALS(awdParam->LowBreakSignal));
sahilmgandhi	18:6a4db94011d3	2163
sahilmgandhi	18:6a4db94011d3	2164	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	2165	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) \|\| \
sahilmgandhi	18:6a4db94011d3	2166	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
sahilmgandhi	18:6a4db94011d3	2167	{
sahilmgandhi	18:6a4db94011d3	2168	/* Return error status */
sahilmgandhi	18:6a4db94011d3	2169	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2170	}
sahilmgandhi	18:6a4db94011d3	2171	else
sahilmgandhi	18:6a4db94011d3	2172	{
sahilmgandhi	18:6a4db94011d3	2173	/* Set analog watchdog data source */
sahilmgandhi	18:6a4db94011d3	2174	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
sahilmgandhi	18:6a4db94011d3	2175	hdfsdm_filter->Instance->FLTCR1 \|= awdParam->DataSource;
sahilmgandhi	18:6a4db94011d3	2176
sahilmgandhi	18:6a4db94011d3	2177	/* Set thresholds and break signals */
sahilmgandhi	18:6a4db94011d3	2178	hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT \| DFSDM_FLTAWHTR_BKAWH);
sahilmgandhi	18:6a4db94011d3	2179	hdfsdm_filter->Instance->FLTAWHTR \|= (((uint32_t) awdParam->HighThreshold << DFSDM_FLTAWHTR_THRESHOLD_OFFSET) \| \
sahilmgandhi	18:6a4db94011d3	2180	awdParam->HighBreakSignal);
sahilmgandhi	18:6a4db94011d3	2181	hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT \| DFSDM_FLTAWLTR_BKAWL);
sahilmgandhi	18:6a4db94011d3	2182	hdfsdm_filter->Instance->FLTAWLTR \|= (((uint32_t) awdParam->LowThreshold << DFSDM_FLTAWLTR_THRESHOLD_OFFSET) \| \
sahilmgandhi	18:6a4db94011d3	2183	awdParam->LowBreakSignal);
sahilmgandhi	18:6a4db94011d3	2184
sahilmgandhi	18:6a4db94011d3	2185	/* Set channels and interrupt for analog watchdog */
sahilmgandhi	18:6a4db94011d3	2186	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH);
sahilmgandhi	18:6a4db94011d3	2187	hdfsdm_filter->Instance->FLTCR2 \|= (((awdParam->Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_AWDCH_OFFSET) \| \
sahilmgandhi	18:6a4db94011d3	2188	DFSDM_FLTCR2_AWDIE);
sahilmgandhi	18:6a4db94011d3	2189	}
sahilmgandhi	18:6a4db94011d3	2190	/* Return function status */
sahilmgandhi	18:6a4db94011d3	2191	return status;
sahilmgandhi	18:6a4db94011d3	2192	}
sahilmgandhi	18:6a4db94011d3	2193
sahilmgandhi	18:6a4db94011d3	2194	/**
sahilmgandhi	18:6a4db94011d3	2195	* @brief This function allows to stop filter analog watchdog in interrupt mode.
sahilmgandhi	18:6a4db94011d3	2196	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2197	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2198	*/
sahilmgandhi	18:6a4db94011d3	2199	HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	2200	{
sahilmgandhi	18:6a4db94011d3	2201	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	2202
sahilmgandhi	18:6a4db94011d3	2203	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	2204	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	2205
sahilmgandhi	18:6a4db94011d3	2206	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	2207	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) \|\| \
sahilmgandhi	18:6a4db94011d3	2208	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
sahilmgandhi	18:6a4db94011d3	2209	{
sahilmgandhi	18:6a4db94011d3	2210	/* Return error status */
sahilmgandhi	18:6a4db94011d3	2211	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2212	}
sahilmgandhi	18:6a4db94011d3	2213	else
sahilmgandhi	18:6a4db94011d3	2214	{
sahilmgandhi	18:6a4db94011d3	2215	/* Reset channels for analog watchdog and deactivate interrupt */
sahilmgandhi	18:6a4db94011d3	2216	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_AWDCH \| DFSDM_FLTCR2_AWDIE);
sahilmgandhi	18:6a4db94011d3	2217
sahilmgandhi	18:6a4db94011d3	2218	/* Clear all analog watchdog flags */
sahilmgandhi	18:6a4db94011d3	2219	hdfsdm_filter->Instance->FLTAWCFR = (DFSDM_FLTAWCFR_CLRAWHTF \| DFSDM_FLTAWCFR_CLRAWLTF);
sahilmgandhi	18:6a4db94011d3	2220
sahilmgandhi	18:6a4db94011d3	2221	/* Reset thresholds and break signals */
sahilmgandhi	18:6a4db94011d3	2222	hdfsdm_filter->Instance->FLTAWHTR &= ~(DFSDM_FLTAWHTR_AWHT \| DFSDM_FLTAWHTR_BKAWH);
sahilmgandhi	18:6a4db94011d3	2223	hdfsdm_filter->Instance->FLTAWLTR &= ~(DFSDM_FLTAWLTR_AWLT \| DFSDM_FLTAWLTR_BKAWL);
sahilmgandhi	18:6a4db94011d3	2224
sahilmgandhi	18:6a4db94011d3	2225	/* Reset analog watchdog data source */
sahilmgandhi	18:6a4db94011d3	2226	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_AWFSEL);
sahilmgandhi	18:6a4db94011d3	2227	}
sahilmgandhi	18:6a4db94011d3	2228	/* Return function status */
sahilmgandhi	18:6a4db94011d3	2229	return status;
sahilmgandhi	18:6a4db94011d3	2230	}
sahilmgandhi	18:6a4db94011d3	2231
sahilmgandhi	18:6a4db94011d3	2232	/**
sahilmgandhi	18:6a4db94011d3	2233	* @brief This function allows to start extreme detector feature.
sahilmgandhi	18:6a4db94011d3	2234	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2235	* @param Channel : Channels where extreme detector is enabled.
sahilmgandhi	18:6a4db94011d3	2236	* This parameter can be a values combination of @ref DFSDM_Channel_Selection.
sahilmgandhi	18:6a4db94011d3	2237	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2238	*/
sahilmgandhi	18:6a4db94011d3	2239	HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
sahilmgandhi	18:6a4db94011d3	2240	uint32_t Channel)
sahilmgandhi	18:6a4db94011d3	2241	{
sahilmgandhi	18:6a4db94011d3	2242	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	2243
sahilmgandhi	18:6a4db94011d3	2244	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	2245	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	2246	assert_param(IS_DFSDM_INJECTED_CHANNEL(Channel));
sahilmgandhi	18:6a4db94011d3	2247
sahilmgandhi	18:6a4db94011d3	2248	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	2249	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) \|\| \
sahilmgandhi	18:6a4db94011d3	2250	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
sahilmgandhi	18:6a4db94011d3	2251	{
sahilmgandhi	18:6a4db94011d3	2252	/* Return error status */
sahilmgandhi	18:6a4db94011d3	2253	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2254	}
sahilmgandhi	18:6a4db94011d3	2255	else
sahilmgandhi	18:6a4db94011d3	2256	{
sahilmgandhi	18:6a4db94011d3	2257	/* Set channels for extreme detector */
sahilmgandhi	18:6a4db94011d3	2258	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
sahilmgandhi	18:6a4db94011d3	2259	hdfsdm_filter->Instance->FLTCR2 \|= ((Channel & DFSDM_LSB_MASK) << DFSDM_FLTCR2_EXCH_OFFSET);
sahilmgandhi	18:6a4db94011d3	2260	}
sahilmgandhi	18:6a4db94011d3	2261	/* Return function status */
sahilmgandhi	18:6a4db94011d3	2262	return status;
sahilmgandhi	18:6a4db94011d3	2263	}
sahilmgandhi	18:6a4db94011d3	2264
sahilmgandhi	18:6a4db94011d3	2265	/**
sahilmgandhi	18:6a4db94011d3	2266	* @brief This function allows to stop extreme detector feature.
sahilmgandhi	18:6a4db94011d3	2267	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2268	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2269	*/
sahilmgandhi	18:6a4db94011d3	2270	HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	2271	{
sahilmgandhi	18:6a4db94011d3	2272	HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi	18:6a4db94011d3	2273	__IO uint32_t reg1;
sahilmgandhi	18:6a4db94011d3	2274	__IO uint32_t reg2;
sahilmgandhi	18:6a4db94011d3	2275
sahilmgandhi	18:6a4db94011d3	2276	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	2277	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	2278
sahilmgandhi	18:6a4db94011d3	2279	/* Check DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	2280	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_RESET) \|\| \
sahilmgandhi	18:6a4db94011d3	2281	(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_ERROR))
sahilmgandhi	18:6a4db94011d3	2282	{
sahilmgandhi	18:6a4db94011d3	2283	/* Return error status */
sahilmgandhi	18:6a4db94011d3	2284	status = HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2285	}
sahilmgandhi	18:6a4db94011d3	2286	else
sahilmgandhi	18:6a4db94011d3	2287	{
sahilmgandhi	18:6a4db94011d3	2288	/* Reset channels for extreme detector */
sahilmgandhi	18:6a4db94011d3	2289	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_EXCH);
sahilmgandhi	18:6a4db94011d3	2290
sahilmgandhi	18:6a4db94011d3	2291	/* Clear extreme detector values */
sahilmgandhi	18:6a4db94011d3	2292	reg1 = hdfsdm_filter->Instance->FLTEXMAX;
sahilmgandhi	18:6a4db94011d3	2293	reg2 = hdfsdm_filter->Instance->FLTEXMIN;
sahilmgandhi	18:6a4db94011d3	2294	UNUSED(reg1); /* To avoid GCC warning */
sahilmgandhi	18:6a4db94011d3	2295	UNUSED(reg2); /* To avoid GCC warning */
sahilmgandhi	18:6a4db94011d3	2296	}
sahilmgandhi	18:6a4db94011d3	2297	/* Return function status */
sahilmgandhi	18:6a4db94011d3	2298	return status;
sahilmgandhi	18:6a4db94011d3	2299	}
sahilmgandhi	18:6a4db94011d3	2300
sahilmgandhi	18:6a4db94011d3	2301	/**
sahilmgandhi	18:6a4db94011d3	2302	* @brief This function allows to get extreme detector maximum value.
sahilmgandhi	18:6a4db94011d3	2303	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2304	* @param Channel : Corresponding channel.
sahilmgandhi	18:6a4db94011d3	2305	* @retval Extreme detector maximum value
sahilmgandhi	18:6a4db94011d3	2306	* This value is between Min_Data = -8388608 and Max_Data = 8388607.
sahilmgandhi	18:6a4db94011d3	2307	*/
sahilmgandhi	18:6a4db94011d3	2308	int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
sahilmgandhi	18:6a4db94011d3	2309	uint32_t *Channel)
sahilmgandhi	18:6a4db94011d3	2310	{
sahilmgandhi	18:6a4db94011d3	2311	uint32_t reg = 0U;
sahilmgandhi	18:6a4db94011d3	2312	int32_t value = 0U;
sahilmgandhi	18:6a4db94011d3	2313
sahilmgandhi	18:6a4db94011d3	2314	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	2315	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	2316	assert_param(Channel != NULL);
sahilmgandhi	18:6a4db94011d3	2317
sahilmgandhi	18:6a4db94011d3	2318	/* Get value of extreme detector maximum register */
sahilmgandhi	18:6a4db94011d3	2319	reg = hdfsdm_filter->Instance->FLTEXMAX;
sahilmgandhi	18:6a4db94011d3	2320
sahilmgandhi	18:6a4db94011d3	2321	/* Extract channel and extreme detector maximum value */
sahilmgandhi	18:6a4db94011d3	2322	*Channel = (reg & DFSDM_FLTEXMAX_EXMAXCH);
sahilmgandhi	18:6a4db94011d3	2323	value = ((reg & DFSDM_FLTEXMAX_EXMAX) >> DFSDM_FLTEXMAX_DATA_OFFSET);
sahilmgandhi	18:6a4db94011d3	2324
sahilmgandhi	18:6a4db94011d3	2325	/* return extreme detector maximum value */
sahilmgandhi	18:6a4db94011d3	2326	return value;
sahilmgandhi	18:6a4db94011d3	2327	}
sahilmgandhi	18:6a4db94011d3	2328
sahilmgandhi	18:6a4db94011d3	2329	/**
sahilmgandhi	18:6a4db94011d3	2330	* @brief This function allows to get extreme detector minimum value.
sahilmgandhi	18:6a4db94011d3	2331	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2332	* @param Channel : Corresponding channel.
sahilmgandhi	18:6a4db94011d3	2333	* @retval Extreme detector minimum value
sahilmgandhi	18:6a4db94011d3	2334	* This value is between Min_Data = -8388608 and Max_Data = 8388607.
sahilmgandhi	18:6a4db94011d3	2335	*/
sahilmgandhi	18:6a4db94011d3	2336	int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
sahilmgandhi	18:6a4db94011d3	2337	uint32_t *Channel)
sahilmgandhi	18:6a4db94011d3	2338	{
sahilmgandhi	18:6a4db94011d3	2339	uint32_t reg = 0U;
sahilmgandhi	18:6a4db94011d3	2340	int32_t value = 0U;
sahilmgandhi	18:6a4db94011d3	2341
sahilmgandhi	18:6a4db94011d3	2342	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	2343	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	2344	assert_param(Channel != NULL);
sahilmgandhi	18:6a4db94011d3	2345
sahilmgandhi	18:6a4db94011d3	2346	/* Get value of extreme detector minimum register */
sahilmgandhi	18:6a4db94011d3	2347	reg = hdfsdm_filter->Instance->FLTEXMIN;
sahilmgandhi	18:6a4db94011d3	2348
sahilmgandhi	18:6a4db94011d3	2349	/* Extract channel and extreme detector minimum value */
sahilmgandhi	18:6a4db94011d3	2350	*Channel = (reg & DFSDM_FLTEXMIN_EXMINCH);
sahilmgandhi	18:6a4db94011d3	2351	value = ((reg & DFSDM_FLTEXMIN_EXMIN) >> DFSDM_FLTEXMIN_DATA_OFFSET);
sahilmgandhi	18:6a4db94011d3	2352
sahilmgandhi	18:6a4db94011d3	2353	/* return extreme detector minimum value */
sahilmgandhi	18:6a4db94011d3	2354	return value;
sahilmgandhi	18:6a4db94011d3	2355	}
sahilmgandhi	18:6a4db94011d3	2356
sahilmgandhi	18:6a4db94011d3	2357	/**
sahilmgandhi	18:6a4db94011d3	2358	* @brief This function allows to get conversion time value.
sahilmgandhi	18:6a4db94011d3	2359	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2360	* @retval Conversion time value
sahilmgandhi	18:6a4db94011d3	2361	* @note To get time in second, this value has to be divided by DFSDM clock frequency.
sahilmgandhi	18:6a4db94011d3	2362	*/
sahilmgandhi	18:6a4db94011d3	2363	uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	2364	{
sahilmgandhi	18:6a4db94011d3	2365	uint32_t reg = 0U;
sahilmgandhi	18:6a4db94011d3	2366	uint32_t value = 0U;
sahilmgandhi	18:6a4db94011d3	2367
sahilmgandhi	18:6a4db94011d3	2368	/* Check parameters */
sahilmgandhi	18:6a4db94011d3	2369	assert_param(IS_DFSDM_FILTER_ALL_INSTANCE(hdfsdm_filter->Instance));
sahilmgandhi	18:6a4db94011d3	2370
sahilmgandhi	18:6a4db94011d3	2371	/* Get value of conversion timer register */
sahilmgandhi	18:6a4db94011d3	2372	reg = hdfsdm_filter->Instance->FLTCNVTIMR;
sahilmgandhi	18:6a4db94011d3	2373
sahilmgandhi	18:6a4db94011d3	2374	/* Extract conversion time value */
sahilmgandhi	18:6a4db94011d3	2375	value = ((reg & DFSDM_FLTCNVTIMR_CNVCNT) >> DFSDM_FLTCNVTIMR_DATA_OFFSET);
sahilmgandhi	18:6a4db94011d3	2376
sahilmgandhi	18:6a4db94011d3	2377	/* return extreme detector minimum value */
sahilmgandhi	18:6a4db94011d3	2378	return value;
sahilmgandhi	18:6a4db94011d3	2379	}
sahilmgandhi	18:6a4db94011d3	2380
sahilmgandhi	18:6a4db94011d3	2381	/**
sahilmgandhi	18:6a4db94011d3	2382	* @brief This function handles the DFSDM interrupts.
sahilmgandhi	18:6a4db94011d3	2383	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2384	* @retval None
sahilmgandhi	18:6a4db94011d3	2385	*/
sahilmgandhi	18:6a4db94011d3	2386	void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	2387	{
sahilmgandhi	18:6a4db94011d3	2388	/* Check if overrun occurs during regular conversion */
sahilmgandhi	18:6a4db94011d3	2389	if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_ROVRF) != 0U) && \
sahilmgandhi	18:6a4db94011d3	2390	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_ROVRIE) != 0U))
sahilmgandhi	18:6a4db94011d3	2391	{
sahilmgandhi	18:6a4db94011d3	2392	/* Clear regular overrun flag */
sahilmgandhi	18:6a4db94011d3	2393	hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRROVRF;
sahilmgandhi	18:6a4db94011d3	2394
sahilmgandhi	18:6a4db94011d3	2395	/* Update error code */
sahilmgandhi	18:6a4db94011d3	2396	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_REGULAR_OVERRUN;
sahilmgandhi	18:6a4db94011d3	2397
sahilmgandhi	18:6a4db94011d3	2398	/* Call error callback */
sahilmgandhi	18:6a4db94011d3	2399	HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	2400	}
sahilmgandhi	18:6a4db94011d3	2401	/* Check if overrun occurs during injected conversion */
sahilmgandhi	18:6a4db94011d3	2402	else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JOVRF) != 0U) && \
sahilmgandhi	18:6a4db94011d3	2403	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JOVRIE) != 0U))
sahilmgandhi	18:6a4db94011d3	2404	{
sahilmgandhi	18:6a4db94011d3	2405	/* Clear injected overrun flag */
sahilmgandhi	18:6a4db94011d3	2406	hdfsdm_filter->Instance->FLTICR = DFSDM_FLTICR_CLRJOVRF;
sahilmgandhi	18:6a4db94011d3	2407
sahilmgandhi	18:6a4db94011d3	2408	/* Update error code */
sahilmgandhi	18:6a4db94011d3	2409	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_INJECTED_OVERRUN;
sahilmgandhi	18:6a4db94011d3	2410
sahilmgandhi	18:6a4db94011d3	2411	/* Call error callback */
sahilmgandhi	18:6a4db94011d3	2412	HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	2413	}
sahilmgandhi	18:6a4db94011d3	2414	/* Check if end of regular conversion */
sahilmgandhi	18:6a4db94011d3	2415	else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_REOCF) != 0U) && \
sahilmgandhi	18:6a4db94011d3	2416	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_REOCIE) != 0U))
sahilmgandhi	18:6a4db94011d3	2417	{
sahilmgandhi	18:6a4db94011d3	2418	/* Call regular conversion complete callback */
sahilmgandhi	18:6a4db94011d3	2419	HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	2420
sahilmgandhi	18:6a4db94011d3	2421	/* End of conversion if mode is not continuous and software trigger */
sahilmgandhi	18:6a4db94011d3	2422	if((hdfsdm_filter->RegularContMode == DFSDM_CONTINUOUS_CONV_OFF) && \
sahilmgandhi	18:6a4db94011d3	2423	(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
sahilmgandhi	18:6a4db94011d3	2424	{
sahilmgandhi	18:6a4db94011d3	2425	/* Disable interrupts for regular conversions */
sahilmgandhi	18:6a4db94011d3	2426	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_REOCIE);
sahilmgandhi	18:6a4db94011d3	2427
sahilmgandhi	18:6a4db94011d3	2428	/* Update DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	2429	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
sahilmgandhi	18:6a4db94011d3	2430	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
sahilmgandhi	18:6a4db94011d3	2431	}
sahilmgandhi	18:6a4db94011d3	2432	}
sahilmgandhi	18:6a4db94011d3	2433	/* Check if end of injected conversion */
sahilmgandhi	18:6a4db94011d3	2434	else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_JEOCF) != 0U) && \
sahilmgandhi	18:6a4db94011d3	2435	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_JEOCIE) != 0U))
sahilmgandhi	18:6a4db94011d3	2436	{
sahilmgandhi	18:6a4db94011d3	2437	/* Call injected conversion complete callback */
sahilmgandhi	18:6a4db94011d3	2438	HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	2439
sahilmgandhi	18:6a4db94011d3	2440	/* Update remaining injected conversions */
sahilmgandhi	18:6a4db94011d3	2441	hdfsdm_filter->InjConvRemaining--;
sahilmgandhi	18:6a4db94011d3	2442	if(hdfsdm_filter->InjConvRemaining == 0U)
sahilmgandhi	18:6a4db94011d3	2443	{
sahilmgandhi	18:6a4db94011d3	2444	/* End of conversion if trigger is software */
sahilmgandhi	18:6a4db94011d3	2445	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
sahilmgandhi	18:6a4db94011d3	2446	{
sahilmgandhi	18:6a4db94011d3	2447	/* Disable interrupts for injected conversions */
sahilmgandhi	18:6a4db94011d3	2448	hdfsdm_filter->Instance->FLTCR2 &= ~(DFSDM_FLTCR2_JEOCIE);
sahilmgandhi	18:6a4db94011d3	2449
sahilmgandhi	18:6a4db94011d3	2450	/* Update DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	2451	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
sahilmgandhi	18:6a4db94011d3	2452	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
sahilmgandhi	18:6a4db94011d3	2453	}
sahilmgandhi	18:6a4db94011d3	2454	/* end of injected sequence, reset the value */
sahilmgandhi	18:6a4db94011d3	2455	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
sahilmgandhi	18:6a4db94011d3	2456	hdfsdm_filter->InjectedChannelsNbr : 1U;
sahilmgandhi	18:6a4db94011d3	2457	}
sahilmgandhi	18:6a4db94011d3	2458	}
sahilmgandhi	18:6a4db94011d3	2459	/* Check if analog watchdog occurs */
sahilmgandhi	18:6a4db94011d3	2460	else if(((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_AWDF) != 0U) && \
sahilmgandhi	18:6a4db94011d3	2461	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_AWDIE) != 0U))
sahilmgandhi	18:6a4db94011d3	2462	{
sahilmgandhi	18:6a4db94011d3	2463	uint32_t reg = 0U;
sahilmgandhi	18:6a4db94011d3	2464	uint32_t threshold = 0U;
sahilmgandhi	18:6a4db94011d3	2465	uint32_t channel = 0U;
sahilmgandhi	18:6a4db94011d3	2466
sahilmgandhi	18:6a4db94011d3	2467	/* Get channel and threshold */
sahilmgandhi	18:6a4db94011d3	2468	reg = hdfsdm_filter->Instance->FLTAWSR;
sahilmgandhi	18:6a4db94011d3	2469	threshold = ((reg & DFSDM_FLTAWSR_AWLTF) != 0U) ? DFSDM_AWD_LOW_THRESHOLD : DFSDM_AWD_HIGH_THRESHOLD;
sahilmgandhi	18:6a4db94011d3	2470	if(threshold == DFSDM_AWD_HIGH_THRESHOLD)
sahilmgandhi	18:6a4db94011d3	2471	{
sahilmgandhi	18:6a4db94011d3	2472	reg = reg >> DFSDM_FLTAWSR_HIGH_OFFSET;
sahilmgandhi	18:6a4db94011d3	2473	}
sahilmgandhi	18:6a4db94011d3	2474	while((reg & 1U) == 0U)
sahilmgandhi	18:6a4db94011d3	2475	{
sahilmgandhi	18:6a4db94011d3	2476	channel++;
sahilmgandhi	18:6a4db94011d3	2477	reg = reg >> 1U;
sahilmgandhi	18:6a4db94011d3	2478	}
sahilmgandhi	18:6a4db94011d3	2479	/* Clear analog watchdog flag */
sahilmgandhi	18:6a4db94011d3	2480	hdfsdm_filter->Instance->FLTAWCFR = (threshold == DFSDM_AWD_HIGH_THRESHOLD) ? \
sahilmgandhi	18:6a4db94011d3	2481	(1U << (DFSDM_FLTAWSR_HIGH_OFFSET + channel)) : \
sahilmgandhi	18:6a4db94011d3	2482	(1U << channel);
sahilmgandhi	18:6a4db94011d3	2483
sahilmgandhi	18:6a4db94011d3	2484	/* Call analog watchdog callback */
sahilmgandhi	18:6a4db94011d3	2485	HAL_DFSDM_FilterAwdCallback(hdfsdm_filter, channel, threshold);
sahilmgandhi	18:6a4db94011d3	2486	}
sahilmgandhi	18:6a4db94011d3	2487	/* Check if clock absence occurs */
sahilmgandhi	18:6a4db94011d3	2488	else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
sahilmgandhi	18:6a4db94011d3	2489	((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) != 0U) && \
sahilmgandhi	18:6a4db94011d3	2490	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_CKABIE) != 0U))
sahilmgandhi	18:6a4db94011d3	2491	{
sahilmgandhi	18:6a4db94011d3	2492	uint32_t reg = 0U;
sahilmgandhi	18:6a4db94011d3	2493	uint32_t channel = 0U;
sahilmgandhi	18:6a4db94011d3	2494
sahilmgandhi	18:6a4db94011d3	2495	reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_CKABF) >> DFSDM_FLTISR_CKABF_OFFSET);
sahilmgandhi	18:6a4db94011d3	2496
sahilmgandhi	18:6a4db94011d3	2497	while(channel < DFSDM1_CHANNEL_NUMBER)
sahilmgandhi	18:6a4db94011d3	2498	{
sahilmgandhi	18:6a4db94011d3	2499	/* Check if flag is set and corresponding channel is enabled */
sahilmgandhi	18:6a4db94011d3	2500	if(((reg & 1U) != 0U) && (a_dfsdm1ChannelHandle[channel] != NULL))
sahilmgandhi	18:6a4db94011d3	2501	{
sahilmgandhi	18:6a4db94011d3	2502	/* Check clock absence has been enabled for this channel */
sahilmgandhi	18:6a4db94011d3	2503	if((a_dfsdm1ChannelHandle[channel]->Instance->CHCFGR1 & DFSDM_CHCFGR1_CKABEN) != 0U)
sahilmgandhi	18:6a4db94011d3	2504	{
sahilmgandhi	18:6a4db94011d3	2505	/* Clear clock absence flag */
sahilmgandhi	18:6a4db94011d3	2506	hdfsdm_filter->Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRCKABF_OFFSET + channel));
sahilmgandhi	18:6a4db94011d3	2507
sahilmgandhi	18:6a4db94011d3	2508	/* Call clock absence callback */
sahilmgandhi	18:6a4db94011d3	2509	HAL_DFSDM_ChannelCkabCallback(a_dfsdm1ChannelHandle[channel]);
sahilmgandhi	18:6a4db94011d3	2510	}
sahilmgandhi	18:6a4db94011d3	2511	}
sahilmgandhi	18:6a4db94011d3	2512	channel++;
sahilmgandhi	18:6a4db94011d3	2513	reg = reg >> 1U;
sahilmgandhi	18:6a4db94011d3	2514	}
sahilmgandhi	18:6a4db94011d3	2515	}
sahilmgandhi	18:6a4db94011d3	2516	/* Check if short circuit detection occurs */
sahilmgandhi	18:6a4db94011d3	2517	else if((hdfsdm_filter->Instance == DFSDM1_Filter0) && \
sahilmgandhi	18:6a4db94011d3	2518	((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) != 0U) && \
sahilmgandhi	18:6a4db94011d3	2519	((hdfsdm_filter->Instance->FLTCR2 & DFSDM_FLTCR2_SCDIE) != 0U))
sahilmgandhi	18:6a4db94011d3	2520	{
sahilmgandhi	18:6a4db94011d3	2521	uint32_t reg = 0U;
sahilmgandhi	18:6a4db94011d3	2522	uint32_t channel = 0U;
sahilmgandhi	18:6a4db94011d3	2523
sahilmgandhi	18:6a4db94011d3	2524	/* Get channel */
sahilmgandhi	18:6a4db94011d3	2525	reg = ((hdfsdm_filter->Instance->FLTISR & DFSDM_FLTISR_SCDF) >> DFSDM_FLTISR_SCDF_OFFSET);
sahilmgandhi	18:6a4db94011d3	2526	while((reg & 1U) == 0U)
sahilmgandhi	18:6a4db94011d3	2527	{
sahilmgandhi	18:6a4db94011d3	2528	channel++;
sahilmgandhi	18:6a4db94011d3	2529	reg = reg >> 1U;
sahilmgandhi	18:6a4db94011d3	2530	}
sahilmgandhi	18:6a4db94011d3	2531
sahilmgandhi	18:6a4db94011d3	2532	/* Clear short circuit detection flag */
sahilmgandhi	18:6a4db94011d3	2533	hdfsdm_filter->Instance->FLTICR = (1U << (DFSDM_FLTICR_CLRSCDF_OFFSET + channel));
sahilmgandhi	18:6a4db94011d3	2534
sahilmgandhi	18:6a4db94011d3	2535	/* Call short circuit detection callback */
sahilmgandhi	18:6a4db94011d3	2536	HAL_DFSDM_ChannelScdCallback(a_dfsdm1ChannelHandle[channel]);
sahilmgandhi	18:6a4db94011d3	2537	}
sahilmgandhi	18:6a4db94011d3	2538	}
sahilmgandhi	18:6a4db94011d3	2539
sahilmgandhi	18:6a4db94011d3	2540	/**
sahilmgandhi	18:6a4db94011d3	2541	* @brief Regular conversion complete callback.
sahilmgandhi	18:6a4db94011d3	2542	* @note In interrupt mode, user has to read conversion value in this function
sahilmgandhi	18:6a4db94011d3	2543	* using HAL_DFSDM_FilterGetRegularValue.
sahilmgandhi	18:6a4db94011d3	2544	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2545	* @retval None
sahilmgandhi	18:6a4db94011d3	2546	*/
sahilmgandhi	18:6a4db94011d3	2547	__weak void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	2548	{
sahilmgandhi	18:6a4db94011d3	2549	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	2550	UNUSED(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	2551	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	2552	the HAL_DFSDM_FilterRegConvCpltCallback could be implemented in the user file.
sahilmgandhi	18:6a4db94011d3	2553	*/
sahilmgandhi	18:6a4db94011d3	2554	}
sahilmgandhi	18:6a4db94011d3	2555
sahilmgandhi	18:6a4db94011d3	2556	/**
sahilmgandhi	18:6a4db94011d3	2557	* @brief Half regular conversion complete callback.
sahilmgandhi	18:6a4db94011d3	2558	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2559	* @retval None
sahilmgandhi	18:6a4db94011d3	2560	*/
sahilmgandhi	18:6a4db94011d3	2561	__weak void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	2562	{
sahilmgandhi	18:6a4db94011d3	2563	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	2564	UNUSED(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	2565	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	2566	the HAL_DFSDM_FilterRegConvHalfCpltCallback could be implemented in the user file.
sahilmgandhi	18:6a4db94011d3	2567	*/
sahilmgandhi	18:6a4db94011d3	2568	}
sahilmgandhi	18:6a4db94011d3	2569
sahilmgandhi	18:6a4db94011d3	2570	/**
sahilmgandhi	18:6a4db94011d3	2571	* @brief Injected conversion complete callback.
sahilmgandhi	18:6a4db94011d3	2572	* @note In interrupt mode, user has to read conversion value in this function
sahilmgandhi	18:6a4db94011d3	2573	* using HAL_DFSDM_FilterGetInjectedValue.
sahilmgandhi	18:6a4db94011d3	2574	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2575	* @retval None
sahilmgandhi	18:6a4db94011d3	2576	*/
sahilmgandhi	18:6a4db94011d3	2577	__weak void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	2578	{
sahilmgandhi	18:6a4db94011d3	2579	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	2580	UNUSED(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	2581	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	2582	the HAL_DFSDM_FilterInjConvCpltCallback could be implemented in the user file.
sahilmgandhi	18:6a4db94011d3	2583	*/
sahilmgandhi	18:6a4db94011d3	2584	}
sahilmgandhi	18:6a4db94011d3	2585
sahilmgandhi	18:6a4db94011d3	2586	/**
sahilmgandhi	18:6a4db94011d3	2587	* @brief Half injected conversion complete callback.
sahilmgandhi	18:6a4db94011d3	2588	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2589	* @retval None
sahilmgandhi	18:6a4db94011d3	2590	*/
sahilmgandhi	18:6a4db94011d3	2591	__weak void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	2592	{
sahilmgandhi	18:6a4db94011d3	2593	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	2594	UNUSED(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	2595	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	2596	the HAL_DFSDM_FilterInjConvHalfCpltCallback could be implemented in the user file.
sahilmgandhi	18:6a4db94011d3	2597	*/
sahilmgandhi	18:6a4db94011d3	2598	}
sahilmgandhi	18:6a4db94011d3	2599
sahilmgandhi	18:6a4db94011d3	2600	/**
sahilmgandhi	18:6a4db94011d3	2601	* @brief Filter analog watchdog callback.
sahilmgandhi	18:6a4db94011d3	2602	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2603	* @param Channel : Corresponding channel.
sahilmgandhi	18:6a4db94011d3	2604	* @param Threshold : Low or high threshold has been reached.
sahilmgandhi	18:6a4db94011d3	2605	* @retval None
sahilmgandhi	18:6a4db94011d3	2606	*/
sahilmgandhi	18:6a4db94011d3	2607	__weak void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
sahilmgandhi	18:6a4db94011d3	2608	uint32_t Channel, uint32_t Threshold)
sahilmgandhi	18:6a4db94011d3	2609	{
sahilmgandhi	18:6a4db94011d3	2610	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	2611	UNUSED(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	2612	UNUSED(Channel);
sahilmgandhi	18:6a4db94011d3	2613	UNUSED(Threshold);
sahilmgandhi	18:6a4db94011d3	2614
sahilmgandhi	18:6a4db94011d3	2615	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	2616	the HAL_DFSDM_FilterAwdCallback could be implemented in the user file.
sahilmgandhi	18:6a4db94011d3	2617	*/
sahilmgandhi	18:6a4db94011d3	2618	}
sahilmgandhi	18:6a4db94011d3	2619
sahilmgandhi	18:6a4db94011d3	2620	/**
sahilmgandhi	18:6a4db94011d3	2621	* @brief Error callback.
sahilmgandhi	18:6a4db94011d3	2622	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2623	* @retval None
sahilmgandhi	18:6a4db94011d3	2624	*/
sahilmgandhi	18:6a4db94011d3	2625	__weak void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	2626	{
sahilmgandhi	18:6a4db94011d3	2627	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	2628	UNUSED(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	2629	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	2630	the HAL_DFSDM_FilterErrorCallback could be implemented in the user file.
sahilmgandhi	18:6a4db94011d3	2631	*/
sahilmgandhi	18:6a4db94011d3	2632	}
sahilmgandhi	18:6a4db94011d3	2633
sahilmgandhi	18:6a4db94011d3	2634	/**
sahilmgandhi	18:6a4db94011d3	2635	* @}
sahilmgandhi	18:6a4db94011d3	2636	*/
sahilmgandhi	18:6a4db94011d3	2637
sahilmgandhi	18:6a4db94011d3	2638	/** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions
sahilmgandhi	18:6a4db94011d3	2639	* @brief Filter state functions
sahilmgandhi	18:6a4db94011d3	2640	*
sahilmgandhi	18:6a4db94011d3	2641	@verbatim
sahilmgandhi	18:6a4db94011d3	2642	==============================================================================
sahilmgandhi	18:6a4db94011d3	2643	##### Filter state functions #####
sahilmgandhi	18:6a4db94011d3	2644	==============================================================================
sahilmgandhi	18:6a4db94011d3	2645	[..] This section provides functions allowing to:
sahilmgandhi	18:6a4db94011d3	2646	(+) Get the DFSDM filter state.
sahilmgandhi	18:6a4db94011d3	2647	(+) Get the DFSDM filter error.
sahilmgandhi	18:6a4db94011d3	2648	@endverbatim
sahilmgandhi	18:6a4db94011d3	2649	* @{
sahilmgandhi	18:6a4db94011d3	2650	*/
sahilmgandhi	18:6a4db94011d3	2651
sahilmgandhi	18:6a4db94011d3	2652	/**
sahilmgandhi	18:6a4db94011d3	2653	* @brief This function allows to get the current DFSDM filter handle state.
sahilmgandhi	18:6a4db94011d3	2654	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2655	* @retval DFSDM filter state.
sahilmgandhi	18:6a4db94011d3	2656	*/
sahilmgandhi	18:6a4db94011d3	2657	HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	2658	{
sahilmgandhi	18:6a4db94011d3	2659	/* Return DFSDM filter handle state */
sahilmgandhi	18:6a4db94011d3	2660	return hdfsdm_filter->State;
sahilmgandhi	18:6a4db94011d3	2661	}
sahilmgandhi	18:6a4db94011d3	2662
sahilmgandhi	18:6a4db94011d3	2663	/**
sahilmgandhi	18:6a4db94011d3	2664	* @brief This function allows to get the current DFSDM filter error.
sahilmgandhi	18:6a4db94011d3	2665	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2666	* @retval DFSDM filter error code.
sahilmgandhi	18:6a4db94011d3	2667	*/
sahilmgandhi	18:6a4db94011d3	2668	uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	2669	{
sahilmgandhi	18:6a4db94011d3	2670	return hdfsdm_filter->ErrorCode;
sahilmgandhi	18:6a4db94011d3	2671	}
sahilmgandhi	18:6a4db94011d3	2672
sahilmgandhi	18:6a4db94011d3	2673	/**
sahilmgandhi	18:6a4db94011d3	2674	* @}
sahilmgandhi	18:6a4db94011d3	2675	*/
sahilmgandhi	18:6a4db94011d3	2676
sahilmgandhi	18:6a4db94011d3	2677	/**
sahilmgandhi	18:6a4db94011d3	2678	* @}
sahilmgandhi	18:6a4db94011d3	2679	*/
sahilmgandhi	18:6a4db94011d3	2680	/* End of exported functions -------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	2681
sahilmgandhi	18:6a4db94011d3	2682	/* Private functions ---------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	2683	/** @addtogroup DFSDM_Private_Functions DFSDM Private Functions
sahilmgandhi	18:6a4db94011d3	2684	* @{
sahilmgandhi	18:6a4db94011d3	2685	*/
sahilmgandhi	18:6a4db94011d3	2686
sahilmgandhi	18:6a4db94011d3	2687	/**
sahilmgandhi	18:6a4db94011d3	2688	* @brief DMA half transfer complete callback for regular conversion.
sahilmgandhi	18:6a4db94011d3	2689	* @param hdma : DMA handle.
sahilmgandhi	18:6a4db94011d3	2690	* @retval None
sahilmgandhi	18:6a4db94011d3	2691	*/
sahilmgandhi	18:6a4db94011d3	2692	static void DFSDM_DMARegularHalfConvCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	2693	{
sahilmgandhi	18:6a4db94011d3	2694	/* Get DFSDM filter handle */
sahilmgandhi	18:6a4db94011d3	2695	DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef) ((DMA_HandleTypeDef)hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	2696
sahilmgandhi	18:6a4db94011d3	2697	/* Call regular half conversion complete callback */
sahilmgandhi	18:6a4db94011d3	2698	HAL_DFSDM_FilterRegConvHalfCpltCallback(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	2699	}
sahilmgandhi	18:6a4db94011d3	2700
sahilmgandhi	18:6a4db94011d3	2701	/**
sahilmgandhi	18:6a4db94011d3	2702	* @brief DMA transfer complete callback for regular conversion.
sahilmgandhi	18:6a4db94011d3	2703	* @param hdma : DMA handle.
sahilmgandhi	18:6a4db94011d3	2704	* @retval None
sahilmgandhi	18:6a4db94011d3	2705	*/
sahilmgandhi	18:6a4db94011d3	2706	static void DFSDM_DMARegularConvCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	2707	{
sahilmgandhi	18:6a4db94011d3	2708	/* Get DFSDM filter handle */
sahilmgandhi	18:6a4db94011d3	2709	DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef) ((DMA_HandleTypeDef)hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	2710
sahilmgandhi	18:6a4db94011d3	2711	/* Call regular conversion complete callback */
sahilmgandhi	18:6a4db94011d3	2712	HAL_DFSDM_FilterRegConvCpltCallback(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	2713	}
sahilmgandhi	18:6a4db94011d3	2714
sahilmgandhi	18:6a4db94011d3	2715	/**
sahilmgandhi	18:6a4db94011d3	2716	* @brief DMA half transfer complete callback for injected conversion.
sahilmgandhi	18:6a4db94011d3	2717	* @param hdma : DMA handle.
sahilmgandhi	18:6a4db94011d3	2718	* @retval None
sahilmgandhi	18:6a4db94011d3	2719	*/
sahilmgandhi	18:6a4db94011d3	2720	static void DFSDM_DMAInjectedHalfConvCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	2721	{
sahilmgandhi	18:6a4db94011d3	2722	/* Get DFSDM filter handle */
sahilmgandhi	18:6a4db94011d3	2723	DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef) ((DMA_HandleTypeDef)hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	2724
sahilmgandhi	18:6a4db94011d3	2725	/* Call injected half conversion complete callback */
sahilmgandhi	18:6a4db94011d3	2726	HAL_DFSDM_FilterInjConvHalfCpltCallback(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	2727	}
sahilmgandhi	18:6a4db94011d3	2728
sahilmgandhi	18:6a4db94011d3	2729	/**
sahilmgandhi	18:6a4db94011d3	2730	* @brief DMA transfer complete callback for injected conversion.
sahilmgandhi	18:6a4db94011d3	2731	* @param hdma : DMA handle.
sahilmgandhi	18:6a4db94011d3	2732	* @retval None
sahilmgandhi	18:6a4db94011d3	2733	*/
sahilmgandhi	18:6a4db94011d3	2734	static void DFSDM_DMAInjectedConvCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	2735	{
sahilmgandhi	18:6a4db94011d3	2736	/* Get DFSDM filter handle */
sahilmgandhi	18:6a4db94011d3	2737	DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef) ((DMA_HandleTypeDef)hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	2738
sahilmgandhi	18:6a4db94011d3	2739	/* Call injected conversion complete callback */
sahilmgandhi	18:6a4db94011d3	2740	HAL_DFSDM_FilterInjConvCpltCallback(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	2741	}
sahilmgandhi	18:6a4db94011d3	2742
sahilmgandhi	18:6a4db94011d3	2743	/**
sahilmgandhi	18:6a4db94011d3	2744	* @brief DMA error callback.
sahilmgandhi	18:6a4db94011d3	2745	* @param hdma : DMA handle.
sahilmgandhi	18:6a4db94011d3	2746	* @retval None
sahilmgandhi	18:6a4db94011d3	2747	*/
sahilmgandhi	18:6a4db94011d3	2748	static void DFSDM_DMAError(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	2749	{
sahilmgandhi	18:6a4db94011d3	2750	/* Get DFSDM filter handle */
sahilmgandhi	18:6a4db94011d3	2751	DFSDM_Filter_HandleTypeDef* hdfsdm_filter = (DFSDM_Filter_HandleTypeDef) ((DMA_HandleTypeDef)hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	2752
sahilmgandhi	18:6a4db94011d3	2753	/* Update error code */
sahilmgandhi	18:6a4db94011d3	2754	hdfsdm_filter->ErrorCode = DFSDM_FILTER_ERROR_DMA;
sahilmgandhi	18:6a4db94011d3	2755
sahilmgandhi	18:6a4db94011d3	2756	/* Call error callback */
sahilmgandhi	18:6a4db94011d3	2757	HAL_DFSDM_FilterErrorCallback(hdfsdm_filter);
sahilmgandhi	18:6a4db94011d3	2758	}
sahilmgandhi	18:6a4db94011d3	2759
sahilmgandhi	18:6a4db94011d3	2760	/**
sahilmgandhi	18:6a4db94011d3	2761	* @brief This function allows to get the number of injected channels.
sahilmgandhi	18:6a4db94011d3	2762	* @param Channels : bitfield of injected channels.
sahilmgandhi	18:6a4db94011d3	2763	* @retval Number of injected channels.
sahilmgandhi	18:6a4db94011d3	2764	*/
sahilmgandhi	18:6a4db94011d3	2765	static uint32_t DFSDM_GetInjChannelsNbr(uint32_t Channels)
sahilmgandhi	18:6a4db94011d3	2766	{
sahilmgandhi	18:6a4db94011d3	2767	uint32_t nbChannels = 0U;
sahilmgandhi	18:6a4db94011d3	2768	uint32_t tmp;
sahilmgandhi	18:6a4db94011d3	2769
sahilmgandhi	18:6a4db94011d3	2770	/* Get the number of channels from bitfield */
sahilmgandhi	18:6a4db94011d3	2771	tmp = (uint32_t) (Channels & DFSDM_LSB_MASK);
sahilmgandhi	18:6a4db94011d3	2772	while(tmp != 0U)
sahilmgandhi	18:6a4db94011d3	2773	{
sahilmgandhi	18:6a4db94011d3	2774	if((tmp & 1U) != 0U)
sahilmgandhi	18:6a4db94011d3	2775	{
sahilmgandhi	18:6a4db94011d3	2776	nbChannels++;
sahilmgandhi	18:6a4db94011d3	2777	}
sahilmgandhi	18:6a4db94011d3	2778	tmp = (uint32_t) (tmp >> 1U);
sahilmgandhi	18:6a4db94011d3	2779	}
sahilmgandhi	18:6a4db94011d3	2780	return nbChannels;
sahilmgandhi	18:6a4db94011d3	2781	}
sahilmgandhi	18:6a4db94011d3	2782
sahilmgandhi	18:6a4db94011d3	2783	/**
sahilmgandhi	18:6a4db94011d3	2784	* @brief This function allows to get the channel number from channel instance.
sahilmgandhi	18:6a4db94011d3	2785	* @param Instance : DFSDM channel instance.
sahilmgandhi	18:6a4db94011d3	2786	* @retval Channel number.
sahilmgandhi	18:6a4db94011d3	2787	*/
sahilmgandhi	18:6a4db94011d3	2788	static uint32_t DFSDM_GetChannelFromInstance(DFSDM_Channel_TypeDef* Instance)
sahilmgandhi	18:6a4db94011d3	2789	{
sahilmgandhi	18:6a4db94011d3	2790	uint32_t channel = 0xFFU;
sahilmgandhi	18:6a4db94011d3	2791
sahilmgandhi	18:6a4db94011d3	2792	/* Get channel from instance */
sahilmgandhi	18:6a4db94011d3	2793	if(Instance == DFSDM1_Channel0)
sahilmgandhi	18:6a4db94011d3	2794	{
sahilmgandhi	18:6a4db94011d3	2795	channel = 0U;
sahilmgandhi	18:6a4db94011d3	2796	}
sahilmgandhi	18:6a4db94011d3	2797	else if(Instance == DFSDM1_Channel1)
sahilmgandhi	18:6a4db94011d3	2798	{
sahilmgandhi	18:6a4db94011d3	2799	channel = 1U;
sahilmgandhi	18:6a4db94011d3	2800	}
sahilmgandhi	18:6a4db94011d3	2801	else if(Instance == DFSDM1_Channel2)
sahilmgandhi	18:6a4db94011d3	2802	{
sahilmgandhi	18:6a4db94011d3	2803	channel = 2U;
sahilmgandhi	18:6a4db94011d3	2804	}
sahilmgandhi	18:6a4db94011d3	2805	else if(Instance == DFSDM1_Channel3)
sahilmgandhi	18:6a4db94011d3	2806	{
sahilmgandhi	18:6a4db94011d3	2807	channel = 3U;
sahilmgandhi	18:6a4db94011d3	2808	}
sahilmgandhi	18:6a4db94011d3	2809
sahilmgandhi	18:6a4db94011d3	2810	return channel;
sahilmgandhi	18:6a4db94011d3	2811	}
sahilmgandhi	18:6a4db94011d3	2812
sahilmgandhi	18:6a4db94011d3	2813	/**
sahilmgandhi	18:6a4db94011d3	2814	* @brief This function allows to really start regular conversion.
sahilmgandhi	18:6a4db94011d3	2815	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2816	* @retval None
sahilmgandhi	18:6a4db94011d3	2817	*/
sahilmgandhi	18:6a4db94011d3	2818	static void DFSDM_RegConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	2819	{
sahilmgandhi	18:6a4db94011d3	2820	/* Check regular trigger */
sahilmgandhi	18:6a4db94011d3	2821	if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER)
sahilmgandhi	18:6a4db94011d3	2822	{
sahilmgandhi	18:6a4db94011d3	2823	/* Software start of regular conversion */
sahilmgandhi	18:6a4db94011d3	2824	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_RSWSTART;
sahilmgandhi	18:6a4db94011d3	2825	}
sahilmgandhi	18:6a4db94011d3	2826	else /* synchronous trigger */
sahilmgandhi	18:6a4db94011d3	2827	{
sahilmgandhi	18:6a4db94011d3	2828	/* Disable DFSDM filter */
sahilmgandhi	18:6a4db94011d3	2829	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
sahilmgandhi	18:6a4db94011d3	2830
sahilmgandhi	18:6a4db94011d3	2831	/* Set RSYNC bit in DFSDM_FLTCR1 register */
sahilmgandhi	18:6a4db94011d3	2832	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_RSYNC;
sahilmgandhi	18:6a4db94011d3	2833
sahilmgandhi	18:6a4db94011d3	2834	/* Enable DFSDM filter */
sahilmgandhi	18:6a4db94011d3	2835	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_DFEN;
sahilmgandhi	18:6a4db94011d3	2836
sahilmgandhi	18:6a4db94011d3	2837	/* If injected conversion was in progress, restart it */
sahilmgandhi	18:6a4db94011d3	2838	if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ)
sahilmgandhi	18:6a4db94011d3	2839	{
sahilmgandhi	18:6a4db94011d3	2840	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
sahilmgandhi	18:6a4db94011d3	2841	{
sahilmgandhi	18:6a4db94011d3	2842	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_JSWSTART;
sahilmgandhi	18:6a4db94011d3	2843	}
sahilmgandhi	18:6a4db94011d3	2844	/* Update remaining injected conversions */
sahilmgandhi	18:6a4db94011d3	2845	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
sahilmgandhi	18:6a4db94011d3	2846	hdfsdm_filter->InjectedChannelsNbr : 1U;
sahilmgandhi	18:6a4db94011d3	2847	}
sahilmgandhi	18:6a4db94011d3	2848	}
sahilmgandhi	18:6a4db94011d3	2849	/* Update DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	2850	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
sahilmgandhi	18:6a4db94011d3	2851	HAL_DFSDM_FILTER_STATE_REG : HAL_DFSDM_FILTER_STATE_REG_INJ;
sahilmgandhi	18:6a4db94011d3	2852	}
sahilmgandhi	18:6a4db94011d3	2853
sahilmgandhi	18:6a4db94011d3	2854	/**
sahilmgandhi	18:6a4db94011d3	2855	* @brief This function allows to really stop regular conversion.
sahilmgandhi	18:6a4db94011d3	2856	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2857	* @retval None
sahilmgandhi	18:6a4db94011d3	2858	*/
sahilmgandhi	18:6a4db94011d3	2859	static void DFSDM_RegConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	2860	{
sahilmgandhi	18:6a4db94011d3	2861	/* Disable DFSDM filter */
sahilmgandhi	18:6a4db94011d3	2862	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
sahilmgandhi	18:6a4db94011d3	2863
sahilmgandhi	18:6a4db94011d3	2864	/* If regular trigger was synchronous, reset RSYNC bit in DFSDM_FLTCR1 register */
sahilmgandhi	18:6a4db94011d3	2865	if(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SYNC_TRIGGER)
sahilmgandhi	18:6a4db94011d3	2866	{
sahilmgandhi	18:6a4db94011d3	2867	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_RSYNC);
sahilmgandhi	18:6a4db94011d3	2868	}
sahilmgandhi	18:6a4db94011d3	2869
sahilmgandhi	18:6a4db94011d3	2870	/* Enable DFSDM filter */
sahilmgandhi	18:6a4db94011d3	2871	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_DFEN;
sahilmgandhi	18:6a4db94011d3	2872
sahilmgandhi	18:6a4db94011d3	2873	/* If injected conversion was in progress, restart it */
sahilmgandhi	18:6a4db94011d3	2874	if(hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ)
sahilmgandhi	18:6a4db94011d3	2875	{
sahilmgandhi	18:6a4db94011d3	2876	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
sahilmgandhi	18:6a4db94011d3	2877	{
sahilmgandhi	18:6a4db94011d3	2878	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_JSWSTART;
sahilmgandhi	18:6a4db94011d3	2879	}
sahilmgandhi	18:6a4db94011d3	2880	/* Update remaining injected conversions */
sahilmgandhi	18:6a4db94011d3	2881	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
sahilmgandhi	18:6a4db94011d3	2882	hdfsdm_filter->InjectedChannelsNbr : 1U;
sahilmgandhi	18:6a4db94011d3	2883	}
sahilmgandhi	18:6a4db94011d3	2884
sahilmgandhi	18:6a4db94011d3	2885	/* Update DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	2886	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) ? \
sahilmgandhi	18:6a4db94011d3	2887	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_INJ;
sahilmgandhi	18:6a4db94011d3	2888	}
sahilmgandhi	18:6a4db94011d3	2889
sahilmgandhi	18:6a4db94011d3	2890	/**
sahilmgandhi	18:6a4db94011d3	2891	* @brief This function allows to really start injected conversion.
sahilmgandhi	18:6a4db94011d3	2892	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2893	* @retval None
sahilmgandhi	18:6a4db94011d3	2894	*/
sahilmgandhi	18:6a4db94011d3	2895	static void DFSDM_InjConvStart(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	2896	{
sahilmgandhi	18:6a4db94011d3	2897	/* Check injected trigger */
sahilmgandhi	18:6a4db94011d3	2898	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SW_TRIGGER)
sahilmgandhi	18:6a4db94011d3	2899	{
sahilmgandhi	18:6a4db94011d3	2900	/* Software start of injected conversion */
sahilmgandhi	18:6a4db94011d3	2901	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_JSWSTART;
sahilmgandhi	18:6a4db94011d3	2902	}
sahilmgandhi	18:6a4db94011d3	2903	else /* external or synchronous trigger */
sahilmgandhi	18:6a4db94011d3	2904	{
sahilmgandhi	18:6a4db94011d3	2905	/* Disable DFSDM filter */
sahilmgandhi	18:6a4db94011d3	2906	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
sahilmgandhi	18:6a4db94011d3	2907
sahilmgandhi	18:6a4db94011d3	2908	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
sahilmgandhi	18:6a4db94011d3	2909	{
sahilmgandhi	18:6a4db94011d3	2910	/* Set JSYNC bit in DFSDM_FLTCR1 register */
sahilmgandhi	18:6a4db94011d3	2911	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_JSYNC;
sahilmgandhi	18:6a4db94011d3	2912	}
sahilmgandhi	18:6a4db94011d3	2913	else /* external trigger */
sahilmgandhi	18:6a4db94011d3	2914	{
sahilmgandhi	18:6a4db94011d3	2915	/* Set JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
sahilmgandhi	18:6a4db94011d3	2916	hdfsdm_filter->Instance->FLTCR1 \|= hdfsdm_filter->ExtTriggerEdge;
sahilmgandhi	18:6a4db94011d3	2917	}
sahilmgandhi	18:6a4db94011d3	2918
sahilmgandhi	18:6a4db94011d3	2919	/* Enable DFSDM filter */
sahilmgandhi	18:6a4db94011d3	2920	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_DFEN;
sahilmgandhi	18:6a4db94011d3	2921
sahilmgandhi	18:6a4db94011d3	2922	/* If regular conversion was in progress, restart it */
sahilmgandhi	18:6a4db94011d3	2923	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG) && \
sahilmgandhi	18:6a4db94011d3	2924	(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
sahilmgandhi	18:6a4db94011d3	2925	{
sahilmgandhi	18:6a4db94011d3	2926	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_RSWSTART;
sahilmgandhi	18:6a4db94011d3	2927	}
sahilmgandhi	18:6a4db94011d3	2928	}
sahilmgandhi	18:6a4db94011d3	2929	/* Update DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	2930	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_READY) ? \
sahilmgandhi	18:6a4db94011d3	2931	HAL_DFSDM_FILTER_STATE_INJ : HAL_DFSDM_FILTER_STATE_REG_INJ;
sahilmgandhi	18:6a4db94011d3	2932	}
sahilmgandhi	18:6a4db94011d3	2933
sahilmgandhi	18:6a4db94011d3	2934	/**
sahilmgandhi	18:6a4db94011d3	2935	* @brief This function allows to really stop injected conversion.
sahilmgandhi	18:6a4db94011d3	2936	* @param hdfsdm_filter : DFSDM filter handle.
sahilmgandhi	18:6a4db94011d3	2937	* @retval None
sahilmgandhi	18:6a4db94011d3	2938	*/
sahilmgandhi	18:6a4db94011d3	2939	static void DFSDM_InjConvStop(DFSDM_Filter_HandleTypeDef* hdfsdm_filter)
sahilmgandhi	18:6a4db94011d3	2940	{
sahilmgandhi	18:6a4db94011d3	2941	/* Disable DFSDM filter */
sahilmgandhi	18:6a4db94011d3	2942	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_DFEN);
sahilmgandhi	18:6a4db94011d3	2943
sahilmgandhi	18:6a4db94011d3	2944	/* If injected trigger was synchronous, reset JSYNC bit in DFSDM_FLTCR1 register */
sahilmgandhi	18:6a4db94011d3	2945	if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_SYNC_TRIGGER)
sahilmgandhi	18:6a4db94011d3	2946	{
sahilmgandhi	18:6a4db94011d3	2947	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JSYNC);
sahilmgandhi	18:6a4db94011d3	2948	}
sahilmgandhi	18:6a4db94011d3	2949	else if(hdfsdm_filter->InjectedTrigger == DFSDM_FILTER_EXT_TRIGGER)
sahilmgandhi	18:6a4db94011d3	2950	{
sahilmgandhi	18:6a4db94011d3	2951	/* Reset JEXTEN[1:0] bits in DFSDM_FLTCR1 register */
sahilmgandhi	18:6a4db94011d3	2952	hdfsdm_filter->Instance->FLTCR1 &= ~(DFSDM_FLTCR1_JEXTEN);
sahilmgandhi	18:6a4db94011d3	2953	}
sahilmgandhi	18:6a4db94011d3	2954
sahilmgandhi	18:6a4db94011d3	2955	/* Enable DFSDM filter */
sahilmgandhi	18:6a4db94011d3	2956	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_DFEN;
sahilmgandhi	18:6a4db94011d3	2957
sahilmgandhi	18:6a4db94011d3	2958	/* If regular conversion was in progress, restart it */
sahilmgandhi	18:6a4db94011d3	2959	if((hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_REG_INJ) && \
sahilmgandhi	18:6a4db94011d3	2960	(hdfsdm_filter->RegularTrigger == DFSDM_FILTER_SW_TRIGGER))
sahilmgandhi	18:6a4db94011d3	2961	{
sahilmgandhi	18:6a4db94011d3	2962	hdfsdm_filter->Instance->FLTCR1 \|= DFSDM_FLTCR1_RSWSTART;
sahilmgandhi	18:6a4db94011d3	2963	}
sahilmgandhi	18:6a4db94011d3	2964
sahilmgandhi	18:6a4db94011d3	2965	/* Update remaining injected conversions */
sahilmgandhi	18:6a4db94011d3	2966	hdfsdm_filter->InjConvRemaining = (hdfsdm_filter->InjectedScanMode == ENABLE) ? \
sahilmgandhi	18:6a4db94011d3	2967	hdfsdm_filter->InjectedChannelsNbr : 1U;
sahilmgandhi	18:6a4db94011d3	2968
sahilmgandhi	18:6a4db94011d3	2969	/* Update DFSDM filter state */
sahilmgandhi	18:6a4db94011d3	2970	hdfsdm_filter->State = (hdfsdm_filter->State == HAL_DFSDM_FILTER_STATE_INJ) ? \
sahilmgandhi	18:6a4db94011d3	2971	HAL_DFSDM_FILTER_STATE_READY : HAL_DFSDM_FILTER_STATE_REG;
sahilmgandhi	18:6a4db94011d3	2972	}
sahilmgandhi	18:6a4db94011d3	2973
sahilmgandhi	18:6a4db94011d3	2974	/**
sahilmgandhi	18:6a4db94011d3	2975	* @}
sahilmgandhi	18:6a4db94011d3	2976	*/
sahilmgandhi	18:6a4db94011d3	2977	/* End of private functions --------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	2978
sahilmgandhi	18:6a4db94011d3	2979	/**
sahilmgandhi	18:6a4db94011d3	2980	* @}
sahilmgandhi	18:6a4db94011d3	2981	*/
sahilmgandhi	18:6a4db94011d3	2982	#endif /* STM32F412Zx \|\| STM32F412Vx \|\| STM32F412Rx \|\| STM32F412Cx */
sahilmgandhi	18:6a4db94011d3	2983	#endif /* HAL_DFSDM_MODULE_ENABLED */
sahilmgandhi	18:6a4db94011d3	2984	/**
sahilmgandhi	18:6a4db94011d3	2985	* @}
sahilmgandhi	18:6a4db94011d3	2986	*/
sahilmgandhi	18:6a4db94011d3	2987
sahilmgandhi	18:6a4db94011d3	2988	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

Repository toolbox

Export to desktop IDE

Build repository

Repository details

Type:	Program
Created:	25 Apr 2017
Imports:	29
Forks:	0
Commits:	47
Dependents:	0
Dependencies:	2
Followers:	5

The code in this repository is Apache licensed.

mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dfsdm.c@46:b156ef445742, 2017-06-03 (annotated)

Who changed what in which revision?

Repository toolbox

Repository details

Important Information for this Arm website

Access Warning