MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_dac.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f4xx_hal_dac.c
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.5.0
sahilmgandhi 18:6a4db94011d3 6 * @date 06-May-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief DAC HAL module driver.
sahilmgandhi 18:6a4db94011d3 8 * This file provides firmware functions to manage the following
sahilmgandhi 18:6a4db94011d3 9 * functionalities of the Digital to Analog Converter (DAC) peripheral:
sahilmgandhi 18:6a4db94011d3 10 * + Initialization and de-initialization functions
sahilmgandhi 18:6a4db94011d3 11 * + IO operation functions
sahilmgandhi 18:6a4db94011d3 12 * + Peripheral Control functions
sahilmgandhi 18:6a4db94011d3 13 * + Peripheral State and Errors functions
sahilmgandhi 18:6a4db94011d3 14 *
sahilmgandhi 18:6a4db94011d3 15 *
sahilmgandhi 18:6a4db94011d3 16 @verbatim
sahilmgandhi 18:6a4db94011d3 17 ==============================================================================
sahilmgandhi 18:6a4db94011d3 18 ##### DAC Peripheral features #####
sahilmgandhi 18:6a4db94011d3 19 ==============================================================================
sahilmgandhi 18:6a4db94011d3 20 [..]
sahilmgandhi 18:6a4db94011d3 21 *** DAC Channels ***
sahilmgandhi 18:6a4db94011d3 22 ====================
sahilmgandhi 18:6a4db94011d3 23 [..]
sahilmgandhi 18:6a4db94011d3 24 The device integrates two 12-bit Digital Analog Converters that can
sahilmgandhi 18:6a4db94011d3 25 be used independently or simultaneously (dual mode):
sahilmgandhi 18:6a4db94011d3 26 (#) DAC channel1 with DAC_OUT1 (PA4) as output
sahilmgandhi 18:6a4db94011d3 27 (#) DAC channel2 with DAC_OUT2 (PA5) as output
sahilmgandhi 18:6a4db94011d3 28
sahilmgandhi 18:6a4db94011d3 29 *** DAC Triggers ***
sahilmgandhi 18:6a4db94011d3 30 ====================
sahilmgandhi 18:6a4db94011d3 31 [..]
sahilmgandhi 18:6a4db94011d3 32 Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
sahilmgandhi 18:6a4db94011d3 33 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register.
sahilmgandhi 18:6a4db94011d3 34 [..]
sahilmgandhi 18:6a4db94011d3 35 Digital to Analog conversion can be triggered by:
sahilmgandhi 18:6a4db94011d3 36 (#) External event: EXTI Line 9 (any GPIOx_Pin9) using DAC_TRIGGER_EXT_IT9.
sahilmgandhi 18:6a4db94011d3 37 The used pin (GPIOx_Pin9) must be configured in input mode.
sahilmgandhi 18:6a4db94011d3 38
sahilmgandhi 18:6a4db94011d3 39 (#) Timers TRGO: TIM2, TIM4, TIM5, TIM6, TIM7 and TIM8
sahilmgandhi 18:6a4db94011d3 40 (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T4_TRGO...)
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 (#) Software using DAC_TRIGGER_SOFTWARE
sahilmgandhi 18:6a4db94011d3 43
sahilmgandhi 18:6a4db94011d3 44 *** DAC Buffer mode feature ***
sahilmgandhi 18:6a4db94011d3 45 ===============================
sahilmgandhi 18:6a4db94011d3 46 [..]
sahilmgandhi 18:6a4db94011d3 47 Each DAC channel integrates an output buffer that can be used to
sahilmgandhi 18:6a4db94011d3 48 reduce the output impedance, and to drive external loads directly
sahilmgandhi 18:6a4db94011d3 49 without having to add an external operational amplifier.
sahilmgandhi 18:6a4db94011d3 50 To enable, the output buffer use
sahilmgandhi 18:6a4db94011d3 51 sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
sahilmgandhi 18:6a4db94011d3 52 [..]
sahilmgandhi 18:6a4db94011d3 53 (@) Refer to the device datasheet for more details about output
sahilmgandhi 18:6a4db94011d3 54 impedance value with and without output buffer.
sahilmgandhi 18:6a4db94011d3 55
sahilmgandhi 18:6a4db94011d3 56 *** DAC wave generation feature ***
sahilmgandhi 18:6a4db94011d3 57 ===================================
sahilmgandhi 18:6a4db94011d3 58 [..]
sahilmgandhi 18:6a4db94011d3 59 Both DAC channels can be used to generate
sahilmgandhi 18:6a4db94011d3 60 (#) Noise wave
sahilmgandhi 18:6a4db94011d3 61 (#) Triangle wave
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 *** DAC data format ***
sahilmgandhi 18:6a4db94011d3 64 =======================
sahilmgandhi 18:6a4db94011d3 65 [..]
sahilmgandhi 18:6a4db94011d3 66 The DAC data format can be:
sahilmgandhi 18:6a4db94011d3 67 (#) 8-bit right alignment using DAC_ALIGN_8B_R
sahilmgandhi 18:6a4db94011d3 68 (#) 12-bit left alignment using DAC_ALIGN_12B_L
sahilmgandhi 18:6a4db94011d3 69 (#) 12-bit right alignment using DAC_ALIGN_12B_R
sahilmgandhi 18:6a4db94011d3 70
sahilmgandhi 18:6a4db94011d3 71 *** DAC data value to voltage correspondence ***
sahilmgandhi 18:6a4db94011d3 72 ================================================
sahilmgandhi 18:6a4db94011d3 73 [..]
sahilmgandhi 18:6a4db94011d3 74 The analog output voltage on each DAC channel pin is determined
sahilmgandhi 18:6a4db94011d3 75 by the following equation:
sahilmgandhi 18:6a4db94011d3 76 DAC_OUTx = VREF+ * DOR / 4095
sahilmgandhi 18:6a4db94011d3 77 with DOR is the Data Output Register
sahilmgandhi 18:6a4db94011d3 78 VEF+ is the input voltage reference (refer to the device datasheet)
sahilmgandhi 18:6a4db94011d3 79 e.g. To set DAC_OUT1 to 0.7V, use
sahilmgandhi 18:6a4db94011d3 80 Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
sahilmgandhi 18:6a4db94011d3 81
sahilmgandhi 18:6a4db94011d3 82 *** DMA requests ***
sahilmgandhi 18:6a4db94011d3 83 =====================
sahilmgandhi 18:6a4db94011d3 84 [..]
sahilmgandhi 18:6a4db94011d3 85 A DMA1 request can be generated when an external trigger (but not
sahilmgandhi 18:6a4db94011d3 86 a software trigger) occurs if DMA1 requests are enabled using
sahilmgandhi 18:6a4db94011d3 87 HAL_DAC_Start_DMA()
sahilmgandhi 18:6a4db94011d3 88 [..]
sahilmgandhi 18:6a4db94011d3 89 DMA1 requests are mapped as following:
sahilmgandhi 18:6a4db94011d3 90 (#) DAC channel1 : mapped on DMA1 Stream5 channel7 which must be
sahilmgandhi 18:6a4db94011d3 91 already configured
sahilmgandhi 18:6a4db94011d3 92 (#) DAC channel2 : mapped on DMA1 Stream6 channel7 which must be
sahilmgandhi 18:6a4db94011d3 93 already configured
sahilmgandhi 18:6a4db94011d3 94
sahilmgandhi 18:6a4db94011d3 95 -@- For Dual mode and specific signal (Triangle and noise) generation please
sahilmgandhi 18:6a4db94011d3 96 refer to Extension Features Driver description
sahilmgandhi 18:6a4db94011d3 97
sahilmgandhi 18:6a4db94011d3 98
sahilmgandhi 18:6a4db94011d3 99 ##### How to use this driver #####
sahilmgandhi 18:6a4db94011d3 100 ==============================================================================
sahilmgandhi 18:6a4db94011d3 101 [..]
sahilmgandhi 18:6a4db94011d3 102 (+) DAC APB clock must be enabled to get write access to DAC
sahilmgandhi 18:6a4db94011d3 103 registers using HAL_DAC_Init()
sahilmgandhi 18:6a4db94011d3 104 (+) Configure DAC_OUTx (DAC_OUT1: PA4, DAC_OUT2: PA5) in analog mode.
sahilmgandhi 18:6a4db94011d3 105 (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
sahilmgandhi 18:6a4db94011d3 106 (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA functions
sahilmgandhi 18:6a4db94011d3 107
sahilmgandhi 18:6a4db94011d3 108 *** Polling mode IO operation ***
sahilmgandhi 18:6a4db94011d3 109 =================================
sahilmgandhi 18:6a4db94011d3 110 [..]
sahilmgandhi 18:6a4db94011d3 111 (+) Start the DAC peripheral using HAL_DAC_Start()
sahilmgandhi 18:6a4db94011d3 112 (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
sahilmgandhi 18:6a4db94011d3 113 (+) Stop the DAC peripheral using HAL_DAC_Stop()
sahilmgandhi 18:6a4db94011d3 114
sahilmgandhi 18:6a4db94011d3 115 *** DMA mode IO operation ***
sahilmgandhi 18:6a4db94011d3 116 ==============================
sahilmgandhi 18:6a4db94011d3 117 [..]
sahilmgandhi 18:6a4db94011d3 118 (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length
sahilmgandhi 18:6a4db94011d3 119 of data to be transferred at each end of conversion
sahilmgandhi 18:6a4db94011d3 120 (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1()or HAL_DAC_ConvCpltCallbackCh2()
sahilmgandhi 18:6a4db94011d3 121 function is executed and user can add his own code by customization of function pointer
sahilmgandhi 18:6a4db94011d3 122 HAL_DAC_ConvCpltCallbackCh1 or HAL_DAC_ConvCpltCallbackCh2
sahilmgandhi 18:6a4db94011d3 123 (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can
sahilmgandhi 18:6a4db94011d3 124 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
sahilmgandhi 18:6a4db94011d3 125 (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
sahilmgandhi 18:6a4db94011d3 126
sahilmgandhi 18:6a4db94011d3 127 *** DAC HAL driver macros list ***
sahilmgandhi 18:6a4db94011d3 128 =============================================
sahilmgandhi 18:6a4db94011d3 129 [..]
sahilmgandhi 18:6a4db94011d3 130 Below the list of most used macros in DAC HAL driver.
sahilmgandhi 18:6a4db94011d3 131
sahilmgandhi 18:6a4db94011d3 132 (+) __HAL_DAC_ENABLE : Enable the DAC peripheral
sahilmgandhi 18:6a4db94011d3 133 (+) __HAL_DAC_DISABLE : Disable the DAC peripheral
sahilmgandhi 18:6a4db94011d3 134 (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags
sahilmgandhi 18:6a4db94011d3 135 (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status
sahilmgandhi 18:6a4db94011d3 136
sahilmgandhi 18:6a4db94011d3 137 [..]
sahilmgandhi 18:6a4db94011d3 138 (@) You can refer to the DAC HAL driver header file for more useful macros
sahilmgandhi 18:6a4db94011d3 139
sahilmgandhi 18:6a4db94011d3 140 @endverbatim
sahilmgandhi 18:6a4db94011d3 141 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 142 * @attention
sahilmgandhi 18:6a4db94011d3 143 *
sahilmgandhi 18:6a4db94011d3 144 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 145 *
sahilmgandhi 18:6a4db94011d3 146 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 147 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 148 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 149 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 150 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 151 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 152 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 153 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 154 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 155 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 156 *
sahilmgandhi 18:6a4db94011d3 157 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 158 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 159 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 160 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 161 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 162 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 163 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 164 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 165 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 166 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 167 *
sahilmgandhi 18:6a4db94011d3 168 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 169 */
sahilmgandhi 18:6a4db94011d3 170
sahilmgandhi 18:6a4db94011d3 171
sahilmgandhi 18:6a4db94011d3 172 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 173 #include "stm32f4xx_hal.h"
sahilmgandhi 18:6a4db94011d3 174
sahilmgandhi 18:6a4db94011d3 175 /** @addtogroup STM32F4xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 176 * @{
sahilmgandhi 18:6a4db94011d3 177 */
sahilmgandhi 18:6a4db94011d3 178
sahilmgandhi 18:6a4db94011d3 179 /** @defgroup DAC DAC
sahilmgandhi 18:6a4db94011d3 180 * @brief DAC driver modules
sahilmgandhi 18:6a4db94011d3 181 * @{
sahilmgandhi 18:6a4db94011d3 182 */
sahilmgandhi 18:6a4db94011d3 183
sahilmgandhi 18:6a4db94011d3 184 #ifdef HAL_DAC_MODULE_ENABLED
sahilmgandhi 18:6a4db94011d3 185
sahilmgandhi 18:6a4db94011d3 186 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
sahilmgandhi 18:6a4db94011d3 187 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
sahilmgandhi 18:6a4db94011d3 188 defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) ||\
sahilmgandhi 18:6a4db94011d3 189 defined(STM32F469xx) || defined(STM32F479xx)
sahilmgandhi 18:6a4db94011d3 190 /* Private typedef -----------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 191 /* Private define ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 192 /* Private macro -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 193 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 194 /** @addtogroup DAC_Private_Functions
sahilmgandhi 18:6a4db94011d3 195 * @{
sahilmgandhi 18:6a4db94011d3 196 */
sahilmgandhi 18:6a4db94011d3 197 /* Private function prototypes -----------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 198 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
sahilmgandhi 18:6a4db94011d3 199 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
sahilmgandhi 18:6a4db94011d3 200 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
sahilmgandhi 18:6a4db94011d3 201 /**
sahilmgandhi 18:6a4db94011d3 202 * @}
sahilmgandhi 18:6a4db94011d3 203 */
sahilmgandhi 18:6a4db94011d3 204
sahilmgandhi 18:6a4db94011d3 205 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 206 /** @defgroup DAC_Exported_Functions DAC Exported Functions
sahilmgandhi 18:6a4db94011d3 207 * @{
sahilmgandhi 18:6a4db94011d3 208 */
sahilmgandhi 18:6a4db94011d3 209
sahilmgandhi 18:6a4db94011d3 210 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
sahilmgandhi 18:6a4db94011d3 211 * @brief Initialization and Configuration functions
sahilmgandhi 18:6a4db94011d3 212 *
sahilmgandhi 18:6a4db94011d3 213 @verbatim
sahilmgandhi 18:6a4db94011d3 214 ==============================================================================
sahilmgandhi 18:6a4db94011d3 215 ##### Initialization and de-initialization functions #####
sahilmgandhi 18:6a4db94011d3 216 ==============================================================================
sahilmgandhi 18:6a4db94011d3 217 [..] This section provides functions allowing to:
sahilmgandhi 18:6a4db94011d3 218 (+) Initialize and configure the DAC.
sahilmgandhi 18:6a4db94011d3 219 (+) De-initialize the DAC.
sahilmgandhi 18:6a4db94011d3 220
sahilmgandhi 18:6a4db94011d3 221 @endverbatim
sahilmgandhi 18:6a4db94011d3 222 * @{
sahilmgandhi 18:6a4db94011d3 223 */
sahilmgandhi 18:6a4db94011d3 224
sahilmgandhi 18:6a4db94011d3 225 /**
sahilmgandhi 18:6a4db94011d3 226 * @brief Initializes the DAC peripheral according to the specified parameters
sahilmgandhi 18:6a4db94011d3 227 * in the DAC_InitStruct.
sahilmgandhi 18:6a4db94011d3 228 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 229 * the configuration information for the specified DAC.
sahilmgandhi 18:6a4db94011d3 230 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 231 */
sahilmgandhi 18:6a4db94011d3 232 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
sahilmgandhi 18:6a4db94011d3 233 {
sahilmgandhi 18:6a4db94011d3 234 /* Check DAC handle */
sahilmgandhi 18:6a4db94011d3 235 if(hdac == NULL)
sahilmgandhi 18:6a4db94011d3 236 {
sahilmgandhi 18:6a4db94011d3 237 return HAL_ERROR;
sahilmgandhi 18:6a4db94011d3 238 }
sahilmgandhi 18:6a4db94011d3 239 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 240 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
sahilmgandhi 18:6a4db94011d3 241
sahilmgandhi 18:6a4db94011d3 242 if(hdac->State == HAL_DAC_STATE_RESET)
sahilmgandhi 18:6a4db94011d3 243 {
sahilmgandhi 18:6a4db94011d3 244 /* Allocate lock resource and initialize it */
sahilmgandhi 18:6a4db94011d3 245 hdac->Lock = HAL_UNLOCKED;
sahilmgandhi 18:6a4db94011d3 246 /* Init the low level hardware */
sahilmgandhi 18:6a4db94011d3 247 HAL_DAC_MspInit(hdac);
sahilmgandhi 18:6a4db94011d3 248 }
sahilmgandhi 18:6a4db94011d3 249
sahilmgandhi 18:6a4db94011d3 250 /* Initialize the DAC state*/
sahilmgandhi 18:6a4db94011d3 251 hdac->State = HAL_DAC_STATE_BUSY;
sahilmgandhi 18:6a4db94011d3 252
sahilmgandhi 18:6a4db94011d3 253 /* Set DAC error code to none */
sahilmgandhi 18:6a4db94011d3 254 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
sahilmgandhi 18:6a4db94011d3 255
sahilmgandhi 18:6a4db94011d3 256 /* Initialize the DAC state*/
sahilmgandhi 18:6a4db94011d3 257 hdac->State = HAL_DAC_STATE_READY;
sahilmgandhi 18:6a4db94011d3 258
sahilmgandhi 18:6a4db94011d3 259 /* Return function status */
sahilmgandhi 18:6a4db94011d3 260 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 261 }
sahilmgandhi 18:6a4db94011d3 262
sahilmgandhi 18:6a4db94011d3 263 /**
sahilmgandhi 18:6a4db94011d3 264 * @brief Deinitializes the DAC peripheral registers to their default reset values.
sahilmgandhi 18:6a4db94011d3 265 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 266 * the configuration information for the specified DAC.
sahilmgandhi 18:6a4db94011d3 267 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 268 */
sahilmgandhi 18:6a4db94011d3 269 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac)
sahilmgandhi 18:6a4db94011d3 270 {
sahilmgandhi 18:6a4db94011d3 271 /* Check DAC handle */
sahilmgandhi 18:6a4db94011d3 272 if(hdac == NULL)
sahilmgandhi 18:6a4db94011d3 273 {
sahilmgandhi 18:6a4db94011d3 274 return HAL_ERROR;
sahilmgandhi 18:6a4db94011d3 275 }
sahilmgandhi 18:6a4db94011d3 276
sahilmgandhi 18:6a4db94011d3 277 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 278 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
sahilmgandhi 18:6a4db94011d3 279
sahilmgandhi 18:6a4db94011d3 280 /* Change DAC state */
sahilmgandhi 18:6a4db94011d3 281 hdac->State = HAL_DAC_STATE_BUSY;
sahilmgandhi 18:6a4db94011d3 282
sahilmgandhi 18:6a4db94011d3 283 /* DeInit the low level hardware */
sahilmgandhi 18:6a4db94011d3 284 HAL_DAC_MspDeInit(hdac);
sahilmgandhi 18:6a4db94011d3 285
sahilmgandhi 18:6a4db94011d3 286 /* Set DAC error code to none */
sahilmgandhi 18:6a4db94011d3 287 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
sahilmgandhi 18:6a4db94011d3 288
sahilmgandhi 18:6a4db94011d3 289 /* Change DAC state */
sahilmgandhi 18:6a4db94011d3 290 hdac->State = HAL_DAC_STATE_RESET;
sahilmgandhi 18:6a4db94011d3 291
sahilmgandhi 18:6a4db94011d3 292 /* Release Lock */
sahilmgandhi 18:6a4db94011d3 293 __HAL_UNLOCK(hdac);
sahilmgandhi 18:6a4db94011d3 294
sahilmgandhi 18:6a4db94011d3 295 /* Return function status */
sahilmgandhi 18:6a4db94011d3 296 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 297 }
sahilmgandhi 18:6a4db94011d3 298
sahilmgandhi 18:6a4db94011d3 299 /**
sahilmgandhi 18:6a4db94011d3 300 * @brief Initializes the DAC MSP.
sahilmgandhi 18:6a4db94011d3 301 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 302 * the configuration information for the specified DAC.
sahilmgandhi 18:6a4db94011d3 303 * @retval None
sahilmgandhi 18:6a4db94011d3 304 */
sahilmgandhi 18:6a4db94011d3 305 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac)
sahilmgandhi 18:6a4db94011d3 306 {
sahilmgandhi 18:6a4db94011d3 307 /* Prevent unused argument(s) compilation warning */
sahilmgandhi 18:6a4db94011d3 308 UNUSED(hdac);
sahilmgandhi 18:6a4db94011d3 309 /* NOTE : This function Should not be modified, when the callback is needed,
sahilmgandhi 18:6a4db94011d3 310 the HAL_DAC_MspInit could be implemented in the user file
sahilmgandhi 18:6a4db94011d3 311 */
sahilmgandhi 18:6a4db94011d3 312 }
sahilmgandhi 18:6a4db94011d3 313
sahilmgandhi 18:6a4db94011d3 314 /**
sahilmgandhi 18:6a4db94011d3 315 * @brief DeInitializes the DAC MSP.
sahilmgandhi 18:6a4db94011d3 316 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 317 * the configuration information for the specified DAC.
sahilmgandhi 18:6a4db94011d3 318 * @retval None
sahilmgandhi 18:6a4db94011d3 319 */
sahilmgandhi 18:6a4db94011d3 320 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac)
sahilmgandhi 18:6a4db94011d3 321 {
sahilmgandhi 18:6a4db94011d3 322 /* Prevent unused argument(s) compilation warning */
sahilmgandhi 18:6a4db94011d3 323 UNUSED(hdac);
sahilmgandhi 18:6a4db94011d3 324 /* NOTE : This function Should not be modified, when the callback is needed,
sahilmgandhi 18:6a4db94011d3 325 the HAL_DAC_MspDeInit could be implemented in the user file
sahilmgandhi 18:6a4db94011d3 326 */
sahilmgandhi 18:6a4db94011d3 327 }
sahilmgandhi 18:6a4db94011d3 328
sahilmgandhi 18:6a4db94011d3 329 /**
sahilmgandhi 18:6a4db94011d3 330 * @}
sahilmgandhi 18:6a4db94011d3 331 */
sahilmgandhi 18:6a4db94011d3 332
sahilmgandhi 18:6a4db94011d3 333 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions
sahilmgandhi 18:6a4db94011d3 334 * @brief IO operation functions
sahilmgandhi 18:6a4db94011d3 335 *
sahilmgandhi 18:6a4db94011d3 336 @verbatim
sahilmgandhi 18:6a4db94011d3 337 ==============================================================================
sahilmgandhi 18:6a4db94011d3 338 ##### IO operation functions #####
sahilmgandhi 18:6a4db94011d3 339 ==============================================================================
sahilmgandhi 18:6a4db94011d3 340 [..] This section provides functions allowing to:
sahilmgandhi 18:6a4db94011d3 341 (+) Start conversion.
sahilmgandhi 18:6a4db94011d3 342 (+) Stop conversion.
sahilmgandhi 18:6a4db94011d3 343 (+) Start conversion and enable DMA transfer.
sahilmgandhi 18:6a4db94011d3 344 (+) Stop conversion and disable DMA transfer.
sahilmgandhi 18:6a4db94011d3 345 (+) Get result of conversion.
sahilmgandhi 18:6a4db94011d3 346
sahilmgandhi 18:6a4db94011d3 347 @endverbatim
sahilmgandhi 18:6a4db94011d3 348 * @{
sahilmgandhi 18:6a4db94011d3 349 */
sahilmgandhi 18:6a4db94011d3 350
sahilmgandhi 18:6a4db94011d3 351 /**
sahilmgandhi 18:6a4db94011d3 352 * @brief Enables DAC and starts conversion of channel.
sahilmgandhi 18:6a4db94011d3 353 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 354 * the configuration information for the specified DAC.
sahilmgandhi 18:6a4db94011d3 355 * @param Channel: The selected DAC channel.
sahilmgandhi 18:6a4db94011d3 356 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 357 * @arg DAC_CHANNEL_1: DAC Channel1 selected
sahilmgandhi 18:6a4db94011d3 358 * @arg DAC_CHANNEL_2: DAC Channel2 selected
sahilmgandhi 18:6a4db94011d3 359 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 360 */
sahilmgandhi 18:6a4db94011d3 361 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel)
sahilmgandhi 18:6a4db94011d3 362 {
sahilmgandhi 18:6a4db94011d3 363 uint32_t tmp1 = 0U, tmp2 = 0U;
sahilmgandhi 18:6a4db94011d3 364
sahilmgandhi 18:6a4db94011d3 365 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 366 assert_param(IS_DAC_CHANNEL(Channel));
sahilmgandhi 18:6a4db94011d3 367
sahilmgandhi 18:6a4db94011d3 368 /* Process locked */
sahilmgandhi 18:6a4db94011d3 369 __HAL_LOCK(hdac);
sahilmgandhi 18:6a4db94011d3 370
sahilmgandhi 18:6a4db94011d3 371 /* Change DAC state */
sahilmgandhi 18:6a4db94011d3 372 hdac->State = HAL_DAC_STATE_BUSY;
sahilmgandhi 18:6a4db94011d3 373
sahilmgandhi 18:6a4db94011d3 374 /* Enable the Peripheral */
sahilmgandhi 18:6a4db94011d3 375 __HAL_DAC_ENABLE(hdac, Channel);
sahilmgandhi 18:6a4db94011d3 376
sahilmgandhi 18:6a4db94011d3 377 if(Channel == DAC_CHANNEL_1)
sahilmgandhi 18:6a4db94011d3 378 {
sahilmgandhi 18:6a4db94011d3 379 tmp1 = hdac->Instance->CR & DAC_CR_TEN1;
sahilmgandhi 18:6a4db94011d3 380 tmp2 = hdac->Instance->CR & DAC_CR_TSEL1;
sahilmgandhi 18:6a4db94011d3 381 /* Check if software trigger enabled */
sahilmgandhi 18:6a4db94011d3 382 if((tmp1 == DAC_CR_TEN1) && (tmp2 == DAC_CR_TSEL1))
sahilmgandhi 18:6a4db94011d3 383 {
sahilmgandhi 18:6a4db94011d3 384 /* Enable the selected DAC software conversion */
sahilmgandhi 18:6a4db94011d3 385 hdac->Instance->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG1;
sahilmgandhi 18:6a4db94011d3 386 }
sahilmgandhi 18:6a4db94011d3 387 }
sahilmgandhi 18:6a4db94011d3 388 else
sahilmgandhi 18:6a4db94011d3 389 {
sahilmgandhi 18:6a4db94011d3 390 tmp1 = hdac->Instance->CR & DAC_CR_TEN2;
sahilmgandhi 18:6a4db94011d3 391 tmp2 = hdac->Instance->CR & DAC_CR_TSEL2;
sahilmgandhi 18:6a4db94011d3 392 /* Check if software trigger enabled */
sahilmgandhi 18:6a4db94011d3 393 if((tmp1 == DAC_CR_TEN2) && (tmp2 == DAC_CR_TSEL2))
sahilmgandhi 18:6a4db94011d3 394 {
sahilmgandhi 18:6a4db94011d3 395 /* Enable the selected DAC software conversion*/
sahilmgandhi 18:6a4db94011d3 396 hdac->Instance->SWTRIGR |= (uint32_t)DAC_SWTRIGR_SWTRIG2;
sahilmgandhi 18:6a4db94011d3 397 }
sahilmgandhi 18:6a4db94011d3 398 }
sahilmgandhi 18:6a4db94011d3 399
sahilmgandhi 18:6a4db94011d3 400 /* Change DAC state */
sahilmgandhi 18:6a4db94011d3 401 hdac->State = HAL_DAC_STATE_READY;
sahilmgandhi 18:6a4db94011d3 402
sahilmgandhi 18:6a4db94011d3 403 /* Process unlocked */
sahilmgandhi 18:6a4db94011d3 404 __HAL_UNLOCK(hdac);
sahilmgandhi 18:6a4db94011d3 405
sahilmgandhi 18:6a4db94011d3 406 /* Return function status */
sahilmgandhi 18:6a4db94011d3 407 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 408 }
sahilmgandhi 18:6a4db94011d3 409
sahilmgandhi 18:6a4db94011d3 410 /**
sahilmgandhi 18:6a4db94011d3 411 * @brief Disables DAC and stop conversion of channel.
sahilmgandhi 18:6a4db94011d3 412 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 413 * the configuration information for the specified DAC.
sahilmgandhi 18:6a4db94011d3 414 * @param Channel: The selected DAC channel.
sahilmgandhi 18:6a4db94011d3 415 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 416 * @arg DAC_CHANNEL_1: DAC Channel1 selected
sahilmgandhi 18:6a4db94011d3 417 * @arg DAC_CHANNEL_2: DAC Channel2 selected
sahilmgandhi 18:6a4db94011d3 418 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 419 */
sahilmgandhi 18:6a4db94011d3 420 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel)
sahilmgandhi 18:6a4db94011d3 421 {
sahilmgandhi 18:6a4db94011d3 422 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 423 assert_param(IS_DAC_CHANNEL(Channel));
sahilmgandhi 18:6a4db94011d3 424
sahilmgandhi 18:6a4db94011d3 425 /* Disable the Peripheral */
sahilmgandhi 18:6a4db94011d3 426 __HAL_DAC_DISABLE(hdac, Channel);
sahilmgandhi 18:6a4db94011d3 427
sahilmgandhi 18:6a4db94011d3 428 /* Change DAC state */
sahilmgandhi 18:6a4db94011d3 429 hdac->State = HAL_DAC_STATE_READY;
sahilmgandhi 18:6a4db94011d3 430
sahilmgandhi 18:6a4db94011d3 431 /* Return function status */
sahilmgandhi 18:6a4db94011d3 432 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 433 }
sahilmgandhi 18:6a4db94011d3 434
sahilmgandhi 18:6a4db94011d3 435 /**
sahilmgandhi 18:6a4db94011d3 436 * @brief Enables DAC and starts conversion of channel.
sahilmgandhi 18:6a4db94011d3 437 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 438 * the configuration information for the specified DAC.
sahilmgandhi 18:6a4db94011d3 439 * @param Channel: The selected DAC channel.
sahilmgandhi 18:6a4db94011d3 440 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 441 * @arg DAC_CHANNEL_1: DAC Channel1 selected
sahilmgandhi 18:6a4db94011d3 442 * @arg DAC_CHANNEL_2: DAC Channel2 selected
sahilmgandhi 18:6a4db94011d3 443 * @param pData: The destination peripheral Buffer address.
sahilmgandhi 18:6a4db94011d3 444 * @param Length: The length of data to be transferred from memory to DAC peripheral
sahilmgandhi 18:6a4db94011d3 445 * @param Alignment: Specifies the data alignment for DAC channel.
sahilmgandhi 18:6a4db94011d3 446 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 447 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
sahilmgandhi 18:6a4db94011d3 448 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
sahilmgandhi 18:6a4db94011d3 449 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
sahilmgandhi 18:6a4db94011d3 450 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 451 */
sahilmgandhi 18:6a4db94011d3 452 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment)
sahilmgandhi 18:6a4db94011d3 453 {
sahilmgandhi 18:6a4db94011d3 454 uint32_t tmpreg = 0U;
sahilmgandhi 18:6a4db94011d3 455
sahilmgandhi 18:6a4db94011d3 456 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 457 assert_param(IS_DAC_CHANNEL(Channel));
sahilmgandhi 18:6a4db94011d3 458 assert_param(IS_DAC_ALIGN(Alignment));
sahilmgandhi 18:6a4db94011d3 459
sahilmgandhi 18:6a4db94011d3 460 /* Process locked */
sahilmgandhi 18:6a4db94011d3 461 __HAL_LOCK(hdac);
sahilmgandhi 18:6a4db94011d3 462
sahilmgandhi 18:6a4db94011d3 463 /* Change DAC state */
sahilmgandhi 18:6a4db94011d3 464 hdac->State = HAL_DAC_STATE_BUSY;
sahilmgandhi 18:6a4db94011d3 465
sahilmgandhi 18:6a4db94011d3 466 if(Channel == DAC_CHANNEL_1)
sahilmgandhi 18:6a4db94011d3 467 {
sahilmgandhi 18:6a4db94011d3 468 /* Set the DMA transfer complete callback for channel1 */
sahilmgandhi 18:6a4db94011d3 469 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
sahilmgandhi 18:6a4db94011d3 470
sahilmgandhi 18:6a4db94011d3 471 /* Set the DMA half transfer complete callback for channel1 */
sahilmgandhi 18:6a4db94011d3 472 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
sahilmgandhi 18:6a4db94011d3 473
sahilmgandhi 18:6a4db94011d3 474 /* Set the DMA error callback for channel1 */
sahilmgandhi 18:6a4db94011d3 475 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
sahilmgandhi 18:6a4db94011d3 476
sahilmgandhi 18:6a4db94011d3 477 /* Enable the selected DAC channel1 DMA request */
sahilmgandhi 18:6a4db94011d3 478 hdac->Instance->CR |= DAC_CR_DMAEN1;
sahilmgandhi 18:6a4db94011d3 479
sahilmgandhi 18:6a4db94011d3 480 /* Case of use of channel 1 */
sahilmgandhi 18:6a4db94011d3 481 switch(Alignment)
sahilmgandhi 18:6a4db94011d3 482 {
sahilmgandhi 18:6a4db94011d3 483 case DAC_ALIGN_12B_R:
sahilmgandhi 18:6a4db94011d3 484 /* Get DHR12R1 address */
sahilmgandhi 18:6a4db94011d3 485 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
sahilmgandhi 18:6a4db94011d3 486 break;
sahilmgandhi 18:6a4db94011d3 487 case DAC_ALIGN_12B_L:
sahilmgandhi 18:6a4db94011d3 488 /* Get DHR12L1 address */
sahilmgandhi 18:6a4db94011d3 489 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
sahilmgandhi 18:6a4db94011d3 490 break;
sahilmgandhi 18:6a4db94011d3 491 case DAC_ALIGN_8B_R:
sahilmgandhi 18:6a4db94011d3 492 /* Get DHR8R1 address */
sahilmgandhi 18:6a4db94011d3 493 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
sahilmgandhi 18:6a4db94011d3 494 break;
sahilmgandhi 18:6a4db94011d3 495 default:
sahilmgandhi 18:6a4db94011d3 496 break;
sahilmgandhi 18:6a4db94011d3 497 }
sahilmgandhi 18:6a4db94011d3 498 }
sahilmgandhi 18:6a4db94011d3 499 else
sahilmgandhi 18:6a4db94011d3 500 {
sahilmgandhi 18:6a4db94011d3 501 /* Set the DMA transfer complete callback for channel2 */
sahilmgandhi 18:6a4db94011d3 502 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
sahilmgandhi 18:6a4db94011d3 503
sahilmgandhi 18:6a4db94011d3 504 /* Set the DMA half transfer complete callback for channel2 */
sahilmgandhi 18:6a4db94011d3 505 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
sahilmgandhi 18:6a4db94011d3 506
sahilmgandhi 18:6a4db94011d3 507 /* Set the DMA error callback for channel2 */
sahilmgandhi 18:6a4db94011d3 508 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
sahilmgandhi 18:6a4db94011d3 509
sahilmgandhi 18:6a4db94011d3 510 /* Enable the selected DAC channel2 DMA request */
sahilmgandhi 18:6a4db94011d3 511 hdac->Instance->CR |= DAC_CR_DMAEN2;
sahilmgandhi 18:6a4db94011d3 512
sahilmgandhi 18:6a4db94011d3 513 /* Case of use of channel 2 */
sahilmgandhi 18:6a4db94011d3 514 switch(Alignment)
sahilmgandhi 18:6a4db94011d3 515 {
sahilmgandhi 18:6a4db94011d3 516 case DAC_ALIGN_12B_R:
sahilmgandhi 18:6a4db94011d3 517 /* Get DHR12R2 address */
sahilmgandhi 18:6a4db94011d3 518 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
sahilmgandhi 18:6a4db94011d3 519 break;
sahilmgandhi 18:6a4db94011d3 520 case DAC_ALIGN_12B_L:
sahilmgandhi 18:6a4db94011d3 521 /* Get DHR12L2 address */
sahilmgandhi 18:6a4db94011d3 522 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
sahilmgandhi 18:6a4db94011d3 523 break;
sahilmgandhi 18:6a4db94011d3 524 case DAC_ALIGN_8B_R:
sahilmgandhi 18:6a4db94011d3 525 /* Get DHR8R2 address */
sahilmgandhi 18:6a4db94011d3 526 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
sahilmgandhi 18:6a4db94011d3 527 break;
sahilmgandhi 18:6a4db94011d3 528 default:
sahilmgandhi 18:6a4db94011d3 529 break;
sahilmgandhi 18:6a4db94011d3 530 }
sahilmgandhi 18:6a4db94011d3 531 }
sahilmgandhi 18:6a4db94011d3 532
sahilmgandhi 18:6a4db94011d3 533 /* Enable the DMA Stream */
sahilmgandhi 18:6a4db94011d3 534 if(Channel == DAC_CHANNEL_1)
sahilmgandhi 18:6a4db94011d3 535 {
sahilmgandhi 18:6a4db94011d3 536 /* Enable the DAC DMA underrun interrupt */
sahilmgandhi 18:6a4db94011d3 537 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
sahilmgandhi 18:6a4db94011d3 538
sahilmgandhi 18:6a4db94011d3 539 /* Enable the DMA Stream */
sahilmgandhi 18:6a4db94011d3 540 HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
sahilmgandhi 18:6a4db94011d3 541 }
sahilmgandhi 18:6a4db94011d3 542 else
sahilmgandhi 18:6a4db94011d3 543 {
sahilmgandhi 18:6a4db94011d3 544 /* Enable the DAC DMA underrun interrupt */
sahilmgandhi 18:6a4db94011d3 545 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
sahilmgandhi 18:6a4db94011d3 546
sahilmgandhi 18:6a4db94011d3 547 /* Enable the DMA Stream */
sahilmgandhi 18:6a4db94011d3 548 HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
sahilmgandhi 18:6a4db94011d3 549 }
sahilmgandhi 18:6a4db94011d3 550
sahilmgandhi 18:6a4db94011d3 551 /* Enable the Peripheral */
sahilmgandhi 18:6a4db94011d3 552 __HAL_DAC_ENABLE(hdac, Channel);
sahilmgandhi 18:6a4db94011d3 553
sahilmgandhi 18:6a4db94011d3 554 /* Process Unlocked */
sahilmgandhi 18:6a4db94011d3 555 __HAL_UNLOCK(hdac);
sahilmgandhi 18:6a4db94011d3 556
sahilmgandhi 18:6a4db94011d3 557 /* Return function status */
sahilmgandhi 18:6a4db94011d3 558 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 559 }
sahilmgandhi 18:6a4db94011d3 560
sahilmgandhi 18:6a4db94011d3 561 /**
sahilmgandhi 18:6a4db94011d3 562 * @brief Disables DAC and stop conversion of channel.
sahilmgandhi 18:6a4db94011d3 563 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 564 * the configuration information for the specified DAC.
sahilmgandhi 18:6a4db94011d3 565 * @param Channel: The selected DAC channel.
sahilmgandhi 18:6a4db94011d3 566 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 567 * @arg DAC_CHANNEL_1: DAC Channel1 selected
sahilmgandhi 18:6a4db94011d3 568 * @arg DAC_CHANNEL_2: DAC Channel2 selected
sahilmgandhi 18:6a4db94011d3 569 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 570 */
sahilmgandhi 18:6a4db94011d3 571 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel)
sahilmgandhi 18:6a4db94011d3 572 {
sahilmgandhi 18:6a4db94011d3 573 HAL_StatusTypeDef status = HAL_OK;
sahilmgandhi 18:6a4db94011d3 574
sahilmgandhi 18:6a4db94011d3 575 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 576 assert_param(IS_DAC_CHANNEL(Channel));
sahilmgandhi 18:6a4db94011d3 577
sahilmgandhi 18:6a4db94011d3 578 /* Disable the selected DAC channel DMA request */
sahilmgandhi 18:6a4db94011d3 579 hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << Channel);
sahilmgandhi 18:6a4db94011d3 580
sahilmgandhi 18:6a4db94011d3 581 /* Disable the Peripheral */
sahilmgandhi 18:6a4db94011d3 582 __HAL_DAC_DISABLE(hdac, Channel);
sahilmgandhi 18:6a4db94011d3 583
sahilmgandhi 18:6a4db94011d3 584 /* Disable the DMA Channel */
sahilmgandhi 18:6a4db94011d3 585 /* Channel1 is used */
sahilmgandhi 18:6a4db94011d3 586 if(Channel == DAC_CHANNEL_1)
sahilmgandhi 18:6a4db94011d3 587 {
sahilmgandhi 18:6a4db94011d3 588 status = HAL_DMA_Abort(hdac->DMA_Handle1);
sahilmgandhi 18:6a4db94011d3 589 }
sahilmgandhi 18:6a4db94011d3 590 else /* Channel2 is used for */
sahilmgandhi 18:6a4db94011d3 591 {
sahilmgandhi 18:6a4db94011d3 592 status = HAL_DMA_Abort(hdac->DMA_Handle2);
sahilmgandhi 18:6a4db94011d3 593 }
sahilmgandhi 18:6a4db94011d3 594
sahilmgandhi 18:6a4db94011d3 595 /* Check if DMA Channel effectively disabled */
sahilmgandhi 18:6a4db94011d3 596 if(status != HAL_OK)
sahilmgandhi 18:6a4db94011d3 597 {
sahilmgandhi 18:6a4db94011d3 598 /* Update DAC state machine to error */
sahilmgandhi 18:6a4db94011d3 599 hdac->State = HAL_DAC_STATE_ERROR;
sahilmgandhi 18:6a4db94011d3 600 }
sahilmgandhi 18:6a4db94011d3 601 else
sahilmgandhi 18:6a4db94011d3 602 {
sahilmgandhi 18:6a4db94011d3 603 /* Change DAC state */
sahilmgandhi 18:6a4db94011d3 604 hdac->State = HAL_DAC_STATE_READY;
sahilmgandhi 18:6a4db94011d3 605 }
sahilmgandhi 18:6a4db94011d3 606
sahilmgandhi 18:6a4db94011d3 607 /* Return function status */
sahilmgandhi 18:6a4db94011d3 608 return status;
sahilmgandhi 18:6a4db94011d3 609 }
sahilmgandhi 18:6a4db94011d3 610
sahilmgandhi 18:6a4db94011d3 611 /**
sahilmgandhi 18:6a4db94011d3 612 * @brief Returns the last data output value of the selected DAC channel.
sahilmgandhi 18:6a4db94011d3 613 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 614 * the configuration information for the specified DAC.
sahilmgandhi 18:6a4db94011d3 615 * @param Channel: The selected DAC channel.
sahilmgandhi 18:6a4db94011d3 616 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 617 * @arg DAC_CHANNEL_1: DAC Channel1 selected
sahilmgandhi 18:6a4db94011d3 618 * @arg DAC_CHANNEL_2: DAC Channel2 selected
sahilmgandhi 18:6a4db94011d3 619 * @retval The selected DAC channel data output value.
sahilmgandhi 18:6a4db94011d3 620 */
sahilmgandhi 18:6a4db94011d3 621 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel)
sahilmgandhi 18:6a4db94011d3 622 {
sahilmgandhi 18:6a4db94011d3 623 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 624 assert_param(IS_DAC_CHANNEL(Channel));
sahilmgandhi 18:6a4db94011d3 625
sahilmgandhi 18:6a4db94011d3 626 /* Returns the DAC channel data output register value */
sahilmgandhi 18:6a4db94011d3 627 if(Channel == DAC_CHANNEL_1)
sahilmgandhi 18:6a4db94011d3 628 {
sahilmgandhi 18:6a4db94011d3 629 return hdac->Instance->DOR1;
sahilmgandhi 18:6a4db94011d3 630 }
sahilmgandhi 18:6a4db94011d3 631 else
sahilmgandhi 18:6a4db94011d3 632 {
sahilmgandhi 18:6a4db94011d3 633 return hdac->Instance->DOR2;
sahilmgandhi 18:6a4db94011d3 634 }
sahilmgandhi 18:6a4db94011d3 635 }
sahilmgandhi 18:6a4db94011d3 636
sahilmgandhi 18:6a4db94011d3 637 /**
sahilmgandhi 18:6a4db94011d3 638 * @brief Handles DAC interrupt request
sahilmgandhi 18:6a4db94011d3 639 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 640 * the configuration information for the specified DAC.
sahilmgandhi 18:6a4db94011d3 641 * @retval None
sahilmgandhi 18:6a4db94011d3 642 */
sahilmgandhi 18:6a4db94011d3 643 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac)
sahilmgandhi 18:6a4db94011d3 644 {
sahilmgandhi 18:6a4db94011d3 645 /* Check underrun channel 1 flag */
sahilmgandhi 18:6a4db94011d3 646 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
sahilmgandhi 18:6a4db94011d3 647 {
sahilmgandhi 18:6a4db94011d3 648 /* Change DAC state to error state */
sahilmgandhi 18:6a4db94011d3 649 hdac->State = HAL_DAC_STATE_ERROR;
sahilmgandhi 18:6a4db94011d3 650
sahilmgandhi 18:6a4db94011d3 651 /* Set DAC error code to channel1 DMA underrun error */
sahilmgandhi 18:6a4db94011d3 652 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH1;
sahilmgandhi 18:6a4db94011d3 653
sahilmgandhi 18:6a4db94011d3 654 /* Clear the underrun flag */
sahilmgandhi 18:6a4db94011d3 655 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR1);
sahilmgandhi 18:6a4db94011d3 656
sahilmgandhi 18:6a4db94011d3 657 /* Disable the selected DAC channel1 DMA request */
sahilmgandhi 18:6a4db94011d3 658 hdac->Instance->CR &= ~DAC_CR_DMAEN1;
sahilmgandhi 18:6a4db94011d3 659
sahilmgandhi 18:6a4db94011d3 660 /* Error callback */
sahilmgandhi 18:6a4db94011d3 661 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
sahilmgandhi 18:6a4db94011d3 662 }
sahilmgandhi 18:6a4db94011d3 663 /* Check underrun channel 2 flag */
sahilmgandhi 18:6a4db94011d3 664 if(__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
sahilmgandhi 18:6a4db94011d3 665 {
sahilmgandhi 18:6a4db94011d3 666 /* Change DAC state to error state */
sahilmgandhi 18:6a4db94011d3 667 hdac->State = HAL_DAC_STATE_ERROR;
sahilmgandhi 18:6a4db94011d3 668
sahilmgandhi 18:6a4db94011d3 669 /* Set DAC error code to channel2 DMA underrun error */
sahilmgandhi 18:6a4db94011d3 670 hdac->ErrorCode |= HAL_DAC_ERROR_DMAUNDERRUNCH2;
sahilmgandhi 18:6a4db94011d3 671
sahilmgandhi 18:6a4db94011d3 672 /* Clear the underrun flag */
sahilmgandhi 18:6a4db94011d3 673 __HAL_DAC_CLEAR_FLAG(hdac,DAC_FLAG_DMAUDR2);
sahilmgandhi 18:6a4db94011d3 674
sahilmgandhi 18:6a4db94011d3 675 /* Disable the selected DAC channel1 DMA request */
sahilmgandhi 18:6a4db94011d3 676 hdac->Instance->CR &= ~DAC_CR_DMAEN2;
sahilmgandhi 18:6a4db94011d3 677
sahilmgandhi 18:6a4db94011d3 678 /* Error callback */
sahilmgandhi 18:6a4db94011d3 679 HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
sahilmgandhi 18:6a4db94011d3 680 }
sahilmgandhi 18:6a4db94011d3 681 }
sahilmgandhi 18:6a4db94011d3 682
sahilmgandhi 18:6a4db94011d3 683 /**
sahilmgandhi 18:6a4db94011d3 684 * @brief Conversion complete callback in non blocking mode for Channel1
sahilmgandhi 18:6a4db94011d3 685 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 686 * the configuration information for the specified DAC.
sahilmgandhi 18:6a4db94011d3 687 * @retval None
sahilmgandhi 18:6a4db94011d3 688 */
sahilmgandhi 18:6a4db94011d3 689 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac)
sahilmgandhi 18:6a4db94011d3 690 {
sahilmgandhi 18:6a4db94011d3 691 /* Prevent unused argument(s) compilation warning */
sahilmgandhi 18:6a4db94011d3 692 UNUSED(hdac);
sahilmgandhi 18:6a4db94011d3 693 /* NOTE : This function Should not be modified, when the callback is needed,
sahilmgandhi 18:6a4db94011d3 694 the HAL_DAC_ConvCpltCallback could be implemented in the user file
sahilmgandhi 18:6a4db94011d3 695 */
sahilmgandhi 18:6a4db94011d3 696 }
sahilmgandhi 18:6a4db94011d3 697
sahilmgandhi 18:6a4db94011d3 698 /**
sahilmgandhi 18:6a4db94011d3 699 * @brief Conversion half DMA transfer callback in non blocking mode for Channel1
sahilmgandhi 18:6a4db94011d3 700 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 701 * the configuration information for the specified DAC.
sahilmgandhi 18:6a4db94011d3 702 * @retval None
sahilmgandhi 18:6a4db94011d3 703 */
sahilmgandhi 18:6a4db94011d3 704 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac)
sahilmgandhi 18:6a4db94011d3 705 {
sahilmgandhi 18:6a4db94011d3 706 /* Prevent unused argument(s) compilation warning */
sahilmgandhi 18:6a4db94011d3 707 UNUSED(hdac);
sahilmgandhi 18:6a4db94011d3 708 /* NOTE : This function Should not be modified, when the callback is needed,
sahilmgandhi 18:6a4db94011d3 709 the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
sahilmgandhi 18:6a4db94011d3 710 */
sahilmgandhi 18:6a4db94011d3 711 }
sahilmgandhi 18:6a4db94011d3 712
sahilmgandhi 18:6a4db94011d3 713 /**
sahilmgandhi 18:6a4db94011d3 714 * @brief Error DAC callback for Channel1.
sahilmgandhi 18:6a4db94011d3 715 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 716 * the configuration information for the specified DAC.
sahilmgandhi 18:6a4db94011d3 717 * @retval None
sahilmgandhi 18:6a4db94011d3 718 */
sahilmgandhi 18:6a4db94011d3 719 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
sahilmgandhi 18:6a4db94011d3 720 {
sahilmgandhi 18:6a4db94011d3 721 /* Prevent unused argument(s) compilation warning */
sahilmgandhi 18:6a4db94011d3 722 UNUSED(hdac);
sahilmgandhi 18:6a4db94011d3 723 /* NOTE : This function Should not be modified, when the callback is needed,
sahilmgandhi 18:6a4db94011d3 724 the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
sahilmgandhi 18:6a4db94011d3 725 */
sahilmgandhi 18:6a4db94011d3 726 }
sahilmgandhi 18:6a4db94011d3 727
sahilmgandhi 18:6a4db94011d3 728 /**
sahilmgandhi 18:6a4db94011d3 729 * @brief DMA underrun DAC callback for channel1.
sahilmgandhi 18:6a4db94011d3 730 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 731 * the configuration information for the specified DAC.
sahilmgandhi 18:6a4db94011d3 732 * @retval None
sahilmgandhi 18:6a4db94011d3 733 */
sahilmgandhi 18:6a4db94011d3 734 __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
sahilmgandhi 18:6a4db94011d3 735 {
sahilmgandhi 18:6a4db94011d3 736 /* Prevent unused argument(s) compilation warning */
sahilmgandhi 18:6a4db94011d3 737 UNUSED(hdac);
sahilmgandhi 18:6a4db94011d3 738 /* NOTE : This function Should not be modified, when the callback is needed,
sahilmgandhi 18:6a4db94011d3 739 the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
sahilmgandhi 18:6a4db94011d3 740 */
sahilmgandhi 18:6a4db94011d3 741 }
sahilmgandhi 18:6a4db94011d3 742
sahilmgandhi 18:6a4db94011d3 743 /**
sahilmgandhi 18:6a4db94011d3 744 * @}
sahilmgandhi 18:6a4db94011d3 745 */
sahilmgandhi 18:6a4db94011d3 746
sahilmgandhi 18:6a4db94011d3 747 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
sahilmgandhi 18:6a4db94011d3 748 * @brief Peripheral Control functions
sahilmgandhi 18:6a4db94011d3 749 *
sahilmgandhi 18:6a4db94011d3 750 @verbatim
sahilmgandhi 18:6a4db94011d3 751 ==============================================================================
sahilmgandhi 18:6a4db94011d3 752 ##### Peripheral Control functions #####
sahilmgandhi 18:6a4db94011d3 753 ==============================================================================
sahilmgandhi 18:6a4db94011d3 754 [..] This section provides functions allowing to:
sahilmgandhi 18:6a4db94011d3 755 (+) Configure channels.
sahilmgandhi 18:6a4db94011d3 756 (+) Set the specified data holding register value for DAC channel.
sahilmgandhi 18:6a4db94011d3 757
sahilmgandhi 18:6a4db94011d3 758 @endverbatim
sahilmgandhi 18:6a4db94011d3 759 * @{
sahilmgandhi 18:6a4db94011d3 760 */
sahilmgandhi 18:6a4db94011d3 761
sahilmgandhi 18:6a4db94011d3 762 /**
sahilmgandhi 18:6a4db94011d3 763 * @brief Configures the selected DAC channel.
sahilmgandhi 18:6a4db94011d3 764 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 765 * the configuration information for the specified DAC.
sahilmgandhi 18:6a4db94011d3 766 * @param sConfig: DAC configuration structure.
sahilmgandhi 18:6a4db94011d3 767 * @param Channel: The selected DAC channel.
sahilmgandhi 18:6a4db94011d3 768 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 769 * @arg DAC_CHANNEL_1: DAC Channel1 selected
sahilmgandhi 18:6a4db94011d3 770 * @arg DAC_CHANNEL_2: DAC Channel2 selected
sahilmgandhi 18:6a4db94011d3 771 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 772 */
sahilmgandhi 18:6a4db94011d3 773 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel)
sahilmgandhi 18:6a4db94011d3 774 {
sahilmgandhi 18:6a4db94011d3 775 uint32_t tmpreg1 = 0U, tmpreg2 = 0U;
sahilmgandhi 18:6a4db94011d3 776
sahilmgandhi 18:6a4db94011d3 777 /* Check the DAC parameters */
sahilmgandhi 18:6a4db94011d3 778 assert_param(IS_DAC_TRIGGER(sConfig->DAC_Trigger));
sahilmgandhi 18:6a4db94011d3 779 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
sahilmgandhi 18:6a4db94011d3 780 assert_param(IS_DAC_CHANNEL(Channel));
sahilmgandhi 18:6a4db94011d3 781
sahilmgandhi 18:6a4db94011d3 782 /* Process locked */
sahilmgandhi 18:6a4db94011d3 783 __HAL_LOCK(hdac);
sahilmgandhi 18:6a4db94011d3 784
sahilmgandhi 18:6a4db94011d3 785 /* Change DAC state */
sahilmgandhi 18:6a4db94011d3 786 hdac->State = HAL_DAC_STATE_BUSY;
sahilmgandhi 18:6a4db94011d3 787
sahilmgandhi 18:6a4db94011d3 788 /* Get the DAC CR value */
sahilmgandhi 18:6a4db94011d3 789 tmpreg1 = hdac->Instance->CR;
sahilmgandhi 18:6a4db94011d3 790 /* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
sahilmgandhi 18:6a4db94011d3 791 tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1 | DAC_CR_BOFF1)) << Channel);
sahilmgandhi 18:6a4db94011d3 792 /* Configure for the selected DAC channel: buffer output, trigger */
sahilmgandhi 18:6a4db94011d3 793 /* Set TSELx and TENx bits according to DAC_Trigger value */
sahilmgandhi 18:6a4db94011d3 794 /* Set BOFFx bit according to DAC_OutputBuffer value */
sahilmgandhi 18:6a4db94011d3 795 tmpreg2 = (sConfig->DAC_Trigger | sConfig->DAC_OutputBuffer);
sahilmgandhi 18:6a4db94011d3 796 /* Calculate CR register value depending on DAC_Channel */
sahilmgandhi 18:6a4db94011d3 797 tmpreg1 |= tmpreg2 << Channel;
sahilmgandhi 18:6a4db94011d3 798 /* Write to DAC CR */
sahilmgandhi 18:6a4db94011d3 799 hdac->Instance->CR = tmpreg1;
sahilmgandhi 18:6a4db94011d3 800 /* Disable wave generation */
sahilmgandhi 18:6a4db94011d3 801 hdac->Instance->CR &= ~(DAC_CR_WAVE1 << Channel);
sahilmgandhi 18:6a4db94011d3 802
sahilmgandhi 18:6a4db94011d3 803 /* Change DAC state */
sahilmgandhi 18:6a4db94011d3 804 hdac->State = HAL_DAC_STATE_READY;
sahilmgandhi 18:6a4db94011d3 805
sahilmgandhi 18:6a4db94011d3 806 /* Process unlocked */
sahilmgandhi 18:6a4db94011d3 807 __HAL_UNLOCK(hdac);
sahilmgandhi 18:6a4db94011d3 808
sahilmgandhi 18:6a4db94011d3 809 /* Return function status */
sahilmgandhi 18:6a4db94011d3 810 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 811 }
sahilmgandhi 18:6a4db94011d3 812
sahilmgandhi 18:6a4db94011d3 813 /**
sahilmgandhi 18:6a4db94011d3 814 * @brief Set the specified data holding register value for DAC channel.
sahilmgandhi 18:6a4db94011d3 815 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 816 * the configuration information for the specified DAC.
sahilmgandhi 18:6a4db94011d3 817 * @param Channel: The selected DAC channel.
sahilmgandhi 18:6a4db94011d3 818 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 819 * @arg DAC_CHANNEL_1: DAC Channel1 selected
sahilmgandhi 18:6a4db94011d3 820 * @arg DAC_CHANNEL_2: DAC Channel2 selected
sahilmgandhi 18:6a4db94011d3 821 * @param Alignment: Specifies the data alignment.
sahilmgandhi 18:6a4db94011d3 822 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 823 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
sahilmgandhi 18:6a4db94011d3 824 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
sahilmgandhi 18:6a4db94011d3 825 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
sahilmgandhi 18:6a4db94011d3 826 * @param Data: Data to be loaded in the selected data holding register.
sahilmgandhi 18:6a4db94011d3 827 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 828 */
sahilmgandhi 18:6a4db94011d3 829 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
sahilmgandhi 18:6a4db94011d3 830 {
sahilmgandhi 18:6a4db94011d3 831 __IO uint32_t tmp = 0U;
sahilmgandhi 18:6a4db94011d3 832
sahilmgandhi 18:6a4db94011d3 833 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 834 assert_param(IS_DAC_CHANNEL(Channel));
sahilmgandhi 18:6a4db94011d3 835 assert_param(IS_DAC_ALIGN(Alignment));
sahilmgandhi 18:6a4db94011d3 836 assert_param(IS_DAC_DATA(Data));
sahilmgandhi 18:6a4db94011d3 837
sahilmgandhi 18:6a4db94011d3 838 tmp = (uint32_t)hdac->Instance;
sahilmgandhi 18:6a4db94011d3 839 if(Channel == DAC_CHANNEL_1)
sahilmgandhi 18:6a4db94011d3 840 {
sahilmgandhi 18:6a4db94011d3 841 tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
sahilmgandhi 18:6a4db94011d3 842 }
sahilmgandhi 18:6a4db94011d3 843 else
sahilmgandhi 18:6a4db94011d3 844 {
sahilmgandhi 18:6a4db94011d3 845 tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
sahilmgandhi 18:6a4db94011d3 846 }
sahilmgandhi 18:6a4db94011d3 847
sahilmgandhi 18:6a4db94011d3 848 /* Set the DAC channel1 selected data holding register */
sahilmgandhi 18:6a4db94011d3 849 *(__IO uint32_t *) tmp = Data;
sahilmgandhi 18:6a4db94011d3 850
sahilmgandhi 18:6a4db94011d3 851 /* Return function status */
sahilmgandhi 18:6a4db94011d3 852 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 853 }
sahilmgandhi 18:6a4db94011d3 854
sahilmgandhi 18:6a4db94011d3 855 /**
sahilmgandhi 18:6a4db94011d3 856 * @}
sahilmgandhi 18:6a4db94011d3 857 */
sahilmgandhi 18:6a4db94011d3 858
sahilmgandhi 18:6a4db94011d3 859 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
sahilmgandhi 18:6a4db94011d3 860 * @brief Peripheral State and Errors functions
sahilmgandhi 18:6a4db94011d3 861 *
sahilmgandhi 18:6a4db94011d3 862 @verbatim
sahilmgandhi 18:6a4db94011d3 863 ==============================================================================
sahilmgandhi 18:6a4db94011d3 864 ##### Peripheral State and Errors functions #####
sahilmgandhi 18:6a4db94011d3 865 ==============================================================================
sahilmgandhi 18:6a4db94011d3 866 [..]
sahilmgandhi 18:6a4db94011d3 867 This subsection provides functions allowing to
sahilmgandhi 18:6a4db94011d3 868 (+) Check the DAC state.
sahilmgandhi 18:6a4db94011d3 869 (+) Check the DAC Errors.
sahilmgandhi 18:6a4db94011d3 870
sahilmgandhi 18:6a4db94011d3 871 @endverbatim
sahilmgandhi 18:6a4db94011d3 872 * @{
sahilmgandhi 18:6a4db94011d3 873 */
sahilmgandhi 18:6a4db94011d3 874
sahilmgandhi 18:6a4db94011d3 875 /**
sahilmgandhi 18:6a4db94011d3 876 * @brief return the DAC state
sahilmgandhi 18:6a4db94011d3 877 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 878 * the configuration information for the specified DAC.
sahilmgandhi 18:6a4db94011d3 879 * @retval HAL state
sahilmgandhi 18:6a4db94011d3 880 */
sahilmgandhi 18:6a4db94011d3 881 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac)
sahilmgandhi 18:6a4db94011d3 882 {
sahilmgandhi 18:6a4db94011d3 883 /* Return DAC state */
sahilmgandhi 18:6a4db94011d3 884 return hdac->State;
sahilmgandhi 18:6a4db94011d3 885 }
sahilmgandhi 18:6a4db94011d3 886
sahilmgandhi 18:6a4db94011d3 887
sahilmgandhi 18:6a4db94011d3 888 /**
sahilmgandhi 18:6a4db94011d3 889 * @brief Return the DAC error code
sahilmgandhi 18:6a4db94011d3 890 * @param hdac: pointer to a DAC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 891 * the configuration information for the specified DAC.
sahilmgandhi 18:6a4db94011d3 892 * @retval DAC Error Code
sahilmgandhi 18:6a4db94011d3 893 */
sahilmgandhi 18:6a4db94011d3 894 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac)
sahilmgandhi 18:6a4db94011d3 895 {
sahilmgandhi 18:6a4db94011d3 896 return hdac->ErrorCode;
sahilmgandhi 18:6a4db94011d3 897 }
sahilmgandhi 18:6a4db94011d3 898
sahilmgandhi 18:6a4db94011d3 899 /**
sahilmgandhi 18:6a4db94011d3 900 * @}
sahilmgandhi 18:6a4db94011d3 901 */
sahilmgandhi 18:6a4db94011d3 902
sahilmgandhi 18:6a4db94011d3 903 /**
sahilmgandhi 18:6a4db94011d3 904 * @brief DMA conversion complete callback.
sahilmgandhi 18:6a4db94011d3 905 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 906 * the configuration information for the specified DMA module.
sahilmgandhi 18:6a4db94011d3 907 * @retval None
sahilmgandhi 18:6a4db94011d3 908 */
sahilmgandhi 18:6a4db94011d3 909 static void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
sahilmgandhi 18:6a4db94011d3 910 {
sahilmgandhi 18:6a4db94011d3 911 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
sahilmgandhi 18:6a4db94011d3 912
sahilmgandhi 18:6a4db94011d3 913 HAL_DAC_ConvCpltCallbackCh1(hdac);
sahilmgandhi 18:6a4db94011d3 914
sahilmgandhi 18:6a4db94011d3 915 hdac->State= HAL_DAC_STATE_READY;
sahilmgandhi 18:6a4db94011d3 916 }
sahilmgandhi 18:6a4db94011d3 917
sahilmgandhi 18:6a4db94011d3 918 /**
sahilmgandhi 18:6a4db94011d3 919 * @brief DMA half transfer complete callback.
sahilmgandhi 18:6a4db94011d3 920 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 921 * the configuration information for the specified DMA module.
sahilmgandhi 18:6a4db94011d3 922 * @retval None
sahilmgandhi 18:6a4db94011d3 923 */
sahilmgandhi 18:6a4db94011d3 924 static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
sahilmgandhi 18:6a4db94011d3 925 {
sahilmgandhi 18:6a4db94011d3 926 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
sahilmgandhi 18:6a4db94011d3 927 /* Conversion complete callback */
sahilmgandhi 18:6a4db94011d3 928 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
sahilmgandhi 18:6a4db94011d3 929 }
sahilmgandhi 18:6a4db94011d3 930
sahilmgandhi 18:6a4db94011d3 931 /**
sahilmgandhi 18:6a4db94011d3 932 * @brief DMA error callback
sahilmgandhi 18:6a4db94011d3 933 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 934 * the configuration information for the specified DMA module.
sahilmgandhi 18:6a4db94011d3 935 * @retval None
sahilmgandhi 18:6a4db94011d3 936 */
sahilmgandhi 18:6a4db94011d3 937 static void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
sahilmgandhi 18:6a4db94011d3 938 {
sahilmgandhi 18:6a4db94011d3 939 DAC_HandleTypeDef* hdac = ( DAC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
sahilmgandhi 18:6a4db94011d3 940
sahilmgandhi 18:6a4db94011d3 941 /* Set DAC error code to DMA error */
sahilmgandhi 18:6a4db94011d3 942 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
sahilmgandhi 18:6a4db94011d3 943
sahilmgandhi 18:6a4db94011d3 944 HAL_DAC_ErrorCallbackCh1(hdac);
sahilmgandhi 18:6a4db94011d3 945
sahilmgandhi 18:6a4db94011d3 946 hdac->State= HAL_DAC_STATE_READY;
sahilmgandhi 18:6a4db94011d3 947 }
sahilmgandhi 18:6a4db94011d3 948
sahilmgandhi 18:6a4db94011d3 949 /**
sahilmgandhi 18:6a4db94011d3 950 * @}
sahilmgandhi 18:6a4db94011d3 951 */
sahilmgandhi 18:6a4db94011d3 952 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx ||\
sahilmgandhi 18:6a4db94011d3 953 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||\
sahilmgandhi 18:6a4db94011d3 954 STM32F410xx || STM32F446xx || STM32F469xx || STM32F479xx */
sahilmgandhi 18:6a4db94011d3 955 #endif /* HAL_DAC_MODULE_ENABLED */
sahilmgandhi 18:6a4db94011d3 956
sahilmgandhi 18:6a4db94011d3 957 /**
sahilmgandhi 18:6a4db94011d3 958 * @}
sahilmgandhi 18:6a4db94011d3 959 */
sahilmgandhi 18:6a4db94011d3 960
sahilmgandhi 18:6a4db94011d3 961 /**
sahilmgandhi 18:6a4db94011d3 962 * @}
sahilmgandhi 18:6a4db94011d3 963 */
sahilmgandhi 18:6a4db94011d3 964
sahilmgandhi 18:6a4db94011d3 965 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/