Mouse code for the MacroRat
mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_cec.h@46:b156ef445742, 2017-06-03 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sat Jun 03 00:22:44 2017 +0000
- Revision:
- 46:b156ef445742
- Parent:
- 18:6a4db94011d3
Final code for internal battlebot competition.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sahilmgandhi | 18:6a4db94011d3 | 1 | /** |
sahilmgandhi | 18:6a4db94011d3 | 2 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 3 | * @file stm32f4xx_hal_cec.h |
sahilmgandhi | 18:6a4db94011d3 | 4 | * @author MCD Application Team |
sahilmgandhi | 18:6a4db94011d3 | 5 | * @version V1.5.0 |
sahilmgandhi | 18:6a4db94011d3 | 6 | * @date 06-May-2016 |
sahilmgandhi | 18:6a4db94011d3 | 7 | * @brief Header file of CEC HAL module. |
sahilmgandhi | 18:6a4db94011d3 | 8 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 9 | * @attention |
sahilmgandhi | 18:6a4db94011d3 | 10 | * |
sahilmgandhi | 18:6a4db94011d3 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
sahilmgandhi | 18:6a4db94011d3 | 12 | * |
sahilmgandhi | 18:6a4db94011d3 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
sahilmgandhi | 18:6a4db94011d3 | 14 | * are permitted provided that the following conditions are met: |
sahilmgandhi | 18:6a4db94011d3 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
sahilmgandhi | 18:6a4db94011d3 | 16 | * this list of conditions and the following disclaimer. |
sahilmgandhi | 18:6a4db94011d3 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
sahilmgandhi | 18:6a4db94011d3 | 18 | * this list of conditions and the following disclaimer in the documentation |
sahilmgandhi | 18:6a4db94011d3 | 19 | * and/or other materials provided with the distribution. |
sahilmgandhi | 18:6a4db94011d3 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
sahilmgandhi | 18:6a4db94011d3 | 21 | * may be used to endorse or promote products derived from this software |
sahilmgandhi | 18:6a4db94011d3 | 22 | * without specific prior written permission. |
sahilmgandhi | 18:6a4db94011d3 | 23 | * |
sahilmgandhi | 18:6a4db94011d3 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
sahilmgandhi | 18:6a4db94011d3 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
sahilmgandhi | 18:6a4db94011d3 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
sahilmgandhi | 18:6a4db94011d3 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
sahilmgandhi | 18:6a4db94011d3 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
sahilmgandhi | 18:6a4db94011d3 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
sahilmgandhi | 18:6a4db94011d3 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
sahilmgandhi | 18:6a4db94011d3 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
sahilmgandhi | 18:6a4db94011d3 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
sahilmgandhi | 18:6a4db94011d3 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
sahilmgandhi | 18:6a4db94011d3 | 34 | * |
sahilmgandhi | 18:6a4db94011d3 | 35 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 36 | */ |
sahilmgandhi | 18:6a4db94011d3 | 37 | |
sahilmgandhi | 18:6a4db94011d3 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 39 | #ifndef __STM32F4xx_HAL_CEC_H |
sahilmgandhi | 18:6a4db94011d3 | 40 | #define __STM32F4xx_HAL_CEC_H |
sahilmgandhi | 18:6a4db94011d3 | 41 | |
sahilmgandhi | 18:6a4db94011d3 | 42 | #ifdef __cplusplus |
sahilmgandhi | 18:6a4db94011d3 | 43 | extern "C" { |
sahilmgandhi | 18:6a4db94011d3 | 44 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 45 | |
sahilmgandhi | 18:6a4db94011d3 | 46 | #if defined(STM32F446xx) |
sahilmgandhi | 18:6a4db94011d3 | 47 | /* Includes ------------------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 48 | #include "stm32f4xx_hal_def.h" |
sahilmgandhi | 18:6a4db94011d3 | 49 | |
sahilmgandhi | 18:6a4db94011d3 | 50 | /** @addtogroup STM32F4xx_HAL_Driver |
sahilmgandhi | 18:6a4db94011d3 | 51 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 52 | */ |
sahilmgandhi | 18:6a4db94011d3 | 53 | |
sahilmgandhi | 18:6a4db94011d3 | 54 | /** @addtogroup CEC |
sahilmgandhi | 18:6a4db94011d3 | 55 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 56 | */ |
sahilmgandhi | 18:6a4db94011d3 | 57 | |
sahilmgandhi | 18:6a4db94011d3 | 58 | /* Exported types ------------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 59 | /** @defgroup CEC_Exported_Types CEC Exported Types |
sahilmgandhi | 18:6a4db94011d3 | 60 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 61 | */ |
sahilmgandhi | 18:6a4db94011d3 | 62 | |
sahilmgandhi | 18:6a4db94011d3 | 63 | /** |
sahilmgandhi | 18:6a4db94011d3 | 64 | * @brief CEC Init Structure definition |
sahilmgandhi | 18:6a4db94011d3 | 65 | */ |
sahilmgandhi | 18:6a4db94011d3 | 66 | typedef struct |
sahilmgandhi | 18:6a4db94011d3 | 67 | { |
sahilmgandhi | 18:6a4db94011d3 | 68 | uint32_t SignalFreeTime; /*!< Set SFT field, specifies the Signal Free Time. |
sahilmgandhi | 18:6a4db94011d3 | 69 | It can be one of @ref CEC_Signal_Free_Time |
sahilmgandhi | 18:6a4db94011d3 | 70 | and belongs to the set {0,...,7} where |
sahilmgandhi | 18:6a4db94011d3 | 71 | 0x0 is the default configuration |
sahilmgandhi | 18:6a4db94011d3 | 72 | else means 0.5 + (SignalFreeTime - 1) nominal data bit periods */ |
sahilmgandhi | 18:6a4db94011d3 | 73 | |
sahilmgandhi | 18:6a4db94011d3 | 74 | uint32_t Tolerance; /*!< Set RXTOL bit, specifies the tolerance accepted on the received waveforms, |
sahilmgandhi | 18:6a4db94011d3 | 75 | it can be a value of @ref CEC_Tolerance : it is either CEC_STANDARD_TOLERANCE |
sahilmgandhi | 18:6a4db94011d3 | 76 | or CEC_EXTENDED_TOLERANCE */ |
sahilmgandhi | 18:6a4db94011d3 | 77 | |
sahilmgandhi | 18:6a4db94011d3 | 78 | uint32_t BRERxStop; /*!< Set BRESTP bit @ref CEC_BRERxStop : specifies whether or not a Bit Rising Error stops the reception. |
sahilmgandhi | 18:6a4db94011d3 | 79 | CEC_NO_RX_STOP_ON_BRE: reception is not stopped. |
sahilmgandhi | 18:6a4db94011d3 | 80 | CEC_RX_STOP_ON_BRE: reception is stopped. */ |
sahilmgandhi | 18:6a4db94011d3 | 81 | |
sahilmgandhi | 18:6a4db94011d3 | 82 | uint32_t BREErrorBitGen; /*!< Set BREGEN bit @ref CEC_BREErrorBitGen : specifies whether or not an Error-Bit is generated on the |
sahilmgandhi | 18:6a4db94011d3 | 83 | CEC line upon Bit Rising Error detection. |
sahilmgandhi | 18:6a4db94011d3 | 84 | CEC_BRE_ERRORBIT_NO_GENERATION: no error-bit generation. |
sahilmgandhi | 18:6a4db94011d3 | 85 | CEC_BRE_ERRORBIT_GENERATION: error-bit generation if BRESTP is set. */ |
sahilmgandhi | 18:6a4db94011d3 | 86 | |
sahilmgandhi | 18:6a4db94011d3 | 87 | uint32_t LBPEErrorBitGen; /*!< Set LBPEGEN bit @ref CEC_LBPEErrorBitGen : specifies whether or not an Error-Bit is generated on the |
sahilmgandhi | 18:6a4db94011d3 | 88 | CEC line upon Long Bit Period Error detection. |
sahilmgandhi | 18:6a4db94011d3 | 89 | CEC_LBPE_ERRORBIT_NO_GENERATION: no error-bit generation. |
sahilmgandhi | 18:6a4db94011d3 | 90 | CEC_LBPE_ERRORBIT_GENERATION: error-bit generation. */ |
sahilmgandhi | 18:6a4db94011d3 | 91 | |
sahilmgandhi | 18:6a4db94011d3 | 92 | uint32_t BroadcastMsgNoErrorBitGen; /*!< Set BRDNOGEN bit @ref CEC_BroadCastMsgErrorBitGen : allows to avoid an Error-Bit generation on the CEC line |
sahilmgandhi | 18:6a4db94011d3 | 93 | upon an error detected on a broadcast message. |
sahilmgandhi | 18:6a4db94011d3 | 94 | |
sahilmgandhi | 18:6a4db94011d3 | 95 | It supersedes BREGEN and LBPEGEN bits for a broadcast message error handling. It can take two values: |
sahilmgandhi | 18:6a4db94011d3 | 96 | |
sahilmgandhi | 18:6a4db94011d3 | 97 | 1) CEC_BROADCASTERROR_ERRORBIT_GENERATION. |
sahilmgandhi | 18:6a4db94011d3 | 98 | a) BRE detection: error-bit generation on the CEC line if BRESTP=CEC_RX_STOP_ON_BRE |
sahilmgandhi | 18:6a4db94011d3 | 99 | and BREGEN=CEC_BRE_ERRORBIT_NO_GENERATION. |
sahilmgandhi | 18:6a4db94011d3 | 100 | b) LBPE detection: error-bit generation on the CEC line |
sahilmgandhi | 18:6a4db94011d3 | 101 | if LBPGEN=CEC_LBPE_ERRORBIT_NO_GENERATION. |
sahilmgandhi | 18:6a4db94011d3 | 102 | |
sahilmgandhi | 18:6a4db94011d3 | 103 | 2) CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION. |
sahilmgandhi | 18:6a4db94011d3 | 104 | no error-bit generation in case neither a) nor b) are satisfied. Additionally, |
sahilmgandhi | 18:6a4db94011d3 | 105 | there is no error-bit generation in case of Short Bit Period Error detection in |
sahilmgandhi | 18:6a4db94011d3 | 106 | a broadcast message while LSTN bit is set. */ |
sahilmgandhi | 18:6a4db94011d3 | 107 | |
sahilmgandhi | 18:6a4db94011d3 | 108 | uint32_t SignalFreeTimeOption; /*!< Set SFTOP bit @ref CEC_SFT_Option : specifies when SFT timer starts. |
sahilmgandhi | 18:6a4db94011d3 | 109 | CEC_SFT_START_ON_TXSOM SFT: timer starts when TXSOM is set by software. |
sahilmgandhi | 18:6a4db94011d3 | 110 | CEC_SFT_START_ON_TX_RX_END: SFT timer starts automatically at the end of message transmission/reception. */ |
sahilmgandhi | 18:6a4db94011d3 | 111 | |
sahilmgandhi | 18:6a4db94011d3 | 112 | uint32_t ListenMode; /*!< Set LSTN bit @ref CEC_Listening_Mode : specifies device listening mode. It can take two values: |
sahilmgandhi | 18:6a4db94011d3 | 113 | |
sahilmgandhi | 18:6a4db94011d3 | 114 | CEC_REDUCED_LISTENING_MODE: CEC peripheral receives only message addressed to its |
sahilmgandhi | 18:6a4db94011d3 | 115 | own address (OAR). Messages addressed to different destination are ignored. |
sahilmgandhi | 18:6a4db94011d3 | 116 | Broadcast messages are always received. |
sahilmgandhi | 18:6a4db94011d3 | 117 | |
sahilmgandhi | 18:6a4db94011d3 | 118 | CEC_FULL_LISTENING_MODE: CEC peripheral receives messages addressed to its own |
sahilmgandhi | 18:6a4db94011d3 | 119 | address (OAR) with positive acknowledge. Messages addressed to different destination |
sahilmgandhi | 18:6a4db94011d3 | 120 | are received, but without interfering with the CEC bus: no acknowledge sent. */ |
sahilmgandhi | 18:6a4db94011d3 | 121 | |
sahilmgandhi | 18:6a4db94011d3 | 122 | uint16_t OwnAddress; /*!< Own addresses configuration |
sahilmgandhi | 18:6a4db94011d3 | 123 | This parameter can be a value of @ref CEC_OWN_ADDRESS */ |
sahilmgandhi | 18:6a4db94011d3 | 124 | |
sahilmgandhi | 18:6a4db94011d3 | 125 | uint8_t *RxBuffer; /*!< CEC Rx buffer pointeur */ |
sahilmgandhi | 18:6a4db94011d3 | 126 | |
sahilmgandhi | 18:6a4db94011d3 | 127 | |
sahilmgandhi | 18:6a4db94011d3 | 128 | }CEC_InitTypeDef; |
sahilmgandhi | 18:6a4db94011d3 | 129 | |
sahilmgandhi | 18:6a4db94011d3 | 130 | /** |
sahilmgandhi | 18:6a4db94011d3 | 131 | * @brief HAL CEC State structures definition |
sahilmgandhi | 18:6a4db94011d3 | 132 | * @note HAL CEC State value is a combination of 2 different substates: gState and RxState. |
sahilmgandhi | 18:6a4db94011d3 | 133 | * - gState contains CEC state information related to global Handle management |
sahilmgandhi | 18:6a4db94011d3 | 134 | * and also information related to Tx operations. |
sahilmgandhi | 18:6a4db94011d3 | 135 | * gState value coding follow below described bitmap : |
sahilmgandhi | 18:6a4db94011d3 | 136 | * b7 (not used) |
sahilmgandhi | 18:6a4db94011d3 | 137 | * x : Should be set to 0 |
sahilmgandhi | 18:6a4db94011d3 | 138 | * b6 Error information |
sahilmgandhi | 18:6a4db94011d3 | 139 | * 0 : No Error |
sahilmgandhi | 18:6a4db94011d3 | 140 | * 1 : Error |
sahilmgandhi | 18:6a4db94011d3 | 141 | * b5 IP initilisation status |
sahilmgandhi | 18:6a4db94011d3 | 142 | * 0 : Reset (IP not initialized) |
sahilmgandhi | 18:6a4db94011d3 | 143 | * 1 : Init done (IP initialized. HAL CEC Init function already called) |
sahilmgandhi | 18:6a4db94011d3 | 144 | * b4-b3 (not used) |
sahilmgandhi | 18:6a4db94011d3 | 145 | * xx : Should be set to 00 |
sahilmgandhi | 18:6a4db94011d3 | 146 | * b2 Intrinsic process state |
sahilmgandhi | 18:6a4db94011d3 | 147 | * 0 : Ready |
sahilmgandhi | 18:6a4db94011d3 | 148 | * 1 : Busy (IP busy with some configuration or internal operations) |
sahilmgandhi | 18:6a4db94011d3 | 149 | * b1 (not used) |
sahilmgandhi | 18:6a4db94011d3 | 150 | * x : Should be set to 0 |
sahilmgandhi | 18:6a4db94011d3 | 151 | * b0 Tx state |
sahilmgandhi | 18:6a4db94011d3 | 152 | * 0 : Ready (no Tx operation ongoing) |
sahilmgandhi | 18:6a4db94011d3 | 153 | * 1 : Busy (Tx operation ongoing) |
sahilmgandhi | 18:6a4db94011d3 | 154 | * - RxState contains information related to Rx operations. |
sahilmgandhi | 18:6a4db94011d3 | 155 | * RxState value coding follow below described bitmap : |
sahilmgandhi | 18:6a4db94011d3 | 156 | * b7-b6 (not used) |
sahilmgandhi | 18:6a4db94011d3 | 157 | * xx : Should be set to 00 |
sahilmgandhi | 18:6a4db94011d3 | 158 | * b5 IP initilisation status |
sahilmgandhi | 18:6a4db94011d3 | 159 | * 0 : Reset (IP not initialized) |
sahilmgandhi | 18:6a4db94011d3 | 160 | * 1 : Init done (IP initialized) |
sahilmgandhi | 18:6a4db94011d3 | 161 | * b4-b2 (not used) |
sahilmgandhi | 18:6a4db94011d3 | 162 | * xxx : Should be set to 000 |
sahilmgandhi | 18:6a4db94011d3 | 163 | * b1 Rx state |
sahilmgandhi | 18:6a4db94011d3 | 164 | * 0 : Ready (no Rx operation ongoing) |
sahilmgandhi | 18:6a4db94011d3 | 165 | * 1 : Busy (Rx operation ongoing) |
sahilmgandhi | 18:6a4db94011d3 | 166 | * b0 (not used) |
sahilmgandhi | 18:6a4db94011d3 | 167 | * x : Should be set to 0. |
sahilmgandhi | 18:6a4db94011d3 | 168 | */ |
sahilmgandhi | 18:6a4db94011d3 | 169 | typedef enum |
sahilmgandhi | 18:6a4db94011d3 | 170 | { |
sahilmgandhi | 18:6a4db94011d3 | 171 | HAL_CEC_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized |
sahilmgandhi | 18:6a4db94011d3 | 172 | Value is allowed for gState and RxState */ |
sahilmgandhi | 18:6a4db94011d3 | 173 | HAL_CEC_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use |
sahilmgandhi | 18:6a4db94011d3 | 174 | Value is allowed for gState and RxState */ |
sahilmgandhi | 18:6a4db94011d3 | 175 | HAL_CEC_STATE_BUSY = 0x24U, /*!< an internal process is ongoing |
sahilmgandhi | 18:6a4db94011d3 | 176 | Value is allowed for gState only */ |
sahilmgandhi | 18:6a4db94011d3 | 177 | HAL_CEC_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing |
sahilmgandhi | 18:6a4db94011d3 | 178 | Value is allowed for RxState only */ |
sahilmgandhi | 18:6a4db94011d3 | 179 | HAL_CEC_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing |
sahilmgandhi | 18:6a4db94011d3 | 180 | Value is allowed for gState only */ |
sahilmgandhi | 18:6a4db94011d3 | 181 | HAL_CEC_STATE_ERROR = 0x60U /*!< Error Value is allowed for gState only */ |
sahilmgandhi | 18:6a4db94011d3 | 182 | }HAL_CEC_StateTypeDef; |
sahilmgandhi | 18:6a4db94011d3 | 183 | |
sahilmgandhi | 18:6a4db94011d3 | 184 | /** |
sahilmgandhi | 18:6a4db94011d3 | 185 | * @brief CEC handle Structure definition |
sahilmgandhi | 18:6a4db94011d3 | 186 | */ |
sahilmgandhi | 18:6a4db94011d3 | 187 | typedef struct |
sahilmgandhi | 18:6a4db94011d3 | 188 | { |
sahilmgandhi | 18:6a4db94011d3 | 189 | CEC_TypeDef *Instance; /*!< CEC registers base address */ |
sahilmgandhi | 18:6a4db94011d3 | 190 | |
sahilmgandhi | 18:6a4db94011d3 | 191 | CEC_InitTypeDef Init; /*!< CEC communication parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 192 | |
sahilmgandhi | 18:6a4db94011d3 | 193 | uint8_t *pTxBuffPtr; /*!< Pointer to CEC Tx transfer Buffer */ |
sahilmgandhi | 18:6a4db94011d3 | 194 | |
sahilmgandhi | 18:6a4db94011d3 | 195 | uint16_t TxXferCount; /*!< CEC Tx Transfer Counter */ |
sahilmgandhi | 18:6a4db94011d3 | 196 | |
sahilmgandhi | 18:6a4db94011d3 | 197 | uint16_t RxXferSize; /*!< CEC Rx Transfer size, 0: header received only */ |
sahilmgandhi | 18:6a4db94011d3 | 198 | |
sahilmgandhi | 18:6a4db94011d3 | 199 | HAL_LockTypeDef Lock; /*!< Locking object */ |
sahilmgandhi | 18:6a4db94011d3 | 200 | |
sahilmgandhi | 18:6a4db94011d3 | 201 | HAL_CEC_StateTypeDef gState; /*!< CEC state information related to global Handle management |
sahilmgandhi | 18:6a4db94011d3 | 202 | and also related to Tx operations. |
sahilmgandhi | 18:6a4db94011d3 | 203 | This parameter can be a value of @ref HAL_CEC_StateTypeDef */ |
sahilmgandhi | 18:6a4db94011d3 | 204 | |
sahilmgandhi | 18:6a4db94011d3 | 205 | HAL_CEC_StateTypeDef RxState; /*!< CEC state information related to Rx operations. |
sahilmgandhi | 18:6a4db94011d3 | 206 | This parameter can be a value of @ref HAL_CEC_StateTypeDef */ |
sahilmgandhi | 18:6a4db94011d3 | 207 | |
sahilmgandhi | 18:6a4db94011d3 | 208 | uint32_t ErrorCode; /*!< For errors handling purposes, copy of ISR register |
sahilmgandhi | 18:6a4db94011d3 | 209 | in case error is reported */ |
sahilmgandhi | 18:6a4db94011d3 | 210 | }CEC_HandleTypeDef; |
sahilmgandhi | 18:6a4db94011d3 | 211 | /** |
sahilmgandhi | 18:6a4db94011d3 | 212 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 213 | */ |
sahilmgandhi | 18:6a4db94011d3 | 214 | |
sahilmgandhi | 18:6a4db94011d3 | 215 | /* Exported constants --------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 216 | /** @defgroup CEC_Exported_Constants CEC Exported Constants |
sahilmgandhi | 18:6a4db94011d3 | 217 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 218 | */ |
sahilmgandhi | 18:6a4db94011d3 | 219 | |
sahilmgandhi | 18:6a4db94011d3 | 220 | /** @defgroup CEC_Error_Code CEC Error Code |
sahilmgandhi | 18:6a4db94011d3 | 221 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 222 | */ |
sahilmgandhi | 18:6a4db94011d3 | 223 | #define HAL_CEC_ERROR_NONE ((uint32_t)0x00000000U)/*!< no error */ |
sahilmgandhi | 18:6a4db94011d3 | 224 | #define HAL_CEC_ERROR_RXOVR CEC_ISR_RXOVR /*!< CEC Rx-Overrun */ |
sahilmgandhi | 18:6a4db94011d3 | 225 | #define HAL_CEC_ERROR_BRE CEC_ISR_BRE /*!< CEC Rx Bit Rising Error */ |
sahilmgandhi | 18:6a4db94011d3 | 226 | #define HAL_CEC_ERROR_SBPE CEC_ISR_SBPE /*!< CEC Rx Short Bit period Error */ |
sahilmgandhi | 18:6a4db94011d3 | 227 | #define HAL_CEC_ERROR_LBPE CEC_ISR_LBPE /*!< CEC Rx Long Bit period Error */ |
sahilmgandhi | 18:6a4db94011d3 | 228 | #define HAL_CEC_ERROR_RXACKE CEC_ISR_RXACKE /*!< CEC Rx Missing Acknowledge */ |
sahilmgandhi | 18:6a4db94011d3 | 229 | #define HAL_CEC_ERROR_ARBLST CEC_ISR_ARBLST /*!< CEC Arbitration Lost */ |
sahilmgandhi | 18:6a4db94011d3 | 230 | #define HAL_CEC_ERROR_TXUDR CEC_ISR_TXUDR /*!< CEC Tx-Buffer Underrun */ |
sahilmgandhi | 18:6a4db94011d3 | 231 | #define HAL_CEC_ERROR_TXERR CEC_ISR_TXERR /*!< CEC Tx-Error */ |
sahilmgandhi | 18:6a4db94011d3 | 232 | #define HAL_CEC_ERROR_TXACKE CEC_ISR_TXACKE /*!< CEC Tx Missing Acknowledge */ |
sahilmgandhi | 18:6a4db94011d3 | 233 | /** |
sahilmgandhi | 18:6a4db94011d3 | 234 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 235 | */ |
sahilmgandhi | 18:6a4db94011d3 | 236 | |
sahilmgandhi | 18:6a4db94011d3 | 237 | /** @defgroup CEC_Signal_Free_Time CEC Signal Free Time setting parameter |
sahilmgandhi | 18:6a4db94011d3 | 238 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 239 | */ |
sahilmgandhi | 18:6a4db94011d3 | 240 | #define CEC_DEFAULT_SFT ((uint32_t)0x00000000U) |
sahilmgandhi | 18:6a4db94011d3 | 241 | #define CEC_0_5_BITPERIOD_SFT ((uint32_t)0x00000001U) |
sahilmgandhi | 18:6a4db94011d3 | 242 | #define CEC_1_5_BITPERIOD_SFT ((uint32_t)0x00000002U) |
sahilmgandhi | 18:6a4db94011d3 | 243 | #define CEC_2_5_BITPERIOD_SFT ((uint32_t)0x00000003U) |
sahilmgandhi | 18:6a4db94011d3 | 244 | #define CEC_3_5_BITPERIOD_SFT ((uint32_t)0x00000004U) |
sahilmgandhi | 18:6a4db94011d3 | 245 | #define CEC_4_5_BITPERIOD_SFT ((uint32_t)0x00000005U) |
sahilmgandhi | 18:6a4db94011d3 | 246 | #define CEC_5_5_BITPERIOD_SFT ((uint32_t)0x00000006U) |
sahilmgandhi | 18:6a4db94011d3 | 247 | #define CEC_6_5_BITPERIOD_SFT ((uint32_t)0x00000007U) |
sahilmgandhi | 18:6a4db94011d3 | 248 | /** |
sahilmgandhi | 18:6a4db94011d3 | 249 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 250 | */ |
sahilmgandhi | 18:6a4db94011d3 | 251 | |
sahilmgandhi | 18:6a4db94011d3 | 252 | /** @defgroup CEC_Tolerance CEC Receiver Tolerance |
sahilmgandhi | 18:6a4db94011d3 | 253 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 254 | */ |
sahilmgandhi | 18:6a4db94011d3 | 255 | #define CEC_STANDARD_TOLERANCE ((uint32_t)0x00000000U) |
sahilmgandhi | 18:6a4db94011d3 | 256 | #define CEC_EXTENDED_TOLERANCE ((uint32_t)CEC_CFGR_RXTOL) |
sahilmgandhi | 18:6a4db94011d3 | 257 | /** |
sahilmgandhi | 18:6a4db94011d3 | 258 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 259 | */ |
sahilmgandhi | 18:6a4db94011d3 | 260 | |
sahilmgandhi | 18:6a4db94011d3 | 261 | /** @defgroup CEC_BRERxStop CEC Reception Stop on Error |
sahilmgandhi | 18:6a4db94011d3 | 262 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 263 | */ |
sahilmgandhi | 18:6a4db94011d3 | 264 | #define CEC_NO_RX_STOP_ON_BRE ((uint32_t)0x00000000U) |
sahilmgandhi | 18:6a4db94011d3 | 265 | #define CEC_RX_STOP_ON_BRE ((uint32_t)CEC_CFGR_BRESTP) |
sahilmgandhi | 18:6a4db94011d3 | 266 | /** |
sahilmgandhi | 18:6a4db94011d3 | 267 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 268 | */ |
sahilmgandhi | 18:6a4db94011d3 | 269 | |
sahilmgandhi | 18:6a4db94011d3 | 270 | /** @defgroup CEC_BREErrorBitGen CEC Error Bit Generation if Bit Rise Error reported |
sahilmgandhi | 18:6a4db94011d3 | 271 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 272 | */ |
sahilmgandhi | 18:6a4db94011d3 | 273 | #define CEC_BRE_ERRORBIT_NO_GENERATION ((uint32_t)0x00000000U) |
sahilmgandhi | 18:6a4db94011d3 | 274 | #define CEC_BRE_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_BREGEN) |
sahilmgandhi | 18:6a4db94011d3 | 275 | /** |
sahilmgandhi | 18:6a4db94011d3 | 276 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 277 | */ |
sahilmgandhi | 18:6a4db94011d3 | 278 | |
sahilmgandhi | 18:6a4db94011d3 | 279 | /** @defgroup CEC_LBPEErrorBitGen CEC Error Bit Generation if Long Bit Period Error reported |
sahilmgandhi | 18:6a4db94011d3 | 280 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 281 | */ |
sahilmgandhi | 18:6a4db94011d3 | 282 | #define CEC_LBPE_ERRORBIT_NO_GENERATION ((uint32_t)0x00000000U) |
sahilmgandhi | 18:6a4db94011d3 | 283 | #define CEC_LBPE_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_LBPEGEN) |
sahilmgandhi | 18:6a4db94011d3 | 284 | /** |
sahilmgandhi | 18:6a4db94011d3 | 285 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 286 | */ |
sahilmgandhi | 18:6a4db94011d3 | 287 | |
sahilmgandhi | 18:6a4db94011d3 | 288 | /** @defgroup CEC_BroadCastMsgErrorBitGen CEC Error Bit Generation on Broadcast message |
sahilmgandhi | 18:6a4db94011d3 | 289 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 290 | */ |
sahilmgandhi | 18:6a4db94011d3 | 291 | #define CEC_BROADCASTERROR_ERRORBIT_GENERATION ((uint32_t)0x00000000U) |
sahilmgandhi | 18:6a4db94011d3 | 292 | #define CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION ((uint32_t)CEC_CFGR_BRDNOGEN) |
sahilmgandhi | 18:6a4db94011d3 | 293 | /** |
sahilmgandhi | 18:6a4db94011d3 | 294 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 295 | */ |
sahilmgandhi | 18:6a4db94011d3 | 296 | |
sahilmgandhi | 18:6a4db94011d3 | 297 | /** @defgroup CEC_SFT_Option CEC Signal Free Time start option |
sahilmgandhi | 18:6a4db94011d3 | 298 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 299 | */ |
sahilmgandhi | 18:6a4db94011d3 | 300 | #define CEC_SFT_START_ON_TXSOM ((uint32_t)0x00000000U) |
sahilmgandhi | 18:6a4db94011d3 | 301 | #define CEC_SFT_START_ON_TX_RX_END ((uint32_t)CEC_CFGR_SFTOPT) |
sahilmgandhi | 18:6a4db94011d3 | 302 | /** |
sahilmgandhi | 18:6a4db94011d3 | 303 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 304 | */ |
sahilmgandhi | 18:6a4db94011d3 | 305 | |
sahilmgandhi | 18:6a4db94011d3 | 306 | /** @defgroup CEC_Listening_Mode CEC Listening mode option |
sahilmgandhi | 18:6a4db94011d3 | 307 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 308 | */ |
sahilmgandhi | 18:6a4db94011d3 | 309 | #define CEC_REDUCED_LISTENING_MODE ((uint32_t)0x00000000U) |
sahilmgandhi | 18:6a4db94011d3 | 310 | #define CEC_FULL_LISTENING_MODE ((uint32_t)CEC_CFGR_LSTN) |
sahilmgandhi | 18:6a4db94011d3 | 311 | /** |
sahilmgandhi | 18:6a4db94011d3 | 312 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 313 | */ |
sahilmgandhi | 18:6a4db94011d3 | 314 | |
sahilmgandhi | 18:6a4db94011d3 | 315 | /** @defgroup CEC_OAR_Position CEC Device Own Address position in CEC CFGR register |
sahilmgandhi | 18:6a4db94011d3 | 316 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 317 | */ |
sahilmgandhi | 18:6a4db94011d3 | 318 | #define CEC_CFGR_OAR_LSB_POS ((uint32_t) 16U) |
sahilmgandhi | 18:6a4db94011d3 | 319 | /** |
sahilmgandhi | 18:6a4db94011d3 | 320 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 321 | */ |
sahilmgandhi | 18:6a4db94011d3 | 322 | |
sahilmgandhi | 18:6a4db94011d3 | 323 | /** @defgroup CEC_Initiator_Position CEC Initiator logical address position in message header |
sahilmgandhi | 18:6a4db94011d3 | 324 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 325 | */ |
sahilmgandhi | 18:6a4db94011d3 | 326 | #define CEC_INITIATOR_LSB_POS ((uint32_t) 4U) |
sahilmgandhi | 18:6a4db94011d3 | 327 | /** |
sahilmgandhi | 18:6a4db94011d3 | 328 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 329 | */ |
sahilmgandhi | 18:6a4db94011d3 | 330 | |
sahilmgandhi | 18:6a4db94011d3 | 331 | /** @defgroup CEC_OWN_ADDRESS CEC Own Address |
sahilmgandhi | 18:6a4db94011d3 | 332 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 333 | */ |
sahilmgandhi | 18:6a4db94011d3 | 334 | #define CEC_OWN_ADDRESS_NONE ((uint16_t) 0x0000U) /* Reset value */ |
sahilmgandhi | 18:6a4db94011d3 | 335 | #define CEC_OWN_ADDRESS_0 ((uint16_t) 0x0001U) /* Logical Address 0 */ |
sahilmgandhi | 18:6a4db94011d3 | 336 | #define CEC_OWN_ADDRESS_1 ((uint16_t) 0x0002U) /* Logical Address 1 */ |
sahilmgandhi | 18:6a4db94011d3 | 337 | #define CEC_OWN_ADDRESS_2 ((uint16_t) 0x0004U) /* Logical Address 2 */ |
sahilmgandhi | 18:6a4db94011d3 | 338 | #define CEC_OWN_ADDRESS_3 ((uint16_t) 0x0008U) /* Logical Address 3 */ |
sahilmgandhi | 18:6a4db94011d3 | 339 | #define CEC_OWN_ADDRESS_4 ((uint16_t) 0x0010U) /* Logical Address 4 */ |
sahilmgandhi | 18:6a4db94011d3 | 340 | #define CEC_OWN_ADDRESS_5 ((uint16_t) 0x0020U) /* Logical Address 5 */ |
sahilmgandhi | 18:6a4db94011d3 | 341 | #define CEC_OWN_ADDRESS_6 ((uint16_t) 0x0040U) /* Logical Address 6 */ |
sahilmgandhi | 18:6a4db94011d3 | 342 | #define CEC_OWN_ADDRESS_7 ((uint16_t) 0x0080U) /* Logical Address 7 */ |
sahilmgandhi | 18:6a4db94011d3 | 343 | #define CEC_OWN_ADDRESS_8 ((uint16_t) 0x0100U) /* Logical Address 9 */ |
sahilmgandhi | 18:6a4db94011d3 | 344 | #define CEC_OWN_ADDRESS_9 ((uint16_t) 0x0200U) /* Logical Address 10 */ |
sahilmgandhi | 18:6a4db94011d3 | 345 | #define CEC_OWN_ADDRESS_10 ((uint16_t) 0x0400U) /* Logical Address 11 */ |
sahilmgandhi | 18:6a4db94011d3 | 346 | #define CEC_OWN_ADDRESS_11 ((uint16_t) 0x0800U) /* Logical Address 12 */ |
sahilmgandhi | 18:6a4db94011d3 | 347 | #define CEC_OWN_ADDRESS_12 ((uint16_t) 0x1000U) /* Logical Address 13 */ |
sahilmgandhi | 18:6a4db94011d3 | 348 | #define CEC_OWN_ADDRESS_13 ((uint16_t) 0x2000U) /* Logical Address 14 */ |
sahilmgandhi | 18:6a4db94011d3 | 349 | #define CEC_OWN_ADDRESS_14 ((uint16_t) 0x4000U) /* Logical Address 15 */ |
sahilmgandhi | 18:6a4db94011d3 | 350 | /** |
sahilmgandhi | 18:6a4db94011d3 | 351 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 352 | */ |
sahilmgandhi | 18:6a4db94011d3 | 353 | |
sahilmgandhi | 18:6a4db94011d3 | 354 | /** @defgroup CEC_Interrupts_Definitions CEC Interrupts definition |
sahilmgandhi | 18:6a4db94011d3 | 355 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 356 | */ |
sahilmgandhi | 18:6a4db94011d3 | 357 | #define CEC_IT_TXACKE CEC_IER_TXACKEIE |
sahilmgandhi | 18:6a4db94011d3 | 358 | #define CEC_IT_TXERR CEC_IER_TXERRIE |
sahilmgandhi | 18:6a4db94011d3 | 359 | #define CEC_IT_TXUDR CEC_IER_TXUDRIE |
sahilmgandhi | 18:6a4db94011d3 | 360 | #define CEC_IT_TXEND CEC_IER_TXENDIE |
sahilmgandhi | 18:6a4db94011d3 | 361 | #define CEC_IT_TXBR CEC_IER_TXBRIE |
sahilmgandhi | 18:6a4db94011d3 | 362 | #define CEC_IT_ARBLST CEC_IER_ARBLSTIE |
sahilmgandhi | 18:6a4db94011d3 | 363 | #define CEC_IT_RXACKE CEC_IER_RXACKEIE |
sahilmgandhi | 18:6a4db94011d3 | 364 | #define CEC_IT_LBPE CEC_IER_LBPEIE |
sahilmgandhi | 18:6a4db94011d3 | 365 | #define CEC_IT_SBPE CEC_IER_SBPEIE |
sahilmgandhi | 18:6a4db94011d3 | 366 | #define CEC_IT_BRE CEC_IER_BREIE |
sahilmgandhi | 18:6a4db94011d3 | 367 | #define CEC_IT_RXOVR CEC_IER_RXOVRIE |
sahilmgandhi | 18:6a4db94011d3 | 368 | #define CEC_IT_RXEND CEC_IER_RXENDIE |
sahilmgandhi | 18:6a4db94011d3 | 369 | #define CEC_IT_RXBR CEC_IER_RXBRIE |
sahilmgandhi | 18:6a4db94011d3 | 370 | /** |
sahilmgandhi | 18:6a4db94011d3 | 371 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 372 | */ |
sahilmgandhi | 18:6a4db94011d3 | 373 | |
sahilmgandhi | 18:6a4db94011d3 | 374 | /** @defgroup CEC_Flags_Definitions CEC Flags definition |
sahilmgandhi | 18:6a4db94011d3 | 375 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 376 | */ |
sahilmgandhi | 18:6a4db94011d3 | 377 | #define CEC_FLAG_TXACKE CEC_ISR_TXACKE |
sahilmgandhi | 18:6a4db94011d3 | 378 | #define CEC_FLAG_TXERR CEC_ISR_TXERR |
sahilmgandhi | 18:6a4db94011d3 | 379 | #define CEC_FLAG_TXUDR CEC_ISR_TXUDR |
sahilmgandhi | 18:6a4db94011d3 | 380 | #define CEC_FLAG_TXEND CEC_ISR_TXEND |
sahilmgandhi | 18:6a4db94011d3 | 381 | #define CEC_FLAG_TXBR CEC_ISR_TXBR |
sahilmgandhi | 18:6a4db94011d3 | 382 | #define CEC_FLAG_ARBLST CEC_ISR_ARBLST |
sahilmgandhi | 18:6a4db94011d3 | 383 | #define CEC_FLAG_RXACKE CEC_ISR_RXACKE |
sahilmgandhi | 18:6a4db94011d3 | 384 | #define CEC_FLAG_LBPE CEC_ISR_LBPE |
sahilmgandhi | 18:6a4db94011d3 | 385 | #define CEC_FLAG_SBPE CEC_ISR_SBPE |
sahilmgandhi | 18:6a4db94011d3 | 386 | #define CEC_FLAG_BRE CEC_ISR_BRE |
sahilmgandhi | 18:6a4db94011d3 | 387 | #define CEC_FLAG_RXOVR CEC_ISR_RXOVR |
sahilmgandhi | 18:6a4db94011d3 | 388 | #define CEC_FLAG_RXEND CEC_ISR_RXEND |
sahilmgandhi | 18:6a4db94011d3 | 389 | #define CEC_FLAG_RXBR CEC_ISR_RXBR |
sahilmgandhi | 18:6a4db94011d3 | 390 | /** |
sahilmgandhi | 18:6a4db94011d3 | 391 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 392 | */ |
sahilmgandhi | 18:6a4db94011d3 | 393 | |
sahilmgandhi | 18:6a4db94011d3 | 394 | /** @defgroup CEC_ALL_ERROR CEC all RX or TX errors flags |
sahilmgandhi | 18:6a4db94011d3 | 395 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 396 | */ |
sahilmgandhi | 18:6a4db94011d3 | 397 | #define CEC_ISR_ALL_ERROR ((uint32_t)CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|\ |
sahilmgandhi | 18:6a4db94011d3 | 398 | CEC_ISR_ARBLST|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE) |
sahilmgandhi | 18:6a4db94011d3 | 399 | /** |
sahilmgandhi | 18:6a4db94011d3 | 400 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 401 | */ |
sahilmgandhi | 18:6a4db94011d3 | 402 | |
sahilmgandhi | 18:6a4db94011d3 | 403 | /** @defgroup CEC_IER_ALL_RX CEC all RX errors interrupts enabling flag |
sahilmgandhi | 18:6a4db94011d3 | 404 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 405 | */ |
sahilmgandhi | 18:6a4db94011d3 | 406 | #define CEC_IER_RX_ALL_ERR ((uint32_t)CEC_IER_RXACKEIE|CEC_IER_LBPEIE|CEC_IER_SBPEIE|CEC_IER_BREIE|CEC_IER_RXOVRIE) |
sahilmgandhi | 18:6a4db94011d3 | 407 | /** |
sahilmgandhi | 18:6a4db94011d3 | 408 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 409 | */ |
sahilmgandhi | 18:6a4db94011d3 | 410 | |
sahilmgandhi | 18:6a4db94011d3 | 411 | /** @defgroup CEC_IER_ALL_TX CEC all TX errors interrupts enabling flag |
sahilmgandhi | 18:6a4db94011d3 | 412 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 413 | */ |
sahilmgandhi | 18:6a4db94011d3 | 414 | #define CEC_IER_TX_ALL_ERR ((uint32_t)CEC_IER_TXACKEIE|CEC_IER_TXERRIE|CEC_IER_TXUDRIE|CEC_IER_ARBLSTIE) |
sahilmgandhi | 18:6a4db94011d3 | 415 | /** |
sahilmgandhi | 18:6a4db94011d3 | 416 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 417 | */ |
sahilmgandhi | 18:6a4db94011d3 | 418 | |
sahilmgandhi | 18:6a4db94011d3 | 419 | /** |
sahilmgandhi | 18:6a4db94011d3 | 420 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 421 | */ |
sahilmgandhi | 18:6a4db94011d3 | 422 | |
sahilmgandhi | 18:6a4db94011d3 | 423 | /* Exported macros -----------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 424 | /** @defgroup CEC_Exported_Macros CEC Exported Macros |
sahilmgandhi | 18:6a4db94011d3 | 425 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 426 | */ |
sahilmgandhi | 18:6a4db94011d3 | 427 | |
sahilmgandhi | 18:6a4db94011d3 | 428 | /** @brief Reset CEC handle gstate & RxState |
sahilmgandhi | 18:6a4db94011d3 | 429 | * @param __HANDLE__: CEC handle. |
sahilmgandhi | 18:6a4db94011d3 | 430 | * @retval None |
sahilmgandhi | 18:6a4db94011d3 | 431 | */ |
sahilmgandhi | 18:6a4db94011d3 | 432 | #define __HAL_CEC_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
sahilmgandhi | 18:6a4db94011d3 | 433 | (__HANDLE__)->gState = HAL_CEC_STATE_RESET; \ |
sahilmgandhi | 18:6a4db94011d3 | 434 | (__HANDLE__)->RxState = HAL_CEC_STATE_RESET; \ |
sahilmgandhi | 18:6a4db94011d3 | 435 | } while(0) |
sahilmgandhi | 18:6a4db94011d3 | 436 | |
sahilmgandhi | 18:6a4db94011d3 | 437 | /** @brief Checks whether or not the specified CEC interrupt flag is set. |
sahilmgandhi | 18:6a4db94011d3 | 438 | * @param __HANDLE__: specifies the CEC Handle. |
sahilmgandhi | 18:6a4db94011d3 | 439 | * @param __FLAG__: specifies the flag to check. |
sahilmgandhi | 18:6a4db94011d3 | 440 | * @arg CEC_FLAG_TXACKE: Tx Missing acknowledge Error |
sahilmgandhi | 18:6a4db94011d3 | 441 | * @arg CEC_FLAG_TXERR: Tx Error. |
sahilmgandhi | 18:6a4db94011d3 | 442 | * @arg CEC_FLAG_TXUDR: Tx-Buffer Underrun. |
sahilmgandhi | 18:6a4db94011d3 | 443 | * @arg CEC_FLAG_TXEND: End of transmission (successful transmission of the last byte). |
sahilmgandhi | 18:6a4db94011d3 | 444 | * @arg CEC_FLAG_TXBR: Tx-Byte Request. |
sahilmgandhi | 18:6a4db94011d3 | 445 | * @arg CEC_FLAG_ARBLST: Arbitration Lost |
sahilmgandhi | 18:6a4db94011d3 | 446 | * @arg CEC_FLAG_RXACKE: Rx-Missing Acknowledge |
sahilmgandhi | 18:6a4db94011d3 | 447 | * @arg CEC_FLAG_LBPE: Rx Long period Error |
sahilmgandhi | 18:6a4db94011d3 | 448 | * @arg CEC_FLAG_SBPE: Rx Short period Error |
sahilmgandhi | 18:6a4db94011d3 | 449 | * @arg CEC_FLAG_BRE: Rx Bit Rising Error |
sahilmgandhi | 18:6a4db94011d3 | 450 | * @arg CEC_FLAG_RXOVR: Rx Overrun. |
sahilmgandhi | 18:6a4db94011d3 | 451 | * @arg CEC_FLAG_RXEND: End Of Reception. |
sahilmgandhi | 18:6a4db94011d3 | 452 | * @arg CEC_FLAG_RXBR: Rx-Byte Received. |
sahilmgandhi | 18:6a4db94011d3 | 453 | * @retval ITStatus |
sahilmgandhi | 18:6a4db94011d3 | 454 | */ |
sahilmgandhi | 18:6a4db94011d3 | 455 | #define __HAL_CEC_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR & (__FLAG__)) |
sahilmgandhi | 18:6a4db94011d3 | 456 | |
sahilmgandhi | 18:6a4db94011d3 | 457 | /** @brief Clears the interrupt or status flag when raised (write at 1) |
sahilmgandhi | 18:6a4db94011d3 | 458 | * @param __HANDLE__: specifies the CEC Handle. |
sahilmgandhi | 18:6a4db94011d3 | 459 | * @param __FLAG__: specifies the interrupt/status flag to clear. |
sahilmgandhi | 18:6a4db94011d3 | 460 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 461 | * @arg CEC_FLAG_TXACKE: Tx Missing acknowledge Error |
sahilmgandhi | 18:6a4db94011d3 | 462 | * @arg CEC_FLAG_TXERR: Tx Error. |
sahilmgandhi | 18:6a4db94011d3 | 463 | * @arg CEC_FLAG_TXUDR: Tx-Buffer Underrun. |
sahilmgandhi | 18:6a4db94011d3 | 464 | * @arg CEC_FLAG_TXEND: End of transmission (successful transmission of the last byte). |
sahilmgandhi | 18:6a4db94011d3 | 465 | * @arg CEC_FLAG_TXBR: Tx-Byte Request. |
sahilmgandhi | 18:6a4db94011d3 | 466 | * @arg CEC_FLAG_ARBLST: Arbitration Lost |
sahilmgandhi | 18:6a4db94011d3 | 467 | * @arg CEC_FLAG_RXACKE: Rx-Missing Acknowledge |
sahilmgandhi | 18:6a4db94011d3 | 468 | * @arg CEC_FLAG_LBPE: Rx Long period Error |
sahilmgandhi | 18:6a4db94011d3 | 469 | * @arg CEC_FLAG_SBPE: Rx Short period Error |
sahilmgandhi | 18:6a4db94011d3 | 470 | * @arg CEC_FLAG_BRE: Rx Bit Rising Error |
sahilmgandhi | 18:6a4db94011d3 | 471 | * @arg CEC_FLAG_RXOVR: Rx Overrun. |
sahilmgandhi | 18:6a4db94011d3 | 472 | * @arg CEC_FLAG_RXEND: End Of Reception. |
sahilmgandhi | 18:6a4db94011d3 | 473 | * @arg CEC_FLAG_RXBR: Rx-Byte Received. |
sahilmgandhi | 18:6a4db94011d3 | 474 | * @retval none |
sahilmgandhi | 18:6a4db94011d3 | 475 | */ |
sahilmgandhi | 18:6a4db94011d3 | 476 | #define __HAL_CEC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ISR |= (__FLAG__)) |
sahilmgandhi | 18:6a4db94011d3 | 477 | |
sahilmgandhi | 18:6a4db94011d3 | 478 | /** @brief Enables the specified CEC interrupt. |
sahilmgandhi | 18:6a4db94011d3 | 479 | * @param __HANDLE__: specifies the CEC Handle. |
sahilmgandhi | 18:6a4db94011d3 | 480 | * @param __INTERRUPT__: specifies the CEC interrupt to enable. |
sahilmgandhi | 18:6a4db94011d3 | 481 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 482 | * @arg CEC_IT_TXACKE: Tx Missing acknowledge Error IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 483 | * @arg CEC_IT_TXERR: Tx Error IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 484 | * @arg CEC_IT_TXUDR: Tx-Buffer Underrun IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 485 | * @arg CEC_IT_TXEND: End of transmission IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 486 | * @arg CEC_IT_TXBR: Tx-Byte Request IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 487 | * @arg CEC_IT_ARBLST: Arbitration Lost IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 488 | * @arg CEC_IT_RXACKE: Rx-Missing Acknowledge IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 489 | * @arg CEC_IT_LBPE: Rx Long period Error IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 490 | * @arg CEC_IT_SBPE: Rx Short period Error IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 491 | * @arg CEC_IT_BRE: Rx Bit Rising Error IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 492 | * @arg CEC_IT_RXOVR: Rx Overrun IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 493 | * @arg CEC_IT_RXEND: End Of Reception IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 494 | * @arg CEC_IT_RXBR: Rx-Byte Received IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 495 | * @retval none |
sahilmgandhi | 18:6a4db94011d3 | 496 | */ |
sahilmgandhi | 18:6a4db94011d3 | 497 | #define __HAL_CEC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) |
sahilmgandhi | 18:6a4db94011d3 | 498 | |
sahilmgandhi | 18:6a4db94011d3 | 499 | /** @brief Disables the specified CEC interrupt. |
sahilmgandhi | 18:6a4db94011d3 | 500 | * @param __HANDLE__: specifies the CEC Handle. |
sahilmgandhi | 18:6a4db94011d3 | 501 | * @param __INTERRUPT__: specifies the CEC interrupt to disable. |
sahilmgandhi | 18:6a4db94011d3 | 502 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 503 | * @arg CEC_IT_TXACKE: Tx Missing acknowledge Error IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 504 | * @arg CEC_IT_TXERR: Tx Error IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 505 | * @arg CEC_IT_TXUDR: Tx-Buffer Underrun IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 506 | * @arg CEC_IT_TXEND: End of transmission IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 507 | * @arg CEC_IT_TXBR: Tx-Byte Request IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 508 | * @arg CEC_IT_ARBLST: Arbitration Lost IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 509 | * @arg CEC_IT_RXACKE: Rx-Missing Acknowledge IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 510 | * @arg CEC_IT_LBPE: Rx Long period Error IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 511 | * @arg CEC_IT_SBPE: Rx Short period Error IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 512 | * @arg CEC_IT_BRE: Rx Bit Rising Error IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 513 | * @arg CEC_IT_RXOVR: Rx Overrun IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 514 | * @arg CEC_IT_RXEND: End Of Reception IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 515 | * @arg CEC_IT_RXBR: Rx-Byte Received IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 516 | * @retval none |
sahilmgandhi | 18:6a4db94011d3 | 517 | */ |
sahilmgandhi | 18:6a4db94011d3 | 518 | #define __HAL_CEC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__))) |
sahilmgandhi | 18:6a4db94011d3 | 519 | |
sahilmgandhi | 18:6a4db94011d3 | 520 | /** @brief Checks whether or not the specified CEC interrupt is enabled. |
sahilmgandhi | 18:6a4db94011d3 | 521 | * @param __HANDLE__: specifies the CEC Handle. |
sahilmgandhi | 18:6a4db94011d3 | 522 | * @param __INTERRUPT__: specifies the CEC interrupt to check. |
sahilmgandhi | 18:6a4db94011d3 | 523 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 524 | * @arg CEC_IT_TXACKE: Tx Missing acknowledge Error IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 525 | * @arg CEC_IT_TXERR: Tx Error IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 526 | * @arg CEC_IT_TXUDR: Tx-Buffer Underrun IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 527 | * @arg CEC_IT_TXEND: End of transmission IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 528 | * @arg CEC_IT_TXBR: Tx-Byte Request IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 529 | * @arg CEC_IT_ARBLST: Arbitration Lost IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 530 | * @arg CEC_IT_RXACKE: Rx-Missing Acknowledge IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 531 | * @arg CEC_IT_LBPE: Rx Long period Error IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 532 | * @arg CEC_IT_SBPE: Rx Short period Error IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 533 | * @arg CEC_IT_BRE: Rx Bit Rising Error IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 534 | * @arg CEC_IT_RXOVR: Rx Overrun IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 535 | * @arg CEC_IT_RXEND: End Of Reception IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 536 | * @arg CEC_IT_RXBR: Rx-Byte Received IT Enable |
sahilmgandhi | 18:6a4db94011d3 | 537 | * @retval FlagStatus |
sahilmgandhi | 18:6a4db94011d3 | 538 | */ |
sahilmgandhi | 18:6a4db94011d3 | 539 | #define __HAL_CEC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER & (__INTERRUPT__)) |
sahilmgandhi | 18:6a4db94011d3 | 540 | |
sahilmgandhi | 18:6a4db94011d3 | 541 | /** @brief Enables the CEC device |
sahilmgandhi | 18:6a4db94011d3 | 542 | * @param __HANDLE__: specifies the CEC Handle. |
sahilmgandhi | 18:6a4db94011d3 | 543 | * @retval none |
sahilmgandhi | 18:6a4db94011d3 | 544 | */ |
sahilmgandhi | 18:6a4db94011d3 | 545 | #define __HAL_CEC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_CECEN) |
sahilmgandhi | 18:6a4db94011d3 | 546 | |
sahilmgandhi | 18:6a4db94011d3 | 547 | /** @brief Disables the CEC device |
sahilmgandhi | 18:6a4db94011d3 | 548 | * @param __HANDLE__: specifies the CEC Handle. |
sahilmgandhi | 18:6a4db94011d3 | 549 | * @retval none |
sahilmgandhi | 18:6a4db94011d3 | 550 | */ |
sahilmgandhi | 18:6a4db94011d3 | 551 | #define __HAL_CEC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~CEC_CR_CECEN) |
sahilmgandhi | 18:6a4db94011d3 | 552 | |
sahilmgandhi | 18:6a4db94011d3 | 553 | /** @brief Set Transmission Start flag |
sahilmgandhi | 18:6a4db94011d3 | 554 | * @param __HANDLE__: specifies the CEC Handle. |
sahilmgandhi | 18:6a4db94011d3 | 555 | * @retval none |
sahilmgandhi | 18:6a4db94011d3 | 556 | */ |
sahilmgandhi | 18:6a4db94011d3 | 557 | #define __HAL_CEC_FIRST_BYTE_TX_SET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_TXSOM) |
sahilmgandhi | 18:6a4db94011d3 | 558 | |
sahilmgandhi | 18:6a4db94011d3 | 559 | /** @brief Set Transmission End flag |
sahilmgandhi | 18:6a4db94011d3 | 560 | * @param __HANDLE__: specifies the CEC Handle. |
sahilmgandhi | 18:6a4db94011d3 | 561 | * @retval none |
sahilmgandhi | 18:6a4db94011d3 | 562 | * If the CEC message consists of only one byte, TXEOM must be set before of TXSOM. |
sahilmgandhi | 18:6a4db94011d3 | 563 | */ |
sahilmgandhi | 18:6a4db94011d3 | 564 | #define __HAL_CEC_LAST_BYTE_TX_SET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CEC_CR_TXEOM) |
sahilmgandhi | 18:6a4db94011d3 | 565 | |
sahilmgandhi | 18:6a4db94011d3 | 566 | /** @brief Get Transmission Start flag |
sahilmgandhi | 18:6a4db94011d3 | 567 | * @param __HANDLE__: specifies the CEC Handle. |
sahilmgandhi | 18:6a4db94011d3 | 568 | * @retval FlagStatus |
sahilmgandhi | 18:6a4db94011d3 | 569 | */ |
sahilmgandhi | 18:6a4db94011d3 | 570 | #define __HAL_CEC_GET_TRANSMISSION_START_FLAG(__HANDLE__) ((__HANDLE__)->Instance->CR & CEC_CR_TXSOM) |
sahilmgandhi | 18:6a4db94011d3 | 571 | |
sahilmgandhi | 18:6a4db94011d3 | 572 | /** @brief Get Transmission End flag |
sahilmgandhi | 18:6a4db94011d3 | 573 | * @param __HANDLE__: specifies the CEC Handle. |
sahilmgandhi | 18:6a4db94011d3 | 574 | * @retval FlagStatus |
sahilmgandhi | 18:6a4db94011d3 | 575 | */ |
sahilmgandhi | 18:6a4db94011d3 | 576 | #define __HAL_CEC_GET_TRANSMISSION_END_FLAG(__HANDLE__) ((__HANDLE__)->Instance->CR & CEC_CR_TXEOM) |
sahilmgandhi | 18:6a4db94011d3 | 577 | |
sahilmgandhi | 18:6a4db94011d3 | 578 | /** @brief Clear OAR register |
sahilmgandhi | 18:6a4db94011d3 | 579 | * @param __HANDLE__: specifies the CEC Handle. |
sahilmgandhi | 18:6a4db94011d3 | 580 | * @retval none |
sahilmgandhi | 18:6a4db94011d3 | 581 | */ |
sahilmgandhi | 18:6a4db94011d3 | 582 | #define __HAL_CEC_CLEAR_OAR(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CFGR, CEC_CFGR_OAR) |
sahilmgandhi | 18:6a4db94011d3 | 583 | |
sahilmgandhi | 18:6a4db94011d3 | 584 | /** @brief Set OAR register (without resetting previously set address in case of multi-address mode) |
sahilmgandhi | 18:6a4db94011d3 | 585 | * To reset OAR, __HAL_CEC_CLEAR_OAR() needs to be called beforehand |
sahilmgandhi | 18:6a4db94011d3 | 586 | * @param __HANDLE__: specifies the CEC Handle. |
sahilmgandhi | 18:6a4db94011d3 | 587 | * @param __ADDRESS__: Own Address value (CEC logical address is identified by bit position) |
sahilmgandhi | 18:6a4db94011d3 | 588 | * @retval none |
sahilmgandhi | 18:6a4db94011d3 | 589 | */ |
sahilmgandhi | 18:6a4db94011d3 | 590 | #define __HAL_CEC_SET_OAR(__HANDLE__,__ADDRESS__) SET_BIT((__HANDLE__)->Instance->CFGR, (__ADDRESS__)<< CEC_CFGR_OAR_LSB_POS) |
sahilmgandhi | 18:6a4db94011d3 | 591 | |
sahilmgandhi | 18:6a4db94011d3 | 592 | /** |
sahilmgandhi | 18:6a4db94011d3 | 593 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 594 | */ |
sahilmgandhi | 18:6a4db94011d3 | 595 | |
sahilmgandhi | 18:6a4db94011d3 | 596 | /* Exported functions --------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 597 | /** @addtogroup CEC_Exported_Functions |
sahilmgandhi | 18:6a4db94011d3 | 598 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 599 | */ |
sahilmgandhi | 18:6a4db94011d3 | 600 | |
sahilmgandhi | 18:6a4db94011d3 | 601 | /** @addtogroup CEC_Exported_Functions_Group1 |
sahilmgandhi | 18:6a4db94011d3 | 602 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 603 | */ |
sahilmgandhi | 18:6a4db94011d3 | 604 | /* Initialization and de-initialization functions ****************************/ |
sahilmgandhi | 18:6a4db94011d3 | 605 | HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec); |
sahilmgandhi | 18:6a4db94011d3 | 606 | HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec); |
sahilmgandhi | 18:6a4db94011d3 | 607 | HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress); |
sahilmgandhi | 18:6a4db94011d3 | 608 | void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec); |
sahilmgandhi | 18:6a4db94011d3 | 609 | void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec); |
sahilmgandhi | 18:6a4db94011d3 | 610 | /** |
sahilmgandhi | 18:6a4db94011d3 | 611 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 612 | */ |
sahilmgandhi | 18:6a4db94011d3 | 613 | |
sahilmgandhi | 18:6a4db94011d3 | 614 | /** @addtogroup CEC_Exported_Functions_Group2 |
sahilmgandhi | 18:6a4db94011d3 | 615 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 616 | */ |
sahilmgandhi | 18:6a4db94011d3 | 617 | /* I/O operation functions ***************************************************/ |
sahilmgandhi | 18:6a4db94011d3 | 618 | HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress,uint8_t DestinationAddress, uint8_t *pData, uint32_t Size); |
sahilmgandhi | 18:6a4db94011d3 | 619 | uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec); |
sahilmgandhi | 18:6a4db94011d3 | 620 | void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t* Rxbuffer); |
sahilmgandhi | 18:6a4db94011d3 | 621 | void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec); |
sahilmgandhi | 18:6a4db94011d3 | 622 | void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec); |
sahilmgandhi | 18:6a4db94011d3 | 623 | void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize); |
sahilmgandhi | 18:6a4db94011d3 | 624 | void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec); |
sahilmgandhi | 18:6a4db94011d3 | 625 | /** |
sahilmgandhi | 18:6a4db94011d3 | 626 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 627 | */ |
sahilmgandhi | 18:6a4db94011d3 | 628 | |
sahilmgandhi | 18:6a4db94011d3 | 629 | /** @addtogroup CEC_Exported_Functions_Group3 |
sahilmgandhi | 18:6a4db94011d3 | 630 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 631 | */ |
sahilmgandhi | 18:6a4db94011d3 | 632 | /* Peripheral State functions ************************************************/ |
sahilmgandhi | 18:6a4db94011d3 | 633 | HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec); |
sahilmgandhi | 18:6a4db94011d3 | 634 | uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec); |
sahilmgandhi | 18:6a4db94011d3 | 635 | /** |
sahilmgandhi | 18:6a4db94011d3 | 636 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 637 | */ |
sahilmgandhi | 18:6a4db94011d3 | 638 | |
sahilmgandhi | 18:6a4db94011d3 | 639 | /** |
sahilmgandhi | 18:6a4db94011d3 | 640 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 641 | */ |
sahilmgandhi | 18:6a4db94011d3 | 642 | |
sahilmgandhi | 18:6a4db94011d3 | 643 | /* Private types -------------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 644 | /** @defgroup CEC_Private_Types CEC Private Types |
sahilmgandhi | 18:6a4db94011d3 | 645 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 646 | */ |
sahilmgandhi | 18:6a4db94011d3 | 647 | |
sahilmgandhi | 18:6a4db94011d3 | 648 | /** |
sahilmgandhi | 18:6a4db94011d3 | 649 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 650 | */ |
sahilmgandhi | 18:6a4db94011d3 | 651 | |
sahilmgandhi | 18:6a4db94011d3 | 652 | /* Private variables ---------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 653 | /** @defgroup CEC_Private_Variables CEC Private Variables |
sahilmgandhi | 18:6a4db94011d3 | 654 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 655 | */ |
sahilmgandhi | 18:6a4db94011d3 | 656 | |
sahilmgandhi | 18:6a4db94011d3 | 657 | /** |
sahilmgandhi | 18:6a4db94011d3 | 658 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 659 | */ |
sahilmgandhi | 18:6a4db94011d3 | 660 | |
sahilmgandhi | 18:6a4db94011d3 | 661 | /* Private constants ---------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 662 | /** @defgroup CEC_Private_Constants CEC Private Constants |
sahilmgandhi | 18:6a4db94011d3 | 663 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 664 | */ |
sahilmgandhi | 18:6a4db94011d3 | 665 | |
sahilmgandhi | 18:6a4db94011d3 | 666 | /** |
sahilmgandhi | 18:6a4db94011d3 | 667 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 668 | */ |
sahilmgandhi | 18:6a4db94011d3 | 669 | |
sahilmgandhi | 18:6a4db94011d3 | 670 | /* Private macros ------------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 671 | /** @defgroup CEC_Private_Macros CEC Private Macros |
sahilmgandhi | 18:6a4db94011d3 | 672 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 673 | */ |
sahilmgandhi | 18:6a4db94011d3 | 674 | |
sahilmgandhi | 18:6a4db94011d3 | 675 | #define IS_CEC_SIGNALFREETIME(__SFT__) ((__SFT__) <= CEC_CFGR_SFT) |
sahilmgandhi | 18:6a4db94011d3 | 676 | |
sahilmgandhi | 18:6a4db94011d3 | 677 | #define IS_CEC_TOLERANCE(__RXTOL__) (((__RXTOL__) == CEC_STANDARD_TOLERANCE) || \ |
sahilmgandhi | 18:6a4db94011d3 | 678 | ((__RXTOL__) == CEC_EXTENDED_TOLERANCE)) |
sahilmgandhi | 18:6a4db94011d3 | 679 | |
sahilmgandhi | 18:6a4db94011d3 | 680 | #define IS_CEC_BRERXSTOP(__BRERXSTOP__) (((__BRERXSTOP__) == CEC_NO_RX_STOP_ON_BRE) || \ |
sahilmgandhi | 18:6a4db94011d3 | 681 | ((__BRERXSTOP__) == CEC_RX_STOP_ON_BRE)) |
sahilmgandhi | 18:6a4db94011d3 | 682 | |
sahilmgandhi | 18:6a4db94011d3 | 683 | #define IS_CEC_BREERRORBITGEN(__ERRORBITGEN__) (((__ERRORBITGEN__) == CEC_BRE_ERRORBIT_NO_GENERATION) || \ |
sahilmgandhi | 18:6a4db94011d3 | 684 | ((__ERRORBITGEN__) == CEC_BRE_ERRORBIT_GENERATION)) |
sahilmgandhi | 18:6a4db94011d3 | 685 | |
sahilmgandhi | 18:6a4db94011d3 | 686 | #define IS_CEC_LBPEERRORBITGEN(__ERRORBITGEN__) (((__ERRORBITGEN__) == CEC_LBPE_ERRORBIT_NO_GENERATION) || \ |
sahilmgandhi | 18:6a4db94011d3 | 687 | ((__ERRORBITGEN__) == CEC_LBPE_ERRORBIT_GENERATION)) |
sahilmgandhi | 18:6a4db94011d3 | 688 | |
sahilmgandhi | 18:6a4db94011d3 | 689 | #define IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(__ERRORBITGEN__) (((__ERRORBITGEN__) == CEC_BROADCASTERROR_ERRORBIT_GENERATION) || \ |
sahilmgandhi | 18:6a4db94011d3 | 690 | ((__ERRORBITGEN__) == CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION)) |
sahilmgandhi | 18:6a4db94011d3 | 691 | |
sahilmgandhi | 18:6a4db94011d3 | 692 | #define IS_CEC_SFTOP(__SFTOP__) (((__SFTOP__) == CEC_SFT_START_ON_TXSOM) || \ |
sahilmgandhi | 18:6a4db94011d3 | 693 | ((__SFTOP__) == CEC_SFT_START_ON_TX_RX_END)) |
sahilmgandhi | 18:6a4db94011d3 | 694 | |
sahilmgandhi | 18:6a4db94011d3 | 695 | #define IS_CEC_LISTENING_MODE(__MODE__) (((__MODE__) == CEC_REDUCED_LISTENING_MODE) || \ |
sahilmgandhi | 18:6a4db94011d3 | 696 | ((__MODE__) == CEC_FULL_LISTENING_MODE)) |
sahilmgandhi | 18:6a4db94011d3 | 697 | |
sahilmgandhi | 18:6a4db94011d3 | 698 | /** @brief Check CEC message size. |
sahilmgandhi | 18:6a4db94011d3 | 699 | * The message size is the payload size: without counting the header, |
sahilmgandhi | 18:6a4db94011d3 | 700 | * it varies from 0 byte (ping operation, one header only, no payload) to |
sahilmgandhi | 18:6a4db94011d3 | 701 | * 15 bytes (1 opcode and up to 14 operands following the header). |
sahilmgandhi | 18:6a4db94011d3 | 702 | * @param __SIZE__: CEC message size. |
sahilmgandhi | 18:6a4db94011d3 | 703 | * @retval Test result (TRUE or FALSE). |
sahilmgandhi | 18:6a4db94011d3 | 704 | */ |
sahilmgandhi | 18:6a4db94011d3 | 705 | #define IS_CEC_MSGSIZE(__SIZE__) ((__SIZE__) <= 0x10) |
sahilmgandhi | 18:6a4db94011d3 | 706 | |
sahilmgandhi | 18:6a4db94011d3 | 707 | /** @brief Check CEC device Own Address Register (OAR) setting. |
sahilmgandhi | 18:6a4db94011d3 | 708 | * OAR address is written in a 15-bit field within CEC_CFGR register. |
sahilmgandhi | 18:6a4db94011d3 | 709 | * @param __ADDRESS__: CEC own address. |
sahilmgandhi | 18:6a4db94011d3 | 710 | * @retval Test result (TRUE or FALSE). |
sahilmgandhi | 18:6a4db94011d3 | 711 | */ |
sahilmgandhi | 18:6a4db94011d3 | 712 | #define IS_CEC_OWN_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0x7FFFU) |
sahilmgandhi | 18:6a4db94011d3 | 713 | |
sahilmgandhi | 18:6a4db94011d3 | 714 | /** @brief Check CEC initiator or destination logical address setting. |
sahilmgandhi | 18:6a4db94011d3 | 715 | * Initiator and destination addresses are coded over 4 bits. |
sahilmgandhi | 18:6a4db94011d3 | 716 | * @param __ADDRESS__: CEC initiator or logical address. |
sahilmgandhi | 18:6a4db94011d3 | 717 | * @retval Test result (TRUE or FALSE). |
sahilmgandhi | 18:6a4db94011d3 | 718 | */ |
sahilmgandhi | 18:6a4db94011d3 | 719 | #define IS_CEC_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0x0FU) |
sahilmgandhi | 18:6a4db94011d3 | 720 | /** |
sahilmgandhi | 18:6a4db94011d3 | 721 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 722 | */ |
sahilmgandhi | 18:6a4db94011d3 | 723 | /* Private functions ---------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 724 | /** @defgroup CEC_Private_Functions CEC Private Functions |
sahilmgandhi | 18:6a4db94011d3 | 725 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 726 | */ |
sahilmgandhi | 18:6a4db94011d3 | 727 | |
sahilmgandhi | 18:6a4db94011d3 | 728 | /** |
sahilmgandhi | 18:6a4db94011d3 | 729 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 730 | */ |
sahilmgandhi | 18:6a4db94011d3 | 731 | |
sahilmgandhi | 18:6a4db94011d3 | 732 | /** |
sahilmgandhi | 18:6a4db94011d3 | 733 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 734 | */ |
sahilmgandhi | 18:6a4db94011d3 | 735 | |
sahilmgandhi | 18:6a4db94011d3 | 736 | /** |
sahilmgandhi | 18:6a4db94011d3 | 737 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 738 | */ |
sahilmgandhi | 18:6a4db94011d3 | 739 | #endif /* STM32F446xx */ |
sahilmgandhi | 18:6a4db94011d3 | 740 | |
sahilmgandhi | 18:6a4db94011d3 | 741 | #ifdef __cplusplus |
sahilmgandhi | 18:6a4db94011d3 | 742 | } |
sahilmgandhi | 18:6a4db94011d3 | 743 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 744 | |
sahilmgandhi | 18:6a4db94011d3 | 745 | #endif /* __STM32F4xx_HAL_CEC_H */ |
sahilmgandhi | 18:6a4db94011d3 | 746 | |
sahilmgandhi | 18:6a4db94011d3 | 747 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |