MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_adc_ex.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f4xx_hal_adc_ex.c
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.5.0
sahilmgandhi 18:6a4db94011d3 6 * @date 06-May-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief This file provides firmware functions to manage the following
sahilmgandhi 18:6a4db94011d3 8 * functionalities of the ADC extension peripheral:
sahilmgandhi 18:6a4db94011d3 9 * + Extended features functions
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 @verbatim
sahilmgandhi 18:6a4db94011d3 12 ==============================================================================
sahilmgandhi 18:6a4db94011d3 13 ##### How to use this driver #####
sahilmgandhi 18:6a4db94011d3 14 ==============================================================================
sahilmgandhi 18:6a4db94011d3 15 [..]
sahilmgandhi 18:6a4db94011d3 16 (#)Initialize the ADC low level resources by implementing the HAL_ADC_MspInit():
sahilmgandhi 18:6a4db94011d3 17 (##) Enable the ADC interface clock using __HAL_RCC_ADC_CLK_ENABLE()
sahilmgandhi 18:6a4db94011d3 18 (##) ADC pins configuration
sahilmgandhi 18:6a4db94011d3 19 (+++) Enable the clock for the ADC GPIOs using the following function:
sahilmgandhi 18:6a4db94011d3 20 __HAL_RCC_GPIOx_CLK_ENABLE()
sahilmgandhi 18:6a4db94011d3 21 (+++) Configure these ADC pins in analog mode using HAL_GPIO_Init()
sahilmgandhi 18:6a4db94011d3 22 (##) In case of using interrupts (e.g. HAL_ADC_Start_IT())
sahilmgandhi 18:6a4db94011d3 23 (+++) Configure the ADC interrupt priority using HAL_NVIC_SetPriority()
sahilmgandhi 18:6a4db94011d3 24 (+++) Enable the ADC IRQ handler using HAL_NVIC_EnableIRQ()
sahilmgandhi 18:6a4db94011d3 25 (+++) In ADC IRQ handler, call HAL_ADC_IRQHandler()
sahilmgandhi 18:6a4db94011d3 26 (##) In case of using DMA to control data transfer (e.g. HAL_ADC_Start_DMA())
sahilmgandhi 18:6a4db94011d3 27 (+++) Enable the DMAx interface clock using __HAL_RCC_DMAx_CLK_ENABLE()
sahilmgandhi 18:6a4db94011d3 28 (+++) Configure and enable two DMA streams stream for managing data
sahilmgandhi 18:6a4db94011d3 29 transfer from peripheral to memory (output stream)
sahilmgandhi 18:6a4db94011d3 30 (+++) Associate the initialized DMA handle to the ADC DMA handle
sahilmgandhi 18:6a4db94011d3 31 using __HAL_LINKDMA()
sahilmgandhi 18:6a4db94011d3 32 (+++) Configure the priority and enable the NVIC for the transfer complete
sahilmgandhi 18:6a4db94011d3 33 interrupt on the two DMA Streams. The output stream should have higher
sahilmgandhi 18:6a4db94011d3 34 priority than the input stream.
sahilmgandhi 18:6a4db94011d3 35 (#) Configure the ADC Prescaler, conversion resolution and data alignment
sahilmgandhi 18:6a4db94011d3 36 using the HAL_ADC_Init() function.
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 (#) Configure the ADC Injected channels group features, use HAL_ADC_Init()
sahilmgandhi 18:6a4db94011d3 39 and HAL_ADC_ConfigChannel() functions.
sahilmgandhi 18:6a4db94011d3 40
sahilmgandhi 18:6a4db94011d3 41 (#) Three operation modes are available within this driver :
sahilmgandhi 18:6a4db94011d3 42
sahilmgandhi 18:6a4db94011d3 43 *** Polling mode IO operation ***
sahilmgandhi 18:6a4db94011d3 44 =================================
sahilmgandhi 18:6a4db94011d3 45 [..]
sahilmgandhi 18:6a4db94011d3 46 (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart()
sahilmgandhi 18:6a4db94011d3 47 (+) Wait for end of conversion using HAL_ADC_PollForConversion(), at this stage
sahilmgandhi 18:6a4db94011d3 48 user can specify the value of timeout according to his end application
sahilmgandhi 18:6a4db94011d3 49 (+) To read the ADC converted values, use the HAL_ADCEx_InjectedGetValue() function.
sahilmgandhi 18:6a4db94011d3 50 (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop()
sahilmgandhi 18:6a4db94011d3 51
sahilmgandhi 18:6a4db94011d3 52 *** Interrupt mode IO operation ***
sahilmgandhi 18:6a4db94011d3 53 ===================================
sahilmgandhi 18:6a4db94011d3 54 [..]
sahilmgandhi 18:6a4db94011d3 55 (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_IT()
sahilmgandhi 18:6a4db94011d3 56 (+) Use HAL_ADC_IRQHandler() called under ADC_IRQHandler() Interrupt subroutine
sahilmgandhi 18:6a4db94011d3 57 (+) At ADC end of conversion HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can
sahilmgandhi 18:6a4db94011d3 58 add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback
sahilmgandhi 18:6a4db94011d3 59 (+) In case of ADC Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can
sahilmgandhi 18:6a4db94011d3 60 add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback
sahilmgandhi 18:6a4db94011d3 61 (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_IT()
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63
sahilmgandhi 18:6a4db94011d3 64 *** DMA mode IO operation ***
sahilmgandhi 18:6a4db94011d3 65 ==============================
sahilmgandhi 18:6a4db94011d3 66 [..]
sahilmgandhi 18:6a4db94011d3 67 (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_DMA(), at this stage the user specify the length
sahilmgandhi 18:6a4db94011d3 68 of data to be transferred at each end of conversion
sahilmgandhi 18:6a4db94011d3 69 (+) At The end of data transfer ba HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can
sahilmgandhi 18:6a4db94011d3 70 add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback
sahilmgandhi 18:6a4db94011d3 71 (+) In case of transfer Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can
sahilmgandhi 18:6a4db94011d3 72 add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback
sahilmgandhi 18:6a4db94011d3 73 (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_DMA()
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 *** Multi mode ADCs Regular channels configuration ***
sahilmgandhi 18:6a4db94011d3 76 ======================================================
sahilmgandhi 18:6a4db94011d3 77 [..]
sahilmgandhi 18:6a4db94011d3 78 (+) Select the Multi mode ADC regular channels features (dual or triple mode)
sahilmgandhi 18:6a4db94011d3 79 and configure the DMA mode using HAL_ADCEx_MultiModeConfigChannel() functions.
sahilmgandhi 18:6a4db94011d3 80 (+) Start the ADC peripheral using HAL_ADCEx_MultiModeStart_DMA(), at this stage the user specify the length
sahilmgandhi 18:6a4db94011d3 81 of data to be transferred at each end of conversion
sahilmgandhi 18:6a4db94011d3 82 (+) Read the ADCs converted values using the HAL_ADCEx_MultiModeGetValue() function.
sahilmgandhi 18:6a4db94011d3 83
sahilmgandhi 18:6a4db94011d3 84
sahilmgandhi 18:6a4db94011d3 85 @endverbatim
sahilmgandhi 18:6a4db94011d3 86 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 87 * @attention
sahilmgandhi 18:6a4db94011d3 88 *
sahilmgandhi 18:6a4db94011d3 89 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 90 *
sahilmgandhi 18:6a4db94011d3 91 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 92 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 93 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 94 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 95 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 96 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 97 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 98 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 99 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 100 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 101 *
sahilmgandhi 18:6a4db94011d3 102 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 103 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 104 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 105 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 106 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 107 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 108 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 109 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 110 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 111 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 112 *
sahilmgandhi 18:6a4db94011d3 113 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 114 */
sahilmgandhi 18:6a4db94011d3 115
sahilmgandhi 18:6a4db94011d3 116 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 117 #include "stm32f4xx_hal.h"
sahilmgandhi 18:6a4db94011d3 118
sahilmgandhi 18:6a4db94011d3 119 /** @addtogroup STM32F4xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 120 * @{
sahilmgandhi 18:6a4db94011d3 121 */
sahilmgandhi 18:6a4db94011d3 122
sahilmgandhi 18:6a4db94011d3 123 /** @defgroup ADCEx ADCEx
sahilmgandhi 18:6a4db94011d3 124 * @brief ADC Extended driver modules
sahilmgandhi 18:6a4db94011d3 125 * @{
sahilmgandhi 18:6a4db94011d3 126 */
sahilmgandhi 18:6a4db94011d3 127
sahilmgandhi 18:6a4db94011d3 128 #ifdef HAL_ADC_MODULE_ENABLED
sahilmgandhi 18:6a4db94011d3 129
sahilmgandhi 18:6a4db94011d3 130 /* Private typedef -----------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 131 /* Private define ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 132 /* Private macro -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 133 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 134 /** @addtogroup ADCEx_Private_Functions
sahilmgandhi 18:6a4db94011d3 135 * @{
sahilmgandhi 18:6a4db94011d3 136 */
sahilmgandhi 18:6a4db94011d3 137 /* Private function prototypes -----------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 138 static void ADC_MultiModeDMAConvCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi 18:6a4db94011d3 139 static void ADC_MultiModeDMAError(DMA_HandleTypeDef *hdma);
sahilmgandhi 18:6a4db94011d3 140 static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi 18:6a4db94011d3 141 /**
sahilmgandhi 18:6a4db94011d3 142 * @}
sahilmgandhi 18:6a4db94011d3 143 */
sahilmgandhi 18:6a4db94011d3 144
sahilmgandhi 18:6a4db94011d3 145 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 146 /** @defgroup ADCEx_Exported_Functions ADC Exported Functions
sahilmgandhi 18:6a4db94011d3 147 * @{
sahilmgandhi 18:6a4db94011d3 148 */
sahilmgandhi 18:6a4db94011d3 149
sahilmgandhi 18:6a4db94011d3 150 /** @defgroup ADCEx_Exported_Functions_Group1 Extended features functions
sahilmgandhi 18:6a4db94011d3 151 * @brief Extended features functions
sahilmgandhi 18:6a4db94011d3 152 *
sahilmgandhi 18:6a4db94011d3 153 @verbatim
sahilmgandhi 18:6a4db94011d3 154 ===============================================================================
sahilmgandhi 18:6a4db94011d3 155 ##### Extended features functions #####
sahilmgandhi 18:6a4db94011d3 156 ===============================================================================
sahilmgandhi 18:6a4db94011d3 157 [..] This section provides functions allowing to:
sahilmgandhi 18:6a4db94011d3 158 (+) Start conversion of injected channel.
sahilmgandhi 18:6a4db94011d3 159 (+) Stop conversion of injected channel.
sahilmgandhi 18:6a4db94011d3 160 (+) Start multimode and enable DMA transfer.
sahilmgandhi 18:6a4db94011d3 161 (+) Stop multimode and disable DMA transfer.
sahilmgandhi 18:6a4db94011d3 162 (+) Get result of injected channel conversion.
sahilmgandhi 18:6a4db94011d3 163 (+) Get result of multimode conversion.
sahilmgandhi 18:6a4db94011d3 164 (+) Configure injected channels.
sahilmgandhi 18:6a4db94011d3 165 (+) Configure multimode.
sahilmgandhi 18:6a4db94011d3 166
sahilmgandhi 18:6a4db94011d3 167 @endverbatim
sahilmgandhi 18:6a4db94011d3 168 * @{
sahilmgandhi 18:6a4db94011d3 169 */
sahilmgandhi 18:6a4db94011d3 170
sahilmgandhi 18:6a4db94011d3 171 /**
sahilmgandhi 18:6a4db94011d3 172 * @brief Enables the selected ADC software start conversion of the injected channels.
sahilmgandhi 18:6a4db94011d3 173 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 174 * the configuration information for the specified ADC.
sahilmgandhi 18:6a4db94011d3 175 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 176 */
sahilmgandhi 18:6a4db94011d3 177 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc)
sahilmgandhi 18:6a4db94011d3 178 {
sahilmgandhi 18:6a4db94011d3 179 __IO uint32_t counter = 0U;
sahilmgandhi 18:6a4db94011d3 180 uint32_t tmp1 = 0U, tmp2 = 0U;
sahilmgandhi 18:6a4db94011d3 181
sahilmgandhi 18:6a4db94011d3 182 /* Process locked */
sahilmgandhi 18:6a4db94011d3 183 __HAL_LOCK(hadc);
sahilmgandhi 18:6a4db94011d3 184
sahilmgandhi 18:6a4db94011d3 185 /* Enable the ADC peripheral */
sahilmgandhi 18:6a4db94011d3 186
sahilmgandhi 18:6a4db94011d3 187 /* Check if ADC peripheral is disabled in order to enable it and wait during
sahilmgandhi 18:6a4db94011d3 188 Tstab time the ADC's stabilization */
sahilmgandhi 18:6a4db94011d3 189 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
sahilmgandhi 18:6a4db94011d3 190 {
sahilmgandhi 18:6a4db94011d3 191 /* Enable the Peripheral */
sahilmgandhi 18:6a4db94011d3 192 __HAL_ADC_ENABLE(hadc);
sahilmgandhi 18:6a4db94011d3 193
sahilmgandhi 18:6a4db94011d3 194 /* Delay for ADC stabilization time */
sahilmgandhi 18:6a4db94011d3 195 /* Compute number of CPU cycles to wait for */
sahilmgandhi 18:6a4db94011d3 196 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
sahilmgandhi 18:6a4db94011d3 197 while(counter != 0U)
sahilmgandhi 18:6a4db94011d3 198 {
sahilmgandhi 18:6a4db94011d3 199 counter--;
sahilmgandhi 18:6a4db94011d3 200 }
sahilmgandhi 18:6a4db94011d3 201 }
sahilmgandhi 18:6a4db94011d3 202
sahilmgandhi 18:6a4db94011d3 203 /* Start conversion if ADC is effectively enabled */
sahilmgandhi 18:6a4db94011d3 204 if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
sahilmgandhi 18:6a4db94011d3 205 {
sahilmgandhi 18:6a4db94011d3 206 /* Set ADC state */
sahilmgandhi 18:6a4db94011d3 207 /* - Clear state bitfield related to injected group conversion results */
sahilmgandhi 18:6a4db94011d3 208 /* - Set state bitfield related to injected operation */
sahilmgandhi 18:6a4db94011d3 209 ADC_STATE_CLR_SET(hadc->State,
sahilmgandhi 18:6a4db94011d3 210 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
sahilmgandhi 18:6a4db94011d3 211 HAL_ADC_STATE_INJ_BUSY);
sahilmgandhi 18:6a4db94011d3 212
sahilmgandhi 18:6a4db94011d3 213 /* Check if a regular conversion is ongoing */
sahilmgandhi 18:6a4db94011d3 214 /* Note: On this device, there is no ADC error code fields related to */
sahilmgandhi 18:6a4db94011d3 215 /* conversions on group injected only. In case of conversion on */
sahilmgandhi 18:6a4db94011d3 216 /* going on group regular, no error code is reset. */
sahilmgandhi 18:6a4db94011d3 217 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
sahilmgandhi 18:6a4db94011d3 218 {
sahilmgandhi 18:6a4db94011d3 219 /* Reset ADC all error code fields */
sahilmgandhi 18:6a4db94011d3 220 ADC_CLEAR_ERRORCODE(hadc);
sahilmgandhi 18:6a4db94011d3 221 }
sahilmgandhi 18:6a4db94011d3 222
sahilmgandhi 18:6a4db94011d3 223 /* Process unlocked */
sahilmgandhi 18:6a4db94011d3 224 /* Unlock before starting ADC conversions: in case of potential */
sahilmgandhi 18:6a4db94011d3 225 /* interruption, to let the process to ADC IRQ Handler. */
sahilmgandhi 18:6a4db94011d3 226 __HAL_UNLOCK(hadc);
sahilmgandhi 18:6a4db94011d3 227
sahilmgandhi 18:6a4db94011d3 228 /* Clear injected group conversion flag */
sahilmgandhi 18:6a4db94011d3 229 /* (To ensure of no unknown state from potential previous ADC operations) */
sahilmgandhi 18:6a4db94011d3 230 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
sahilmgandhi 18:6a4db94011d3 231
sahilmgandhi 18:6a4db94011d3 232 /* Check if Multimode enabled */
sahilmgandhi 18:6a4db94011d3 233 if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
sahilmgandhi 18:6a4db94011d3 234 {
sahilmgandhi 18:6a4db94011d3 235 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
sahilmgandhi 18:6a4db94011d3 236 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
sahilmgandhi 18:6a4db94011d3 237 if(tmp1 && tmp2)
sahilmgandhi 18:6a4db94011d3 238 {
sahilmgandhi 18:6a4db94011d3 239 /* Enable the selected ADC software conversion for injected group */
sahilmgandhi 18:6a4db94011d3 240 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
sahilmgandhi 18:6a4db94011d3 241 }
sahilmgandhi 18:6a4db94011d3 242 }
sahilmgandhi 18:6a4db94011d3 243 else
sahilmgandhi 18:6a4db94011d3 244 {
sahilmgandhi 18:6a4db94011d3 245 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
sahilmgandhi 18:6a4db94011d3 246 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
sahilmgandhi 18:6a4db94011d3 247 if((hadc->Instance == ADC1) && tmp1 && tmp2)
sahilmgandhi 18:6a4db94011d3 248 {
sahilmgandhi 18:6a4db94011d3 249 /* Enable the selected ADC software conversion for injected group */
sahilmgandhi 18:6a4db94011d3 250 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
sahilmgandhi 18:6a4db94011d3 251 }
sahilmgandhi 18:6a4db94011d3 252 }
sahilmgandhi 18:6a4db94011d3 253 }
sahilmgandhi 18:6a4db94011d3 254
sahilmgandhi 18:6a4db94011d3 255 /* Return function status */
sahilmgandhi 18:6a4db94011d3 256 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 257 }
sahilmgandhi 18:6a4db94011d3 258
sahilmgandhi 18:6a4db94011d3 259 /**
sahilmgandhi 18:6a4db94011d3 260 * @brief Enables the interrupt and starts ADC conversion of injected channels.
sahilmgandhi 18:6a4db94011d3 261 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 262 * the configuration information for the specified ADC.
sahilmgandhi 18:6a4db94011d3 263 *
sahilmgandhi 18:6a4db94011d3 264 * @retval HAL status.
sahilmgandhi 18:6a4db94011d3 265 */
sahilmgandhi 18:6a4db94011d3 266 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc)
sahilmgandhi 18:6a4db94011d3 267 {
sahilmgandhi 18:6a4db94011d3 268 __IO uint32_t counter = 0U;
sahilmgandhi 18:6a4db94011d3 269 uint32_t tmp1 = 0U, tmp2 = 0U;
sahilmgandhi 18:6a4db94011d3 270
sahilmgandhi 18:6a4db94011d3 271 /* Process locked */
sahilmgandhi 18:6a4db94011d3 272 __HAL_LOCK(hadc);
sahilmgandhi 18:6a4db94011d3 273
sahilmgandhi 18:6a4db94011d3 274 /* Enable the ADC peripheral */
sahilmgandhi 18:6a4db94011d3 275
sahilmgandhi 18:6a4db94011d3 276 /* Check if ADC peripheral is disabled in order to enable it and wait during
sahilmgandhi 18:6a4db94011d3 277 Tstab time the ADC's stabilization */
sahilmgandhi 18:6a4db94011d3 278 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
sahilmgandhi 18:6a4db94011d3 279 {
sahilmgandhi 18:6a4db94011d3 280 /* Enable the Peripheral */
sahilmgandhi 18:6a4db94011d3 281 __HAL_ADC_ENABLE(hadc);
sahilmgandhi 18:6a4db94011d3 282
sahilmgandhi 18:6a4db94011d3 283 /* Delay for ADC stabilization time */
sahilmgandhi 18:6a4db94011d3 284 /* Compute number of CPU cycles to wait for */
sahilmgandhi 18:6a4db94011d3 285 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
sahilmgandhi 18:6a4db94011d3 286 while(counter != 0U)
sahilmgandhi 18:6a4db94011d3 287 {
sahilmgandhi 18:6a4db94011d3 288 counter--;
sahilmgandhi 18:6a4db94011d3 289 }
sahilmgandhi 18:6a4db94011d3 290 }
sahilmgandhi 18:6a4db94011d3 291
sahilmgandhi 18:6a4db94011d3 292 /* Start conversion if ADC is effectively enabled */
sahilmgandhi 18:6a4db94011d3 293 if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
sahilmgandhi 18:6a4db94011d3 294 {
sahilmgandhi 18:6a4db94011d3 295 /* Set ADC state */
sahilmgandhi 18:6a4db94011d3 296 /* - Clear state bitfield related to injected group conversion results */
sahilmgandhi 18:6a4db94011d3 297 /* - Set state bitfield related to injected operation */
sahilmgandhi 18:6a4db94011d3 298 ADC_STATE_CLR_SET(hadc->State,
sahilmgandhi 18:6a4db94011d3 299 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
sahilmgandhi 18:6a4db94011d3 300 HAL_ADC_STATE_INJ_BUSY);
sahilmgandhi 18:6a4db94011d3 301
sahilmgandhi 18:6a4db94011d3 302 /* Check if a regular conversion is ongoing */
sahilmgandhi 18:6a4db94011d3 303 /* Note: On this device, there is no ADC error code fields related to */
sahilmgandhi 18:6a4db94011d3 304 /* conversions on group injected only. In case of conversion on */
sahilmgandhi 18:6a4db94011d3 305 /* going on group regular, no error code is reset. */
sahilmgandhi 18:6a4db94011d3 306 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
sahilmgandhi 18:6a4db94011d3 307 {
sahilmgandhi 18:6a4db94011d3 308 /* Reset ADC all error code fields */
sahilmgandhi 18:6a4db94011d3 309 ADC_CLEAR_ERRORCODE(hadc);
sahilmgandhi 18:6a4db94011d3 310 }
sahilmgandhi 18:6a4db94011d3 311
sahilmgandhi 18:6a4db94011d3 312 /* Process unlocked */
sahilmgandhi 18:6a4db94011d3 313 /* Unlock before starting ADC conversions: in case of potential */
sahilmgandhi 18:6a4db94011d3 314 /* interruption, to let the process to ADC IRQ Handler. */
sahilmgandhi 18:6a4db94011d3 315 __HAL_UNLOCK(hadc);
sahilmgandhi 18:6a4db94011d3 316
sahilmgandhi 18:6a4db94011d3 317 /* Clear injected group conversion flag */
sahilmgandhi 18:6a4db94011d3 318 /* (To ensure of no unknown state from potential previous ADC operations) */
sahilmgandhi 18:6a4db94011d3 319 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
sahilmgandhi 18:6a4db94011d3 320
sahilmgandhi 18:6a4db94011d3 321 /* Enable end of conversion interrupt for injected channels */
sahilmgandhi 18:6a4db94011d3 322 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
sahilmgandhi 18:6a4db94011d3 323
sahilmgandhi 18:6a4db94011d3 324 /* Check if Multimode enabled */
sahilmgandhi 18:6a4db94011d3 325 if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
sahilmgandhi 18:6a4db94011d3 326 {
sahilmgandhi 18:6a4db94011d3 327 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
sahilmgandhi 18:6a4db94011d3 328 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
sahilmgandhi 18:6a4db94011d3 329 if(tmp1 && tmp2)
sahilmgandhi 18:6a4db94011d3 330 {
sahilmgandhi 18:6a4db94011d3 331 /* Enable the selected ADC software conversion for injected group */
sahilmgandhi 18:6a4db94011d3 332 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
sahilmgandhi 18:6a4db94011d3 333 }
sahilmgandhi 18:6a4db94011d3 334 }
sahilmgandhi 18:6a4db94011d3 335 else
sahilmgandhi 18:6a4db94011d3 336 {
sahilmgandhi 18:6a4db94011d3 337 tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
sahilmgandhi 18:6a4db94011d3 338 tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
sahilmgandhi 18:6a4db94011d3 339 if((hadc->Instance == ADC1) && tmp1 && tmp2)
sahilmgandhi 18:6a4db94011d3 340 {
sahilmgandhi 18:6a4db94011d3 341 /* Enable the selected ADC software conversion for injected group */
sahilmgandhi 18:6a4db94011d3 342 hadc->Instance->CR2 |= ADC_CR2_JSWSTART;
sahilmgandhi 18:6a4db94011d3 343 }
sahilmgandhi 18:6a4db94011d3 344 }
sahilmgandhi 18:6a4db94011d3 345 }
sahilmgandhi 18:6a4db94011d3 346
sahilmgandhi 18:6a4db94011d3 347 /* Return function status */
sahilmgandhi 18:6a4db94011d3 348 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 349 }
sahilmgandhi 18:6a4db94011d3 350
sahilmgandhi 18:6a4db94011d3 351 /**
sahilmgandhi 18:6a4db94011d3 352 * @brief Stop conversion of injected channels. Disable ADC peripheral if
sahilmgandhi 18:6a4db94011d3 353 * no regular conversion is on going.
sahilmgandhi 18:6a4db94011d3 354 * @note If ADC must be disabled and if conversion is on going on
sahilmgandhi 18:6a4db94011d3 355 * regular group, function HAL_ADC_Stop must be used to stop both
sahilmgandhi 18:6a4db94011d3 356 * injected and regular groups, and disable the ADC.
sahilmgandhi 18:6a4db94011d3 357 * @note If injected group mode auto-injection is enabled,
sahilmgandhi 18:6a4db94011d3 358 * function HAL_ADC_Stop must be used.
sahilmgandhi 18:6a4db94011d3 359 * @note In case of auto-injection mode, HAL_ADC_Stop must be used.
sahilmgandhi 18:6a4db94011d3 360 * @param hadc: ADC handle
sahilmgandhi 18:6a4db94011d3 361 * @retval None
sahilmgandhi 18:6a4db94011d3 362 */
sahilmgandhi 18:6a4db94011d3 363 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc)
sahilmgandhi 18:6a4db94011d3 364 {
sahilmgandhi 18:6a4db94011d3 365 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
sahilmgandhi 18:6a4db94011d3 366
sahilmgandhi 18:6a4db94011d3 367 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 368 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
sahilmgandhi 18:6a4db94011d3 369
sahilmgandhi 18:6a4db94011d3 370 /* Process locked */
sahilmgandhi 18:6a4db94011d3 371 __HAL_LOCK(hadc);
sahilmgandhi 18:6a4db94011d3 372
sahilmgandhi 18:6a4db94011d3 373 /* Stop potential conversion and disable ADC peripheral */
sahilmgandhi 18:6a4db94011d3 374 /* Conditioned to: */
sahilmgandhi 18:6a4db94011d3 375 /* - No conversion on the other group (regular group) is intended to */
sahilmgandhi 18:6a4db94011d3 376 /* continue (injected and regular groups stop conversion and ADC disable */
sahilmgandhi 18:6a4db94011d3 377 /* are common) */
sahilmgandhi 18:6a4db94011d3 378 /* - In case of auto-injection mode, HAL_ADC_Stop must be used. */
sahilmgandhi 18:6a4db94011d3 379 if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET) &&
sahilmgandhi 18:6a4db94011d3 380 HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
sahilmgandhi 18:6a4db94011d3 381 {
sahilmgandhi 18:6a4db94011d3 382 /* Stop potential conversion on going, on regular and injected groups */
sahilmgandhi 18:6a4db94011d3 383 /* Disable ADC peripheral */
sahilmgandhi 18:6a4db94011d3 384 __HAL_ADC_DISABLE(hadc);
sahilmgandhi 18:6a4db94011d3 385
sahilmgandhi 18:6a4db94011d3 386 /* Check if ADC is effectively disabled */
sahilmgandhi 18:6a4db94011d3 387 if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
sahilmgandhi 18:6a4db94011d3 388 {
sahilmgandhi 18:6a4db94011d3 389 /* Set ADC state */
sahilmgandhi 18:6a4db94011d3 390 ADC_STATE_CLR_SET(hadc->State,
sahilmgandhi 18:6a4db94011d3 391 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
sahilmgandhi 18:6a4db94011d3 392 HAL_ADC_STATE_READY);
sahilmgandhi 18:6a4db94011d3 393 }
sahilmgandhi 18:6a4db94011d3 394 }
sahilmgandhi 18:6a4db94011d3 395 else
sahilmgandhi 18:6a4db94011d3 396 {
sahilmgandhi 18:6a4db94011d3 397 /* Update ADC state machine to error */
sahilmgandhi 18:6a4db94011d3 398 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
sahilmgandhi 18:6a4db94011d3 399
sahilmgandhi 18:6a4db94011d3 400 tmp_hal_status = HAL_ERROR;
sahilmgandhi 18:6a4db94011d3 401 }
sahilmgandhi 18:6a4db94011d3 402
sahilmgandhi 18:6a4db94011d3 403 /* Process unlocked */
sahilmgandhi 18:6a4db94011d3 404 __HAL_UNLOCK(hadc);
sahilmgandhi 18:6a4db94011d3 405
sahilmgandhi 18:6a4db94011d3 406 /* Return function status */
sahilmgandhi 18:6a4db94011d3 407 return tmp_hal_status;
sahilmgandhi 18:6a4db94011d3 408 }
sahilmgandhi 18:6a4db94011d3 409
sahilmgandhi 18:6a4db94011d3 410 /**
sahilmgandhi 18:6a4db94011d3 411 * @brief Poll for injected conversion complete
sahilmgandhi 18:6a4db94011d3 412 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 413 * the configuration information for the specified ADC.
sahilmgandhi 18:6a4db94011d3 414 * @param Timeout: Timeout value in millisecond.
sahilmgandhi 18:6a4db94011d3 415 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 416 */
sahilmgandhi 18:6a4db94011d3 417 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout)
sahilmgandhi 18:6a4db94011d3 418 {
sahilmgandhi 18:6a4db94011d3 419 uint32_t tickstart = 0U;
sahilmgandhi 18:6a4db94011d3 420
sahilmgandhi 18:6a4db94011d3 421 /* Get tick */
sahilmgandhi 18:6a4db94011d3 422 tickstart = HAL_GetTick();
sahilmgandhi 18:6a4db94011d3 423
sahilmgandhi 18:6a4db94011d3 424 /* Check End of conversion flag */
sahilmgandhi 18:6a4db94011d3 425 while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC)))
sahilmgandhi 18:6a4db94011d3 426 {
sahilmgandhi 18:6a4db94011d3 427 /* Check for the Timeout */
sahilmgandhi 18:6a4db94011d3 428 if(Timeout != HAL_MAX_DELAY)
sahilmgandhi 18:6a4db94011d3 429 {
sahilmgandhi 18:6a4db94011d3 430 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
sahilmgandhi 18:6a4db94011d3 431 {
sahilmgandhi 18:6a4db94011d3 432 hadc->State= HAL_ADC_STATE_TIMEOUT;
sahilmgandhi 18:6a4db94011d3 433 /* Process unlocked */
sahilmgandhi 18:6a4db94011d3 434 __HAL_UNLOCK(hadc);
sahilmgandhi 18:6a4db94011d3 435 return HAL_TIMEOUT;
sahilmgandhi 18:6a4db94011d3 436 }
sahilmgandhi 18:6a4db94011d3 437 }
sahilmgandhi 18:6a4db94011d3 438 }
sahilmgandhi 18:6a4db94011d3 439
sahilmgandhi 18:6a4db94011d3 440 /* Clear injected group conversion flag */
sahilmgandhi 18:6a4db94011d3 441 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JSTRT | ADC_FLAG_JEOC);
sahilmgandhi 18:6a4db94011d3 442
sahilmgandhi 18:6a4db94011d3 443 /* Update ADC state machine */
sahilmgandhi 18:6a4db94011d3 444 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
sahilmgandhi 18:6a4db94011d3 445
sahilmgandhi 18:6a4db94011d3 446 /* Determine whether any further conversion upcoming on group injected */
sahilmgandhi 18:6a4db94011d3 447 /* by external trigger, continuous mode or scan sequence on going. */
sahilmgandhi 18:6a4db94011d3 448 /* Note: On STM32F4, there is no independent flag of end of sequence. */
sahilmgandhi 18:6a4db94011d3 449 /* The test of scan sequence on going is done either with scan */
sahilmgandhi 18:6a4db94011d3 450 /* sequence disabled or with end of conversion flag set to */
sahilmgandhi 18:6a4db94011d3 451 /* of end of sequence. */
sahilmgandhi 18:6a4db94011d3 452 if(ADC_IS_SOFTWARE_START_INJECTED(hadc) &&
sahilmgandhi 18:6a4db94011d3 453 (HAL_IS_BIT_CLR(hadc->Instance->JSQR, ADC_JSQR_JL) ||
sahilmgandhi 18:6a4db94011d3 454 HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) &&
sahilmgandhi 18:6a4db94011d3 455 (HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) &&
sahilmgandhi 18:6a4db94011d3 456 (ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
sahilmgandhi 18:6a4db94011d3 457 (hadc->Init.ContinuousConvMode == DISABLE) ) ) )
sahilmgandhi 18:6a4db94011d3 458 {
sahilmgandhi 18:6a4db94011d3 459 /* Set ADC state */
sahilmgandhi 18:6a4db94011d3 460 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
sahilmgandhi 18:6a4db94011d3 461
sahilmgandhi 18:6a4db94011d3 462 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_REG_BUSY))
sahilmgandhi 18:6a4db94011d3 463 {
sahilmgandhi 18:6a4db94011d3 464 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
sahilmgandhi 18:6a4db94011d3 465 }
sahilmgandhi 18:6a4db94011d3 466 }
sahilmgandhi 18:6a4db94011d3 467
sahilmgandhi 18:6a4db94011d3 468 /* Return ADC state */
sahilmgandhi 18:6a4db94011d3 469 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 470 }
sahilmgandhi 18:6a4db94011d3 471
sahilmgandhi 18:6a4db94011d3 472 /**
sahilmgandhi 18:6a4db94011d3 473 * @brief Stop conversion of injected channels, disable interruption of
sahilmgandhi 18:6a4db94011d3 474 * end-of-conversion. Disable ADC peripheral if no regular conversion
sahilmgandhi 18:6a4db94011d3 475 * is on going.
sahilmgandhi 18:6a4db94011d3 476 * @note If ADC must be disabled and if conversion is on going on
sahilmgandhi 18:6a4db94011d3 477 * regular group, function HAL_ADC_Stop must be used to stop both
sahilmgandhi 18:6a4db94011d3 478 * injected and regular groups, and disable the ADC.
sahilmgandhi 18:6a4db94011d3 479 * @note If injected group mode auto-injection is enabled,
sahilmgandhi 18:6a4db94011d3 480 * function HAL_ADC_Stop must be used.
sahilmgandhi 18:6a4db94011d3 481 * @param hadc: ADC handle
sahilmgandhi 18:6a4db94011d3 482 * @retval None
sahilmgandhi 18:6a4db94011d3 483 */
sahilmgandhi 18:6a4db94011d3 484 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc)
sahilmgandhi 18:6a4db94011d3 485 {
sahilmgandhi 18:6a4db94011d3 486 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
sahilmgandhi 18:6a4db94011d3 487
sahilmgandhi 18:6a4db94011d3 488 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 489 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
sahilmgandhi 18:6a4db94011d3 490
sahilmgandhi 18:6a4db94011d3 491 /* Process locked */
sahilmgandhi 18:6a4db94011d3 492 __HAL_LOCK(hadc);
sahilmgandhi 18:6a4db94011d3 493
sahilmgandhi 18:6a4db94011d3 494 /* Stop potential conversion and disable ADC peripheral */
sahilmgandhi 18:6a4db94011d3 495 /* Conditioned to: */
sahilmgandhi 18:6a4db94011d3 496 /* - No conversion on the other group (regular group) is intended to */
sahilmgandhi 18:6a4db94011d3 497 /* continue (injected and regular groups stop conversion and ADC disable */
sahilmgandhi 18:6a4db94011d3 498 /* are common) */
sahilmgandhi 18:6a4db94011d3 499 /* - In case of auto-injection mode, HAL_ADC_Stop must be used. */
sahilmgandhi 18:6a4db94011d3 500 if(((hadc->State & HAL_ADC_STATE_REG_BUSY) == RESET) &&
sahilmgandhi 18:6a4db94011d3 501 HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
sahilmgandhi 18:6a4db94011d3 502 {
sahilmgandhi 18:6a4db94011d3 503 /* Stop potential conversion on going, on regular and injected groups */
sahilmgandhi 18:6a4db94011d3 504 /* Disable ADC peripheral */
sahilmgandhi 18:6a4db94011d3 505 __HAL_ADC_DISABLE(hadc);
sahilmgandhi 18:6a4db94011d3 506
sahilmgandhi 18:6a4db94011d3 507 /* Check if ADC is effectively disabled */
sahilmgandhi 18:6a4db94011d3 508 if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
sahilmgandhi 18:6a4db94011d3 509 {
sahilmgandhi 18:6a4db94011d3 510 /* Disable ADC end of conversion interrupt for injected channels */
sahilmgandhi 18:6a4db94011d3 511 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
sahilmgandhi 18:6a4db94011d3 512
sahilmgandhi 18:6a4db94011d3 513 /* Set ADC state */
sahilmgandhi 18:6a4db94011d3 514 ADC_STATE_CLR_SET(hadc->State,
sahilmgandhi 18:6a4db94011d3 515 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
sahilmgandhi 18:6a4db94011d3 516 HAL_ADC_STATE_READY);
sahilmgandhi 18:6a4db94011d3 517 }
sahilmgandhi 18:6a4db94011d3 518 }
sahilmgandhi 18:6a4db94011d3 519 else
sahilmgandhi 18:6a4db94011d3 520 {
sahilmgandhi 18:6a4db94011d3 521 /* Update ADC state machine to error */
sahilmgandhi 18:6a4db94011d3 522 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
sahilmgandhi 18:6a4db94011d3 523
sahilmgandhi 18:6a4db94011d3 524 tmp_hal_status = HAL_ERROR;
sahilmgandhi 18:6a4db94011d3 525 }
sahilmgandhi 18:6a4db94011d3 526
sahilmgandhi 18:6a4db94011d3 527 /* Process unlocked */
sahilmgandhi 18:6a4db94011d3 528 __HAL_UNLOCK(hadc);
sahilmgandhi 18:6a4db94011d3 529
sahilmgandhi 18:6a4db94011d3 530 /* Return function status */
sahilmgandhi 18:6a4db94011d3 531 return tmp_hal_status;
sahilmgandhi 18:6a4db94011d3 532 }
sahilmgandhi 18:6a4db94011d3 533
sahilmgandhi 18:6a4db94011d3 534 /**
sahilmgandhi 18:6a4db94011d3 535 * @brief Gets the converted value from data register of injected channel.
sahilmgandhi 18:6a4db94011d3 536 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 537 * the configuration information for the specified ADC.
sahilmgandhi 18:6a4db94011d3 538 * @param InjectedRank: the ADC injected rank.
sahilmgandhi 18:6a4db94011d3 539 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 540 * @arg ADC_INJECTED_RANK_1: Injected Channel1 selected
sahilmgandhi 18:6a4db94011d3 541 * @arg ADC_INJECTED_RANK_2: Injected Channel2 selected
sahilmgandhi 18:6a4db94011d3 542 * @arg ADC_INJECTED_RANK_3: Injected Channel3 selected
sahilmgandhi 18:6a4db94011d3 543 * @arg ADC_INJECTED_RANK_4: Injected Channel4 selected
sahilmgandhi 18:6a4db94011d3 544 * @retval None
sahilmgandhi 18:6a4db94011d3 545 */
sahilmgandhi 18:6a4db94011d3 546 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank)
sahilmgandhi 18:6a4db94011d3 547 {
sahilmgandhi 18:6a4db94011d3 548 __IO uint32_t tmp = 0U;
sahilmgandhi 18:6a4db94011d3 549
sahilmgandhi 18:6a4db94011d3 550 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 551 assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
sahilmgandhi 18:6a4db94011d3 552
sahilmgandhi 18:6a4db94011d3 553 /* Clear injected group conversion flag to have similar behaviour as */
sahilmgandhi 18:6a4db94011d3 554 /* regular group: reading data register also clears end of conversion flag. */
sahilmgandhi 18:6a4db94011d3 555 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
sahilmgandhi 18:6a4db94011d3 556
sahilmgandhi 18:6a4db94011d3 557 /* Return the selected ADC converted value */
sahilmgandhi 18:6a4db94011d3 558 switch(InjectedRank)
sahilmgandhi 18:6a4db94011d3 559 {
sahilmgandhi 18:6a4db94011d3 560 case ADC_INJECTED_RANK_4:
sahilmgandhi 18:6a4db94011d3 561 {
sahilmgandhi 18:6a4db94011d3 562 tmp = hadc->Instance->JDR4;
sahilmgandhi 18:6a4db94011d3 563 }
sahilmgandhi 18:6a4db94011d3 564 break;
sahilmgandhi 18:6a4db94011d3 565 case ADC_INJECTED_RANK_3:
sahilmgandhi 18:6a4db94011d3 566 {
sahilmgandhi 18:6a4db94011d3 567 tmp = hadc->Instance->JDR3;
sahilmgandhi 18:6a4db94011d3 568 }
sahilmgandhi 18:6a4db94011d3 569 break;
sahilmgandhi 18:6a4db94011d3 570 case ADC_INJECTED_RANK_2:
sahilmgandhi 18:6a4db94011d3 571 {
sahilmgandhi 18:6a4db94011d3 572 tmp = hadc->Instance->JDR2;
sahilmgandhi 18:6a4db94011d3 573 }
sahilmgandhi 18:6a4db94011d3 574 break;
sahilmgandhi 18:6a4db94011d3 575 case ADC_INJECTED_RANK_1:
sahilmgandhi 18:6a4db94011d3 576 {
sahilmgandhi 18:6a4db94011d3 577 tmp = hadc->Instance->JDR1;
sahilmgandhi 18:6a4db94011d3 578 }
sahilmgandhi 18:6a4db94011d3 579 break;
sahilmgandhi 18:6a4db94011d3 580 default:
sahilmgandhi 18:6a4db94011d3 581 break;
sahilmgandhi 18:6a4db94011d3 582 }
sahilmgandhi 18:6a4db94011d3 583 return tmp;
sahilmgandhi 18:6a4db94011d3 584 }
sahilmgandhi 18:6a4db94011d3 585
sahilmgandhi 18:6a4db94011d3 586 /**
sahilmgandhi 18:6a4db94011d3 587 * @brief Enables ADC DMA request after last transfer (Multi-ADC mode) and enables ADC peripheral
sahilmgandhi 18:6a4db94011d3 588 *
sahilmgandhi 18:6a4db94011d3 589 * @note Caution: This function must be used only with the ADC master.
sahilmgandhi 18:6a4db94011d3 590 *
sahilmgandhi 18:6a4db94011d3 591 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 592 * the configuration information for the specified ADC.
sahilmgandhi 18:6a4db94011d3 593 * @param pData: Pointer to buffer in which transferred from ADC peripheral to memory will be stored.
sahilmgandhi 18:6a4db94011d3 594 * @param Length: The length of data to be transferred from ADC peripheral to memory.
sahilmgandhi 18:6a4db94011d3 595 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 596 */
sahilmgandhi 18:6a4db94011d3 597 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
sahilmgandhi 18:6a4db94011d3 598 {
sahilmgandhi 18:6a4db94011d3 599 __IO uint32_t counter = 0U;
sahilmgandhi 18:6a4db94011d3 600
sahilmgandhi 18:6a4db94011d3 601 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 602 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
sahilmgandhi 18:6a4db94011d3 603 assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
sahilmgandhi 18:6a4db94011d3 604 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
sahilmgandhi 18:6a4db94011d3 605
sahilmgandhi 18:6a4db94011d3 606 /* Process locked */
sahilmgandhi 18:6a4db94011d3 607 __HAL_LOCK(hadc);
sahilmgandhi 18:6a4db94011d3 608
sahilmgandhi 18:6a4db94011d3 609 /* Check if ADC peripheral is disabled in order to enable it and wait during
sahilmgandhi 18:6a4db94011d3 610 Tstab time the ADC's stabilization */
sahilmgandhi 18:6a4db94011d3 611 if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
sahilmgandhi 18:6a4db94011d3 612 {
sahilmgandhi 18:6a4db94011d3 613 /* Enable the Peripheral */
sahilmgandhi 18:6a4db94011d3 614 __HAL_ADC_ENABLE(hadc);
sahilmgandhi 18:6a4db94011d3 615
sahilmgandhi 18:6a4db94011d3 616 /* Delay for temperature sensor stabilization time */
sahilmgandhi 18:6a4db94011d3 617 /* Compute number of CPU cycles to wait for */
sahilmgandhi 18:6a4db94011d3 618 counter = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
sahilmgandhi 18:6a4db94011d3 619 while(counter != 0U)
sahilmgandhi 18:6a4db94011d3 620 {
sahilmgandhi 18:6a4db94011d3 621 counter--;
sahilmgandhi 18:6a4db94011d3 622 }
sahilmgandhi 18:6a4db94011d3 623 }
sahilmgandhi 18:6a4db94011d3 624
sahilmgandhi 18:6a4db94011d3 625 /* Start conversion if ADC is effectively enabled */
sahilmgandhi 18:6a4db94011d3 626 if(HAL_IS_BIT_SET(hadc->Instance->CR2, ADC_CR2_ADON))
sahilmgandhi 18:6a4db94011d3 627 {
sahilmgandhi 18:6a4db94011d3 628 /* Set ADC state */
sahilmgandhi 18:6a4db94011d3 629 /* - Clear state bitfield related to regular group conversion results */
sahilmgandhi 18:6a4db94011d3 630 /* - Set state bitfield related to regular group operation */
sahilmgandhi 18:6a4db94011d3 631 ADC_STATE_CLR_SET(hadc->State,
sahilmgandhi 18:6a4db94011d3 632 HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR,
sahilmgandhi 18:6a4db94011d3 633 HAL_ADC_STATE_REG_BUSY);
sahilmgandhi 18:6a4db94011d3 634
sahilmgandhi 18:6a4db94011d3 635 /* If conversions on group regular are also triggering group injected, */
sahilmgandhi 18:6a4db94011d3 636 /* update ADC state. */
sahilmgandhi 18:6a4db94011d3 637 if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
sahilmgandhi 18:6a4db94011d3 638 {
sahilmgandhi 18:6a4db94011d3 639 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
sahilmgandhi 18:6a4db94011d3 640 }
sahilmgandhi 18:6a4db94011d3 641
sahilmgandhi 18:6a4db94011d3 642 /* State machine update: Check if an injected conversion is ongoing */
sahilmgandhi 18:6a4db94011d3 643 if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
sahilmgandhi 18:6a4db94011d3 644 {
sahilmgandhi 18:6a4db94011d3 645 /* Reset ADC error code fields related to conversions on group regular */
sahilmgandhi 18:6a4db94011d3 646 CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));
sahilmgandhi 18:6a4db94011d3 647 }
sahilmgandhi 18:6a4db94011d3 648 else
sahilmgandhi 18:6a4db94011d3 649 {
sahilmgandhi 18:6a4db94011d3 650 /* Reset ADC all error code fields */
sahilmgandhi 18:6a4db94011d3 651 ADC_CLEAR_ERRORCODE(hadc);
sahilmgandhi 18:6a4db94011d3 652 }
sahilmgandhi 18:6a4db94011d3 653
sahilmgandhi 18:6a4db94011d3 654 /* Process unlocked */
sahilmgandhi 18:6a4db94011d3 655 /* Unlock before starting ADC conversions: in case of potential */
sahilmgandhi 18:6a4db94011d3 656 /* interruption, to let the process to ADC IRQ Handler. */
sahilmgandhi 18:6a4db94011d3 657 __HAL_UNLOCK(hadc);
sahilmgandhi 18:6a4db94011d3 658
sahilmgandhi 18:6a4db94011d3 659 /* Set the DMA transfer complete callback */
sahilmgandhi 18:6a4db94011d3 660 hadc->DMA_Handle->XferCpltCallback = ADC_MultiModeDMAConvCplt;
sahilmgandhi 18:6a4db94011d3 661
sahilmgandhi 18:6a4db94011d3 662 /* Set the DMA half transfer complete callback */
sahilmgandhi 18:6a4db94011d3 663 hadc->DMA_Handle->XferHalfCpltCallback = ADC_MultiModeDMAHalfConvCplt;
sahilmgandhi 18:6a4db94011d3 664
sahilmgandhi 18:6a4db94011d3 665 /* Set the DMA error callback */
sahilmgandhi 18:6a4db94011d3 666 hadc->DMA_Handle->XferErrorCallback = ADC_MultiModeDMAError ;
sahilmgandhi 18:6a4db94011d3 667
sahilmgandhi 18:6a4db94011d3 668 /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
sahilmgandhi 18:6a4db94011d3 669 /* start (in case of SW start): */
sahilmgandhi 18:6a4db94011d3 670
sahilmgandhi 18:6a4db94011d3 671 /* Clear regular group conversion flag and overrun flag */
sahilmgandhi 18:6a4db94011d3 672 /* (To ensure of no unknown state from potential previous ADC operations) */
sahilmgandhi 18:6a4db94011d3 673 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
sahilmgandhi 18:6a4db94011d3 674
sahilmgandhi 18:6a4db94011d3 675 /* Enable ADC overrun interrupt */
sahilmgandhi 18:6a4db94011d3 676 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
sahilmgandhi 18:6a4db94011d3 677
sahilmgandhi 18:6a4db94011d3 678 if (hadc->Init.DMAContinuousRequests != DISABLE)
sahilmgandhi 18:6a4db94011d3 679 {
sahilmgandhi 18:6a4db94011d3 680 /* Enable the selected ADC DMA request after last transfer */
sahilmgandhi 18:6a4db94011d3 681 ADC->CCR |= ADC_CCR_DDS;
sahilmgandhi 18:6a4db94011d3 682 }
sahilmgandhi 18:6a4db94011d3 683 else
sahilmgandhi 18:6a4db94011d3 684 {
sahilmgandhi 18:6a4db94011d3 685 /* Disable the selected ADC EOC rising on each regular channel conversion */
sahilmgandhi 18:6a4db94011d3 686 ADC->CCR &= ~ADC_CCR_DDS;
sahilmgandhi 18:6a4db94011d3 687 }
sahilmgandhi 18:6a4db94011d3 688
sahilmgandhi 18:6a4db94011d3 689 /* Enable the DMA Stream */
sahilmgandhi 18:6a4db94011d3 690 HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&ADC->CDR, (uint32_t)pData, Length);
sahilmgandhi 18:6a4db94011d3 691
sahilmgandhi 18:6a4db94011d3 692 /* if no external trigger present enable software conversion of regular channels */
sahilmgandhi 18:6a4db94011d3 693 if((hadc->Instance->CR2 & ADC_CR2_EXTEN) == RESET)
sahilmgandhi 18:6a4db94011d3 694 {
sahilmgandhi 18:6a4db94011d3 695 /* Enable the selected ADC software conversion for regular group */
sahilmgandhi 18:6a4db94011d3 696 hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART;
sahilmgandhi 18:6a4db94011d3 697 }
sahilmgandhi 18:6a4db94011d3 698 }
sahilmgandhi 18:6a4db94011d3 699
sahilmgandhi 18:6a4db94011d3 700 /* Return function status */
sahilmgandhi 18:6a4db94011d3 701 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 702 }
sahilmgandhi 18:6a4db94011d3 703
sahilmgandhi 18:6a4db94011d3 704 /**
sahilmgandhi 18:6a4db94011d3 705 * @brief Disables ADC DMA (multi-ADC mode) and disables ADC peripheral
sahilmgandhi 18:6a4db94011d3 706 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 707 * the configuration information for the specified ADC.
sahilmgandhi 18:6a4db94011d3 708 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 709 */
sahilmgandhi 18:6a4db94011d3 710 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc)
sahilmgandhi 18:6a4db94011d3 711 {
sahilmgandhi 18:6a4db94011d3 712 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
sahilmgandhi 18:6a4db94011d3 713
sahilmgandhi 18:6a4db94011d3 714 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 715 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
sahilmgandhi 18:6a4db94011d3 716
sahilmgandhi 18:6a4db94011d3 717 /* Process locked */
sahilmgandhi 18:6a4db94011d3 718 __HAL_LOCK(hadc);
sahilmgandhi 18:6a4db94011d3 719
sahilmgandhi 18:6a4db94011d3 720 /* Stop potential conversion on going, on regular and injected groups */
sahilmgandhi 18:6a4db94011d3 721 /* Disable ADC peripheral */
sahilmgandhi 18:6a4db94011d3 722 __HAL_ADC_DISABLE(hadc);
sahilmgandhi 18:6a4db94011d3 723
sahilmgandhi 18:6a4db94011d3 724 /* Check if ADC is effectively disabled */
sahilmgandhi 18:6a4db94011d3 725 if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
sahilmgandhi 18:6a4db94011d3 726 {
sahilmgandhi 18:6a4db94011d3 727 /* Disable the selected ADC DMA mode for multimode */
sahilmgandhi 18:6a4db94011d3 728 ADC->CCR &= ~ADC_CCR_DDS;
sahilmgandhi 18:6a4db94011d3 729
sahilmgandhi 18:6a4db94011d3 730 /* Disable the DMA channel (in case of DMA in circular mode or stop while */
sahilmgandhi 18:6a4db94011d3 731 /* DMA transfer is on going) */
sahilmgandhi 18:6a4db94011d3 732 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
sahilmgandhi 18:6a4db94011d3 733
sahilmgandhi 18:6a4db94011d3 734 /* Disable ADC overrun interrupt */
sahilmgandhi 18:6a4db94011d3 735 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
sahilmgandhi 18:6a4db94011d3 736
sahilmgandhi 18:6a4db94011d3 737 /* Set ADC state */
sahilmgandhi 18:6a4db94011d3 738 ADC_STATE_CLR_SET(hadc->State,
sahilmgandhi 18:6a4db94011d3 739 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
sahilmgandhi 18:6a4db94011d3 740 HAL_ADC_STATE_READY);
sahilmgandhi 18:6a4db94011d3 741 }
sahilmgandhi 18:6a4db94011d3 742
sahilmgandhi 18:6a4db94011d3 743 /* Process unlocked */
sahilmgandhi 18:6a4db94011d3 744 __HAL_UNLOCK(hadc);
sahilmgandhi 18:6a4db94011d3 745
sahilmgandhi 18:6a4db94011d3 746 /* Return function status */
sahilmgandhi 18:6a4db94011d3 747 return tmp_hal_status;
sahilmgandhi 18:6a4db94011d3 748 }
sahilmgandhi 18:6a4db94011d3 749
sahilmgandhi 18:6a4db94011d3 750 /**
sahilmgandhi 18:6a4db94011d3 751 * @brief Returns the last ADC1, ADC2 and ADC3 regular conversions results
sahilmgandhi 18:6a4db94011d3 752 * data in the selected multi mode.
sahilmgandhi 18:6a4db94011d3 753 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 754 * the configuration information for the specified ADC.
sahilmgandhi 18:6a4db94011d3 755 * @retval The converted data value.
sahilmgandhi 18:6a4db94011d3 756 */
sahilmgandhi 18:6a4db94011d3 757 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc)
sahilmgandhi 18:6a4db94011d3 758 {
sahilmgandhi 18:6a4db94011d3 759 /* Return the multi mode conversion value */
sahilmgandhi 18:6a4db94011d3 760 return ADC->CDR;
sahilmgandhi 18:6a4db94011d3 761 }
sahilmgandhi 18:6a4db94011d3 762
sahilmgandhi 18:6a4db94011d3 763 /**
sahilmgandhi 18:6a4db94011d3 764 * @brief Injected conversion complete callback in non blocking mode
sahilmgandhi 18:6a4db94011d3 765 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 766 * the configuration information for the specified ADC.
sahilmgandhi 18:6a4db94011d3 767 * @retval None
sahilmgandhi 18:6a4db94011d3 768 */
sahilmgandhi 18:6a4db94011d3 769 __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
sahilmgandhi 18:6a4db94011d3 770 {
sahilmgandhi 18:6a4db94011d3 771 /* Prevent unused argument(s) compilation warning */
sahilmgandhi 18:6a4db94011d3 772 UNUSED(hadc);
sahilmgandhi 18:6a4db94011d3 773 /* NOTE : This function Should not be modified, when the callback is needed,
sahilmgandhi 18:6a4db94011d3 774 the HAL_ADC_InjectedConvCpltCallback could be implemented in the user file
sahilmgandhi 18:6a4db94011d3 775 */
sahilmgandhi 18:6a4db94011d3 776 }
sahilmgandhi 18:6a4db94011d3 777
sahilmgandhi 18:6a4db94011d3 778 /**
sahilmgandhi 18:6a4db94011d3 779 * @brief Configures for the selected ADC injected channel its corresponding
sahilmgandhi 18:6a4db94011d3 780 * rank in the sequencer and its sample time.
sahilmgandhi 18:6a4db94011d3 781 * @param hadc: pointer to a ADC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 782 * the configuration information for the specified ADC.
sahilmgandhi 18:6a4db94011d3 783 * @param sConfigInjected: ADC configuration structure for injected channel.
sahilmgandhi 18:6a4db94011d3 784 * @retval None
sahilmgandhi 18:6a4db94011d3 785 */
sahilmgandhi 18:6a4db94011d3 786 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected)
sahilmgandhi 18:6a4db94011d3 787 {
sahilmgandhi 18:6a4db94011d3 788
sahilmgandhi 18:6a4db94011d3 789 #ifdef USE_FULL_ASSERT
sahilmgandhi 18:6a4db94011d3 790 uint32_t tmp = 0U;
sahilmgandhi 18:6a4db94011d3 791 #endif /* USE_FULL_ASSERT */
sahilmgandhi 18:6a4db94011d3 792
sahilmgandhi 18:6a4db94011d3 793 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 794 assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel));
sahilmgandhi 18:6a4db94011d3 795 assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
sahilmgandhi 18:6a4db94011d3 796 assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
sahilmgandhi 18:6a4db94011d3 797 assert_param(IS_ADC_EXT_INJEC_TRIG(sConfigInjected->ExternalTrigInjecConv));
sahilmgandhi 18:6a4db94011d3 798 assert_param(IS_ADC_INJECTED_LENGTH(sConfigInjected->InjectedNbrOfConversion));
sahilmgandhi 18:6a4db94011d3 799 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
sahilmgandhi 18:6a4db94011d3 800 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
sahilmgandhi 18:6a4db94011d3 801
sahilmgandhi 18:6a4db94011d3 802 #ifdef USE_FULL_ASSERT
sahilmgandhi 18:6a4db94011d3 803 tmp = ADC_GET_RESOLUTION(hadc);
sahilmgandhi 18:6a4db94011d3 804 assert_param(IS_ADC_RANGE(tmp, sConfigInjected->InjectedOffset));
sahilmgandhi 18:6a4db94011d3 805 #endif /* USE_FULL_ASSERT */
sahilmgandhi 18:6a4db94011d3 806
sahilmgandhi 18:6a4db94011d3 807 if(sConfigInjected->ExternalTrigInjecConvEdge != ADC_INJECTED_SOFTWARE_START)
sahilmgandhi 18:6a4db94011d3 808 {
sahilmgandhi 18:6a4db94011d3 809 assert_param(IS_ADC_EXT_INJEC_TRIG_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
sahilmgandhi 18:6a4db94011d3 810 }
sahilmgandhi 18:6a4db94011d3 811
sahilmgandhi 18:6a4db94011d3 812 /* Process locked */
sahilmgandhi 18:6a4db94011d3 813 __HAL_LOCK(hadc);
sahilmgandhi 18:6a4db94011d3 814
sahilmgandhi 18:6a4db94011d3 815 /* if ADC_Channel_10 ... ADC_Channel_18 is selected */
sahilmgandhi 18:6a4db94011d3 816 if (sConfigInjected->InjectedChannel > ADC_CHANNEL_9)
sahilmgandhi 18:6a4db94011d3 817 {
sahilmgandhi 18:6a4db94011d3 818 /* Clear the old sample time */
sahilmgandhi 18:6a4db94011d3 819 hadc->Instance->SMPR1 &= ~ADC_SMPR1(ADC_SMPR1_SMP10, sConfigInjected->InjectedChannel);
sahilmgandhi 18:6a4db94011d3 820
sahilmgandhi 18:6a4db94011d3 821 /* Set the new sample time */
sahilmgandhi 18:6a4db94011d3 822 hadc->Instance->SMPR1 |= ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
sahilmgandhi 18:6a4db94011d3 823 }
sahilmgandhi 18:6a4db94011d3 824 else /* ADC_Channel include in ADC_Channel_[0..9] */
sahilmgandhi 18:6a4db94011d3 825 {
sahilmgandhi 18:6a4db94011d3 826 /* Clear the old sample time */
sahilmgandhi 18:6a4db94011d3 827 hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfigInjected->InjectedChannel);
sahilmgandhi 18:6a4db94011d3 828
sahilmgandhi 18:6a4db94011d3 829 /* Set the new sample time */
sahilmgandhi 18:6a4db94011d3 830 hadc->Instance->SMPR2 |= ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel);
sahilmgandhi 18:6a4db94011d3 831 }
sahilmgandhi 18:6a4db94011d3 832
sahilmgandhi 18:6a4db94011d3 833 /*---------------------------- ADCx JSQR Configuration -----------------*/
sahilmgandhi 18:6a4db94011d3 834 hadc->Instance->JSQR &= ~(ADC_JSQR_JL);
sahilmgandhi 18:6a4db94011d3 835 hadc->Instance->JSQR |= ADC_SQR1(sConfigInjected->InjectedNbrOfConversion);
sahilmgandhi 18:6a4db94011d3 836
sahilmgandhi 18:6a4db94011d3 837 /* Rank configuration */
sahilmgandhi 18:6a4db94011d3 838
sahilmgandhi 18:6a4db94011d3 839 /* Clear the old SQx bits for the selected rank */
sahilmgandhi 18:6a4db94011d3 840 hadc->Instance->JSQR &= ~ADC_JSQR(ADC_JSQR_JSQ1, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion);
sahilmgandhi 18:6a4db94011d3 841
sahilmgandhi 18:6a4db94011d3 842 /* Set the SQx bits for the selected rank */
sahilmgandhi 18:6a4db94011d3 843 hadc->Instance->JSQR |= ADC_JSQR(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion);
sahilmgandhi 18:6a4db94011d3 844
sahilmgandhi 18:6a4db94011d3 845 /* Enable external trigger if trigger selection is different of software */
sahilmgandhi 18:6a4db94011d3 846 /* start. */
sahilmgandhi 18:6a4db94011d3 847 /* Note: This configuration keeps the hardware feature of parameter */
sahilmgandhi 18:6a4db94011d3 848 /* ExternalTrigConvEdge "trigger edge none" equivalent to */
sahilmgandhi 18:6a4db94011d3 849 /* software start. */
sahilmgandhi 18:6a4db94011d3 850 if(sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
sahilmgandhi 18:6a4db94011d3 851 {
sahilmgandhi 18:6a4db94011d3 852 /* Select external trigger to start conversion */
sahilmgandhi 18:6a4db94011d3 853 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL);
sahilmgandhi 18:6a4db94011d3 854 hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConv;
sahilmgandhi 18:6a4db94011d3 855
sahilmgandhi 18:6a4db94011d3 856 /* Select external trigger polarity */
sahilmgandhi 18:6a4db94011d3 857 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN);
sahilmgandhi 18:6a4db94011d3 858 hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConvEdge;
sahilmgandhi 18:6a4db94011d3 859 }
sahilmgandhi 18:6a4db94011d3 860 else
sahilmgandhi 18:6a4db94011d3 861 {
sahilmgandhi 18:6a4db94011d3 862 /* Reset the external trigger */
sahilmgandhi 18:6a4db94011d3 863 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL);
sahilmgandhi 18:6a4db94011d3 864 hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN);
sahilmgandhi 18:6a4db94011d3 865 }
sahilmgandhi 18:6a4db94011d3 866
sahilmgandhi 18:6a4db94011d3 867 if (sConfigInjected->AutoInjectedConv != DISABLE)
sahilmgandhi 18:6a4db94011d3 868 {
sahilmgandhi 18:6a4db94011d3 869 /* Enable the selected ADC automatic injected group conversion */
sahilmgandhi 18:6a4db94011d3 870 hadc->Instance->CR1 |= ADC_CR1_JAUTO;
sahilmgandhi 18:6a4db94011d3 871 }
sahilmgandhi 18:6a4db94011d3 872 else
sahilmgandhi 18:6a4db94011d3 873 {
sahilmgandhi 18:6a4db94011d3 874 /* Disable the selected ADC automatic injected group conversion */
sahilmgandhi 18:6a4db94011d3 875 hadc->Instance->CR1 &= ~(ADC_CR1_JAUTO);
sahilmgandhi 18:6a4db94011d3 876 }
sahilmgandhi 18:6a4db94011d3 877
sahilmgandhi 18:6a4db94011d3 878 if (sConfigInjected->InjectedDiscontinuousConvMode != DISABLE)
sahilmgandhi 18:6a4db94011d3 879 {
sahilmgandhi 18:6a4db94011d3 880 /* Enable the selected ADC injected discontinuous mode */
sahilmgandhi 18:6a4db94011d3 881 hadc->Instance->CR1 |= ADC_CR1_JDISCEN;
sahilmgandhi 18:6a4db94011d3 882 }
sahilmgandhi 18:6a4db94011d3 883 else
sahilmgandhi 18:6a4db94011d3 884 {
sahilmgandhi 18:6a4db94011d3 885 /* Disable the selected ADC injected discontinuous mode */
sahilmgandhi 18:6a4db94011d3 886 hadc->Instance->CR1 &= ~(ADC_CR1_JDISCEN);
sahilmgandhi 18:6a4db94011d3 887 }
sahilmgandhi 18:6a4db94011d3 888
sahilmgandhi 18:6a4db94011d3 889 switch(sConfigInjected->InjectedRank)
sahilmgandhi 18:6a4db94011d3 890 {
sahilmgandhi 18:6a4db94011d3 891 case 1U:
sahilmgandhi 18:6a4db94011d3 892 /* Set injected channel 1 offset */
sahilmgandhi 18:6a4db94011d3 893 hadc->Instance->JOFR1 &= ~(ADC_JOFR1_JOFFSET1);
sahilmgandhi 18:6a4db94011d3 894 hadc->Instance->JOFR1 |= sConfigInjected->InjectedOffset;
sahilmgandhi 18:6a4db94011d3 895 break;
sahilmgandhi 18:6a4db94011d3 896 case 2U:
sahilmgandhi 18:6a4db94011d3 897 /* Set injected channel 2 offset */
sahilmgandhi 18:6a4db94011d3 898 hadc->Instance->JOFR2 &= ~(ADC_JOFR2_JOFFSET2);
sahilmgandhi 18:6a4db94011d3 899 hadc->Instance->JOFR2 |= sConfigInjected->InjectedOffset;
sahilmgandhi 18:6a4db94011d3 900 break;
sahilmgandhi 18:6a4db94011d3 901 case 3U:
sahilmgandhi 18:6a4db94011d3 902 /* Set injected channel 3 offset */
sahilmgandhi 18:6a4db94011d3 903 hadc->Instance->JOFR3 &= ~(ADC_JOFR3_JOFFSET3);
sahilmgandhi 18:6a4db94011d3 904 hadc->Instance->JOFR3 |= sConfigInjected->InjectedOffset;
sahilmgandhi 18:6a4db94011d3 905 break;
sahilmgandhi 18:6a4db94011d3 906 default:
sahilmgandhi 18:6a4db94011d3 907 /* Set injected channel 4 offset */
sahilmgandhi 18:6a4db94011d3 908 hadc->Instance->JOFR4 &= ~(ADC_JOFR4_JOFFSET4);
sahilmgandhi 18:6a4db94011d3 909 hadc->Instance->JOFR4 |= sConfigInjected->InjectedOffset;
sahilmgandhi 18:6a4db94011d3 910 break;
sahilmgandhi 18:6a4db94011d3 911 }
sahilmgandhi 18:6a4db94011d3 912
sahilmgandhi 18:6a4db94011d3 913 /* if ADC1 Channel_18 is selected enable VBAT Channel */
sahilmgandhi 18:6a4db94011d3 914 if ((hadc->Instance == ADC1) && (sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT))
sahilmgandhi 18:6a4db94011d3 915 {
sahilmgandhi 18:6a4db94011d3 916 /* Enable the VBAT channel*/
sahilmgandhi 18:6a4db94011d3 917 ADC->CCR |= ADC_CCR_VBATE;
sahilmgandhi 18:6a4db94011d3 918 }
sahilmgandhi 18:6a4db94011d3 919
sahilmgandhi 18:6a4db94011d3 920 /* if ADC1 Channel_16 or Channel_17 is selected enable TSVREFE Channel(Temperature sensor and VREFINT) */
sahilmgandhi 18:6a4db94011d3 921 if ((hadc->Instance == ADC1) && ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) || (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)))
sahilmgandhi 18:6a4db94011d3 922 {
sahilmgandhi 18:6a4db94011d3 923 /* Enable the TSVREFE channel*/
sahilmgandhi 18:6a4db94011d3 924 ADC->CCR |= ADC_CCR_TSVREFE;
sahilmgandhi 18:6a4db94011d3 925 }
sahilmgandhi 18:6a4db94011d3 926
sahilmgandhi 18:6a4db94011d3 927 /* Process unlocked */
sahilmgandhi 18:6a4db94011d3 928 __HAL_UNLOCK(hadc);
sahilmgandhi 18:6a4db94011d3 929
sahilmgandhi 18:6a4db94011d3 930 /* Return function status */
sahilmgandhi 18:6a4db94011d3 931 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 932 }
sahilmgandhi 18:6a4db94011d3 933
sahilmgandhi 18:6a4db94011d3 934 /**
sahilmgandhi 18:6a4db94011d3 935 * @brief Configures the ADC multi-mode
sahilmgandhi 18:6a4db94011d3 936 * @param hadc : pointer to a ADC_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 937 * the configuration information for the specified ADC.
sahilmgandhi 18:6a4db94011d3 938 * @param multimode : pointer to an ADC_MultiModeTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 939 * the configuration information for multimode.
sahilmgandhi 18:6a4db94011d3 940 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 941 */
sahilmgandhi 18:6a4db94011d3 942 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode)
sahilmgandhi 18:6a4db94011d3 943 {
sahilmgandhi 18:6a4db94011d3 944 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 945 assert_param(IS_ADC_MODE(multimode->Mode));
sahilmgandhi 18:6a4db94011d3 946 assert_param(IS_ADC_DMA_ACCESS_MODE(multimode->DMAAccessMode));
sahilmgandhi 18:6a4db94011d3 947 assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay));
sahilmgandhi 18:6a4db94011d3 948
sahilmgandhi 18:6a4db94011d3 949 /* Process locked */
sahilmgandhi 18:6a4db94011d3 950 __HAL_LOCK(hadc);
sahilmgandhi 18:6a4db94011d3 951
sahilmgandhi 18:6a4db94011d3 952 /* Set ADC mode */
sahilmgandhi 18:6a4db94011d3 953 ADC->CCR &= ~(ADC_CCR_MULTI);
sahilmgandhi 18:6a4db94011d3 954 ADC->CCR |= multimode->Mode;
sahilmgandhi 18:6a4db94011d3 955
sahilmgandhi 18:6a4db94011d3 956 /* Set the ADC DMA access mode */
sahilmgandhi 18:6a4db94011d3 957 ADC->CCR &= ~(ADC_CCR_DMA);
sahilmgandhi 18:6a4db94011d3 958 ADC->CCR |= multimode->DMAAccessMode;
sahilmgandhi 18:6a4db94011d3 959
sahilmgandhi 18:6a4db94011d3 960 /* Set delay between two sampling phases */
sahilmgandhi 18:6a4db94011d3 961 ADC->CCR &= ~(ADC_CCR_DELAY);
sahilmgandhi 18:6a4db94011d3 962 ADC->CCR |= multimode->TwoSamplingDelay;
sahilmgandhi 18:6a4db94011d3 963
sahilmgandhi 18:6a4db94011d3 964 /* Process unlocked */
sahilmgandhi 18:6a4db94011d3 965 __HAL_UNLOCK(hadc);
sahilmgandhi 18:6a4db94011d3 966
sahilmgandhi 18:6a4db94011d3 967 /* Return function status */
sahilmgandhi 18:6a4db94011d3 968 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 969 }
sahilmgandhi 18:6a4db94011d3 970
sahilmgandhi 18:6a4db94011d3 971 /**
sahilmgandhi 18:6a4db94011d3 972 * @}
sahilmgandhi 18:6a4db94011d3 973 */
sahilmgandhi 18:6a4db94011d3 974
sahilmgandhi 18:6a4db94011d3 975 /**
sahilmgandhi 18:6a4db94011d3 976 * @brief DMA transfer complete callback.
sahilmgandhi 18:6a4db94011d3 977 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 978 * the configuration information for the specified DMA module.
sahilmgandhi 18:6a4db94011d3 979 * @retval None
sahilmgandhi 18:6a4db94011d3 980 */
sahilmgandhi 18:6a4db94011d3 981 static void ADC_MultiModeDMAConvCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi 18:6a4db94011d3 982 {
sahilmgandhi 18:6a4db94011d3 983 /* Retrieve ADC handle corresponding to current DMA handle */
sahilmgandhi 18:6a4db94011d3 984 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
sahilmgandhi 18:6a4db94011d3 985
sahilmgandhi 18:6a4db94011d3 986 /* Update state machine on conversion status if not in error state */
sahilmgandhi 18:6a4db94011d3 987 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
sahilmgandhi 18:6a4db94011d3 988 {
sahilmgandhi 18:6a4db94011d3 989 /* Update ADC state machine */
sahilmgandhi 18:6a4db94011d3 990 SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
sahilmgandhi 18:6a4db94011d3 991
sahilmgandhi 18:6a4db94011d3 992 /* Determine whether any further conversion upcoming on group regular */
sahilmgandhi 18:6a4db94011d3 993 /* by external trigger, continuous mode or scan sequence on going. */
sahilmgandhi 18:6a4db94011d3 994 /* Note: On STM32F4, there is no independent flag of end of sequence. */
sahilmgandhi 18:6a4db94011d3 995 /* The test of scan sequence on going is done either with scan */
sahilmgandhi 18:6a4db94011d3 996 /* sequence disabled or with end of conversion flag set to */
sahilmgandhi 18:6a4db94011d3 997 /* of end of sequence. */
sahilmgandhi 18:6a4db94011d3 998 if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
sahilmgandhi 18:6a4db94011d3 999 (hadc->Init.ContinuousConvMode == DISABLE) &&
sahilmgandhi 18:6a4db94011d3 1000 (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) ||
sahilmgandhi 18:6a4db94011d3 1001 HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_EOCS) ) )
sahilmgandhi 18:6a4db94011d3 1002 {
sahilmgandhi 18:6a4db94011d3 1003 /* Disable ADC end of single conversion interrupt on group regular */
sahilmgandhi 18:6a4db94011d3 1004 /* Note: Overrun interrupt was enabled with EOC interrupt in */
sahilmgandhi 18:6a4db94011d3 1005 /* HAL_ADC_Start_IT(), but is not disabled here because can be used */
sahilmgandhi 18:6a4db94011d3 1006 /* by overrun IRQ process below. */
sahilmgandhi 18:6a4db94011d3 1007 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC);
sahilmgandhi 18:6a4db94011d3 1008
sahilmgandhi 18:6a4db94011d3 1009 /* Set ADC state */
sahilmgandhi 18:6a4db94011d3 1010 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
sahilmgandhi 18:6a4db94011d3 1011
sahilmgandhi 18:6a4db94011d3 1012 if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
sahilmgandhi 18:6a4db94011d3 1013 {
sahilmgandhi 18:6a4db94011d3 1014 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
sahilmgandhi 18:6a4db94011d3 1015 }
sahilmgandhi 18:6a4db94011d3 1016 }
sahilmgandhi 18:6a4db94011d3 1017
sahilmgandhi 18:6a4db94011d3 1018 /* Conversion complete callback */
sahilmgandhi 18:6a4db94011d3 1019 HAL_ADC_ConvCpltCallback(hadc);
sahilmgandhi 18:6a4db94011d3 1020 }
sahilmgandhi 18:6a4db94011d3 1021 else
sahilmgandhi 18:6a4db94011d3 1022 {
sahilmgandhi 18:6a4db94011d3 1023 /* Call DMA error callback */
sahilmgandhi 18:6a4db94011d3 1024 hadc->DMA_Handle->XferErrorCallback(hdma);
sahilmgandhi 18:6a4db94011d3 1025 }
sahilmgandhi 18:6a4db94011d3 1026 }
sahilmgandhi 18:6a4db94011d3 1027
sahilmgandhi 18:6a4db94011d3 1028 /**
sahilmgandhi 18:6a4db94011d3 1029 * @brief DMA half transfer complete callback.
sahilmgandhi 18:6a4db94011d3 1030 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 1031 * the configuration information for the specified DMA module.
sahilmgandhi 18:6a4db94011d3 1032 * @retval None
sahilmgandhi 18:6a4db94011d3 1033 */
sahilmgandhi 18:6a4db94011d3 1034 static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi 18:6a4db94011d3 1035 {
sahilmgandhi 18:6a4db94011d3 1036 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
sahilmgandhi 18:6a4db94011d3 1037 /* Conversion complete callback */
sahilmgandhi 18:6a4db94011d3 1038 HAL_ADC_ConvHalfCpltCallback(hadc);
sahilmgandhi 18:6a4db94011d3 1039 }
sahilmgandhi 18:6a4db94011d3 1040
sahilmgandhi 18:6a4db94011d3 1041 /**
sahilmgandhi 18:6a4db94011d3 1042 * @brief DMA error callback
sahilmgandhi 18:6a4db94011d3 1043 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
sahilmgandhi 18:6a4db94011d3 1044 * the configuration information for the specified DMA module.
sahilmgandhi 18:6a4db94011d3 1045 * @retval None
sahilmgandhi 18:6a4db94011d3 1046 */
sahilmgandhi 18:6a4db94011d3 1047 static void ADC_MultiModeDMAError(DMA_HandleTypeDef *hdma)
sahilmgandhi 18:6a4db94011d3 1048 {
sahilmgandhi 18:6a4db94011d3 1049 ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
sahilmgandhi 18:6a4db94011d3 1050 hadc->State= HAL_ADC_STATE_ERROR_DMA;
sahilmgandhi 18:6a4db94011d3 1051 /* Set ADC error code to DMA error */
sahilmgandhi 18:6a4db94011d3 1052 hadc->ErrorCode |= HAL_ADC_ERROR_DMA;
sahilmgandhi 18:6a4db94011d3 1053 HAL_ADC_ErrorCallback(hadc);
sahilmgandhi 18:6a4db94011d3 1054 }
sahilmgandhi 18:6a4db94011d3 1055
sahilmgandhi 18:6a4db94011d3 1056 /**
sahilmgandhi 18:6a4db94011d3 1057 * @}
sahilmgandhi 18:6a4db94011d3 1058 */
sahilmgandhi 18:6a4db94011d3 1059
sahilmgandhi 18:6a4db94011d3 1060 #endif /* HAL_ADC_MODULE_ENABLED */
sahilmgandhi 18:6a4db94011d3 1061 /**
sahilmgandhi 18:6a4db94011d3 1062 * @}
sahilmgandhi 18:6a4db94011d3 1063 */
sahilmgandhi 18:6a4db94011d3 1064
sahilmgandhi 18:6a4db94011d3 1065 /**
sahilmgandhi 18:6a4db94011d3 1066 * @}
sahilmgandhi 18:6a4db94011d3 1067 */
sahilmgandhi 18:6a4db94011d3 1068
sahilmgandhi 18:6a4db94011d3 1069 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/