Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 *******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * Copyright (c) 2016, STMicroelectronics
sahilmgandhi 18:6a4db94011d3 4 * All rights reserved.
sahilmgandhi 18:6a4db94011d3 5 *
sahilmgandhi 18:6a4db94011d3 6 * Redistribution and use in source and binary forms, with or without
sahilmgandhi 18:6a4db94011d3 7 * modification, are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 8 *
sahilmgandhi 18:6a4db94011d3 9 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 10 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 12 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 13 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 15 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 16 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 17 *
sahilmgandhi 18:6a4db94011d3 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 28 *******************************************************************************
sahilmgandhi 18:6a4db94011d3 29 */
sahilmgandhi 18:6a4db94011d3 30 #include "mbed_assert.h"
sahilmgandhi 18:6a4db94011d3 31 #include "mbed_error.h"
sahilmgandhi 18:6a4db94011d3 32 #include "spi_api.h"
sahilmgandhi 18:6a4db94011d3 33
sahilmgandhi 18:6a4db94011d3 34 #if DEVICE_SPI
sahilmgandhi 18:6a4db94011d3 35
sahilmgandhi 18:6a4db94011d3 36 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 37 #include "pinmap.h"
sahilmgandhi 18:6a4db94011d3 38 #include "PeripheralPins.h"
sahilmgandhi 18:6a4db94011d3 39 #include "mbed_error.h"
sahilmgandhi 18:6a4db94011d3 40
sahilmgandhi 18:6a4db94011d3 41 #if DEVICE_SPI_ASYNCH
sahilmgandhi 18:6a4db94011d3 42 #define SPI_S(obj) (( struct spi_s *)(&(obj->spi)))
sahilmgandhi 18:6a4db94011d3 43 #else
sahilmgandhi 18:6a4db94011d3 44 #define SPI_S(obj) (( struct spi_s *)(obj))
sahilmgandhi 18:6a4db94011d3 45 #endif
sahilmgandhi 18:6a4db94011d3 46
sahilmgandhi 18:6a4db94011d3 47 /*
sahilmgandhi 18:6a4db94011d3 48 * Only the frequency is managed in the family specific part
sahilmgandhi 18:6a4db94011d3 49 * the rest of SPI management is common to all STM32 families
sahilmgandhi 18:6a4db94011d3 50 */
sahilmgandhi 18:6a4db94011d3 51 int spi_get_clock_freq(spi_t *obj) {
sahilmgandhi 18:6a4db94011d3 52 struct spi_s *spiobj = SPI_S(obj);
sahilmgandhi 18:6a4db94011d3 53 int spi_hz = 0;
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 /* Get source clock depending on SPI instance */
sahilmgandhi 18:6a4db94011d3 56 switch ((int)spiobj->spi) {
sahilmgandhi 18:6a4db94011d3 57 case SPI_1:
sahilmgandhi 18:6a4db94011d3 58 #if defined SPI4_BASE
sahilmgandhi 18:6a4db94011d3 59 case SPI_4:
sahilmgandhi 18:6a4db94011d3 60 #endif
sahilmgandhi 18:6a4db94011d3 61 #if defined SPI5_BASE
sahilmgandhi 18:6a4db94011d3 62 case SPI_5:
sahilmgandhi 18:6a4db94011d3 63 #endif
sahilmgandhi 18:6a4db94011d3 64 #if defined SPI6_BASE
sahilmgandhi 18:6a4db94011d3 65 case SPI_6:
sahilmgandhi 18:6a4db94011d3 66 #endif
sahilmgandhi 18:6a4db94011d3 67 /* SPI_1, SPI_4, SPI_5 and SPI_6. Source CLK is PCKL2 */
sahilmgandhi 18:6a4db94011d3 68 spi_hz = HAL_RCC_GetPCLK2Freq();
sahilmgandhi 18:6a4db94011d3 69 break;
sahilmgandhi 18:6a4db94011d3 70 case SPI_2:
sahilmgandhi 18:6a4db94011d3 71 #if defined SPI3_BASE
sahilmgandhi 18:6a4db94011d3 72 case SPI_3:
sahilmgandhi 18:6a4db94011d3 73 #endif
sahilmgandhi 18:6a4db94011d3 74 /* SPI_2 and SPI_3. Source CLK is PCKL1 */
sahilmgandhi 18:6a4db94011d3 75 spi_hz = HAL_RCC_GetPCLK1Freq();
sahilmgandhi 18:6a4db94011d3 76 break;
sahilmgandhi 18:6a4db94011d3 77 default:
sahilmgandhi 18:6a4db94011d3 78 error("SPI instance not set");
sahilmgandhi 18:6a4db94011d3 79 break;
sahilmgandhi 18:6a4db94011d3 80 }
sahilmgandhi 18:6a4db94011d3 81 return spi_hz;
sahilmgandhi 18:6a4db94011d3 82 }
sahilmgandhi 18:6a4db94011d3 83
sahilmgandhi 18:6a4db94011d3 84 #endif