MouseCode - Mouse code for the MacroRat

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Mouse code for the MacroRat

Dependencies: ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_uart.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:: sahilmgandhi
Date:: Sat Jun 03 00:22:44 2017 +0000
Revision:: 46:b156ef445742
Parent:: 18:6a4db94011d3

Final code for internal battlebot competition.

Who changed what in which revision?

User	Revision	Line number	New contents of line
sahilmgandhi	18:6a4db94011d3	1	/**
sahilmgandhi	18:6a4db94011d3	2	******************************************************************************
sahilmgandhi	18:6a4db94011d3	3	* @file stm32f2xx_hal_uart.c
sahilmgandhi	18:6a4db94011d3	4	* @author MCD Application Team
sahilmgandhi	18:6a4db94011d3	5	* @version V1.1.3
sahilmgandhi	18:6a4db94011d3	6	* @date 29-June-2016
sahilmgandhi	18:6a4db94011d3	7	* @brief UART HAL module driver.
sahilmgandhi	18:6a4db94011d3	8	* This file provides firmware functions to manage the following
sahilmgandhi	18:6a4db94011d3	9	* functionalities of the Universal Asynchronous Receiver Transmitter (UART) peripheral:
sahilmgandhi	18:6a4db94011d3	10	* + Initialization and de-initialization functions
sahilmgandhi	18:6a4db94011d3	11	* + IO operation functions
sahilmgandhi	18:6a4db94011d3	12	* + Peripheral Control functions
sahilmgandhi	18:6a4db94011d3	13	* + Peripheral State and Errors functions
sahilmgandhi	18:6a4db94011d3	14	*
sahilmgandhi	18:6a4db94011d3	15	@verbatim
sahilmgandhi	18:6a4db94011d3	16	==============================================================================
sahilmgandhi	18:6a4db94011d3	17	##### How to use this driver #####
sahilmgandhi	18:6a4db94011d3	18	==============================================================================
sahilmgandhi	18:6a4db94011d3	19	[..]
sahilmgandhi	18:6a4db94011d3	20	The UART HAL driver can be used as follows:
sahilmgandhi	18:6a4db94011d3	21
sahilmgandhi	18:6a4db94011d3	22	(#) Declare a UART_HandleTypeDef handle structure.
sahilmgandhi	18:6a4db94011d3	23
sahilmgandhi	18:6a4db94011d3	24	(#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API:
sahilmgandhi	18:6a4db94011d3	25	(##) Enable the USARTx interface clock.
sahilmgandhi	18:6a4db94011d3	26	(##) UART pins configuration:
sahilmgandhi	18:6a4db94011d3	27	(+++) Enable the clock for the UART GPIOs.
sahilmgandhi	18:6a4db94011d3	28	(+++) Configure these UART pins as alternate function pull-up.
sahilmgandhi	18:6a4db94011d3	29	(##) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	30	and HAL_UART_Receive_IT() APIs):
sahilmgandhi	18:6a4db94011d3	31	(+++) Configure the USARTx interrupt priority.
sahilmgandhi	18:6a4db94011d3	32	(+++) Enable the NVIC USART IRQ handle.
sahilmgandhi	18:6a4db94011d3	33	(##) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA()
sahilmgandhi	18:6a4db94011d3	34	and HAL_UART_Receive_DMA() APIs):
sahilmgandhi	18:6a4db94011d3	35	(+++) Declare a DMA handle structure for the Tx/Rx stream.
sahilmgandhi	18:6a4db94011d3	36	(+++) Enable the DMAx interface clock.
sahilmgandhi	18:6a4db94011d3	37	(+++) Configure the declared DMA handle structure with the required
sahilmgandhi	18:6a4db94011d3	38	Tx/Rx parameters.
sahilmgandhi	18:6a4db94011d3	39	(+++) Configure the DMA Tx/Rx Stream.
sahilmgandhi	18:6a4db94011d3	40	(+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle.
sahilmgandhi	18:6a4db94011d3	41	(+++) Configure the priority and enable the NVIC for the transfer complete
sahilmgandhi	18:6a4db94011d3	42	interrupt on the DMA Tx/Rx Stream.
sahilmgandhi	18:6a4db94011d3	43
sahilmgandhi	18:6a4db94011d3	44	(#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
sahilmgandhi	18:6a4db94011d3	45	flow control and Mode(Receiver/Transmitter) in the Init structure.
sahilmgandhi	18:6a4db94011d3	46
sahilmgandhi	18:6a4db94011d3	47	(#) For the UART asynchronous mode, initialize the UART registers by calling
sahilmgandhi	18:6a4db94011d3	48	the HAL_UART_Init() API.
sahilmgandhi	18:6a4db94011d3	49
sahilmgandhi	18:6a4db94011d3	50	(#) For the UART Half duplex mode, initialize the UART registers by calling
sahilmgandhi	18:6a4db94011d3	51	the HAL_HalfDuplex_Init() API.
sahilmgandhi	18:6a4db94011d3	52
sahilmgandhi	18:6a4db94011d3	53	(#) For the LIN mode, initialize the UART registers by calling the HAL_LIN_Init() API.
sahilmgandhi	18:6a4db94011d3	54
sahilmgandhi	18:6a4db94011d3	55	(#) For the Multi-Processor mode, initialize the UART registers by calling
sahilmgandhi	18:6a4db94011d3	56	the HAL_MultiProcessor_Init() API.
sahilmgandhi	18:6a4db94011d3	57
sahilmgandhi	18:6a4db94011d3	58	[..]
sahilmgandhi	18:6a4db94011d3	59	(@) The specific UART interrupts (Transmission complete interrupt,
sahilmgandhi	18:6a4db94011d3	60	RXNE interrupt and Error Interrupts) will be managed using the macros
sahilmgandhi	18:6a4db94011d3	61	__HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT() inside the transmit
sahilmgandhi	18:6a4db94011d3	62	and receive process.
sahilmgandhi	18:6a4db94011d3	63
sahilmgandhi	18:6a4db94011d3	64	[..]
sahilmgandhi	18:6a4db94011d3	65	(@) These APIs (HAL_UART_Init() and HAL_HalfDuplex_Init()) configure also the
sahilmgandhi	18:6a4db94011d3	66	low level Hardware GPIO, CLOCK, CORTEX...etc) by calling the customized
sahilmgandhi	18:6a4db94011d3	67	HAL_UART_MspInit() API.
sahilmgandhi	18:6a4db94011d3	68
sahilmgandhi	18:6a4db94011d3	69	[..]
sahilmgandhi	18:6a4db94011d3	70	Three operation modes are available within this driver :
sahilmgandhi	18:6a4db94011d3	71
sahilmgandhi	18:6a4db94011d3	72	* Polling mode IO operation *
sahilmgandhi	18:6a4db94011d3	73	=================================
sahilmgandhi	18:6a4db94011d3	74	[..]
sahilmgandhi	18:6a4db94011d3	75	(+) Send an amount of data in blocking mode using HAL_UART_Transmit()
sahilmgandhi	18:6a4db94011d3	76	(+) Receive an amount of data in blocking mode using HAL_UART_Receive()
sahilmgandhi	18:6a4db94011d3	77
sahilmgandhi	18:6a4db94011d3	78	* Interrupt mode IO operation *
sahilmgandhi	18:6a4db94011d3	79	===================================
sahilmgandhi	18:6a4db94011d3	80	[..]
sahilmgandhi	18:6a4db94011d3	81	(+) Send an amount of data in non blocking mode using HAL_UART_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	82	(+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	83	add his own code by customization of function pointer HAL_UART_TxCpltCallback
sahilmgandhi	18:6a4db94011d3	84	(+) Receive an amount of data in non blocking mode using HAL_UART_Receive_IT()
sahilmgandhi	18:6a4db94011d3	85	(+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	86	add his own code by customization of function pointer HAL_UART_RxCpltCallback
sahilmgandhi	18:6a4db94011d3	87	(+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
sahilmgandhi	18:6a4db94011d3	88	add his own code by customization of function pointer HAL_UART_ErrorCallback
sahilmgandhi	18:6a4db94011d3	89
sahilmgandhi	18:6a4db94011d3	90	* DMA mode IO operation *
sahilmgandhi	18:6a4db94011d3	91	==============================
sahilmgandhi	18:6a4db94011d3	92	[..]
sahilmgandhi	18:6a4db94011d3	93	(+) Send an amount of data in non blocking mode (DMA) using HAL_UART_Transmit_DMA()
sahilmgandhi	18:6a4db94011d3	94	(+) At transmission end of half transfer HAL_UART_TxHalfCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	95	add his own code by customization of function pointer HAL_UART_TxHalfCpltCallback
sahilmgandhi	18:6a4db94011d3	96	(+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	97	add his own code by customization of function pointer HAL_UART_TxCpltCallback
sahilmgandhi	18:6a4db94011d3	98	(+) Receive an amount of data in non blocking mode (DMA) using HAL_UART_Receive_DMA()
sahilmgandhi	18:6a4db94011d3	99	(+) At reception end of half transfer HAL_UART_RxHalfCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	100	add his own code by customization of function pointer HAL_UART_RxHalfCpltCallback
sahilmgandhi	18:6a4db94011d3	101	(+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	102	add his own code by customization of function pointer HAL_UART_RxCpltCallback
sahilmgandhi	18:6a4db94011d3	103	(+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
sahilmgandhi	18:6a4db94011d3	104	add his own code by customization of function pointer HAL_UART_ErrorCallback
sahilmgandhi	18:6a4db94011d3	105	(+) Pause the DMA Transfer using HAL_UART_DMAPause()
sahilmgandhi	18:6a4db94011d3	106	(+) Resume the DMA Transfer using HAL_UART_DMAResume()
sahilmgandhi	18:6a4db94011d3	107	(+) Stop the DMA Transfer using HAL_UART_DMAStop()
sahilmgandhi	18:6a4db94011d3	108
sahilmgandhi	18:6a4db94011d3	109	* UART HAL driver macros list *
sahilmgandhi	18:6a4db94011d3	110	=============================================
sahilmgandhi	18:6a4db94011d3	111	[..]
sahilmgandhi	18:6a4db94011d3	112	Below the list of most used macros in UART HAL driver.
sahilmgandhi	18:6a4db94011d3	113
sahilmgandhi	18:6a4db94011d3	114	(+) __HAL_UART_ENABLE: Enable the UART peripheral
sahilmgandhi	18:6a4db94011d3	115	(+) __HAL_UART_DISABLE: Disable the UART peripheral
sahilmgandhi	18:6a4db94011d3	116	(+) __HAL_UART_GET_FLAG : Check whether the specified UART flag is set or not
sahilmgandhi	18:6a4db94011d3	117	(+) __HAL_UART_CLEAR_FLAG : Clear the specified UART pending flag
sahilmgandhi	18:6a4db94011d3	118	(+) __HAL_UART_ENABLE_IT: Enable the specified UART interrupt
sahilmgandhi	18:6a4db94011d3	119	(+) __HAL_UART_DISABLE_IT: Disable the specified UART interrupt
sahilmgandhi	18:6a4db94011d3	120	(+) __HAL_UART_GET_IT_SOURCE: Check whether the specified UART interrupt has occurred or not
sahilmgandhi	18:6a4db94011d3	121
sahilmgandhi	18:6a4db94011d3	122	[..]
sahilmgandhi	18:6a4db94011d3	123	(@) You can refer to the UART HAL driver header file for more useful macros
sahilmgandhi	18:6a4db94011d3	124
sahilmgandhi	18:6a4db94011d3	125	@endverbatim
sahilmgandhi	18:6a4db94011d3	126	******************************************************************************
sahilmgandhi	18:6a4db94011d3	127	* @attention
sahilmgandhi	18:6a4db94011d3	128	*
sahilmgandhi	18:6a4db94011d3	129	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi	18:6a4db94011d3	130	*
sahilmgandhi	18:6a4db94011d3	131	* Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi	18:6a4db94011d3	132	* are permitted provided that the following conditions are met:
sahilmgandhi	18:6a4db94011d3	133	* 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi	18:6a4db94011d3	134	* this list of conditions and the following disclaimer.
sahilmgandhi	18:6a4db94011d3	135	* 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi	18:6a4db94011d3	136	* this list of conditions and the following disclaimer in the documentation
sahilmgandhi	18:6a4db94011d3	137	* and/or other materials provided with the distribution.
sahilmgandhi	18:6a4db94011d3	138	* 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi	18:6a4db94011d3	139	* may be used to endorse or promote products derived from this software
sahilmgandhi	18:6a4db94011d3	140	* without specific prior written permission.
sahilmgandhi	18:6a4db94011d3	141	*
sahilmgandhi	18:6a4db94011d3	142	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi	18:6a4db94011d3	143	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi	18:6a4db94011d3	144	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi	18:6a4db94011d3	145	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi	18:6a4db94011d3	146	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi	18:6a4db94011d3	147	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi	18:6a4db94011d3	148	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi	18:6a4db94011d3	149	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi	18:6a4db94011d3	150	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi	18:6a4db94011d3	151	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi	18:6a4db94011d3	152	*
sahilmgandhi	18:6a4db94011d3	153	******************************************************************************
sahilmgandhi	18:6a4db94011d3	154	*/
sahilmgandhi	18:6a4db94011d3	155
sahilmgandhi	18:6a4db94011d3	156	/* Includes ------------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	157	#include "stm32f2xx_hal.h"
sahilmgandhi	18:6a4db94011d3	158
sahilmgandhi	18:6a4db94011d3	159	/** @addtogroup STM32F2xx_HAL_Driver
sahilmgandhi	18:6a4db94011d3	160	* @{
sahilmgandhi	18:6a4db94011d3	161	*/
sahilmgandhi	18:6a4db94011d3	162
sahilmgandhi	18:6a4db94011d3	163	/** @defgroup UART UART
sahilmgandhi	18:6a4db94011d3	164	* @brief HAL UART module driver
sahilmgandhi	18:6a4db94011d3	165	* @{
sahilmgandhi	18:6a4db94011d3	166	*/
sahilmgandhi	18:6a4db94011d3	167	#ifdef HAL_UART_MODULE_ENABLED
sahilmgandhi	18:6a4db94011d3	168
sahilmgandhi	18:6a4db94011d3	169	/* Private typedef -----------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	170	/* Private define ------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	171	/** @addtogroup UART_Private_Constants
sahilmgandhi	18:6a4db94011d3	172	* @{
sahilmgandhi	18:6a4db94011d3	173	*/
sahilmgandhi	18:6a4db94011d3	174	/**
sahilmgandhi	18:6a4db94011d3	175	* @}
sahilmgandhi	18:6a4db94011d3	176	*/
sahilmgandhi	18:6a4db94011d3	177	/* Private macro -------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	178	/* Private variables ---------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	179	/* Private function prototypes -----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	180	/** @addtogroup UART_Private_Functions UART Private Functions
sahilmgandhi	18:6a4db94011d3	181	* @{
sahilmgandhi	18:6a4db94011d3	182	*/
sahilmgandhi	18:6a4db94011d3	183	static void UART_EndTxTransfer(UART_HandleTypeDef *huart);
sahilmgandhi	18:6a4db94011d3	184	static void UART_EndRxTransfer(UART_HandleTypeDef *huart);
sahilmgandhi	18:6a4db94011d3	185	static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	186	static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	187	static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	188	static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	189	static void UART_DMAError(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	190	static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	191	static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart);
sahilmgandhi	18:6a4db94011d3	192	static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart);
sahilmgandhi	18:6a4db94011d3	193	static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart);
sahilmgandhi	18:6a4db94011d3	194	static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
sahilmgandhi	18:6a4db94011d3	195	static void UART_SetConfig (UART_HandleTypeDef *huart);
sahilmgandhi	18:6a4db94011d3	196	/**
sahilmgandhi	18:6a4db94011d3	197	* @}
sahilmgandhi	18:6a4db94011d3	198	*/
sahilmgandhi	18:6a4db94011d3	199
sahilmgandhi	18:6a4db94011d3	200	/* Exported functions ---------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	201	/** @defgroup UART_Exported_Functions UART Exported Functions
sahilmgandhi	18:6a4db94011d3	202	* @{
sahilmgandhi	18:6a4db94011d3	203	*/
sahilmgandhi	18:6a4db94011d3	204
sahilmgandhi	18:6a4db94011d3	205	/** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
sahilmgandhi	18:6a4db94011d3	206	* @brief Initialization and Configuration functions
sahilmgandhi	18:6a4db94011d3	207	*
sahilmgandhi	18:6a4db94011d3	208	@verbatim
sahilmgandhi	18:6a4db94011d3	209	===============================================================================
sahilmgandhi	18:6a4db94011d3	210	##### Initialization and Configuration functions #####
sahilmgandhi	18:6a4db94011d3	211	===============================================================================
sahilmgandhi	18:6a4db94011d3	212	[..]
sahilmgandhi	18:6a4db94011d3	213	This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
sahilmgandhi	18:6a4db94011d3	214	in asynchronous mode.
sahilmgandhi	18:6a4db94011d3	215	(+) For the asynchronous mode only these parameters can be configured:
sahilmgandhi	18:6a4db94011d3	216	(++) Baud Rate
sahilmgandhi	18:6a4db94011d3	217	(++) Word Length
sahilmgandhi	18:6a4db94011d3	218	(++) Stop Bit
sahilmgandhi	18:6a4db94011d3	219	(++) Parity: If the parity is enabled, then the MSB bit of the data written
sahilmgandhi	18:6a4db94011d3	220	in the data register is transmitted but is changed by the parity bit.
sahilmgandhi	18:6a4db94011d3	221	Depending on the frame length defined by the M bit (8-bits or 9-bits),
sahilmgandhi	18:6a4db94011d3	222	please refer to Reference manual for possible UART frame formats.
sahilmgandhi	18:6a4db94011d3	223	(++) Hardware flow control
sahilmgandhi	18:6a4db94011d3	224	(++) Receiver/transmitter modes
sahilmgandhi	18:6a4db94011d3	225	(++) Over Sampling Method
sahilmgandhi	18:6a4db94011d3	226	[..]
sahilmgandhi	18:6a4db94011d3	227	The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init() and HAL_MultiProcessor_Init() APIs
sahilmgandhi	18:6a4db94011d3	228	follow respectively the UART asynchronous, UART Half duplex, LIN and Multi-Processor
sahilmgandhi	18:6a4db94011d3	229	configuration procedures (details for the procedures are available in reference manual (RM0329)).
sahilmgandhi	18:6a4db94011d3	230
sahilmgandhi	18:6a4db94011d3	231	@endverbatim
sahilmgandhi	18:6a4db94011d3	232	* @{
sahilmgandhi	18:6a4db94011d3	233	*/
sahilmgandhi	18:6a4db94011d3	234
sahilmgandhi	18:6a4db94011d3	235	/**
sahilmgandhi	18:6a4db94011d3	236	* @brief Initializes the UART mode according to the specified parameters in
sahilmgandhi	18:6a4db94011d3	237	* the UART_InitTypeDef and create the associated handle.
sahilmgandhi	18:6a4db94011d3	238	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	239	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	240	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	241	*/
sahilmgandhi	18:6a4db94011d3	242	HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	243	{
sahilmgandhi	18:6a4db94011d3	244	/* Check the UART handle allocation */
sahilmgandhi	18:6a4db94011d3	245	if(huart == NULL)
sahilmgandhi	18:6a4db94011d3	246	{
sahilmgandhi	18:6a4db94011d3	247	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	248	}
sahilmgandhi	18:6a4db94011d3	249
sahilmgandhi	18:6a4db94011d3	250	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	251	if(huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
sahilmgandhi	18:6a4db94011d3	252	{
sahilmgandhi	18:6a4db94011d3	253	/* The hardware flow control is available only for USART1, USART2, USART3 and USART6 */
sahilmgandhi	18:6a4db94011d3	254	assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
sahilmgandhi	18:6a4db94011d3	255	assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
sahilmgandhi	18:6a4db94011d3	256	}
sahilmgandhi	18:6a4db94011d3	257	else
sahilmgandhi	18:6a4db94011d3	258	{
sahilmgandhi	18:6a4db94011d3	259	assert_param(IS_UART_INSTANCE(huart->Instance));
sahilmgandhi	18:6a4db94011d3	260	}
sahilmgandhi	18:6a4db94011d3	261	assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
sahilmgandhi	18:6a4db94011d3	262	assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
sahilmgandhi	18:6a4db94011d3	263
sahilmgandhi	18:6a4db94011d3	264	if(huart->gState == HAL_UART_STATE_RESET)
sahilmgandhi	18:6a4db94011d3	265	{
sahilmgandhi	18:6a4db94011d3	266	/* Allocate lock resource and initialize it */
sahilmgandhi	18:6a4db94011d3	267	huart->Lock = HAL_UNLOCKED;
sahilmgandhi	18:6a4db94011d3	268	/* Init the low level hardware */
sahilmgandhi	18:6a4db94011d3	269	HAL_UART_MspInit(huart);
sahilmgandhi	18:6a4db94011d3	270	}
sahilmgandhi	18:6a4db94011d3	271
sahilmgandhi	18:6a4db94011d3	272	huart->gState = HAL_UART_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	273
sahilmgandhi	18:6a4db94011d3	274	/* Disable the peripheral */
sahilmgandhi	18:6a4db94011d3	275	__HAL_UART_DISABLE(huart);
sahilmgandhi	18:6a4db94011d3	276
sahilmgandhi	18:6a4db94011d3	277	/* Set the UART Communication parameters */
sahilmgandhi	18:6a4db94011d3	278	UART_SetConfig(huart);
sahilmgandhi	18:6a4db94011d3	279
sahilmgandhi	18:6a4db94011d3	280	/* In asynchronous mode, the following bits must be kept cleared:
sahilmgandhi	18:6a4db94011d3	281	- LINEN and CLKEN bits in the USART_CR2 register,
sahilmgandhi	18:6a4db94011d3	282	- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
sahilmgandhi	18:6a4db94011d3	283	CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN \| USART_CR2_CLKEN));
sahilmgandhi	18:6a4db94011d3	284	CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN \| USART_CR3_HDSEL \| USART_CR3_IREN));
sahilmgandhi	18:6a4db94011d3	285
sahilmgandhi	18:6a4db94011d3	286	/* Enable the peripheral */
sahilmgandhi	18:6a4db94011d3	287	__HAL_UART_ENABLE(huart);
sahilmgandhi	18:6a4db94011d3	288
sahilmgandhi	18:6a4db94011d3	289	/* Initialize the UART state */
sahilmgandhi	18:6a4db94011d3	290	huart->ErrorCode = HAL_UART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	291	huart->gState= HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	292	huart->RxState= HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	293
sahilmgandhi	18:6a4db94011d3	294	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	295	}
sahilmgandhi	18:6a4db94011d3	296
sahilmgandhi	18:6a4db94011d3	297	/**
sahilmgandhi	18:6a4db94011d3	298	* @brief Initializes the half-duplex mode according to the specified
sahilmgandhi	18:6a4db94011d3	299	* parameters in the UART_InitTypeDef and create the associated handle.
sahilmgandhi	18:6a4db94011d3	300	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	301	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	302	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	303	*/
sahilmgandhi	18:6a4db94011d3	304	HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	305	{
sahilmgandhi	18:6a4db94011d3	306	/* Check the UART handle allocation */
sahilmgandhi	18:6a4db94011d3	307	if(huart == NULL)
sahilmgandhi	18:6a4db94011d3	308	{
sahilmgandhi	18:6a4db94011d3	309	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	310	}
sahilmgandhi	18:6a4db94011d3	311
sahilmgandhi	18:6a4db94011d3	312	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	313	assert_param(IS_UART_INSTANCE(huart->Instance));
sahilmgandhi	18:6a4db94011d3	314	assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
sahilmgandhi	18:6a4db94011d3	315	assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
sahilmgandhi	18:6a4db94011d3	316
sahilmgandhi	18:6a4db94011d3	317	if(huart->gState == HAL_UART_STATE_RESET)
sahilmgandhi	18:6a4db94011d3	318	{
sahilmgandhi	18:6a4db94011d3	319	/* Allocate lock resource and initialize it */
sahilmgandhi	18:6a4db94011d3	320	huart->Lock = HAL_UNLOCKED;
sahilmgandhi	18:6a4db94011d3	321	/* Init the low level hardware */
sahilmgandhi	18:6a4db94011d3	322	HAL_UART_MspInit(huart);
sahilmgandhi	18:6a4db94011d3	323	}
sahilmgandhi	18:6a4db94011d3	324
sahilmgandhi	18:6a4db94011d3	325	huart->gState = HAL_UART_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	326
sahilmgandhi	18:6a4db94011d3	327	/* Disable the peripheral */
sahilmgandhi	18:6a4db94011d3	328	__HAL_UART_DISABLE(huart);
sahilmgandhi	18:6a4db94011d3	329
sahilmgandhi	18:6a4db94011d3	330	/* Set the UART Communication parameters */
sahilmgandhi	18:6a4db94011d3	331	UART_SetConfig(huart);
sahilmgandhi	18:6a4db94011d3	332
sahilmgandhi	18:6a4db94011d3	333	/* In half-duplex mode, the following bits must be kept cleared:
sahilmgandhi	18:6a4db94011d3	334	- LINEN and CLKEN bits in the USART_CR2 register,
sahilmgandhi	18:6a4db94011d3	335	- SCEN and IREN bits in the USART_CR3 register.*/
sahilmgandhi	18:6a4db94011d3	336	CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN \| USART_CR2_CLKEN));
sahilmgandhi	18:6a4db94011d3	337	CLEAR_BIT(huart->Instance->CR3, (USART_CR3_IREN \| USART_CR3_SCEN));
sahilmgandhi	18:6a4db94011d3	338
sahilmgandhi	18:6a4db94011d3	339	/* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
sahilmgandhi	18:6a4db94011d3	340	SET_BIT(huart->Instance->CR3, USART_CR3_HDSEL);
sahilmgandhi	18:6a4db94011d3	341
sahilmgandhi	18:6a4db94011d3	342	/* Enable the peripheral */
sahilmgandhi	18:6a4db94011d3	343	__HAL_UART_ENABLE(huart);
sahilmgandhi	18:6a4db94011d3	344
sahilmgandhi	18:6a4db94011d3	345	/* Initialize the UART state*/
sahilmgandhi	18:6a4db94011d3	346	huart->ErrorCode = HAL_UART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	347	huart->gState= HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	348	huart->RxState= HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	349
sahilmgandhi	18:6a4db94011d3	350	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	351	}
sahilmgandhi	18:6a4db94011d3	352
sahilmgandhi	18:6a4db94011d3	353	/**
sahilmgandhi	18:6a4db94011d3	354	* @brief Initializes the LIN mode according to the specified
sahilmgandhi	18:6a4db94011d3	355	* parameters in the UART_InitTypeDef and create the associated handle.
sahilmgandhi	18:6a4db94011d3	356	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	357	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	358	* @param BreakDetectLength: Specifies the LIN break detection length.
sahilmgandhi	18:6a4db94011d3	359	* This parameter can be one of the following values:
sahilmgandhi	18:6a4db94011d3	360	* @arg UART_LINBREAKDETECTLENGTH_10B: 10-bit break detection
sahilmgandhi	18:6a4db94011d3	361	* @arg UART_LINBREAKDETECTLENGTH_11B: 11-bit break detection
sahilmgandhi	18:6a4db94011d3	362	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	363	*/
sahilmgandhi	18:6a4db94011d3	364	HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
sahilmgandhi	18:6a4db94011d3	365	{
sahilmgandhi	18:6a4db94011d3	366	/* Check the UART handle allocation */
sahilmgandhi	18:6a4db94011d3	367	if(huart == NULL)
sahilmgandhi	18:6a4db94011d3	368	{
sahilmgandhi	18:6a4db94011d3	369	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	370	}
sahilmgandhi	18:6a4db94011d3	371
sahilmgandhi	18:6a4db94011d3	372	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	373	assert_param(IS_UART_INSTANCE(huart->Instance));
sahilmgandhi	18:6a4db94011d3	374	assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength));
sahilmgandhi	18:6a4db94011d3	375	assert_param(IS_UART_LIN_WORD_LENGTH(huart->Init.WordLength));
sahilmgandhi	18:6a4db94011d3	376	assert_param(IS_UART_LIN_OVERSAMPLING(huart->Init.OverSampling));
sahilmgandhi	18:6a4db94011d3	377
sahilmgandhi	18:6a4db94011d3	378	if(huart->gState == HAL_UART_STATE_RESET)
sahilmgandhi	18:6a4db94011d3	379	{
sahilmgandhi	18:6a4db94011d3	380	/* Allocate lock resource and initialize it */
sahilmgandhi	18:6a4db94011d3	381	huart->Lock = HAL_UNLOCKED;
sahilmgandhi	18:6a4db94011d3	382	/* Init the low level hardware */
sahilmgandhi	18:6a4db94011d3	383	HAL_UART_MspInit(huart);
sahilmgandhi	18:6a4db94011d3	384	}
sahilmgandhi	18:6a4db94011d3	385
sahilmgandhi	18:6a4db94011d3	386	huart->gState = HAL_UART_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	387
sahilmgandhi	18:6a4db94011d3	388	/* Disable the peripheral */
sahilmgandhi	18:6a4db94011d3	389	__HAL_UART_DISABLE(huart);
sahilmgandhi	18:6a4db94011d3	390
sahilmgandhi	18:6a4db94011d3	391	/* Set the UART Communication parameters */
sahilmgandhi	18:6a4db94011d3	392	UART_SetConfig(huart);
sahilmgandhi	18:6a4db94011d3	393
sahilmgandhi	18:6a4db94011d3	394	/* In LIN mode, the following bits must be kept cleared:
sahilmgandhi	18:6a4db94011d3	395	- LINEN and CLKEN bits in the USART_CR2 register,
sahilmgandhi	18:6a4db94011d3	396	- SCEN and IREN bits in the USART_CR3 register.*/
sahilmgandhi	18:6a4db94011d3	397	CLEAR_BIT(huart->Instance->CR2, USART_CR2_CLKEN);
sahilmgandhi	18:6a4db94011d3	398	CLEAR_BIT(huart->Instance->CR3, (USART_CR3_HDSEL \| USART_CR3_IREN \| USART_CR3_SCEN));
sahilmgandhi	18:6a4db94011d3	399
sahilmgandhi	18:6a4db94011d3	400	/* Enable the LIN mode by setting the LINEN bit in the CR2 register */
sahilmgandhi	18:6a4db94011d3	401	SET_BIT(huart->Instance->CR2, USART_CR2_LINEN);
sahilmgandhi	18:6a4db94011d3	402
sahilmgandhi	18:6a4db94011d3	403	/* Set the USART LIN Break detection length. */
sahilmgandhi	18:6a4db94011d3	404	CLEAR_BIT(huart->Instance->CR2, USART_CR2_LBDL);
sahilmgandhi	18:6a4db94011d3	405	SET_BIT(huart->Instance->CR2, BreakDetectLength);
sahilmgandhi	18:6a4db94011d3	406
sahilmgandhi	18:6a4db94011d3	407	/* Enable the peripheral */
sahilmgandhi	18:6a4db94011d3	408	__HAL_UART_ENABLE(huart);
sahilmgandhi	18:6a4db94011d3	409
sahilmgandhi	18:6a4db94011d3	410	/* Initialize the UART state*/
sahilmgandhi	18:6a4db94011d3	411	huart->ErrorCode = HAL_UART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	412	huart->gState= HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	413	huart->RxState= HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	414
sahilmgandhi	18:6a4db94011d3	415	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	416	}
sahilmgandhi	18:6a4db94011d3	417
sahilmgandhi	18:6a4db94011d3	418	/**
sahilmgandhi	18:6a4db94011d3	419	* @brief Initializes the Multi-Processor mode according to the specified
sahilmgandhi	18:6a4db94011d3	420	* parameters in the UART_InitTypeDef and create the associated handle.
sahilmgandhi	18:6a4db94011d3	421	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	422	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	423	* @param Address: USART address
sahilmgandhi	18:6a4db94011d3	424	* @param WakeUpMethod: specifies the USART wake-up method.
sahilmgandhi	18:6a4db94011d3	425	* This parameter can be one of the following values:
sahilmgandhi	18:6a4db94011d3	426	* @arg UART_WAKEUPMETHOD_IDLELINE: Wake-up by an idle line detection
sahilmgandhi	18:6a4db94011d3	427	* @arg UART_WAKEUPMETHOD_ADDRESSMARK: Wake-up by an address mark
sahilmgandhi	18:6a4db94011d3	428	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	429	*/
sahilmgandhi	18:6a4db94011d3	430	HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
sahilmgandhi	18:6a4db94011d3	431	{
sahilmgandhi	18:6a4db94011d3	432	/* Check the UART handle allocation */
sahilmgandhi	18:6a4db94011d3	433	if(huart == NULL)
sahilmgandhi	18:6a4db94011d3	434	{
sahilmgandhi	18:6a4db94011d3	435	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	436	}
sahilmgandhi	18:6a4db94011d3	437
sahilmgandhi	18:6a4db94011d3	438	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	439	assert_param(IS_UART_INSTANCE(huart->Instance));
sahilmgandhi	18:6a4db94011d3	440	assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
sahilmgandhi	18:6a4db94011d3	441	assert_param(IS_UART_ADDRESS(Address));
sahilmgandhi	18:6a4db94011d3	442	assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
sahilmgandhi	18:6a4db94011d3	443	assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
sahilmgandhi	18:6a4db94011d3	444
sahilmgandhi	18:6a4db94011d3	445	if(huart->gState == HAL_UART_STATE_RESET)
sahilmgandhi	18:6a4db94011d3	446	{
sahilmgandhi	18:6a4db94011d3	447	/* Allocate lock resource and initialize it */
sahilmgandhi	18:6a4db94011d3	448	huart->Lock = HAL_UNLOCKED;
sahilmgandhi	18:6a4db94011d3	449	/* Init the low level hardware */
sahilmgandhi	18:6a4db94011d3	450	HAL_UART_MspInit(huart);
sahilmgandhi	18:6a4db94011d3	451	}
sahilmgandhi	18:6a4db94011d3	452
sahilmgandhi	18:6a4db94011d3	453	huart->gState = HAL_UART_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	454
sahilmgandhi	18:6a4db94011d3	455	/* Disable the peripheral */
sahilmgandhi	18:6a4db94011d3	456	__HAL_UART_DISABLE(huart);
sahilmgandhi	18:6a4db94011d3	457
sahilmgandhi	18:6a4db94011d3	458	/* Set the UART Communication parameters */
sahilmgandhi	18:6a4db94011d3	459	UART_SetConfig(huart);
sahilmgandhi	18:6a4db94011d3	460
sahilmgandhi	18:6a4db94011d3	461	/* In Multi-Processor mode, the following bits must be kept cleared:
sahilmgandhi	18:6a4db94011d3	462	- LINEN and CLKEN bits in the USART_CR2 register,
sahilmgandhi	18:6a4db94011d3	463	- SCEN, HDSEL and IREN bits in the USART_CR3 register */
sahilmgandhi	18:6a4db94011d3	464	CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN \| USART_CR2_CLKEN));
sahilmgandhi	18:6a4db94011d3	465	CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN \| USART_CR3_HDSEL \| USART_CR3_IREN));
sahilmgandhi	18:6a4db94011d3	466
sahilmgandhi	18:6a4db94011d3	467	/* Clear the USART address */
sahilmgandhi	18:6a4db94011d3	468	CLEAR_BIT(huart->Instance->CR2, USART_CR2_ADD);
sahilmgandhi	18:6a4db94011d3	469	/* Set the USART address node */
sahilmgandhi	18:6a4db94011d3	470	SET_BIT(huart->Instance->CR2, Address);
sahilmgandhi	18:6a4db94011d3	471
sahilmgandhi	18:6a4db94011d3	472	/* Set the wake up method by setting the WAKE bit in the CR1 register */
sahilmgandhi	18:6a4db94011d3	473	CLEAR_BIT(huart->Instance->CR1, USART_CR1_WAKE);
sahilmgandhi	18:6a4db94011d3	474	SET_BIT(huart->Instance->CR1, WakeUpMethod);
sahilmgandhi	18:6a4db94011d3	475
sahilmgandhi	18:6a4db94011d3	476	/* Enable the peripheral */
sahilmgandhi	18:6a4db94011d3	477	__HAL_UART_ENABLE(huart);
sahilmgandhi	18:6a4db94011d3	478
sahilmgandhi	18:6a4db94011d3	479	/* Initialize the UART state */
sahilmgandhi	18:6a4db94011d3	480	huart->ErrorCode = HAL_UART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	481	huart->gState= HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	482	huart->RxState= HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	483
sahilmgandhi	18:6a4db94011d3	484	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	485	}
sahilmgandhi	18:6a4db94011d3	486
sahilmgandhi	18:6a4db94011d3	487	/**
sahilmgandhi	18:6a4db94011d3	488	* @brief DeInitializes the UART peripheral.
sahilmgandhi	18:6a4db94011d3	489	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	490	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	491	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	492	*/
sahilmgandhi	18:6a4db94011d3	493	HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	494	{
sahilmgandhi	18:6a4db94011d3	495	/* Check the UART handle allocation */
sahilmgandhi	18:6a4db94011d3	496	if(huart == NULL)
sahilmgandhi	18:6a4db94011d3	497	{
sahilmgandhi	18:6a4db94011d3	498	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	499	}
sahilmgandhi	18:6a4db94011d3	500
sahilmgandhi	18:6a4db94011d3	501	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	502	assert_param(IS_UART_INSTANCE(huart->Instance));
sahilmgandhi	18:6a4db94011d3	503
sahilmgandhi	18:6a4db94011d3	504	huart->gState = HAL_UART_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	505
sahilmgandhi	18:6a4db94011d3	506	/* DeInit the low level hardware */
sahilmgandhi	18:6a4db94011d3	507	HAL_UART_MspDeInit(huart);
sahilmgandhi	18:6a4db94011d3	508
sahilmgandhi	18:6a4db94011d3	509	huart->ErrorCode = HAL_UART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	510	huart->gState = HAL_UART_STATE_RESET;
sahilmgandhi	18:6a4db94011d3	511	huart->RxState = HAL_UART_STATE_RESET;
sahilmgandhi	18:6a4db94011d3	512
sahilmgandhi	18:6a4db94011d3	513	/* Process Lock */
sahilmgandhi	18:6a4db94011d3	514	__HAL_UNLOCK(huart);
sahilmgandhi	18:6a4db94011d3	515
sahilmgandhi	18:6a4db94011d3	516	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	517	}
sahilmgandhi	18:6a4db94011d3	518
sahilmgandhi	18:6a4db94011d3	519	/**
sahilmgandhi	18:6a4db94011d3	520	* @brief UART MSP Init.
sahilmgandhi	18:6a4db94011d3	521	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	522	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	523	* @retval None
sahilmgandhi	18:6a4db94011d3	524	*/
sahilmgandhi	18:6a4db94011d3	525	__weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	526	{
sahilmgandhi	18:6a4db94011d3	527	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	528	UNUSED(huart);
sahilmgandhi	18:6a4db94011d3	529	/* NOTE: This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	530	the HAL_UART_MspInit could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	531	*/
sahilmgandhi	18:6a4db94011d3	532	}
sahilmgandhi	18:6a4db94011d3	533
sahilmgandhi	18:6a4db94011d3	534	/**
sahilmgandhi	18:6a4db94011d3	535	* @brief UART MSP DeInit.
sahilmgandhi	18:6a4db94011d3	536	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	537	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	538	* @retval None
sahilmgandhi	18:6a4db94011d3	539	*/
sahilmgandhi	18:6a4db94011d3	540	__weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	541	{
sahilmgandhi	18:6a4db94011d3	542	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	543	UNUSED(huart);
sahilmgandhi	18:6a4db94011d3	544	/* NOTE: This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	545	the HAL_UART_MspDeInit could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	546	*/
sahilmgandhi	18:6a4db94011d3	547	}
sahilmgandhi	18:6a4db94011d3	548
sahilmgandhi	18:6a4db94011d3	549	/**
sahilmgandhi	18:6a4db94011d3	550	* @}
sahilmgandhi	18:6a4db94011d3	551	*/
sahilmgandhi	18:6a4db94011d3	552
sahilmgandhi	18:6a4db94011d3	553	/** @defgroup UART_Exported_Functions_Group2 IO operation functions
sahilmgandhi	18:6a4db94011d3	554	* @brief UART Transmit and Receive functions
sahilmgandhi	18:6a4db94011d3	555	*
sahilmgandhi	18:6a4db94011d3	556	@verbatim
sahilmgandhi	18:6a4db94011d3	557	==============================================================================
sahilmgandhi	18:6a4db94011d3	558	##### IO operation functions #####
sahilmgandhi	18:6a4db94011d3	559	==============================================================================
sahilmgandhi	18:6a4db94011d3	560	[..]
sahilmgandhi	18:6a4db94011d3	561	This subsection provides a set of functions allowing to manage the UART asynchronous
sahilmgandhi	18:6a4db94011d3	562	and Half duplex data transfers.
sahilmgandhi	18:6a4db94011d3	563
sahilmgandhi	18:6a4db94011d3	564	(#) There are two modes of transfer:
sahilmgandhi	18:6a4db94011d3	565	(++) Blocking mode: The communication is performed in polling mode.
sahilmgandhi	18:6a4db94011d3	566	The HAL status of all data processing is returned by the same function
sahilmgandhi	18:6a4db94011d3	567	after finishing transfer.
sahilmgandhi	18:6a4db94011d3	568	(++) Non blocking mode: The communication is performed using Interrupts
sahilmgandhi	18:6a4db94011d3	569	or DMA, these APIs return the HAL status.
sahilmgandhi	18:6a4db94011d3	570	The end of the data processing will be indicated through the
sahilmgandhi	18:6a4db94011d3	571	dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
sahilmgandhi	18:6a4db94011d3	572	using DMA mode.
sahilmgandhi	18:6a4db94011d3	573	The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks
sahilmgandhi	18:6a4db94011d3	574	will be executed respectively at the end of the transmit or receive process.
sahilmgandhi	18:6a4db94011d3	575	The HAL_UART_ErrorCallback() user callback will be executed when
sahilmgandhi	18:6a4db94011d3	576	a communication error is detected.
sahilmgandhi	18:6a4db94011d3	577
sahilmgandhi	18:6a4db94011d3	578	(#) Blocking mode APIs are:
sahilmgandhi	18:6a4db94011d3	579	(++) HAL_UART_Transmit()
sahilmgandhi	18:6a4db94011d3	580	(++) HAL_UART_Receive()
sahilmgandhi	18:6a4db94011d3	581
sahilmgandhi	18:6a4db94011d3	582	(#) Non Blocking mode APIs with Interrupt are:
sahilmgandhi	18:6a4db94011d3	583	(++) HAL_UART_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	584	(++) HAL_UART_Receive_IT()
sahilmgandhi	18:6a4db94011d3	585	(++) HAL_UART_IRQHandler()
sahilmgandhi	18:6a4db94011d3	586
sahilmgandhi	18:6a4db94011d3	587	(#) Non Blocking mode functions with DMA are:
sahilmgandhi	18:6a4db94011d3	588	(++) HAL_UART_Transmit_DMA()
sahilmgandhi	18:6a4db94011d3	589	(++) HAL_UART_Receive_DMA()
sahilmgandhi	18:6a4db94011d3	590
sahilmgandhi	18:6a4db94011d3	591	(#) A set of Transfer Complete Callbacks are provided in non blocking mode:
sahilmgandhi	18:6a4db94011d3	592	(++) HAL_UART_TxCpltCallback()
sahilmgandhi	18:6a4db94011d3	593	(++) HAL_UART_RxCpltCallback()
sahilmgandhi	18:6a4db94011d3	594	(++) HAL_UART_ErrorCallback()
sahilmgandhi	18:6a4db94011d3	595
sahilmgandhi	18:6a4db94011d3	596	[..]
sahilmgandhi	18:6a4db94011d3	597	(@) In the Half duplex communication, it is forbidden to run the transmit
sahilmgandhi	18:6a4db94011d3	598	and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX
sahilmgandhi	18:6a4db94011d3	599	can't be useful.
sahilmgandhi	18:6a4db94011d3	600
sahilmgandhi	18:6a4db94011d3	601	@endverbatim
sahilmgandhi	18:6a4db94011d3	602	* @{
sahilmgandhi	18:6a4db94011d3	603	*/
sahilmgandhi	18:6a4db94011d3	604
sahilmgandhi	18:6a4db94011d3	605	/**
sahilmgandhi	18:6a4db94011d3	606	* @brief Sends an amount of data in blocking mode.
sahilmgandhi	18:6a4db94011d3	607	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	608	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	609	* @param pData: Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	610	* @param Size: Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	611	* @param Timeout: Timeout duration
sahilmgandhi	18:6a4db94011d3	612	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	613	*/
sahilmgandhi	18:6a4db94011d3	614	HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	615	{
sahilmgandhi	18:6a4db94011d3	616	uint16_t* tmp;
sahilmgandhi	18:6a4db94011d3	617	uint32_t tickstart = 0U;
sahilmgandhi	18:6a4db94011d3	618
sahilmgandhi	18:6a4db94011d3	619	/* Check that a Tx process is not already ongoing */
sahilmgandhi	18:6a4db94011d3	620	if(huart->gState == HAL_UART_STATE_READY)
sahilmgandhi	18:6a4db94011d3	621	{
sahilmgandhi	18:6a4db94011d3	622	if((pData == NULL ) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	623	{
sahilmgandhi	18:6a4db94011d3	624	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	625	}
sahilmgandhi	18:6a4db94011d3	626
sahilmgandhi	18:6a4db94011d3	627	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	628	__HAL_LOCK(huart);
sahilmgandhi	18:6a4db94011d3	629
sahilmgandhi	18:6a4db94011d3	630	huart->ErrorCode = HAL_UART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	631	huart->gState = HAL_UART_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	632
sahilmgandhi	18:6a4db94011d3	633	/* Init tickstart for timeout managment */
sahilmgandhi	18:6a4db94011d3	634	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	635
sahilmgandhi	18:6a4db94011d3	636	huart->TxXferSize = Size;
sahilmgandhi	18:6a4db94011d3	637	huart->TxXferCount = Size;
sahilmgandhi	18:6a4db94011d3	638	while(huart->TxXferCount > 0U)
sahilmgandhi	18:6a4db94011d3	639	{
sahilmgandhi	18:6a4db94011d3	640	huart->TxXferCount--;
sahilmgandhi	18:6a4db94011d3	641	if(huart->Init.WordLength == UART_WORDLENGTH_9B)
sahilmgandhi	18:6a4db94011d3	642	{
sahilmgandhi	18:6a4db94011d3	643	if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	644	{
sahilmgandhi	18:6a4db94011d3	645	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	646	}
sahilmgandhi	18:6a4db94011d3	647	tmp = (uint16_t*) pData;
sahilmgandhi	18:6a4db94011d3	648	huart->Instance->DR = (*tmp & (uint16_t)0x01FFU);
sahilmgandhi	18:6a4db94011d3	649	if(huart->Init.Parity == UART_PARITY_NONE)
sahilmgandhi	18:6a4db94011d3	650	{
sahilmgandhi	18:6a4db94011d3	651	pData +=2;
sahilmgandhi	18:6a4db94011d3	652	}
sahilmgandhi	18:6a4db94011d3	653	else
sahilmgandhi	18:6a4db94011d3	654	{
sahilmgandhi	18:6a4db94011d3	655	pData +=1;
sahilmgandhi	18:6a4db94011d3	656	}
sahilmgandhi	18:6a4db94011d3	657	}
sahilmgandhi	18:6a4db94011d3	658	else
sahilmgandhi	18:6a4db94011d3	659	{
sahilmgandhi	18:6a4db94011d3	660	if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	661	{
sahilmgandhi	18:6a4db94011d3	662	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	663	}
sahilmgandhi	18:6a4db94011d3	664	huart->Instance->DR = (*pData++ & (uint8_t)0xFFU);
sahilmgandhi	18:6a4db94011d3	665	}
sahilmgandhi	18:6a4db94011d3	666	}
sahilmgandhi	18:6a4db94011d3	667
sahilmgandhi	18:6a4db94011d3	668	if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	669	{
sahilmgandhi	18:6a4db94011d3	670	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	671	}
sahilmgandhi	18:6a4db94011d3	672
sahilmgandhi	18:6a4db94011d3	673	/* At end of Tx process, restore huart->gState to Ready */
sahilmgandhi	18:6a4db94011d3	674	huart->gState = HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	675
sahilmgandhi	18:6a4db94011d3	676	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	677	__HAL_UNLOCK(huart);
sahilmgandhi	18:6a4db94011d3	678
sahilmgandhi	18:6a4db94011d3	679	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	680	}
sahilmgandhi	18:6a4db94011d3	681	else
sahilmgandhi	18:6a4db94011d3	682	{
sahilmgandhi	18:6a4db94011d3	683	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	684	}
sahilmgandhi	18:6a4db94011d3	685	}
sahilmgandhi	18:6a4db94011d3	686
sahilmgandhi	18:6a4db94011d3	687	/**
sahilmgandhi	18:6a4db94011d3	688	* @brief Receives an amount of data in blocking mode.
sahilmgandhi	18:6a4db94011d3	689	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	690	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	691	* @param pData: Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	692	* @param Size: Amount of data to be received
sahilmgandhi	18:6a4db94011d3	693	* @param Timeout: Timeout duration
sahilmgandhi	18:6a4db94011d3	694	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	695	*/
sahilmgandhi	18:6a4db94011d3	696	HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	697	{
sahilmgandhi	18:6a4db94011d3	698	uint16_t* tmp;
sahilmgandhi	18:6a4db94011d3	699	uint32_t tickstart = 0U;
sahilmgandhi	18:6a4db94011d3	700
sahilmgandhi	18:6a4db94011d3	701	/* Check that a Rx process is not already ongoing */
sahilmgandhi	18:6a4db94011d3	702	if(huart->RxState == HAL_UART_STATE_READY)
sahilmgandhi	18:6a4db94011d3	703	{
sahilmgandhi	18:6a4db94011d3	704	if((pData == NULL ) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	705	{
sahilmgandhi	18:6a4db94011d3	706	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	707	}
sahilmgandhi	18:6a4db94011d3	708
sahilmgandhi	18:6a4db94011d3	709	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	710	__HAL_LOCK(huart);
sahilmgandhi	18:6a4db94011d3	711
sahilmgandhi	18:6a4db94011d3	712	huart->ErrorCode = HAL_UART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	713	huart->RxState = HAL_UART_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	714
sahilmgandhi	18:6a4db94011d3	715	/* Init tickstart for timeout managment */
sahilmgandhi	18:6a4db94011d3	716	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	717
sahilmgandhi	18:6a4db94011d3	718	huart->RxXferSize = Size;
sahilmgandhi	18:6a4db94011d3	719	huart->RxXferCount = Size;
sahilmgandhi	18:6a4db94011d3	720
sahilmgandhi	18:6a4db94011d3	721	/* Check the remain data to be received */
sahilmgandhi	18:6a4db94011d3	722	while(huart->RxXferCount > 0U)
sahilmgandhi	18:6a4db94011d3	723	{
sahilmgandhi	18:6a4db94011d3	724	huart->RxXferCount--;
sahilmgandhi	18:6a4db94011d3	725	if(huart->Init.WordLength == UART_WORDLENGTH_9B)
sahilmgandhi	18:6a4db94011d3	726	{
sahilmgandhi	18:6a4db94011d3	727	if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	728	{
sahilmgandhi	18:6a4db94011d3	729	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	730	}
sahilmgandhi	18:6a4db94011d3	731	tmp = (uint16_t*) pData ;
sahilmgandhi	18:6a4db94011d3	732	if(huart->Init.Parity == UART_PARITY_NONE)
sahilmgandhi	18:6a4db94011d3	733	{
sahilmgandhi	18:6a4db94011d3	734	*tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FFU);
sahilmgandhi	18:6a4db94011d3	735	pData +=2;
sahilmgandhi	18:6a4db94011d3	736	}
sahilmgandhi	18:6a4db94011d3	737	else
sahilmgandhi	18:6a4db94011d3	738	{
sahilmgandhi	18:6a4db94011d3	739	*tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FFU);
sahilmgandhi	18:6a4db94011d3	740	pData +=1;
sahilmgandhi	18:6a4db94011d3	741	}
sahilmgandhi	18:6a4db94011d3	742
sahilmgandhi	18:6a4db94011d3	743	}
sahilmgandhi	18:6a4db94011d3	744	else
sahilmgandhi	18:6a4db94011d3	745	{
sahilmgandhi	18:6a4db94011d3	746	if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	747	{
sahilmgandhi	18:6a4db94011d3	748	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	749	}
sahilmgandhi	18:6a4db94011d3	750	if(huart->Init.Parity == UART_PARITY_NONE)
sahilmgandhi	18:6a4db94011d3	751	{
sahilmgandhi	18:6a4db94011d3	752	*pData++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FFU);
sahilmgandhi	18:6a4db94011d3	753	}
sahilmgandhi	18:6a4db94011d3	754	else
sahilmgandhi	18:6a4db94011d3	755	{
sahilmgandhi	18:6a4db94011d3	756	*pData++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007FU);
sahilmgandhi	18:6a4db94011d3	757	}
sahilmgandhi	18:6a4db94011d3	758
sahilmgandhi	18:6a4db94011d3	759	}
sahilmgandhi	18:6a4db94011d3	760	}
sahilmgandhi	18:6a4db94011d3	761
sahilmgandhi	18:6a4db94011d3	762	/* At end of Rx process, restore huart->RxState to Ready */
sahilmgandhi	18:6a4db94011d3	763	huart->RxState = HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	764
sahilmgandhi	18:6a4db94011d3	765	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	766	__HAL_UNLOCK(huart);
sahilmgandhi	18:6a4db94011d3	767
sahilmgandhi	18:6a4db94011d3	768	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	769	}
sahilmgandhi	18:6a4db94011d3	770	else
sahilmgandhi	18:6a4db94011d3	771	{
sahilmgandhi	18:6a4db94011d3	772	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	773	}
sahilmgandhi	18:6a4db94011d3	774	}
sahilmgandhi	18:6a4db94011d3	775
sahilmgandhi	18:6a4db94011d3	776	/**
sahilmgandhi	18:6a4db94011d3	777	* @brief Sends an amount of data in non blocking mode.
sahilmgandhi	18:6a4db94011d3	778	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	779	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	780	* @param pData: Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	781	* @param Size: Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	782	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	783	*/
sahilmgandhi	18:6a4db94011d3	784	HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	785	{
sahilmgandhi	18:6a4db94011d3	786	/* Check that a Tx process is not already ongoing */
sahilmgandhi	18:6a4db94011d3	787	if(huart->gState == HAL_UART_STATE_READY)
sahilmgandhi	18:6a4db94011d3	788	{
sahilmgandhi	18:6a4db94011d3	789	if((pData == NULL ) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	790	{
sahilmgandhi	18:6a4db94011d3	791	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	792	}
sahilmgandhi	18:6a4db94011d3	793
sahilmgandhi	18:6a4db94011d3	794	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	795	__HAL_LOCK(huart);
sahilmgandhi	18:6a4db94011d3	796
sahilmgandhi	18:6a4db94011d3	797	huart->pTxBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	798	huart->TxXferSize = Size;
sahilmgandhi	18:6a4db94011d3	799	huart->TxXferCount = Size;
sahilmgandhi	18:6a4db94011d3	800
sahilmgandhi	18:6a4db94011d3	801	huart->ErrorCode = HAL_UART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	802	huart->gState = HAL_UART_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	803
sahilmgandhi	18:6a4db94011d3	804	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	805	__HAL_UNLOCK(huart);
sahilmgandhi	18:6a4db94011d3	806
sahilmgandhi	18:6a4db94011d3	807	/* Enable the UART Transmit data register empty Interrupt */
sahilmgandhi	18:6a4db94011d3	808	SET_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
sahilmgandhi	18:6a4db94011d3	809
sahilmgandhi	18:6a4db94011d3	810	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	811	}
sahilmgandhi	18:6a4db94011d3	812	else
sahilmgandhi	18:6a4db94011d3	813	{
sahilmgandhi	18:6a4db94011d3	814	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	815	}
sahilmgandhi	18:6a4db94011d3	816	}
sahilmgandhi	18:6a4db94011d3	817
sahilmgandhi	18:6a4db94011d3	818	/**
sahilmgandhi	18:6a4db94011d3	819	* @brief Receives an amount of data in non blocking mode
sahilmgandhi	18:6a4db94011d3	820	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	821	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	822	* @param pData: Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	823	* @param Size: Amount of data to be received
sahilmgandhi	18:6a4db94011d3	824	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	825	*/
sahilmgandhi	18:6a4db94011d3	826	HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	827	{
sahilmgandhi	18:6a4db94011d3	828	/* Check that a Rx process is not already ongoing */
sahilmgandhi	18:6a4db94011d3	829	if(huart->RxState == HAL_UART_STATE_READY)
sahilmgandhi	18:6a4db94011d3	830	{
sahilmgandhi	18:6a4db94011d3	831	if((pData == NULL ) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	832	{
sahilmgandhi	18:6a4db94011d3	833	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	834	}
sahilmgandhi	18:6a4db94011d3	835
sahilmgandhi	18:6a4db94011d3	836	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	837	__HAL_LOCK(huart);
sahilmgandhi	18:6a4db94011d3	838
sahilmgandhi	18:6a4db94011d3	839	huart->pRxBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	840	huart->RxXferSize = Size;
sahilmgandhi	18:6a4db94011d3	841	huart->RxXferCount = Size;
sahilmgandhi	18:6a4db94011d3	842
sahilmgandhi	18:6a4db94011d3	843	huart->ErrorCode = HAL_UART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	844	huart->RxState = HAL_UART_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	845
sahilmgandhi	18:6a4db94011d3	846	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	847	__HAL_UNLOCK(huart);
sahilmgandhi	18:6a4db94011d3	848
sahilmgandhi	18:6a4db94011d3	849	/* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
sahilmgandhi	18:6a4db94011d3	850	SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
sahilmgandhi	18:6a4db94011d3	851
sahilmgandhi	18:6a4db94011d3	852	/* Enable the UART Parity Error and Data Register not empty Interrupts */
sahilmgandhi	18:6a4db94011d3	853	SET_BIT(huart->Instance->CR1, USART_CR1_PEIE \| USART_CR1_RXNEIE);
sahilmgandhi	18:6a4db94011d3	854
sahilmgandhi	18:6a4db94011d3	855	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	856	}
sahilmgandhi	18:6a4db94011d3	857	else
sahilmgandhi	18:6a4db94011d3	858	{
sahilmgandhi	18:6a4db94011d3	859	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	860	}
sahilmgandhi	18:6a4db94011d3	861	}
sahilmgandhi	18:6a4db94011d3	862
sahilmgandhi	18:6a4db94011d3	863	/**
sahilmgandhi	18:6a4db94011d3	864	* @brief Sends an amount of data in non blocking mode.
sahilmgandhi	18:6a4db94011d3	865	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	866	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	867	* @param pData: Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	868	* @param Size: Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	869	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	870	*/
sahilmgandhi	18:6a4db94011d3	871	HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	872	{
sahilmgandhi	18:6a4db94011d3	873	uint32_t *tmp;
sahilmgandhi	18:6a4db94011d3	874
sahilmgandhi	18:6a4db94011d3	875	/* Check that a Tx process is not already ongoing */
sahilmgandhi	18:6a4db94011d3	876	if(huart->gState == HAL_UART_STATE_READY)
sahilmgandhi	18:6a4db94011d3	877	{
sahilmgandhi	18:6a4db94011d3	878	if((pData == NULL ) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	879	{
sahilmgandhi	18:6a4db94011d3	880	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	881	}
sahilmgandhi	18:6a4db94011d3	882
sahilmgandhi	18:6a4db94011d3	883	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	884	__HAL_LOCK(huart);
sahilmgandhi	18:6a4db94011d3	885
sahilmgandhi	18:6a4db94011d3	886	huart->pTxBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	887	huart->TxXferSize = Size;
sahilmgandhi	18:6a4db94011d3	888	huart->TxXferCount = Size;
sahilmgandhi	18:6a4db94011d3	889
sahilmgandhi	18:6a4db94011d3	890	huart->ErrorCode = HAL_UART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	891	huart->gState = HAL_UART_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	892
sahilmgandhi	18:6a4db94011d3	893	/* Set the UART DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	894	huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
sahilmgandhi	18:6a4db94011d3	895
sahilmgandhi	18:6a4db94011d3	896	/* Set the UART DMA Half transfer complete callback */
sahilmgandhi	18:6a4db94011d3	897	huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
sahilmgandhi	18:6a4db94011d3	898
sahilmgandhi	18:6a4db94011d3	899	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	900	huart->hdmatx->XferErrorCallback = UART_DMAError;
sahilmgandhi	18:6a4db94011d3	901
sahilmgandhi	18:6a4db94011d3	902	/* Set the DMA abort callback */
sahilmgandhi	18:6a4db94011d3	903	huart->hdmatx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	904
sahilmgandhi	18:6a4db94011d3	905	/* Enable the UART transmit DMA Stream */
sahilmgandhi	18:6a4db94011d3	906	tmp = (uint32_t*)&pData;
sahilmgandhi	18:6a4db94011d3	907	HAL_DMA_Start_IT(huart->hdmatx, (uint32_t)tmp, (uint32_t)&huart->Instance->DR, Size);
sahilmgandhi	18:6a4db94011d3	908
sahilmgandhi	18:6a4db94011d3	909	/* Clear the TC flag in the SR register by writing 0 to it */
sahilmgandhi	18:6a4db94011d3	910	__HAL_UART_CLEAR_FLAG(huart, UART_FLAG_TC);
sahilmgandhi	18:6a4db94011d3	911
sahilmgandhi	18:6a4db94011d3	912	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	913	__HAL_UNLOCK(huart);
sahilmgandhi	18:6a4db94011d3	914
sahilmgandhi	18:6a4db94011d3	915	/* Enable the DMA transfer for transmit request by setting the DMAT bit
sahilmgandhi	18:6a4db94011d3	916	in the UART CR3 register */
sahilmgandhi	18:6a4db94011d3	917	SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
sahilmgandhi	18:6a4db94011d3	918
sahilmgandhi	18:6a4db94011d3	919	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	920	}
sahilmgandhi	18:6a4db94011d3	921	else
sahilmgandhi	18:6a4db94011d3	922	{
sahilmgandhi	18:6a4db94011d3	923	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	924	}
sahilmgandhi	18:6a4db94011d3	925	}
sahilmgandhi	18:6a4db94011d3	926
sahilmgandhi	18:6a4db94011d3	927	/**
sahilmgandhi	18:6a4db94011d3	928	* @brief Receives an amount of data in non blocking mode.
sahilmgandhi	18:6a4db94011d3	929	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	930	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	931	* @param pData: Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	932	* @param Size: Amount of data to be received
sahilmgandhi	18:6a4db94011d3	933	* @note When the UART parity is enabled (PCE = 1) the data received contain the parity bit.
sahilmgandhi	18:6a4db94011d3	934	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	935	*/
sahilmgandhi	18:6a4db94011d3	936	HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef huart, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	937	{
sahilmgandhi	18:6a4db94011d3	938	uint32_t *tmp;
sahilmgandhi	18:6a4db94011d3	939
sahilmgandhi	18:6a4db94011d3	940	/* Check that a Rx process is not already ongoing */
sahilmgandhi	18:6a4db94011d3	941	if(huart->RxState == HAL_UART_STATE_READY)
sahilmgandhi	18:6a4db94011d3	942	{
sahilmgandhi	18:6a4db94011d3	943	if((pData == NULL ) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	944	{
sahilmgandhi	18:6a4db94011d3	945	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	946	}
sahilmgandhi	18:6a4db94011d3	947
sahilmgandhi	18:6a4db94011d3	948	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	949	__HAL_LOCK(huart);
sahilmgandhi	18:6a4db94011d3	950
sahilmgandhi	18:6a4db94011d3	951	huart->pRxBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	952	huart->RxXferSize = Size;
sahilmgandhi	18:6a4db94011d3	953
sahilmgandhi	18:6a4db94011d3	954	huart->ErrorCode = HAL_UART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	955	huart->RxState = HAL_UART_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	956
sahilmgandhi	18:6a4db94011d3	957	/* Set the UART DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	958	huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
sahilmgandhi	18:6a4db94011d3	959
sahilmgandhi	18:6a4db94011d3	960	/* Set the UART DMA Half transfer complete callback */
sahilmgandhi	18:6a4db94011d3	961	huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
sahilmgandhi	18:6a4db94011d3	962
sahilmgandhi	18:6a4db94011d3	963	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	964	huart->hdmarx->XferErrorCallback = UART_DMAError;
sahilmgandhi	18:6a4db94011d3	965
sahilmgandhi	18:6a4db94011d3	966	/* Set the DMA abort callback */
sahilmgandhi	18:6a4db94011d3	967	huart->hdmarx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	968
sahilmgandhi	18:6a4db94011d3	969	/* Enable the DMA Stream */
sahilmgandhi	18:6a4db94011d3	970	tmp = (uint32_t*)&pData;
sahilmgandhi	18:6a4db94011d3	971	HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->DR, (uint32_t)tmp, Size);
sahilmgandhi	18:6a4db94011d3	972
sahilmgandhi	18:6a4db94011d3	973	/* Enable the UART Parity Error Interrupt */
sahilmgandhi	18:6a4db94011d3	974	SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
sahilmgandhi	18:6a4db94011d3	975
sahilmgandhi	18:6a4db94011d3	976	/* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
sahilmgandhi	18:6a4db94011d3	977	SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
sahilmgandhi	18:6a4db94011d3	978
sahilmgandhi	18:6a4db94011d3	979	/* Enable the DMA transfer for the receiver request by setting the DMAR bit
sahilmgandhi	18:6a4db94011d3	980	in the UART CR3 register */
sahilmgandhi	18:6a4db94011d3	981	SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
sahilmgandhi	18:6a4db94011d3	982
sahilmgandhi	18:6a4db94011d3	983	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	984	__HAL_UNLOCK(huart);
sahilmgandhi	18:6a4db94011d3	985
sahilmgandhi	18:6a4db94011d3	986	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	987	}
sahilmgandhi	18:6a4db94011d3	988	else
sahilmgandhi	18:6a4db94011d3	989	{
sahilmgandhi	18:6a4db94011d3	990	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	991	}
sahilmgandhi	18:6a4db94011d3	992	}
sahilmgandhi	18:6a4db94011d3	993
sahilmgandhi	18:6a4db94011d3	994	/**
sahilmgandhi	18:6a4db94011d3	995	* @brief Pauses the DMA Transfer.
sahilmgandhi	18:6a4db94011d3	996	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	997	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	998	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	999	*/
sahilmgandhi	18:6a4db94011d3	1000	HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1001	{
sahilmgandhi	18:6a4db94011d3	1002	uint32_t dmarequest = 0x00U;
sahilmgandhi	18:6a4db94011d3	1003
sahilmgandhi	18:6a4db94011d3	1004	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1005	__HAL_LOCK(huart);
sahilmgandhi	18:6a4db94011d3	1006	dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
sahilmgandhi	18:6a4db94011d3	1007	if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
sahilmgandhi	18:6a4db94011d3	1008	{
sahilmgandhi	18:6a4db94011d3	1009	/* Disable the UART DMA Tx request */
sahilmgandhi	18:6a4db94011d3	1010	CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
sahilmgandhi	18:6a4db94011d3	1011	}
sahilmgandhi	18:6a4db94011d3	1012	dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
sahilmgandhi	18:6a4db94011d3	1013	if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
sahilmgandhi	18:6a4db94011d3	1014	{
sahilmgandhi	18:6a4db94011d3	1015	/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
sahilmgandhi	18:6a4db94011d3	1016	CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
sahilmgandhi	18:6a4db94011d3	1017	CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
sahilmgandhi	18:6a4db94011d3	1018
sahilmgandhi	18:6a4db94011d3	1019	/* Disable the UART DMA Rx request */
sahilmgandhi	18:6a4db94011d3	1020	CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
sahilmgandhi	18:6a4db94011d3	1021	}
sahilmgandhi	18:6a4db94011d3	1022
sahilmgandhi	18:6a4db94011d3	1023	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1024	__HAL_UNLOCK(huart);
sahilmgandhi	18:6a4db94011d3	1025
sahilmgandhi	18:6a4db94011d3	1026	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1027	}
sahilmgandhi	18:6a4db94011d3	1028
sahilmgandhi	18:6a4db94011d3	1029	/**
sahilmgandhi	18:6a4db94011d3	1030	* @brief Resumes the DMA Transfer.
sahilmgandhi	18:6a4db94011d3	1031	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1032	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	1033	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1034	*/
sahilmgandhi	18:6a4db94011d3	1035	HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1036	{
sahilmgandhi	18:6a4db94011d3	1037	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1038	__HAL_LOCK(huart);
sahilmgandhi	18:6a4db94011d3	1039
sahilmgandhi	18:6a4db94011d3	1040	if(huart->gState == HAL_UART_STATE_BUSY_TX)
sahilmgandhi	18:6a4db94011d3	1041	{
sahilmgandhi	18:6a4db94011d3	1042	/* Enable the UART DMA Tx request */
sahilmgandhi	18:6a4db94011d3	1043	SET_BIT(huart->Instance->CR3, USART_CR3_DMAT);
sahilmgandhi	18:6a4db94011d3	1044	}
sahilmgandhi	18:6a4db94011d3	1045	if(huart->RxState == HAL_UART_STATE_BUSY_RX)
sahilmgandhi	18:6a4db94011d3	1046	{
sahilmgandhi	18:6a4db94011d3	1047	/* Clear the Overrun flag before resuming the Rx transfer*/
sahilmgandhi	18:6a4db94011d3	1048	__HAL_UART_CLEAR_OREFLAG(huart);
sahilmgandhi	18:6a4db94011d3	1049
sahilmgandhi	18:6a4db94011d3	1050	/* Reenable PE and ERR (Frame error, noise error, overrun error) interrupts */
sahilmgandhi	18:6a4db94011d3	1051	SET_BIT(huart->Instance->CR1, USART_CR1_PEIE);
sahilmgandhi	18:6a4db94011d3	1052	SET_BIT(huart->Instance->CR3, USART_CR3_EIE);
sahilmgandhi	18:6a4db94011d3	1053
sahilmgandhi	18:6a4db94011d3	1054	/* Enable the UART DMA Rx request */
sahilmgandhi	18:6a4db94011d3	1055	SET_BIT(huart->Instance->CR3, USART_CR3_DMAR);
sahilmgandhi	18:6a4db94011d3	1056	}
sahilmgandhi	18:6a4db94011d3	1057
sahilmgandhi	18:6a4db94011d3	1058	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1059	__HAL_UNLOCK(huart);
sahilmgandhi	18:6a4db94011d3	1060
sahilmgandhi	18:6a4db94011d3	1061	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1062	}
sahilmgandhi	18:6a4db94011d3	1063
sahilmgandhi	18:6a4db94011d3	1064	/**
sahilmgandhi	18:6a4db94011d3	1065	* @brief Stops the DMA Transfer.
sahilmgandhi	18:6a4db94011d3	1066	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1067	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	1068	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1069	*/
sahilmgandhi	18:6a4db94011d3	1070	HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1071	{
sahilmgandhi	18:6a4db94011d3	1072	uint32_t dmarequest = 0x00U;
sahilmgandhi	18:6a4db94011d3	1073	/* The Lock is not implemented on this API to allow the user application
sahilmgandhi	18:6a4db94011d3	1074	to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback():
sahilmgandhi	18:6a4db94011d3	1075	when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
sahilmgandhi	18:6a4db94011d3	1076	and the correspond call back is executed HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback()
sahilmgandhi	18:6a4db94011d3	1077	*/
sahilmgandhi	18:6a4db94011d3	1078
sahilmgandhi	18:6a4db94011d3	1079	/* Stop UART DMA Tx request if ongoing */
sahilmgandhi	18:6a4db94011d3	1080	dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
sahilmgandhi	18:6a4db94011d3	1081	if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
sahilmgandhi	18:6a4db94011d3	1082	{
sahilmgandhi	18:6a4db94011d3	1083	CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
sahilmgandhi	18:6a4db94011d3	1084
sahilmgandhi	18:6a4db94011d3	1085	/* Abort the UART DMA Tx channel */
sahilmgandhi	18:6a4db94011d3	1086	if(huart->hdmatx != NULL)
sahilmgandhi	18:6a4db94011d3	1087	{
sahilmgandhi	18:6a4db94011d3	1088	HAL_DMA_Abort(huart->hdmatx);
sahilmgandhi	18:6a4db94011d3	1089	}
sahilmgandhi	18:6a4db94011d3	1090	UART_EndTxTransfer(huart);
sahilmgandhi	18:6a4db94011d3	1091	}
sahilmgandhi	18:6a4db94011d3	1092
sahilmgandhi	18:6a4db94011d3	1093	/* Stop UART DMA Rx request if ongoing */
sahilmgandhi	18:6a4db94011d3	1094	dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
sahilmgandhi	18:6a4db94011d3	1095	if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
sahilmgandhi	18:6a4db94011d3	1096	{
sahilmgandhi	18:6a4db94011d3	1097	CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
sahilmgandhi	18:6a4db94011d3	1098
sahilmgandhi	18:6a4db94011d3	1099	/* Abort the UART DMA Rx channel */
sahilmgandhi	18:6a4db94011d3	1100	if(huart->hdmarx != NULL)
sahilmgandhi	18:6a4db94011d3	1101	{
sahilmgandhi	18:6a4db94011d3	1102	HAL_DMA_Abort(huart->hdmarx);
sahilmgandhi	18:6a4db94011d3	1103	}
sahilmgandhi	18:6a4db94011d3	1104	UART_EndRxTransfer(huart);
sahilmgandhi	18:6a4db94011d3	1105	}
sahilmgandhi	18:6a4db94011d3	1106
sahilmgandhi	18:6a4db94011d3	1107	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1108	}
sahilmgandhi	18:6a4db94011d3	1109
sahilmgandhi	18:6a4db94011d3	1110	/**
sahilmgandhi	18:6a4db94011d3	1111	* @brief This function handles UART interrupt request.
sahilmgandhi	18:6a4db94011d3	1112	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1113	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	1114	* @retval None
sahilmgandhi	18:6a4db94011d3	1115	*/
sahilmgandhi	18:6a4db94011d3	1116	void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1117	{
sahilmgandhi	18:6a4db94011d3	1118	uint32_t isrflags = READ_REG(huart->Instance->SR);
sahilmgandhi	18:6a4db94011d3	1119	uint32_t cr1its = READ_REG(huart->Instance->CR1);
sahilmgandhi	18:6a4db94011d3	1120	uint32_t cr3its = READ_REG(huart->Instance->CR3);
sahilmgandhi	18:6a4db94011d3	1121	uint32_t errorflags = 0x00U;
sahilmgandhi	18:6a4db94011d3	1122	uint32_t dmarequest = 0x00U;
sahilmgandhi	18:6a4db94011d3	1123
sahilmgandhi	18:6a4db94011d3	1124	/* If no error occurs */
sahilmgandhi	18:6a4db94011d3	1125	errorflags = (isrflags & (uint32_t)(USART_SR_PE \| USART_SR_FE \| USART_SR_ORE \| USART_SR_NE));
sahilmgandhi	18:6a4db94011d3	1126	if(errorflags == RESET)
sahilmgandhi	18:6a4db94011d3	1127	{
sahilmgandhi	18:6a4db94011d3	1128	/* UART in mode Receiver -------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	1129	if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
sahilmgandhi	18:6a4db94011d3	1130	{
sahilmgandhi	18:6a4db94011d3	1131	UART_Receive_IT(huart);
sahilmgandhi	18:6a4db94011d3	1132	return;
sahilmgandhi	18:6a4db94011d3	1133	}
sahilmgandhi	18:6a4db94011d3	1134	}
sahilmgandhi	18:6a4db94011d3	1135
sahilmgandhi	18:6a4db94011d3	1136	/* If some errors occur */
sahilmgandhi	18:6a4db94011d3	1137	if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) \|\| ((cr1its & (USART_CR1_RXNEIE \| USART_CR1_PEIE)) != RESET)))
sahilmgandhi	18:6a4db94011d3	1138	{
sahilmgandhi	18:6a4db94011d3	1139	/* UART parity error interrupt occurred ----------------------------------*/
sahilmgandhi	18:6a4db94011d3	1140	if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
sahilmgandhi	18:6a4db94011d3	1141	{
sahilmgandhi	18:6a4db94011d3	1142	huart->ErrorCode \|= HAL_UART_ERROR_PE;
sahilmgandhi	18:6a4db94011d3	1143	}
sahilmgandhi	18:6a4db94011d3	1144
sahilmgandhi	18:6a4db94011d3	1145	/* UART noise error interrupt occurred -----------------------------------*/
sahilmgandhi	18:6a4db94011d3	1146	if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
sahilmgandhi	18:6a4db94011d3	1147	{
sahilmgandhi	18:6a4db94011d3	1148	huart->ErrorCode \|= HAL_UART_ERROR_NE;
sahilmgandhi	18:6a4db94011d3	1149	}
sahilmgandhi	18:6a4db94011d3	1150
sahilmgandhi	18:6a4db94011d3	1151	/* UART frame error interrupt occurred -----------------------------------*/
sahilmgandhi	18:6a4db94011d3	1152	if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
sahilmgandhi	18:6a4db94011d3	1153	{
sahilmgandhi	18:6a4db94011d3	1154	huart->ErrorCode \|= HAL_UART_ERROR_FE;
sahilmgandhi	18:6a4db94011d3	1155	}
sahilmgandhi	18:6a4db94011d3	1156
sahilmgandhi	18:6a4db94011d3	1157	/* UART Over-Run interrupt occurred --------------------------------------*/
sahilmgandhi	18:6a4db94011d3	1158	if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
sahilmgandhi	18:6a4db94011d3	1159	{
sahilmgandhi	18:6a4db94011d3	1160	huart->ErrorCode \|= HAL_UART_ERROR_ORE;
sahilmgandhi	18:6a4db94011d3	1161	}
sahilmgandhi	18:6a4db94011d3	1162
sahilmgandhi	18:6a4db94011d3	1163	/* Call UART Error Call back function if need be --------------------------*/
sahilmgandhi	18:6a4db94011d3	1164	if(huart->ErrorCode != HAL_UART_ERROR_NONE)
sahilmgandhi	18:6a4db94011d3	1165	{
sahilmgandhi	18:6a4db94011d3	1166	/* UART in mode Receiver -----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	1167	if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
sahilmgandhi	18:6a4db94011d3	1168	{
sahilmgandhi	18:6a4db94011d3	1169	UART_Receive_IT(huart);
sahilmgandhi	18:6a4db94011d3	1170	}
sahilmgandhi	18:6a4db94011d3	1171
sahilmgandhi	18:6a4db94011d3	1172	/* If Overrun error occurs, or if any error occurs in DMA mode reception,
sahilmgandhi	18:6a4db94011d3	1173	consider error as blocking */
sahilmgandhi	18:6a4db94011d3	1174	dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
sahilmgandhi	18:6a4db94011d3	1175	if(((huart->ErrorCode & HAL_UART_ERROR_ORE) != RESET) \|\| dmarequest)
sahilmgandhi	18:6a4db94011d3	1176	{
sahilmgandhi	18:6a4db94011d3	1177	/* Blocking error : transfer is aborted
sahilmgandhi	18:6a4db94011d3	1178	Set the UART state ready to be able to start again the process,
sahilmgandhi	18:6a4db94011d3	1179	Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
sahilmgandhi	18:6a4db94011d3	1180	UART_EndRxTransfer(huart);
sahilmgandhi	18:6a4db94011d3	1181
sahilmgandhi	18:6a4db94011d3	1182	/* Disable the UART DMA Rx request if enabled */
sahilmgandhi	18:6a4db94011d3	1183	if(HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR))
sahilmgandhi	18:6a4db94011d3	1184	{
sahilmgandhi	18:6a4db94011d3	1185	CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
sahilmgandhi	18:6a4db94011d3	1186
sahilmgandhi	18:6a4db94011d3	1187	/* Abort the UART DMA Rx channel */
sahilmgandhi	18:6a4db94011d3	1188	if(huart->hdmarx != NULL)
sahilmgandhi	18:6a4db94011d3	1189	{
sahilmgandhi	18:6a4db94011d3	1190	/* Set the UART DMA Abort callback :
sahilmgandhi	18:6a4db94011d3	1191	will lead to call HAL_UART_ErrorCallback() at end of DMA abort procedure */
sahilmgandhi	18:6a4db94011d3	1192	huart->hdmarx->XferAbortCallback = UART_DMAAbortOnError;
sahilmgandhi	18:6a4db94011d3	1193	if(HAL_DMA_Abort_IT(huart->hdmarx) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1194	{
sahilmgandhi	18:6a4db94011d3	1195	/* Call Directly XferAbortCallback function in case of error */
sahilmgandhi	18:6a4db94011d3	1196	huart->hdmarx->XferAbortCallback(huart->hdmarx);
sahilmgandhi	18:6a4db94011d3	1197	}
sahilmgandhi	18:6a4db94011d3	1198	}
sahilmgandhi	18:6a4db94011d3	1199	else
sahilmgandhi	18:6a4db94011d3	1200	{
sahilmgandhi	18:6a4db94011d3	1201	/* Call user error callback */
sahilmgandhi	18:6a4db94011d3	1202	HAL_UART_ErrorCallback(huart);
sahilmgandhi	18:6a4db94011d3	1203	}
sahilmgandhi	18:6a4db94011d3	1204	}
sahilmgandhi	18:6a4db94011d3	1205	else
sahilmgandhi	18:6a4db94011d3	1206	{
sahilmgandhi	18:6a4db94011d3	1207	/* Call user error callback */
sahilmgandhi	18:6a4db94011d3	1208	HAL_UART_ErrorCallback(huart);
sahilmgandhi	18:6a4db94011d3	1209	}
sahilmgandhi	18:6a4db94011d3	1210	}
sahilmgandhi	18:6a4db94011d3	1211	else
sahilmgandhi	18:6a4db94011d3	1212	{
sahilmgandhi	18:6a4db94011d3	1213	/* Non Blocking error : transfer could go on.
sahilmgandhi	18:6a4db94011d3	1214	Error is notified to user through user error callback */
sahilmgandhi	18:6a4db94011d3	1215	HAL_UART_ErrorCallback(huart);
sahilmgandhi	18:6a4db94011d3	1216	huart->ErrorCode = HAL_UART_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1217	}
sahilmgandhi	18:6a4db94011d3	1218	}
sahilmgandhi	18:6a4db94011d3	1219	return;
sahilmgandhi	18:6a4db94011d3	1220	} /* End if some error occurs */
sahilmgandhi	18:6a4db94011d3	1221
sahilmgandhi	18:6a4db94011d3	1222	/* UART in mode Transmitter ------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	1223	if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
sahilmgandhi	18:6a4db94011d3	1224	{
sahilmgandhi	18:6a4db94011d3	1225	UART_Transmit_IT(huart);
sahilmgandhi	18:6a4db94011d3	1226	return;
sahilmgandhi	18:6a4db94011d3	1227	}
sahilmgandhi	18:6a4db94011d3	1228
sahilmgandhi	18:6a4db94011d3	1229	/* UART in mode Transmitter end --------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	1230	if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
sahilmgandhi	18:6a4db94011d3	1231	{
sahilmgandhi	18:6a4db94011d3	1232	UART_EndTransmit_IT(huart);
sahilmgandhi	18:6a4db94011d3	1233	return;
sahilmgandhi	18:6a4db94011d3	1234	}
sahilmgandhi	18:6a4db94011d3	1235	}
sahilmgandhi	18:6a4db94011d3	1236
sahilmgandhi	18:6a4db94011d3	1237	/**
sahilmgandhi	18:6a4db94011d3	1238	* @brief Tx Transfer completed callbacks.
sahilmgandhi	18:6a4db94011d3	1239	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1240	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	1241	* @retval None
sahilmgandhi	18:6a4db94011d3	1242	*/
sahilmgandhi	18:6a4db94011d3	1243	__weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1244	{
sahilmgandhi	18:6a4db94011d3	1245	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	1246	UNUSED(huart);
sahilmgandhi	18:6a4db94011d3	1247	/* NOTE: This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	1248	the HAL_UART_TxCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	1249	*/
sahilmgandhi	18:6a4db94011d3	1250	}
sahilmgandhi	18:6a4db94011d3	1251
sahilmgandhi	18:6a4db94011d3	1252	/**
sahilmgandhi	18:6a4db94011d3	1253	* @brief Tx Half Transfer completed callbacks.
sahilmgandhi	18:6a4db94011d3	1254	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1255	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	1256	* @retval None
sahilmgandhi	18:6a4db94011d3	1257	*/
sahilmgandhi	18:6a4db94011d3	1258	__weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1259	{
sahilmgandhi	18:6a4db94011d3	1260	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	1261	UNUSED(huart);
sahilmgandhi	18:6a4db94011d3	1262	/* NOTE: This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	1263	the HAL_UART_TxCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	1264	*/
sahilmgandhi	18:6a4db94011d3	1265	}
sahilmgandhi	18:6a4db94011d3	1266
sahilmgandhi	18:6a4db94011d3	1267	/**
sahilmgandhi	18:6a4db94011d3	1268	* @brief Rx Transfer completed callbacks.
sahilmgandhi	18:6a4db94011d3	1269	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1270	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	1271	* @retval None
sahilmgandhi	18:6a4db94011d3	1272	*/
sahilmgandhi	18:6a4db94011d3	1273	__weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1274	{
sahilmgandhi	18:6a4db94011d3	1275	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	1276	UNUSED(huart);
sahilmgandhi	18:6a4db94011d3	1277	/* NOTE: This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	1278	the HAL_UART_TxCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	1279	*/
sahilmgandhi	18:6a4db94011d3	1280	}
sahilmgandhi	18:6a4db94011d3	1281
sahilmgandhi	18:6a4db94011d3	1282	/**
sahilmgandhi	18:6a4db94011d3	1283	* @brief Rx Half Transfer completed callbacks.
sahilmgandhi	18:6a4db94011d3	1284	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1285	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	1286	* @retval None
sahilmgandhi	18:6a4db94011d3	1287	*/
sahilmgandhi	18:6a4db94011d3	1288	__weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1289	{
sahilmgandhi	18:6a4db94011d3	1290	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	1291	UNUSED(huart);
sahilmgandhi	18:6a4db94011d3	1292	/* NOTE: This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	1293	the HAL_UART_TxCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	1294	*/
sahilmgandhi	18:6a4db94011d3	1295	}
sahilmgandhi	18:6a4db94011d3	1296
sahilmgandhi	18:6a4db94011d3	1297	/**
sahilmgandhi	18:6a4db94011d3	1298	* @brief UART error callbacks.
sahilmgandhi	18:6a4db94011d3	1299	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1300	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	1301	* @retval None
sahilmgandhi	18:6a4db94011d3	1302	*/
sahilmgandhi	18:6a4db94011d3	1303	__weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1304	{
sahilmgandhi	18:6a4db94011d3	1305	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	1306	UNUSED(huart);
sahilmgandhi	18:6a4db94011d3	1307	/* NOTE: This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	1308	the HAL_UART_ErrorCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	1309	*/
sahilmgandhi	18:6a4db94011d3	1310	}
sahilmgandhi	18:6a4db94011d3	1311
sahilmgandhi	18:6a4db94011d3	1312	/**
sahilmgandhi	18:6a4db94011d3	1313	* @}
sahilmgandhi	18:6a4db94011d3	1314	*/
sahilmgandhi	18:6a4db94011d3	1315
sahilmgandhi	18:6a4db94011d3	1316	/** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions
sahilmgandhi	18:6a4db94011d3	1317	* @brief UART control functions
sahilmgandhi	18:6a4db94011d3	1318	*
sahilmgandhi	18:6a4db94011d3	1319	@verbatim
sahilmgandhi	18:6a4db94011d3	1320	==============================================================================
sahilmgandhi	18:6a4db94011d3	1321	##### Peripheral Control functions #####
sahilmgandhi	18:6a4db94011d3	1322	==============================================================================
sahilmgandhi	18:6a4db94011d3	1323	[..]
sahilmgandhi	18:6a4db94011d3	1324	This subsection provides a set of functions allowing to control the UART:
sahilmgandhi	18:6a4db94011d3	1325	(+) HAL_LIN_SendBreak() API can be helpful to transmit the break character.
sahilmgandhi	18:6a4db94011d3	1326	(+) HAL_MultiProcessor_EnterMuteMode() API can be helpful to enter the UART in mute mode.
sahilmgandhi	18:6a4db94011d3	1327	(+) HAL_MultiProcessor_ExitMuteMode() API can be helpful to exit the UART mute mode by software.
sahilmgandhi	18:6a4db94011d3	1328
sahilmgandhi	18:6a4db94011d3	1329	@endverbatim
sahilmgandhi	18:6a4db94011d3	1330	* @{
sahilmgandhi	18:6a4db94011d3	1331	*/
sahilmgandhi	18:6a4db94011d3	1332
sahilmgandhi	18:6a4db94011d3	1333	/**
sahilmgandhi	18:6a4db94011d3	1334	* @brief Transmits break characters.
sahilmgandhi	18:6a4db94011d3	1335	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1336	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	1337	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1338	*/
sahilmgandhi	18:6a4db94011d3	1339	HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1340	{
sahilmgandhi	18:6a4db94011d3	1341	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	1342	assert_param(IS_UART_INSTANCE(huart->Instance));
sahilmgandhi	18:6a4db94011d3	1343
sahilmgandhi	18:6a4db94011d3	1344	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1345	__HAL_LOCK(huart);
sahilmgandhi	18:6a4db94011d3	1346
sahilmgandhi	18:6a4db94011d3	1347	huart->gState = HAL_UART_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	1348
sahilmgandhi	18:6a4db94011d3	1349	/* Send break characters */
sahilmgandhi	18:6a4db94011d3	1350	SET_BIT(huart->Instance->CR1, USART_CR1_SBK);
sahilmgandhi	18:6a4db94011d3	1351
sahilmgandhi	18:6a4db94011d3	1352	huart->gState = HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1353
sahilmgandhi	18:6a4db94011d3	1354	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1355	__HAL_UNLOCK(huart);
sahilmgandhi	18:6a4db94011d3	1356
sahilmgandhi	18:6a4db94011d3	1357	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1358	}
sahilmgandhi	18:6a4db94011d3	1359
sahilmgandhi	18:6a4db94011d3	1360	/**
sahilmgandhi	18:6a4db94011d3	1361	* @brief Enters the UART in mute mode.
sahilmgandhi	18:6a4db94011d3	1362	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1363	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	1364	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1365	*/
sahilmgandhi	18:6a4db94011d3	1366	HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1367	{
sahilmgandhi	18:6a4db94011d3	1368	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	1369	assert_param(IS_UART_INSTANCE(huart->Instance));
sahilmgandhi	18:6a4db94011d3	1370
sahilmgandhi	18:6a4db94011d3	1371	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1372	__HAL_LOCK(huart);
sahilmgandhi	18:6a4db94011d3	1373
sahilmgandhi	18:6a4db94011d3	1374	huart->gState = HAL_UART_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	1375
sahilmgandhi	18:6a4db94011d3	1376	/* Enable the USART mute mode by setting the RWU bit in the CR1 register */
sahilmgandhi	18:6a4db94011d3	1377	SET_BIT(huart->Instance->CR1, USART_CR1_RWU);
sahilmgandhi	18:6a4db94011d3	1378
sahilmgandhi	18:6a4db94011d3	1379	huart->gState = HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1380
sahilmgandhi	18:6a4db94011d3	1381	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1382	__HAL_UNLOCK(huart);
sahilmgandhi	18:6a4db94011d3	1383
sahilmgandhi	18:6a4db94011d3	1384	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1385	}
sahilmgandhi	18:6a4db94011d3	1386
sahilmgandhi	18:6a4db94011d3	1387	/**
sahilmgandhi	18:6a4db94011d3	1388	* @brief Exits the UART mute mode: wake up software.
sahilmgandhi	18:6a4db94011d3	1389	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1390	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	1391	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1392	*/
sahilmgandhi	18:6a4db94011d3	1393	HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1394	{
sahilmgandhi	18:6a4db94011d3	1395	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	1396	assert_param(IS_UART_INSTANCE(huart->Instance));
sahilmgandhi	18:6a4db94011d3	1397
sahilmgandhi	18:6a4db94011d3	1398	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1399	__HAL_LOCK(huart);
sahilmgandhi	18:6a4db94011d3	1400
sahilmgandhi	18:6a4db94011d3	1401	huart->gState = HAL_UART_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	1402
sahilmgandhi	18:6a4db94011d3	1403	/* Disable the USART mute mode by clearing the RWU bit in the CR1 register */
sahilmgandhi	18:6a4db94011d3	1404	CLEAR_BIT(huart->Instance->CR1, USART_CR1_RWU);
sahilmgandhi	18:6a4db94011d3	1405
sahilmgandhi	18:6a4db94011d3	1406	huart->gState = HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1407
sahilmgandhi	18:6a4db94011d3	1408	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1409	__HAL_UNLOCK(huart);
sahilmgandhi	18:6a4db94011d3	1410
sahilmgandhi	18:6a4db94011d3	1411	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1412	}
sahilmgandhi	18:6a4db94011d3	1413
sahilmgandhi	18:6a4db94011d3	1414	/**
sahilmgandhi	18:6a4db94011d3	1415	* @brief Enables the UART transmitter and disables the UART receiver.
sahilmgandhi	18:6a4db94011d3	1416	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1417	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	1418	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1419	*/
sahilmgandhi	18:6a4db94011d3	1420	HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1421	{
sahilmgandhi	18:6a4db94011d3	1422	uint32_t tmpreg = 0x00;
sahilmgandhi	18:6a4db94011d3	1423
sahilmgandhi	18:6a4db94011d3	1424	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1425	__HAL_LOCK(huart);
sahilmgandhi	18:6a4db94011d3	1426
sahilmgandhi	18:6a4db94011d3	1427	huart->gState = HAL_UART_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	1428
sahilmgandhi	18:6a4db94011d3	1429	/-------------------------- USART CR1 Configuration -----------------------/
sahilmgandhi	18:6a4db94011d3	1430	tmpreg = huart->Instance->CR1;
sahilmgandhi	18:6a4db94011d3	1431
sahilmgandhi	18:6a4db94011d3	1432	/* Clear TE and RE bits */
sahilmgandhi	18:6a4db94011d3	1433	tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_TE \| USART_CR1_RE));
sahilmgandhi	18:6a4db94011d3	1434
sahilmgandhi	18:6a4db94011d3	1435	/* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
sahilmgandhi	18:6a4db94011d3	1436	tmpreg \|= (uint32_t)USART_CR1_TE;
sahilmgandhi	18:6a4db94011d3	1437
sahilmgandhi	18:6a4db94011d3	1438	/* Write to USART CR1 */
sahilmgandhi	18:6a4db94011d3	1439	WRITE_REG(huart->Instance->CR1, (uint32_t)tmpreg);
sahilmgandhi	18:6a4db94011d3	1440
sahilmgandhi	18:6a4db94011d3	1441	huart->gState = HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1442
sahilmgandhi	18:6a4db94011d3	1443	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1444	__HAL_UNLOCK(huart);
sahilmgandhi	18:6a4db94011d3	1445
sahilmgandhi	18:6a4db94011d3	1446	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1447	}
sahilmgandhi	18:6a4db94011d3	1448
sahilmgandhi	18:6a4db94011d3	1449	/**
sahilmgandhi	18:6a4db94011d3	1450	* @brief Enables the UART receiver and disables the UART transmitter.
sahilmgandhi	18:6a4db94011d3	1451	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1452	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	1453	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1454	*/
sahilmgandhi	18:6a4db94011d3	1455	HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1456	{
sahilmgandhi	18:6a4db94011d3	1457	uint32_t tmpreg = 0x00U;
sahilmgandhi	18:6a4db94011d3	1458
sahilmgandhi	18:6a4db94011d3	1459	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1460	__HAL_LOCK(huart);
sahilmgandhi	18:6a4db94011d3	1461
sahilmgandhi	18:6a4db94011d3	1462	huart->gState = HAL_UART_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	1463
sahilmgandhi	18:6a4db94011d3	1464	/-------------------------- USART CR1 Configuration -----------------------/
sahilmgandhi	18:6a4db94011d3	1465	tmpreg = huart->Instance->CR1;
sahilmgandhi	18:6a4db94011d3	1466
sahilmgandhi	18:6a4db94011d3	1467	/* Clear TE and RE bits */
sahilmgandhi	18:6a4db94011d3	1468	tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_TE \| USART_CR1_RE));
sahilmgandhi	18:6a4db94011d3	1469
sahilmgandhi	18:6a4db94011d3	1470	/* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
sahilmgandhi	18:6a4db94011d3	1471	tmpreg \|= (uint32_t)USART_CR1_RE;
sahilmgandhi	18:6a4db94011d3	1472
sahilmgandhi	18:6a4db94011d3	1473	/* Write to USART CR1 */
sahilmgandhi	18:6a4db94011d3	1474	WRITE_REG(huart->Instance->CR1, (uint32_t)tmpreg);
sahilmgandhi	18:6a4db94011d3	1475
sahilmgandhi	18:6a4db94011d3	1476	huart->gState = HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1477
sahilmgandhi	18:6a4db94011d3	1478	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1479	__HAL_UNLOCK(huart);
sahilmgandhi	18:6a4db94011d3	1480
sahilmgandhi	18:6a4db94011d3	1481	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1482	}
sahilmgandhi	18:6a4db94011d3	1483
sahilmgandhi	18:6a4db94011d3	1484	/**
sahilmgandhi	18:6a4db94011d3	1485	* @}
sahilmgandhi	18:6a4db94011d3	1486	*/
sahilmgandhi	18:6a4db94011d3	1487
sahilmgandhi	18:6a4db94011d3	1488	/** @defgroup UART_Exported_Functions_Group4 Peripheral State and Errors functions
sahilmgandhi	18:6a4db94011d3	1489	* @brief UART State and Errors functions
sahilmgandhi	18:6a4db94011d3	1490	*
sahilmgandhi	18:6a4db94011d3	1491	@verbatim
sahilmgandhi	18:6a4db94011d3	1492	==============================================================================
sahilmgandhi	18:6a4db94011d3	1493	##### Peripheral State and Errors functions #####
sahilmgandhi	18:6a4db94011d3	1494	==============================================================================
sahilmgandhi	18:6a4db94011d3	1495	[..]
sahilmgandhi	18:6a4db94011d3	1496	This subsection provides a set of functions allowing to return the State of
sahilmgandhi	18:6a4db94011d3	1497	UART communication process, return Peripheral Errors occurred during communication
sahilmgandhi	18:6a4db94011d3	1498	process
sahilmgandhi	18:6a4db94011d3	1499	(+) HAL_UART_GetState() API can be helpful to check in run-time the state of the UART peripheral.
sahilmgandhi	18:6a4db94011d3	1500	(+) HAL_UART_GetError() check in run-time errors that could be occurred during communication.
sahilmgandhi	18:6a4db94011d3	1501
sahilmgandhi	18:6a4db94011d3	1502	@endverbatim
sahilmgandhi	18:6a4db94011d3	1503	* @{
sahilmgandhi	18:6a4db94011d3	1504	*/
sahilmgandhi	18:6a4db94011d3	1505
sahilmgandhi	18:6a4db94011d3	1506	/**
sahilmgandhi	18:6a4db94011d3	1507	* @brief Returns the UART state.
sahilmgandhi	18:6a4db94011d3	1508	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1509	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	1510	* @retval HAL state
sahilmgandhi	18:6a4db94011d3	1511	*/
sahilmgandhi	18:6a4db94011d3	1512	HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1513	{
sahilmgandhi	18:6a4db94011d3	1514	uint32_t temp1= 0x00U, temp2 = 0x00U;
sahilmgandhi	18:6a4db94011d3	1515	temp1 = huart->gState;
sahilmgandhi	18:6a4db94011d3	1516	temp2 = huart->RxState;
sahilmgandhi	18:6a4db94011d3	1517
sahilmgandhi	18:6a4db94011d3	1518	return (HAL_UART_StateTypeDef)(temp1 \| temp2);
sahilmgandhi	18:6a4db94011d3	1519	}
sahilmgandhi	18:6a4db94011d3	1520
sahilmgandhi	18:6a4db94011d3	1521	/**
sahilmgandhi	18:6a4db94011d3	1522	* @brief Return the UART error code
sahilmgandhi	18:6a4db94011d3	1523	* @param huart : pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1524	* the configuration information for the specified UART.
sahilmgandhi	18:6a4db94011d3	1525	* @retval UART Error Code
sahilmgandhi	18:6a4db94011d3	1526	*/
sahilmgandhi	18:6a4db94011d3	1527	uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1528	{
sahilmgandhi	18:6a4db94011d3	1529	return huart->ErrorCode;
sahilmgandhi	18:6a4db94011d3	1530	}
sahilmgandhi	18:6a4db94011d3	1531
sahilmgandhi	18:6a4db94011d3	1532	/**
sahilmgandhi	18:6a4db94011d3	1533	* @}
sahilmgandhi	18:6a4db94011d3	1534	*/
sahilmgandhi	18:6a4db94011d3	1535
sahilmgandhi	18:6a4db94011d3	1536	/**
sahilmgandhi	18:6a4db94011d3	1537	* @brief DMA UART transmit process complete callback.
sahilmgandhi	18:6a4db94011d3	1538	* @param hdma: DMA handle
sahilmgandhi	18:6a4db94011d3	1539	* @retval None
sahilmgandhi	18:6a4db94011d3	1540	*/
sahilmgandhi	18:6a4db94011d3	1541	static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	1542	{
sahilmgandhi	18:6a4db94011d3	1543	UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	1544	/* DMA Normal mode*/
sahilmgandhi	18:6a4db94011d3	1545	if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
sahilmgandhi	18:6a4db94011d3	1546	{
sahilmgandhi	18:6a4db94011d3	1547	huart->TxXferCount = 0U;
sahilmgandhi	18:6a4db94011d3	1548
sahilmgandhi	18:6a4db94011d3	1549	/* Disable the DMA transfer for transmit request by setting the DMAT bit
sahilmgandhi	18:6a4db94011d3	1550	in the UART CR3 register */
sahilmgandhi	18:6a4db94011d3	1551	CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
sahilmgandhi	18:6a4db94011d3	1552
sahilmgandhi	18:6a4db94011d3	1553	/* Enable the UART Transmit Complete Interrupt */
sahilmgandhi	18:6a4db94011d3	1554	SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
sahilmgandhi	18:6a4db94011d3	1555
sahilmgandhi	18:6a4db94011d3	1556	}
sahilmgandhi	18:6a4db94011d3	1557	/* DMA Circular mode */
sahilmgandhi	18:6a4db94011d3	1558	else
sahilmgandhi	18:6a4db94011d3	1559	{
sahilmgandhi	18:6a4db94011d3	1560	HAL_UART_TxCpltCallback(huart);
sahilmgandhi	18:6a4db94011d3	1561	}
sahilmgandhi	18:6a4db94011d3	1562	}
sahilmgandhi	18:6a4db94011d3	1563
sahilmgandhi	18:6a4db94011d3	1564	/**
sahilmgandhi	18:6a4db94011d3	1565	* @brief DMA UART transmit process half complete callback
sahilmgandhi	18:6a4db94011d3	1566	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1567	* the configuration information for the specified DMA module.
sahilmgandhi	18:6a4db94011d3	1568	* @retval None
sahilmgandhi	18:6a4db94011d3	1569	*/
sahilmgandhi	18:6a4db94011d3	1570	static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	1571	{
sahilmgandhi	18:6a4db94011d3	1572	UART_HandleTypeDef* huart = (UART_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	1573
sahilmgandhi	18:6a4db94011d3	1574	HAL_UART_TxHalfCpltCallback(huart);
sahilmgandhi	18:6a4db94011d3	1575	}
sahilmgandhi	18:6a4db94011d3	1576
sahilmgandhi	18:6a4db94011d3	1577	/**
sahilmgandhi	18:6a4db94011d3	1578	* @brief DMA UART receive process complete callback.
sahilmgandhi	18:6a4db94011d3	1579	* @param hdma: DMA handle
sahilmgandhi	18:6a4db94011d3	1580	* @retval None
sahilmgandhi	18:6a4db94011d3	1581	*/
sahilmgandhi	18:6a4db94011d3	1582	static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	1583	{
sahilmgandhi	18:6a4db94011d3	1584	UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	1585	/* DMA Normal mode*/
sahilmgandhi	18:6a4db94011d3	1586	if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
sahilmgandhi	18:6a4db94011d3	1587	{
sahilmgandhi	18:6a4db94011d3	1588	huart->RxXferCount = 0U;
sahilmgandhi	18:6a4db94011d3	1589
sahilmgandhi	18:6a4db94011d3	1590	/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
sahilmgandhi	18:6a4db94011d3	1591	CLEAR_BIT(huart->Instance->CR1, USART_CR1_PEIE);
sahilmgandhi	18:6a4db94011d3	1592	CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
sahilmgandhi	18:6a4db94011d3	1593
sahilmgandhi	18:6a4db94011d3	1594	/* Disable the DMA transfer for the receiver request by setting the DMAR bit
sahilmgandhi	18:6a4db94011d3	1595	in the UART CR3 register */
sahilmgandhi	18:6a4db94011d3	1596	CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
sahilmgandhi	18:6a4db94011d3	1597
sahilmgandhi	18:6a4db94011d3	1598	/* At end of Rx process, restore huart->RxState to Ready */
sahilmgandhi	18:6a4db94011d3	1599	huart->RxState = HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1600	}
sahilmgandhi	18:6a4db94011d3	1601	HAL_UART_RxCpltCallback(huart);
sahilmgandhi	18:6a4db94011d3	1602	}
sahilmgandhi	18:6a4db94011d3	1603
sahilmgandhi	18:6a4db94011d3	1604	/**
sahilmgandhi	18:6a4db94011d3	1605	* @brief DMA UART receive process half complete callback
sahilmgandhi	18:6a4db94011d3	1606	* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1607	* the configuration information for the specified DMA module.
sahilmgandhi	18:6a4db94011d3	1608	* @retval None
sahilmgandhi	18:6a4db94011d3	1609	*/
sahilmgandhi	18:6a4db94011d3	1610	static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	1611	{
sahilmgandhi	18:6a4db94011d3	1612	UART_HandleTypeDef* huart = (UART_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	1613
sahilmgandhi	18:6a4db94011d3	1614	HAL_UART_RxHalfCpltCallback(huart);
sahilmgandhi	18:6a4db94011d3	1615	}
sahilmgandhi	18:6a4db94011d3	1616
sahilmgandhi	18:6a4db94011d3	1617	/**
sahilmgandhi	18:6a4db94011d3	1618	* @brief DMA UART communication error callback.
sahilmgandhi	18:6a4db94011d3	1619	* @param hdma: DMA handle
sahilmgandhi	18:6a4db94011d3	1620	* @retval None
sahilmgandhi	18:6a4db94011d3	1621	*/
sahilmgandhi	18:6a4db94011d3	1622	static void UART_DMAError(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	1623	{
sahilmgandhi	18:6a4db94011d3	1624	uint32_t dmarequest = 0x00U;
sahilmgandhi	18:6a4db94011d3	1625	UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	1626
sahilmgandhi	18:6a4db94011d3	1627	/* Stop UART DMA Tx request if ongoing */
sahilmgandhi	18:6a4db94011d3	1628	dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAT);
sahilmgandhi	18:6a4db94011d3	1629	if((huart->gState == HAL_UART_STATE_BUSY_TX) && dmarequest)
sahilmgandhi	18:6a4db94011d3	1630	{
sahilmgandhi	18:6a4db94011d3	1631	huart->TxXferCount = 0U;
sahilmgandhi	18:6a4db94011d3	1632	UART_EndTxTransfer(huart);
sahilmgandhi	18:6a4db94011d3	1633	}
sahilmgandhi	18:6a4db94011d3	1634
sahilmgandhi	18:6a4db94011d3	1635	/* Stop UART DMA Rx request if ongoing */
sahilmgandhi	18:6a4db94011d3	1636	dmarequest = HAL_IS_BIT_SET(huart->Instance->CR3, USART_CR3_DMAR);
sahilmgandhi	18:6a4db94011d3	1637	if((huart->RxState == HAL_UART_STATE_BUSY_RX) && dmarequest)
sahilmgandhi	18:6a4db94011d3	1638	{
sahilmgandhi	18:6a4db94011d3	1639	huart->RxXferCount = 0U;
sahilmgandhi	18:6a4db94011d3	1640	UART_EndRxTransfer(huart);
sahilmgandhi	18:6a4db94011d3	1641	}
sahilmgandhi	18:6a4db94011d3	1642
sahilmgandhi	18:6a4db94011d3	1643	huart->ErrorCode \|= HAL_UART_ERROR_DMA;
sahilmgandhi	18:6a4db94011d3	1644	HAL_UART_ErrorCallback(huart);
sahilmgandhi	18:6a4db94011d3	1645	}
sahilmgandhi	18:6a4db94011d3	1646
sahilmgandhi	18:6a4db94011d3	1647	/**
sahilmgandhi	18:6a4db94011d3	1648	* @brief This function handles UART Communication Timeout.
sahilmgandhi	18:6a4db94011d3	1649	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1650	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	1651	* @param Flag: specifies the UART flag to check.
sahilmgandhi	18:6a4db94011d3	1652	* @param Status: The new Flag status (SET or RESET).
sahilmgandhi	18:6a4db94011d3	1653	* @param Timeout: Timeout duration
sahilmgandhi	18:6a4db94011d3	1654	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	1655	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1656	*/
sahilmgandhi	18:6a4db94011d3	1657	static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	1658	{
sahilmgandhi	18:6a4db94011d3	1659	/* Wait until flag is set */
sahilmgandhi	18:6a4db94011d3	1660	while((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
sahilmgandhi	18:6a4db94011d3	1661	{
sahilmgandhi	18:6a4db94011d3	1662	/* Check for the Timeout */
sahilmgandhi	18:6a4db94011d3	1663	if(Timeout != HAL_MAX_DELAY)
sahilmgandhi	18:6a4db94011d3	1664	{
sahilmgandhi	18:6a4db94011d3	1665	if((Timeout == 0U)\|\|((HAL_GetTick() - Tickstart ) > Timeout))
sahilmgandhi	18:6a4db94011d3	1666	{
sahilmgandhi	18:6a4db94011d3	1667	/* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
sahilmgandhi	18:6a4db94011d3	1668	CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE \| USART_CR1_PEIE \| USART_CR1_TXEIE));
sahilmgandhi	18:6a4db94011d3	1669	CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
sahilmgandhi	18:6a4db94011d3	1670
sahilmgandhi	18:6a4db94011d3	1671	huart->gState = HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1672	huart->RxState = HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1673
sahilmgandhi	18:6a4db94011d3	1674	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1675	__HAL_UNLOCK(huart);
sahilmgandhi	18:6a4db94011d3	1676
sahilmgandhi	18:6a4db94011d3	1677	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1678	}
sahilmgandhi	18:6a4db94011d3	1679	}
sahilmgandhi	18:6a4db94011d3	1680	}
sahilmgandhi	18:6a4db94011d3	1681
sahilmgandhi	18:6a4db94011d3	1682	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1683	}
sahilmgandhi	18:6a4db94011d3	1684
sahilmgandhi	18:6a4db94011d3	1685	/**
sahilmgandhi	18:6a4db94011d3	1686	* @brief End ongoing Tx transfer on UART peripheral (following error detection or Transmit completion).
sahilmgandhi	18:6a4db94011d3	1687	* @param huart: UART handle.
sahilmgandhi	18:6a4db94011d3	1688	* @retval None
sahilmgandhi	18:6a4db94011d3	1689	*/
sahilmgandhi	18:6a4db94011d3	1690	static void UART_EndTxTransfer(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1691	{
sahilmgandhi	18:6a4db94011d3	1692	/* Disable TXEIE and TCIE interrupts */
sahilmgandhi	18:6a4db94011d3	1693	CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE \| USART_CR1_TCIE));
sahilmgandhi	18:6a4db94011d3	1694
sahilmgandhi	18:6a4db94011d3	1695	/* At end of Tx process, restore huart->gState to Ready */
sahilmgandhi	18:6a4db94011d3	1696	huart->gState = HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1697	}
sahilmgandhi	18:6a4db94011d3	1698
sahilmgandhi	18:6a4db94011d3	1699	/**
sahilmgandhi	18:6a4db94011d3	1700	* @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
sahilmgandhi	18:6a4db94011d3	1701	* @param huart: UART handle.
sahilmgandhi	18:6a4db94011d3	1702	* @retval None
sahilmgandhi	18:6a4db94011d3	1703	*/
sahilmgandhi	18:6a4db94011d3	1704	static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1705	{
sahilmgandhi	18:6a4db94011d3	1706	/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
sahilmgandhi	18:6a4db94011d3	1707	CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE \| USART_CR1_PEIE));
sahilmgandhi	18:6a4db94011d3	1708	CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
sahilmgandhi	18:6a4db94011d3	1709
sahilmgandhi	18:6a4db94011d3	1710	/* At end of Rx process, restore huart->RxState to Ready */
sahilmgandhi	18:6a4db94011d3	1711	huart->RxState = HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1712	}
sahilmgandhi	18:6a4db94011d3	1713
sahilmgandhi	18:6a4db94011d3	1714	/**
sahilmgandhi	18:6a4db94011d3	1715	* @brief DMA UART communication abort callback, when initiated by HAL services on Error
sahilmgandhi	18:6a4db94011d3	1716	* (To be called at end of DMA Abort procedure following error occurrence).
sahilmgandhi	18:6a4db94011d3	1717	* @param hdma DMA handle.
sahilmgandhi	18:6a4db94011d3	1718	* @retval None
sahilmgandhi	18:6a4db94011d3	1719	*/
sahilmgandhi	18:6a4db94011d3	1720	static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	1721	{
sahilmgandhi	18:6a4db94011d3	1722	UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	1723	huart->RxXferCount = 0U;
sahilmgandhi	18:6a4db94011d3	1724	huart->TxXferCount = 0U;
sahilmgandhi	18:6a4db94011d3	1725
sahilmgandhi	18:6a4db94011d3	1726	HAL_UART_ErrorCallback(huart);
sahilmgandhi	18:6a4db94011d3	1727	}
sahilmgandhi	18:6a4db94011d3	1728
sahilmgandhi	18:6a4db94011d3	1729	/**
sahilmgandhi	18:6a4db94011d3	1730	* @brief Sends an amount of data in non blocking mode.
sahilmgandhi	18:6a4db94011d3	1731	* @param huart: Pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1732	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	1733	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1734	*/
sahilmgandhi	18:6a4db94011d3	1735	static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1736	{
sahilmgandhi	18:6a4db94011d3	1737	uint16_t* tmp;
sahilmgandhi	18:6a4db94011d3	1738
sahilmgandhi	18:6a4db94011d3	1739	/* Check that a Tx process is ongoing */
sahilmgandhi	18:6a4db94011d3	1740	if(huart->gState == HAL_UART_STATE_BUSY_TX)
sahilmgandhi	18:6a4db94011d3	1741	{
sahilmgandhi	18:6a4db94011d3	1742	if(huart->Init.WordLength == UART_WORDLENGTH_9B)
sahilmgandhi	18:6a4db94011d3	1743	{
sahilmgandhi	18:6a4db94011d3	1744	tmp = (uint16_t*) huart->pTxBuffPtr;
sahilmgandhi	18:6a4db94011d3	1745	huart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FFU);
sahilmgandhi	18:6a4db94011d3	1746	if(huart->Init.Parity == UART_PARITY_NONE)
sahilmgandhi	18:6a4db94011d3	1747	{
sahilmgandhi	18:6a4db94011d3	1748	huart->pTxBuffPtr += 2;
sahilmgandhi	18:6a4db94011d3	1749	}
sahilmgandhi	18:6a4db94011d3	1750	else
sahilmgandhi	18:6a4db94011d3	1751	{
sahilmgandhi	18:6a4db94011d3	1752	huart->pTxBuffPtr += 1;
sahilmgandhi	18:6a4db94011d3	1753	}
sahilmgandhi	18:6a4db94011d3	1754	}
sahilmgandhi	18:6a4db94011d3	1755	else
sahilmgandhi	18:6a4db94011d3	1756	{
sahilmgandhi	18:6a4db94011d3	1757	huart->Instance->DR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0x00FFU);
sahilmgandhi	18:6a4db94011d3	1758	}
sahilmgandhi	18:6a4db94011d3	1759
sahilmgandhi	18:6a4db94011d3	1760	if(--huart->TxXferCount == 0)
sahilmgandhi	18:6a4db94011d3	1761	{
sahilmgandhi	18:6a4db94011d3	1762	/* Disable the UART Transmit Complete Interrupt */
sahilmgandhi	18:6a4db94011d3	1763	CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
sahilmgandhi	18:6a4db94011d3	1764
sahilmgandhi	18:6a4db94011d3	1765	/* Enable the UART Transmit Complete Interrupt */
sahilmgandhi	18:6a4db94011d3	1766	SET_BIT(huart->Instance->CR1, USART_CR1_TCIE);
sahilmgandhi	18:6a4db94011d3	1767	}
sahilmgandhi	18:6a4db94011d3	1768	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1769	}
sahilmgandhi	18:6a4db94011d3	1770	else
sahilmgandhi	18:6a4db94011d3	1771	{
sahilmgandhi	18:6a4db94011d3	1772	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1773	}
sahilmgandhi	18:6a4db94011d3	1774	}
sahilmgandhi	18:6a4db94011d3	1775
sahilmgandhi	18:6a4db94011d3	1776	/**
sahilmgandhi	18:6a4db94011d3	1777	* @brief Wraps up transmission in non blocking mode.
sahilmgandhi	18:6a4db94011d3	1778	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1779	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	1780	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1781	*/
sahilmgandhi	18:6a4db94011d3	1782	static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1783	{
sahilmgandhi	18:6a4db94011d3	1784	/* Disable the UART Transmit Complete Interrupt */
sahilmgandhi	18:6a4db94011d3	1785	CLEAR_BIT(huart->Instance->CR1, USART_CR1_TCIE);
sahilmgandhi	18:6a4db94011d3	1786
sahilmgandhi	18:6a4db94011d3	1787	/* Tx process is ended, restore huart->gState to Ready */
sahilmgandhi	18:6a4db94011d3	1788	huart->gState = HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1789
sahilmgandhi	18:6a4db94011d3	1790	HAL_UART_TxCpltCallback(huart);
sahilmgandhi	18:6a4db94011d3	1791
sahilmgandhi	18:6a4db94011d3	1792	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1793	}
sahilmgandhi	18:6a4db94011d3	1794
sahilmgandhi	18:6a4db94011d3	1795	/**
sahilmgandhi	18:6a4db94011d3	1796	* @brief Receives an amount of data in non blocking mode
sahilmgandhi	18:6a4db94011d3	1797	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1798	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	1799	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1800	*/
sahilmgandhi	18:6a4db94011d3	1801	static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1802	{
sahilmgandhi	18:6a4db94011d3	1803	uint16_t* tmp;
sahilmgandhi	18:6a4db94011d3	1804
sahilmgandhi	18:6a4db94011d3	1805	/* Check that a Rx process is ongoing */
sahilmgandhi	18:6a4db94011d3	1806	if(huart->RxState == HAL_UART_STATE_BUSY_RX)
sahilmgandhi	18:6a4db94011d3	1807	{
sahilmgandhi	18:6a4db94011d3	1808	if(huart->Init.WordLength == UART_WORDLENGTH_9B)
sahilmgandhi	18:6a4db94011d3	1809	{
sahilmgandhi	18:6a4db94011d3	1810	tmp = (uint16_t*) huart->pRxBuffPtr;
sahilmgandhi	18:6a4db94011d3	1811	if(huart->Init.Parity == UART_PARITY_NONE)
sahilmgandhi	18:6a4db94011d3	1812	{
sahilmgandhi	18:6a4db94011d3	1813	*tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x01FFU);
sahilmgandhi	18:6a4db94011d3	1814	huart->pRxBuffPtr += 2U;
sahilmgandhi	18:6a4db94011d3	1815	}
sahilmgandhi	18:6a4db94011d3	1816	else
sahilmgandhi	18:6a4db94011d3	1817	{
sahilmgandhi	18:6a4db94011d3	1818	*tmp = (uint16_t)(huart->Instance->DR & (uint16_t)0x00FFU);
sahilmgandhi	18:6a4db94011d3	1819	huart->pRxBuffPtr += 1U;
sahilmgandhi	18:6a4db94011d3	1820	}
sahilmgandhi	18:6a4db94011d3	1821	}
sahilmgandhi	18:6a4db94011d3	1822	else
sahilmgandhi	18:6a4db94011d3	1823	{
sahilmgandhi	18:6a4db94011d3	1824	if(huart->Init.Parity == UART_PARITY_NONE)
sahilmgandhi	18:6a4db94011d3	1825	{
sahilmgandhi	18:6a4db94011d3	1826	*huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x00FFU);
sahilmgandhi	18:6a4db94011d3	1827	}
sahilmgandhi	18:6a4db94011d3	1828	else
sahilmgandhi	18:6a4db94011d3	1829	{
sahilmgandhi	18:6a4db94011d3	1830	*huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->DR & (uint8_t)0x007FU);
sahilmgandhi	18:6a4db94011d3	1831	}
sahilmgandhi	18:6a4db94011d3	1832	}
sahilmgandhi	18:6a4db94011d3	1833
sahilmgandhi	18:6a4db94011d3	1834	if(--huart->RxXferCount == 0)
sahilmgandhi	18:6a4db94011d3	1835	{
sahilmgandhi	18:6a4db94011d3	1836	/* Disable the UART Parity Error Interrupt and RXNE interrupt*/
sahilmgandhi	18:6a4db94011d3	1837	CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE \| USART_CR1_PEIE));
sahilmgandhi	18:6a4db94011d3	1838
sahilmgandhi	18:6a4db94011d3	1839	/* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
sahilmgandhi	18:6a4db94011d3	1840	CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
sahilmgandhi	18:6a4db94011d3	1841
sahilmgandhi	18:6a4db94011d3	1842	/* Rx process is completed, restore huart->RxState to Ready */
sahilmgandhi	18:6a4db94011d3	1843	huart->RxState = HAL_UART_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1844
sahilmgandhi	18:6a4db94011d3	1845	HAL_UART_RxCpltCallback(huart);
sahilmgandhi	18:6a4db94011d3	1846
sahilmgandhi	18:6a4db94011d3	1847	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1848	}
sahilmgandhi	18:6a4db94011d3	1849	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1850	}
sahilmgandhi	18:6a4db94011d3	1851	else
sahilmgandhi	18:6a4db94011d3	1852	{
sahilmgandhi	18:6a4db94011d3	1853	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1854	}
sahilmgandhi	18:6a4db94011d3	1855	}
sahilmgandhi	18:6a4db94011d3	1856
sahilmgandhi	18:6a4db94011d3	1857	/**
sahilmgandhi	18:6a4db94011d3	1858	* @brief Configures the UART peripheral.
sahilmgandhi	18:6a4db94011d3	1859	* @param huart: pointer to a UART_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1860	* the configuration information for the specified UART module.
sahilmgandhi	18:6a4db94011d3	1861	* @retval None
sahilmgandhi	18:6a4db94011d3	1862	*/
sahilmgandhi	18:6a4db94011d3	1863	static void UART_SetConfig(UART_HandleTypeDef *huart)
sahilmgandhi	18:6a4db94011d3	1864	{
sahilmgandhi	18:6a4db94011d3	1865	uint32_t tmpreg = 0x00U;
sahilmgandhi	18:6a4db94011d3	1866
sahilmgandhi	18:6a4db94011d3	1867	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	1868	assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
sahilmgandhi	18:6a4db94011d3	1869	assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
sahilmgandhi	18:6a4db94011d3	1870	assert_param(IS_UART_PARITY(huart->Init.Parity));
sahilmgandhi	18:6a4db94011d3	1871	assert_param(IS_UART_MODE(huart->Init.Mode));
sahilmgandhi	18:6a4db94011d3	1872
sahilmgandhi	18:6a4db94011d3	1873	/-------------------------- USART CR2 Configuration -----------------------/
sahilmgandhi	18:6a4db94011d3	1874	tmpreg = huart->Instance->CR2;
sahilmgandhi	18:6a4db94011d3	1875
sahilmgandhi	18:6a4db94011d3	1876	/* Clear STOP[13:12] bits */
sahilmgandhi	18:6a4db94011d3	1877	tmpreg &= (uint32_t)~((uint32_t)USART_CR2_STOP);
sahilmgandhi	18:6a4db94011d3	1878
sahilmgandhi	18:6a4db94011d3	1879	/* Configure the UART Stop Bits: Set STOP[13:12] bits according to huart->Init.StopBits value */
sahilmgandhi	18:6a4db94011d3	1880	tmpreg \|= (uint32_t)huart->Init.StopBits;
sahilmgandhi	18:6a4db94011d3	1881
sahilmgandhi	18:6a4db94011d3	1882	/* Write to USART CR2 */
sahilmgandhi	18:6a4db94011d3	1883	WRITE_REG(huart->Instance->CR2, (uint32_t)tmpreg);
sahilmgandhi	18:6a4db94011d3	1884
sahilmgandhi	18:6a4db94011d3	1885	/-------------------------- USART CR1 Configuration -----------------------/
sahilmgandhi	18:6a4db94011d3	1886	tmpreg = huart->Instance->CR1;
sahilmgandhi	18:6a4db94011d3	1887
sahilmgandhi	18:6a4db94011d3	1888	/* Clear M, PCE, PS, TE and RE bits */
sahilmgandhi	18:6a4db94011d3	1889	tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_M \| USART_CR1_PCE \| USART_CR1_PS \| USART_CR1_TE \| \
sahilmgandhi	18:6a4db94011d3	1890	USART_CR1_RE \| USART_CR1_OVER8));
sahilmgandhi	18:6a4db94011d3	1891
sahilmgandhi	18:6a4db94011d3	1892	/* Configure the UART Word Length, Parity and mode:
sahilmgandhi	18:6a4db94011d3	1893	Set the M bits according to huart->Init.WordLength value
sahilmgandhi	18:6a4db94011d3	1894	Set PCE and PS bits according to huart->Init.Parity value
sahilmgandhi	18:6a4db94011d3	1895	Set TE and RE bits according to huart->Init.Mode value
sahilmgandhi	18:6a4db94011d3	1896	Set OVER8 bit according to huart->Init.OverSampling value */
sahilmgandhi	18:6a4db94011d3	1897	tmpreg \|= (uint32_t)huart->Init.WordLength \| huart->Init.Parity \| huart->Init.Mode \| huart->Init.OverSampling;
sahilmgandhi	18:6a4db94011d3	1898
sahilmgandhi	18:6a4db94011d3	1899	/* Write to USART CR1 */
sahilmgandhi	18:6a4db94011d3	1900	WRITE_REG(huart->Instance->CR1, (uint32_t)tmpreg);
sahilmgandhi	18:6a4db94011d3	1901
sahilmgandhi	18:6a4db94011d3	1902	/-------------------------- USART CR3 Configuration -----------------------/
sahilmgandhi	18:6a4db94011d3	1903	tmpreg = huart->Instance->CR3;
sahilmgandhi	18:6a4db94011d3	1904
sahilmgandhi	18:6a4db94011d3	1905	/* Clear CTSE and RTSE bits */
sahilmgandhi	18:6a4db94011d3	1906	tmpreg &= (uint32_t)~((uint32_t)(USART_CR3_RTSE \| USART_CR3_CTSE));
sahilmgandhi	18:6a4db94011d3	1907
sahilmgandhi	18:6a4db94011d3	1908	/* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
sahilmgandhi	18:6a4db94011d3	1909	tmpreg \|= huart->Init.HwFlowCtl;
sahilmgandhi	18:6a4db94011d3	1910
sahilmgandhi	18:6a4db94011d3	1911	/* Write to USART CR3 */
sahilmgandhi	18:6a4db94011d3	1912	WRITE_REG(huart->Instance->CR3, (uint32_t)tmpreg);
sahilmgandhi	18:6a4db94011d3	1913
sahilmgandhi	18:6a4db94011d3	1914	/* Check the Over Sampling */
sahilmgandhi	18:6a4db94011d3	1915	if(huart->Init.OverSampling == UART_OVERSAMPLING_8)
sahilmgandhi	18:6a4db94011d3	1916	{
sahilmgandhi	18:6a4db94011d3	1917	/-------------------------- USART BRR Configuration ---------------------/
sahilmgandhi	18:6a4db94011d3	1918	if((huart->Instance == USART1) \|\| (huart->Instance == USART6))
sahilmgandhi	18:6a4db94011d3	1919	{
sahilmgandhi	18:6a4db94011d3	1920	huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
sahilmgandhi	18:6a4db94011d3	1921	}
sahilmgandhi	18:6a4db94011d3	1922	else
sahilmgandhi	18:6a4db94011d3	1923	{
sahilmgandhi	18:6a4db94011d3	1924	huart->Instance->BRR = UART_BRR_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
sahilmgandhi	18:6a4db94011d3	1925	}
sahilmgandhi	18:6a4db94011d3	1926	}
sahilmgandhi	18:6a4db94011d3	1927	else
sahilmgandhi	18:6a4db94011d3	1928	{
sahilmgandhi	18:6a4db94011d3	1929	/-------------------------- USART BRR Configuration ---------------------/
sahilmgandhi	18:6a4db94011d3	1930	if((huart->Instance == USART1) \|\| (huart->Instance == USART6))
sahilmgandhi	18:6a4db94011d3	1931	{
sahilmgandhi	18:6a4db94011d3	1932	huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate);
sahilmgandhi	18:6a4db94011d3	1933	}
sahilmgandhi	18:6a4db94011d3	1934	else
sahilmgandhi	18:6a4db94011d3	1935	{
sahilmgandhi	18:6a4db94011d3	1936	huart->Instance->BRR = UART_BRR_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate);
sahilmgandhi	18:6a4db94011d3	1937	}
sahilmgandhi	18:6a4db94011d3	1938	}
sahilmgandhi	18:6a4db94011d3	1939	}
sahilmgandhi	18:6a4db94011d3	1940
sahilmgandhi	18:6a4db94011d3	1941	/**
sahilmgandhi	18:6a4db94011d3	1942	* @}
sahilmgandhi	18:6a4db94011d3	1943	*/
sahilmgandhi	18:6a4db94011d3	1944
sahilmgandhi	18:6a4db94011d3	1945	#endif /* HAL_UART_MODULE_ENABLED */
sahilmgandhi	18:6a4db94011d3	1946	/**
sahilmgandhi	18:6a4db94011d3	1947	* @}
sahilmgandhi	18:6a4db94011d3	1948	*/
sahilmgandhi	18:6a4db94011d3	1949
sahilmgandhi	18:6a4db94011d3	1950	/**
sahilmgandhi	18:6a4db94011d3	1951	* @}
sahilmgandhi	18:6a4db94011d3	1952	*/
sahilmgandhi	18:6a4db94011d3	1953
sahilmgandhi	18:6a4db94011d3	1954	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Program
Created:	25 Apr 2017
Imports:	29
Forks:	0
Commits:	47
Dependents:	0
Dependencies:	2
Followers:	5

The code in this repository is Apache licensed.

mbed-dev/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_uart.c@46:b156ef445742, 2017-06-03 (annotated)

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