Mouse code for the MacroRat
mbed-dev/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_tim_ex.c@46:b156ef445742, 2017-06-03 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sat Jun 03 00:22:44 2017 +0000
- Revision:
- 46:b156ef445742
- Parent:
- 18:6a4db94011d3
Final code for internal battlebot competition.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sahilmgandhi | 18:6a4db94011d3 | 1 | /** |
sahilmgandhi | 18:6a4db94011d3 | 2 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 3 | * @file stm32f2xx_hal_tim_ex.c |
sahilmgandhi | 18:6a4db94011d3 | 4 | * @author MCD Application Team |
sahilmgandhi | 18:6a4db94011d3 | 5 | * @version V1.1.3 |
sahilmgandhi | 18:6a4db94011d3 | 6 | * @date 29-June-2016 |
sahilmgandhi | 18:6a4db94011d3 | 7 | * @brief TIM HAL module driver. |
sahilmgandhi | 18:6a4db94011d3 | 8 | * This file provides firmware functions to manage the following |
sahilmgandhi | 18:6a4db94011d3 | 9 | * functionalities of the Timer extension peripheral: |
sahilmgandhi | 18:6a4db94011d3 | 10 | * + Time Hall Sensor Interface Initialization |
sahilmgandhi | 18:6a4db94011d3 | 11 | * + Time Hall Sensor Interface Start |
sahilmgandhi | 18:6a4db94011d3 | 12 | * + Time Complementary signal bread and dead time configuration |
sahilmgandhi | 18:6a4db94011d3 | 13 | * + Time Master and Slave synchronization configuration |
sahilmgandhi | 18:6a4db94011d3 | 14 | @verbatim |
sahilmgandhi | 18:6a4db94011d3 | 15 | ============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 16 | ##### TIMER Extended features ##### |
sahilmgandhi | 18:6a4db94011d3 | 17 | ============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 18 | [..] |
sahilmgandhi | 18:6a4db94011d3 | 19 | The Timer Extension features include: |
sahilmgandhi | 18:6a4db94011d3 | 20 | (#) Complementary outputs with programmable dead-time for : |
sahilmgandhi | 18:6a4db94011d3 | 21 | (++) Input Capture |
sahilmgandhi | 18:6a4db94011d3 | 22 | (++) Output Compare |
sahilmgandhi | 18:6a4db94011d3 | 23 | (++) PWM generation (Edge and Center-aligned Mode) |
sahilmgandhi | 18:6a4db94011d3 | 24 | (++) One-pulse mode output |
sahilmgandhi | 18:6a4db94011d3 | 25 | (#) Synchronization circuit to control the timer with external signals and to |
sahilmgandhi | 18:6a4db94011d3 | 26 | interconnect several timers together. |
sahilmgandhi | 18:6a4db94011d3 | 27 | (#) Break input to put the timer output signals in reset state or in a known state. |
sahilmgandhi | 18:6a4db94011d3 | 28 | (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for |
sahilmgandhi | 18:6a4db94011d3 | 29 | positioning purposes |
sahilmgandhi | 18:6a4db94011d3 | 30 | |
sahilmgandhi | 18:6a4db94011d3 | 31 | ##### How to use this driver ##### |
sahilmgandhi | 18:6a4db94011d3 | 32 | ============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 33 | [..] |
sahilmgandhi | 18:6a4db94011d3 | 34 | (#) Initialize the TIM low level resources by implementing the following functions |
sahilmgandhi | 18:6a4db94011d3 | 35 | depending from feature used : |
sahilmgandhi | 18:6a4db94011d3 | 36 | (++) Complementary Output Compare : HAL_TIM_OC_MspInit() |
sahilmgandhi | 18:6a4db94011d3 | 37 | (++) Complementary PWM generation : HAL_TIM_PWM_MspInit() |
sahilmgandhi | 18:6a4db94011d3 | 38 | (++) Complementary One-pulse mode output : HAL_TIM_OnePulse_MspInit() |
sahilmgandhi | 18:6a4db94011d3 | 39 | (++) Hall Sensor output : HAL_TIM_HallSensor_MspInit() |
sahilmgandhi | 18:6a4db94011d3 | 40 | |
sahilmgandhi | 18:6a4db94011d3 | 41 | (#) Initialize the TIM low level resources : |
sahilmgandhi | 18:6a4db94011d3 | 42 | (##) Enable the TIM interface clock using __TIMx_CLK_ENABLE(); |
sahilmgandhi | 18:6a4db94011d3 | 43 | (##) TIM pins configuration |
sahilmgandhi | 18:6a4db94011d3 | 44 | (+++) Enable the clock for the TIM GPIOs using the following function: |
sahilmgandhi | 18:6a4db94011d3 | 45 | __GPIOx_CLK_ENABLE(); |
sahilmgandhi | 18:6a4db94011d3 | 46 | (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init(); |
sahilmgandhi | 18:6a4db94011d3 | 47 | |
sahilmgandhi | 18:6a4db94011d3 | 48 | (#) The external Clock can be configured, if needed (the default clock is the |
sahilmgandhi | 18:6a4db94011d3 | 49 | internal clock from the APBx), using the following function: |
sahilmgandhi | 18:6a4db94011d3 | 50 | HAL_TIM_ConfigClockSource, the clock configuration should be done before |
sahilmgandhi | 18:6a4db94011d3 | 51 | any start function. |
sahilmgandhi | 18:6a4db94011d3 | 52 | |
sahilmgandhi | 18:6a4db94011d3 | 53 | (#) Configure the TIM in the desired functioning mode using one of the |
sahilmgandhi | 18:6a4db94011d3 | 54 | initialization function of this driver: |
sahilmgandhi | 18:6a4db94011d3 | 55 | (++) HAL_TIMEx_HallSensor_Init and HAL_TIMEx_ConfigCommutationEvent: to use the |
sahilmgandhi | 18:6a4db94011d3 | 56 | Timer Hall Sensor Interface and the commutation event with the corresponding |
sahilmgandhi | 18:6a4db94011d3 | 57 | Interrupt and DMA request if needed (Note that One Timer is used to interface |
sahilmgandhi | 18:6a4db94011d3 | 58 | with the Hall sensor Interface and another Timer should be used to use |
sahilmgandhi | 18:6a4db94011d3 | 59 | the commutation event). |
sahilmgandhi | 18:6a4db94011d3 | 60 | |
sahilmgandhi | 18:6a4db94011d3 | 61 | (#) Activate the TIM peripheral using one of the start functions: |
sahilmgandhi | 18:6a4db94011d3 | 62 | (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT() |
sahilmgandhi | 18:6a4db94011d3 | 63 | (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT() |
sahilmgandhi | 18:6a4db94011d3 | 64 | (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT() |
sahilmgandhi | 18:6a4db94011d3 | 65 | (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT(). |
sahilmgandhi | 18:6a4db94011d3 | 66 | |
sahilmgandhi | 18:6a4db94011d3 | 67 | |
sahilmgandhi | 18:6a4db94011d3 | 68 | @endverbatim |
sahilmgandhi | 18:6a4db94011d3 | 69 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 70 | * @attention |
sahilmgandhi | 18:6a4db94011d3 | 71 | * |
sahilmgandhi | 18:6a4db94011d3 | 72 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
sahilmgandhi | 18:6a4db94011d3 | 73 | * |
sahilmgandhi | 18:6a4db94011d3 | 74 | * Redistribution and use in source and binary forms, with or without modification, |
sahilmgandhi | 18:6a4db94011d3 | 75 | * are permitted provided that the following conditions are met: |
sahilmgandhi | 18:6a4db94011d3 | 76 | * 1. Redistributions of source code must retain the above copyright notice, |
sahilmgandhi | 18:6a4db94011d3 | 77 | * this list of conditions and the following disclaimer. |
sahilmgandhi | 18:6a4db94011d3 | 78 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
sahilmgandhi | 18:6a4db94011d3 | 79 | * this list of conditions and the following disclaimer in the documentation |
sahilmgandhi | 18:6a4db94011d3 | 80 | * and/or other materials provided with the distribution. |
sahilmgandhi | 18:6a4db94011d3 | 81 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
sahilmgandhi | 18:6a4db94011d3 | 82 | * may be used to endorse or promote products derived from this software |
sahilmgandhi | 18:6a4db94011d3 | 83 | * without specific prior written permission. |
sahilmgandhi | 18:6a4db94011d3 | 84 | * |
sahilmgandhi | 18:6a4db94011d3 | 85 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
sahilmgandhi | 18:6a4db94011d3 | 86 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
sahilmgandhi | 18:6a4db94011d3 | 87 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
sahilmgandhi | 18:6a4db94011d3 | 88 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
sahilmgandhi | 18:6a4db94011d3 | 89 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
sahilmgandhi | 18:6a4db94011d3 | 90 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
sahilmgandhi | 18:6a4db94011d3 | 91 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
sahilmgandhi | 18:6a4db94011d3 | 92 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
sahilmgandhi | 18:6a4db94011d3 | 93 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
sahilmgandhi | 18:6a4db94011d3 | 94 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
sahilmgandhi | 18:6a4db94011d3 | 95 | * |
sahilmgandhi | 18:6a4db94011d3 | 96 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 97 | */ |
sahilmgandhi | 18:6a4db94011d3 | 98 | |
sahilmgandhi | 18:6a4db94011d3 | 99 | /* Includes ------------------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 100 | #include "stm32f2xx_hal.h" |
sahilmgandhi | 18:6a4db94011d3 | 101 | |
sahilmgandhi | 18:6a4db94011d3 | 102 | /** @addtogroup STM32F2xx_HAL_Driver |
sahilmgandhi | 18:6a4db94011d3 | 103 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 104 | */ |
sahilmgandhi | 18:6a4db94011d3 | 105 | |
sahilmgandhi | 18:6a4db94011d3 | 106 | /** @defgroup TIMEx TIMEx |
sahilmgandhi | 18:6a4db94011d3 | 107 | * @brief TIM HAL module driver |
sahilmgandhi | 18:6a4db94011d3 | 108 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 109 | */ |
sahilmgandhi | 18:6a4db94011d3 | 110 | |
sahilmgandhi | 18:6a4db94011d3 | 111 | #ifdef HAL_TIM_MODULE_ENABLED |
sahilmgandhi | 18:6a4db94011d3 | 112 | |
sahilmgandhi | 18:6a4db94011d3 | 113 | /* Private typedef -----------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 114 | /* Private define ------------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 115 | /* Private macro -------------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 116 | /* Private variables ---------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 117 | /** @addtogroup TIMEx_Private_Functions |
sahilmgandhi | 18:6a4db94011d3 | 118 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 119 | */ |
sahilmgandhi | 18:6a4db94011d3 | 120 | /* Private function prototypes -----------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 121 | static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState); |
sahilmgandhi | 18:6a4db94011d3 | 122 | /** |
sahilmgandhi | 18:6a4db94011d3 | 123 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 124 | */ |
sahilmgandhi | 18:6a4db94011d3 | 125 | |
sahilmgandhi | 18:6a4db94011d3 | 126 | /* Exported functions --------------------------------------------------------*/ |
sahilmgandhi | 18:6a4db94011d3 | 127 | /** @defgroup TIMEx_Exported_Functions TIM Exported Functions |
sahilmgandhi | 18:6a4db94011d3 | 128 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 129 | */ |
sahilmgandhi | 18:6a4db94011d3 | 130 | |
sahilmgandhi | 18:6a4db94011d3 | 131 | /** @defgroup TIMEx_Exported_Functions_Group1 Timer Hall Sensor functions |
sahilmgandhi | 18:6a4db94011d3 | 132 | * @brief Timer Hall Sensor functions |
sahilmgandhi | 18:6a4db94011d3 | 133 | * |
sahilmgandhi | 18:6a4db94011d3 | 134 | @verbatim |
sahilmgandhi | 18:6a4db94011d3 | 135 | ============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 136 | ##### Timer Hall Sensor functions ##### |
sahilmgandhi | 18:6a4db94011d3 | 137 | ============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 138 | [..] |
sahilmgandhi | 18:6a4db94011d3 | 139 | This section provides functions allowing to: |
sahilmgandhi | 18:6a4db94011d3 | 140 | (+) Initialize and configure TIM HAL Sensor. |
sahilmgandhi | 18:6a4db94011d3 | 141 | (+) De-initialize TIM HAL Sensor. |
sahilmgandhi | 18:6a4db94011d3 | 142 | (+) Start the Hall Sensor Interface. |
sahilmgandhi | 18:6a4db94011d3 | 143 | (+) Stop the Hall Sensor Interface. |
sahilmgandhi | 18:6a4db94011d3 | 144 | (+) Start the Hall Sensor Interface and enable interrupts. |
sahilmgandhi | 18:6a4db94011d3 | 145 | (+) Stop the Hall Sensor Interface and disable interrupts. |
sahilmgandhi | 18:6a4db94011d3 | 146 | (+) Start the Hall Sensor Interface and enable DMA transfers. |
sahilmgandhi | 18:6a4db94011d3 | 147 | (+) Stop the Hall Sensor Interface and disable DMA transfers. |
sahilmgandhi | 18:6a4db94011d3 | 148 | |
sahilmgandhi | 18:6a4db94011d3 | 149 | @endverbatim |
sahilmgandhi | 18:6a4db94011d3 | 150 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 151 | */ |
sahilmgandhi | 18:6a4db94011d3 | 152 | /** |
sahilmgandhi | 18:6a4db94011d3 | 153 | * @brief Initializes the TIM Hall Sensor Interface and create the associated handle. |
sahilmgandhi | 18:6a4db94011d3 | 154 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 155 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 156 | * @param sConfig: TIM Hall Sensor configuration structure |
sahilmgandhi | 18:6a4db94011d3 | 157 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 158 | */ |
sahilmgandhi | 18:6a4db94011d3 | 159 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig) |
sahilmgandhi | 18:6a4db94011d3 | 160 | { |
sahilmgandhi | 18:6a4db94011d3 | 161 | TIM_OC_InitTypeDef OC_Config; |
sahilmgandhi | 18:6a4db94011d3 | 162 | |
sahilmgandhi | 18:6a4db94011d3 | 163 | /* Check the TIM handle allocation */ |
sahilmgandhi | 18:6a4db94011d3 | 164 | if(htim == NULL) |
sahilmgandhi | 18:6a4db94011d3 | 165 | { |
sahilmgandhi | 18:6a4db94011d3 | 166 | return HAL_ERROR; |
sahilmgandhi | 18:6a4db94011d3 | 167 | } |
sahilmgandhi | 18:6a4db94011d3 | 168 | |
sahilmgandhi | 18:6a4db94011d3 | 169 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
sahilmgandhi | 18:6a4db94011d3 | 170 | assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); |
sahilmgandhi | 18:6a4db94011d3 | 171 | assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); |
sahilmgandhi | 18:6a4db94011d3 | 172 | assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity)); |
sahilmgandhi | 18:6a4db94011d3 | 173 | assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler)); |
sahilmgandhi | 18:6a4db94011d3 | 174 | assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter)); |
sahilmgandhi | 18:6a4db94011d3 | 175 | |
sahilmgandhi | 18:6a4db94011d3 | 176 | /* Set the TIM state */ |
sahilmgandhi | 18:6a4db94011d3 | 177 | htim->State= HAL_TIM_STATE_BUSY; |
sahilmgandhi | 18:6a4db94011d3 | 178 | |
sahilmgandhi | 18:6a4db94011d3 | 179 | /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */ |
sahilmgandhi | 18:6a4db94011d3 | 180 | HAL_TIMEx_HallSensor_MspInit(htim); |
sahilmgandhi | 18:6a4db94011d3 | 181 | |
sahilmgandhi | 18:6a4db94011d3 | 182 | /* Configure the Time base in the Encoder Mode */ |
sahilmgandhi | 18:6a4db94011d3 | 183 | TIM_Base_SetConfig(htim->Instance, &htim->Init); |
sahilmgandhi | 18:6a4db94011d3 | 184 | |
sahilmgandhi | 18:6a4db94011d3 | 185 | /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */ |
sahilmgandhi | 18:6a4db94011d3 | 186 | TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter); |
sahilmgandhi | 18:6a4db94011d3 | 187 | |
sahilmgandhi | 18:6a4db94011d3 | 188 | /* Reset the IC1PSC Bits */ |
sahilmgandhi | 18:6a4db94011d3 | 189 | htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC; |
sahilmgandhi | 18:6a4db94011d3 | 190 | /* Set the IC1PSC value */ |
sahilmgandhi | 18:6a4db94011d3 | 191 | htim->Instance->CCMR1 |= sConfig->IC1Prescaler; |
sahilmgandhi | 18:6a4db94011d3 | 192 | |
sahilmgandhi | 18:6a4db94011d3 | 193 | /* Enable the Hall sensor interface (XOR function of the three inputs) */ |
sahilmgandhi | 18:6a4db94011d3 | 194 | htim->Instance->CR2 |= TIM_CR2_TI1S; |
sahilmgandhi | 18:6a4db94011d3 | 195 | |
sahilmgandhi | 18:6a4db94011d3 | 196 | /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */ |
sahilmgandhi | 18:6a4db94011d3 | 197 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
sahilmgandhi | 18:6a4db94011d3 | 198 | htim->Instance->SMCR |= TIM_TS_TI1F_ED; |
sahilmgandhi | 18:6a4db94011d3 | 199 | |
sahilmgandhi | 18:6a4db94011d3 | 200 | /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */ |
sahilmgandhi | 18:6a4db94011d3 | 201 | htim->Instance->SMCR &= ~TIM_SMCR_SMS; |
sahilmgandhi | 18:6a4db94011d3 | 202 | htim->Instance->SMCR |= TIM_SLAVEMODE_RESET; |
sahilmgandhi | 18:6a4db94011d3 | 203 | |
sahilmgandhi | 18:6a4db94011d3 | 204 | /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/ |
sahilmgandhi | 18:6a4db94011d3 | 205 | OC_Config.OCFastMode = TIM_OCFAST_DISABLE; |
sahilmgandhi | 18:6a4db94011d3 | 206 | OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET; |
sahilmgandhi | 18:6a4db94011d3 | 207 | OC_Config.OCMode = TIM_OCMODE_PWM2; |
sahilmgandhi | 18:6a4db94011d3 | 208 | OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET; |
sahilmgandhi | 18:6a4db94011d3 | 209 | OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH; |
sahilmgandhi | 18:6a4db94011d3 | 210 | OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH; |
sahilmgandhi | 18:6a4db94011d3 | 211 | OC_Config.Pulse = sConfig->Commutation_Delay; |
sahilmgandhi | 18:6a4db94011d3 | 212 | |
sahilmgandhi | 18:6a4db94011d3 | 213 | TIM_OC2_SetConfig(htim->Instance, &OC_Config); |
sahilmgandhi | 18:6a4db94011d3 | 214 | |
sahilmgandhi | 18:6a4db94011d3 | 215 | /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2 |
sahilmgandhi | 18:6a4db94011d3 | 216 | register to 101 */ |
sahilmgandhi | 18:6a4db94011d3 | 217 | htim->Instance->CR2 &= ~TIM_CR2_MMS; |
sahilmgandhi | 18:6a4db94011d3 | 218 | htim->Instance->CR2 |= TIM_TRGO_OC2REF; |
sahilmgandhi | 18:6a4db94011d3 | 219 | |
sahilmgandhi | 18:6a4db94011d3 | 220 | /* Initialize the TIM state*/ |
sahilmgandhi | 18:6a4db94011d3 | 221 | htim->State= HAL_TIM_STATE_READY; |
sahilmgandhi | 18:6a4db94011d3 | 222 | |
sahilmgandhi | 18:6a4db94011d3 | 223 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 224 | } |
sahilmgandhi | 18:6a4db94011d3 | 225 | |
sahilmgandhi | 18:6a4db94011d3 | 226 | /** |
sahilmgandhi | 18:6a4db94011d3 | 227 | * @brief DeInitializes the TIM Hall Sensor interface |
sahilmgandhi | 18:6a4db94011d3 | 228 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 229 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 230 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 231 | */ |
sahilmgandhi | 18:6a4db94011d3 | 232 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim) |
sahilmgandhi | 18:6a4db94011d3 | 233 | { |
sahilmgandhi | 18:6a4db94011d3 | 234 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 235 | assert_param(IS_TIM_INSTANCE(htim->Instance)); |
sahilmgandhi | 18:6a4db94011d3 | 236 | |
sahilmgandhi | 18:6a4db94011d3 | 237 | htim->State = HAL_TIM_STATE_BUSY; |
sahilmgandhi | 18:6a4db94011d3 | 238 | |
sahilmgandhi | 18:6a4db94011d3 | 239 | /* Disable the TIM Peripheral Clock */ |
sahilmgandhi | 18:6a4db94011d3 | 240 | __HAL_TIM_DISABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 241 | |
sahilmgandhi | 18:6a4db94011d3 | 242 | /* DeInit the low level hardware: GPIO, CLOCK, NVIC */ |
sahilmgandhi | 18:6a4db94011d3 | 243 | HAL_TIMEx_HallSensor_MspDeInit(htim); |
sahilmgandhi | 18:6a4db94011d3 | 244 | |
sahilmgandhi | 18:6a4db94011d3 | 245 | /* Change TIM state */ |
sahilmgandhi | 18:6a4db94011d3 | 246 | htim->State = HAL_TIM_STATE_RESET; |
sahilmgandhi | 18:6a4db94011d3 | 247 | |
sahilmgandhi | 18:6a4db94011d3 | 248 | /* Release Lock */ |
sahilmgandhi | 18:6a4db94011d3 | 249 | __HAL_UNLOCK(htim); |
sahilmgandhi | 18:6a4db94011d3 | 250 | |
sahilmgandhi | 18:6a4db94011d3 | 251 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 252 | } |
sahilmgandhi | 18:6a4db94011d3 | 253 | |
sahilmgandhi | 18:6a4db94011d3 | 254 | /** |
sahilmgandhi | 18:6a4db94011d3 | 255 | * @brief Initializes the TIM Hall Sensor MSP. |
sahilmgandhi | 18:6a4db94011d3 | 256 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 257 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 258 | * @retval None |
sahilmgandhi | 18:6a4db94011d3 | 259 | */ |
sahilmgandhi | 18:6a4db94011d3 | 260 | __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim) |
sahilmgandhi | 18:6a4db94011d3 | 261 | { |
sahilmgandhi | 18:6a4db94011d3 | 262 | /* Prevent unused argument(s) compilation warning */ |
sahilmgandhi | 18:6a4db94011d3 | 263 | UNUSED(htim); |
sahilmgandhi | 18:6a4db94011d3 | 264 | /* NOTE : This function Should not be modified, when the callback is needed, |
sahilmgandhi | 18:6a4db94011d3 | 265 | the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file |
sahilmgandhi | 18:6a4db94011d3 | 266 | */ |
sahilmgandhi | 18:6a4db94011d3 | 267 | } |
sahilmgandhi | 18:6a4db94011d3 | 268 | |
sahilmgandhi | 18:6a4db94011d3 | 269 | /** |
sahilmgandhi | 18:6a4db94011d3 | 270 | * @brief DeInitializes TIM Hall Sensor MSP. |
sahilmgandhi | 18:6a4db94011d3 | 271 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 272 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 273 | * @retval None |
sahilmgandhi | 18:6a4db94011d3 | 274 | */ |
sahilmgandhi | 18:6a4db94011d3 | 275 | __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim) |
sahilmgandhi | 18:6a4db94011d3 | 276 | { |
sahilmgandhi | 18:6a4db94011d3 | 277 | /* Prevent unused argument(s) compilation warning */ |
sahilmgandhi | 18:6a4db94011d3 | 278 | UNUSED(htim); |
sahilmgandhi | 18:6a4db94011d3 | 279 | /* NOTE : This function Should not be modified, when the callback is needed, |
sahilmgandhi | 18:6a4db94011d3 | 280 | the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file |
sahilmgandhi | 18:6a4db94011d3 | 281 | */ |
sahilmgandhi | 18:6a4db94011d3 | 282 | } |
sahilmgandhi | 18:6a4db94011d3 | 283 | |
sahilmgandhi | 18:6a4db94011d3 | 284 | /** |
sahilmgandhi | 18:6a4db94011d3 | 285 | * @brief Starts the TIM Hall Sensor Interface. |
sahilmgandhi | 18:6a4db94011d3 | 286 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 287 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 288 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 289 | */ |
sahilmgandhi | 18:6a4db94011d3 | 290 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim) |
sahilmgandhi | 18:6a4db94011d3 | 291 | { |
sahilmgandhi | 18:6a4db94011d3 | 292 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 293 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
sahilmgandhi | 18:6a4db94011d3 | 294 | |
sahilmgandhi | 18:6a4db94011d3 | 295 | /* Enable the Input Capture channels 1 |
sahilmgandhi | 18:6a4db94011d3 | 296 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
sahilmgandhi | 18:6a4db94011d3 | 297 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
sahilmgandhi | 18:6a4db94011d3 | 298 | |
sahilmgandhi | 18:6a4db94011d3 | 299 | /* Enable the Peripheral */ |
sahilmgandhi | 18:6a4db94011d3 | 300 | __HAL_TIM_ENABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 301 | |
sahilmgandhi | 18:6a4db94011d3 | 302 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 303 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 304 | } |
sahilmgandhi | 18:6a4db94011d3 | 305 | |
sahilmgandhi | 18:6a4db94011d3 | 306 | /** |
sahilmgandhi | 18:6a4db94011d3 | 307 | * @brief Stops the TIM Hall sensor Interface. |
sahilmgandhi | 18:6a4db94011d3 | 308 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 309 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 310 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 311 | */ |
sahilmgandhi | 18:6a4db94011d3 | 312 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim) |
sahilmgandhi | 18:6a4db94011d3 | 313 | { |
sahilmgandhi | 18:6a4db94011d3 | 314 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 315 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
sahilmgandhi | 18:6a4db94011d3 | 316 | |
sahilmgandhi | 18:6a4db94011d3 | 317 | /* Disable the Input Capture channels 1, 2 and 3 |
sahilmgandhi | 18:6a4db94011d3 | 318 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
sahilmgandhi | 18:6a4db94011d3 | 319 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
sahilmgandhi | 18:6a4db94011d3 | 320 | |
sahilmgandhi | 18:6a4db94011d3 | 321 | /* Disable the Peripheral */ |
sahilmgandhi | 18:6a4db94011d3 | 322 | __HAL_TIM_DISABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 323 | |
sahilmgandhi | 18:6a4db94011d3 | 324 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 325 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 326 | } |
sahilmgandhi | 18:6a4db94011d3 | 327 | |
sahilmgandhi | 18:6a4db94011d3 | 328 | /** |
sahilmgandhi | 18:6a4db94011d3 | 329 | * @brief Starts the TIM Hall Sensor Interface in interrupt mode. |
sahilmgandhi | 18:6a4db94011d3 | 330 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 331 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 332 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 333 | */ |
sahilmgandhi | 18:6a4db94011d3 | 334 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim) |
sahilmgandhi | 18:6a4db94011d3 | 335 | { |
sahilmgandhi | 18:6a4db94011d3 | 336 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 337 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
sahilmgandhi | 18:6a4db94011d3 | 338 | |
sahilmgandhi | 18:6a4db94011d3 | 339 | /* Enable the capture compare Interrupts 1 event */ |
sahilmgandhi | 18:6a4db94011d3 | 340 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
sahilmgandhi | 18:6a4db94011d3 | 341 | |
sahilmgandhi | 18:6a4db94011d3 | 342 | /* Enable the Input Capture channels 1 |
sahilmgandhi | 18:6a4db94011d3 | 343 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
sahilmgandhi | 18:6a4db94011d3 | 344 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
sahilmgandhi | 18:6a4db94011d3 | 345 | |
sahilmgandhi | 18:6a4db94011d3 | 346 | /* Enable the Peripheral */ |
sahilmgandhi | 18:6a4db94011d3 | 347 | __HAL_TIM_ENABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 348 | |
sahilmgandhi | 18:6a4db94011d3 | 349 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 350 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 351 | } |
sahilmgandhi | 18:6a4db94011d3 | 352 | |
sahilmgandhi | 18:6a4db94011d3 | 353 | /** |
sahilmgandhi | 18:6a4db94011d3 | 354 | * @brief Stops the TIM Hall Sensor Interface in interrupt mode. |
sahilmgandhi | 18:6a4db94011d3 | 355 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 356 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 357 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 358 | */ |
sahilmgandhi | 18:6a4db94011d3 | 359 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim) |
sahilmgandhi | 18:6a4db94011d3 | 360 | { |
sahilmgandhi | 18:6a4db94011d3 | 361 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 362 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
sahilmgandhi | 18:6a4db94011d3 | 363 | |
sahilmgandhi | 18:6a4db94011d3 | 364 | /* Disable the Input Capture channels 1 |
sahilmgandhi | 18:6a4db94011d3 | 365 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
sahilmgandhi | 18:6a4db94011d3 | 366 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
sahilmgandhi | 18:6a4db94011d3 | 367 | |
sahilmgandhi | 18:6a4db94011d3 | 368 | /* Disable the capture compare Interrupts event */ |
sahilmgandhi | 18:6a4db94011d3 | 369 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
sahilmgandhi | 18:6a4db94011d3 | 370 | |
sahilmgandhi | 18:6a4db94011d3 | 371 | /* Disable the Peripheral */ |
sahilmgandhi | 18:6a4db94011d3 | 372 | __HAL_TIM_DISABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 373 | |
sahilmgandhi | 18:6a4db94011d3 | 374 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 375 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 376 | } |
sahilmgandhi | 18:6a4db94011d3 | 377 | |
sahilmgandhi | 18:6a4db94011d3 | 378 | /** |
sahilmgandhi | 18:6a4db94011d3 | 379 | * @brief Starts the TIM Hall Sensor Interface in DMA mode. |
sahilmgandhi | 18:6a4db94011d3 | 380 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 381 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 382 | * @param pData: The destination Buffer address. |
sahilmgandhi | 18:6a4db94011d3 | 383 | * @param Length: The length of data to be transferred from TIM peripheral to memory. |
sahilmgandhi | 18:6a4db94011d3 | 384 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 385 | */ |
sahilmgandhi | 18:6a4db94011d3 | 386 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length) |
sahilmgandhi | 18:6a4db94011d3 | 387 | { |
sahilmgandhi | 18:6a4db94011d3 | 388 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 389 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
sahilmgandhi | 18:6a4db94011d3 | 390 | |
sahilmgandhi | 18:6a4db94011d3 | 391 | if((htim->State == HAL_TIM_STATE_BUSY)) |
sahilmgandhi | 18:6a4db94011d3 | 392 | { |
sahilmgandhi | 18:6a4db94011d3 | 393 | return HAL_BUSY; |
sahilmgandhi | 18:6a4db94011d3 | 394 | } |
sahilmgandhi | 18:6a4db94011d3 | 395 | else if((htim->State == HAL_TIM_STATE_READY)) |
sahilmgandhi | 18:6a4db94011d3 | 396 | { |
sahilmgandhi | 18:6a4db94011d3 | 397 | if(((uint32_t)pData == 0U ) && (Length > 0U)) |
sahilmgandhi | 18:6a4db94011d3 | 398 | { |
sahilmgandhi | 18:6a4db94011d3 | 399 | return HAL_ERROR; |
sahilmgandhi | 18:6a4db94011d3 | 400 | } |
sahilmgandhi | 18:6a4db94011d3 | 401 | else |
sahilmgandhi | 18:6a4db94011d3 | 402 | { |
sahilmgandhi | 18:6a4db94011d3 | 403 | htim->State = HAL_TIM_STATE_BUSY; |
sahilmgandhi | 18:6a4db94011d3 | 404 | } |
sahilmgandhi | 18:6a4db94011d3 | 405 | } |
sahilmgandhi | 18:6a4db94011d3 | 406 | /* Enable the Input Capture channels 1 |
sahilmgandhi | 18:6a4db94011d3 | 407 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
sahilmgandhi | 18:6a4db94011d3 | 408 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE); |
sahilmgandhi | 18:6a4db94011d3 | 409 | |
sahilmgandhi | 18:6a4db94011d3 | 410 | /* Set the DMA Input Capture 1 Callback */ |
sahilmgandhi | 18:6a4db94011d3 | 411 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt; |
sahilmgandhi | 18:6a4db94011d3 | 412 | /* Set the DMA error callback */ |
sahilmgandhi | 18:6a4db94011d3 | 413 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; |
sahilmgandhi | 18:6a4db94011d3 | 414 | |
sahilmgandhi | 18:6a4db94011d3 | 415 | /* Enable the DMA Stream for Capture 1*/ |
sahilmgandhi | 18:6a4db94011d3 | 416 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length); |
sahilmgandhi | 18:6a4db94011d3 | 417 | |
sahilmgandhi | 18:6a4db94011d3 | 418 | /* Enable the capture compare 1 Interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 419 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
sahilmgandhi | 18:6a4db94011d3 | 420 | |
sahilmgandhi | 18:6a4db94011d3 | 421 | /* Enable the Peripheral */ |
sahilmgandhi | 18:6a4db94011d3 | 422 | __HAL_TIM_ENABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 423 | |
sahilmgandhi | 18:6a4db94011d3 | 424 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 425 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 426 | } |
sahilmgandhi | 18:6a4db94011d3 | 427 | |
sahilmgandhi | 18:6a4db94011d3 | 428 | /** |
sahilmgandhi | 18:6a4db94011d3 | 429 | * @brief Stops the TIM Hall Sensor Interface in DMA mode. |
sahilmgandhi | 18:6a4db94011d3 | 430 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 431 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 432 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 433 | */ |
sahilmgandhi | 18:6a4db94011d3 | 434 | HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim) |
sahilmgandhi | 18:6a4db94011d3 | 435 | { |
sahilmgandhi | 18:6a4db94011d3 | 436 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 437 | assert_param(IS_TIM_XOR_INSTANCE(htim->Instance)); |
sahilmgandhi | 18:6a4db94011d3 | 438 | |
sahilmgandhi | 18:6a4db94011d3 | 439 | /* Disable the Input Capture channels 1 |
sahilmgandhi | 18:6a4db94011d3 | 440 | (in the Hall Sensor Interface the Three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */ |
sahilmgandhi | 18:6a4db94011d3 | 441 | TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE); |
sahilmgandhi | 18:6a4db94011d3 | 442 | |
sahilmgandhi | 18:6a4db94011d3 | 443 | |
sahilmgandhi | 18:6a4db94011d3 | 444 | /* Disable the capture compare Interrupts 1 event */ |
sahilmgandhi | 18:6a4db94011d3 | 445 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
sahilmgandhi | 18:6a4db94011d3 | 446 | |
sahilmgandhi | 18:6a4db94011d3 | 447 | /* Disable the Peripheral */ |
sahilmgandhi | 18:6a4db94011d3 | 448 | __HAL_TIM_DISABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 449 | |
sahilmgandhi | 18:6a4db94011d3 | 450 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 451 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 452 | } |
sahilmgandhi | 18:6a4db94011d3 | 453 | /** |
sahilmgandhi | 18:6a4db94011d3 | 454 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 455 | */ |
sahilmgandhi | 18:6a4db94011d3 | 456 | |
sahilmgandhi | 18:6a4db94011d3 | 457 | /** @defgroup TIMEx_Exported_Functions_Group2 Timer Complementary Output Compare functions |
sahilmgandhi | 18:6a4db94011d3 | 458 | * @brief Timer Complementary Output Compare functions |
sahilmgandhi | 18:6a4db94011d3 | 459 | * |
sahilmgandhi | 18:6a4db94011d3 | 460 | @verbatim |
sahilmgandhi | 18:6a4db94011d3 | 461 | ============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 462 | ##### Timer Complementary Output Compare functions ##### |
sahilmgandhi | 18:6a4db94011d3 | 463 | ============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 464 | [..] |
sahilmgandhi | 18:6a4db94011d3 | 465 | This section provides functions allowing to: |
sahilmgandhi | 18:6a4db94011d3 | 466 | (+) Start the Complementary Output Compare/PWM. |
sahilmgandhi | 18:6a4db94011d3 | 467 | (+) Stop the Complementary Output Compare/PWM. |
sahilmgandhi | 18:6a4db94011d3 | 468 | (+) Start the Complementary Output Compare/PWM and enable interrupts. |
sahilmgandhi | 18:6a4db94011d3 | 469 | (+) Stop the Complementary Output Compare/PWM and disable interrupts. |
sahilmgandhi | 18:6a4db94011d3 | 470 | (+) Start the Complementary Output Compare/PWM and enable DMA transfers. |
sahilmgandhi | 18:6a4db94011d3 | 471 | (+) Stop the Complementary Output Compare/PWM and disable DMA transfers. |
sahilmgandhi | 18:6a4db94011d3 | 472 | |
sahilmgandhi | 18:6a4db94011d3 | 473 | @endverbatim |
sahilmgandhi | 18:6a4db94011d3 | 474 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 475 | */ |
sahilmgandhi | 18:6a4db94011d3 | 476 | |
sahilmgandhi | 18:6a4db94011d3 | 477 | /** |
sahilmgandhi | 18:6a4db94011d3 | 478 | * @brief Starts the TIM Output Compare signal generation on the complementary |
sahilmgandhi | 18:6a4db94011d3 | 479 | * output. |
sahilmgandhi | 18:6a4db94011d3 | 480 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 481 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 482 | * @param Channel: TIM Channel to be enabled. |
sahilmgandhi | 18:6a4db94011d3 | 483 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 484 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
sahilmgandhi | 18:6a4db94011d3 | 485 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
sahilmgandhi | 18:6a4db94011d3 | 486 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
sahilmgandhi | 18:6a4db94011d3 | 487 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
sahilmgandhi | 18:6a4db94011d3 | 488 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 489 | */ |
sahilmgandhi | 18:6a4db94011d3 | 490 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) |
sahilmgandhi | 18:6a4db94011d3 | 491 | { |
sahilmgandhi | 18:6a4db94011d3 | 492 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 493 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
sahilmgandhi | 18:6a4db94011d3 | 494 | |
sahilmgandhi | 18:6a4db94011d3 | 495 | /* Enable the Capture compare channel N */ |
sahilmgandhi | 18:6a4db94011d3 | 496 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
sahilmgandhi | 18:6a4db94011d3 | 497 | |
sahilmgandhi | 18:6a4db94011d3 | 498 | /* Enable the Main Output */ |
sahilmgandhi | 18:6a4db94011d3 | 499 | __HAL_TIM_MOE_ENABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 500 | |
sahilmgandhi | 18:6a4db94011d3 | 501 | /* Enable the Peripheral */ |
sahilmgandhi | 18:6a4db94011d3 | 502 | __HAL_TIM_ENABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 503 | |
sahilmgandhi | 18:6a4db94011d3 | 504 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 505 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 506 | } |
sahilmgandhi | 18:6a4db94011d3 | 507 | |
sahilmgandhi | 18:6a4db94011d3 | 508 | /** |
sahilmgandhi | 18:6a4db94011d3 | 509 | * @brief Stops the TIM Output Compare signal generation on the complementary |
sahilmgandhi | 18:6a4db94011d3 | 510 | * output. |
sahilmgandhi | 18:6a4db94011d3 | 511 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 512 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 513 | * @param Channel: TIM Channel to be disabled. |
sahilmgandhi | 18:6a4db94011d3 | 514 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 515 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
sahilmgandhi | 18:6a4db94011d3 | 516 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
sahilmgandhi | 18:6a4db94011d3 | 517 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
sahilmgandhi | 18:6a4db94011d3 | 518 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
sahilmgandhi | 18:6a4db94011d3 | 519 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 520 | */ |
sahilmgandhi | 18:6a4db94011d3 | 521 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) |
sahilmgandhi | 18:6a4db94011d3 | 522 | { |
sahilmgandhi | 18:6a4db94011d3 | 523 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 524 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
sahilmgandhi | 18:6a4db94011d3 | 525 | |
sahilmgandhi | 18:6a4db94011d3 | 526 | /* Disable the Capture compare channel N */ |
sahilmgandhi | 18:6a4db94011d3 | 527 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
sahilmgandhi | 18:6a4db94011d3 | 528 | |
sahilmgandhi | 18:6a4db94011d3 | 529 | /* Disable the Main Output */ |
sahilmgandhi | 18:6a4db94011d3 | 530 | __HAL_TIM_MOE_DISABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 531 | |
sahilmgandhi | 18:6a4db94011d3 | 532 | /* Disable the Peripheral */ |
sahilmgandhi | 18:6a4db94011d3 | 533 | __HAL_TIM_DISABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 534 | |
sahilmgandhi | 18:6a4db94011d3 | 535 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 536 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 537 | } |
sahilmgandhi | 18:6a4db94011d3 | 538 | |
sahilmgandhi | 18:6a4db94011d3 | 539 | /** |
sahilmgandhi | 18:6a4db94011d3 | 540 | * @brief Starts the TIM Output Compare signal generation in interrupt mode |
sahilmgandhi | 18:6a4db94011d3 | 541 | * on the complementary output. |
sahilmgandhi | 18:6a4db94011d3 | 542 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 543 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 544 | * @param Channel: TIM Channel to be enabled. |
sahilmgandhi | 18:6a4db94011d3 | 545 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 546 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
sahilmgandhi | 18:6a4db94011d3 | 547 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
sahilmgandhi | 18:6a4db94011d3 | 548 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
sahilmgandhi | 18:6a4db94011d3 | 549 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
sahilmgandhi | 18:6a4db94011d3 | 550 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 551 | */ |
sahilmgandhi | 18:6a4db94011d3 | 552 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
sahilmgandhi | 18:6a4db94011d3 | 553 | { |
sahilmgandhi | 18:6a4db94011d3 | 554 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 555 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
sahilmgandhi | 18:6a4db94011d3 | 556 | |
sahilmgandhi | 18:6a4db94011d3 | 557 | switch (Channel) |
sahilmgandhi | 18:6a4db94011d3 | 558 | { |
sahilmgandhi | 18:6a4db94011d3 | 559 | case TIM_CHANNEL_1: |
sahilmgandhi | 18:6a4db94011d3 | 560 | { |
sahilmgandhi | 18:6a4db94011d3 | 561 | /* Enable the TIM Output Compare interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 562 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
sahilmgandhi | 18:6a4db94011d3 | 563 | } |
sahilmgandhi | 18:6a4db94011d3 | 564 | break; |
sahilmgandhi | 18:6a4db94011d3 | 565 | |
sahilmgandhi | 18:6a4db94011d3 | 566 | case TIM_CHANNEL_2: |
sahilmgandhi | 18:6a4db94011d3 | 567 | { |
sahilmgandhi | 18:6a4db94011d3 | 568 | /* Enable the TIM Output Compare interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 569 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
sahilmgandhi | 18:6a4db94011d3 | 570 | } |
sahilmgandhi | 18:6a4db94011d3 | 571 | break; |
sahilmgandhi | 18:6a4db94011d3 | 572 | |
sahilmgandhi | 18:6a4db94011d3 | 573 | case TIM_CHANNEL_3: |
sahilmgandhi | 18:6a4db94011d3 | 574 | { |
sahilmgandhi | 18:6a4db94011d3 | 575 | /* Enable the TIM Output Compare interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 576 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); |
sahilmgandhi | 18:6a4db94011d3 | 577 | } |
sahilmgandhi | 18:6a4db94011d3 | 578 | break; |
sahilmgandhi | 18:6a4db94011d3 | 579 | |
sahilmgandhi | 18:6a4db94011d3 | 580 | case TIM_CHANNEL_4: |
sahilmgandhi | 18:6a4db94011d3 | 581 | { |
sahilmgandhi | 18:6a4db94011d3 | 582 | /* Enable the TIM Output Compare interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 583 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); |
sahilmgandhi | 18:6a4db94011d3 | 584 | } |
sahilmgandhi | 18:6a4db94011d3 | 585 | break; |
sahilmgandhi | 18:6a4db94011d3 | 586 | |
sahilmgandhi | 18:6a4db94011d3 | 587 | default: |
sahilmgandhi | 18:6a4db94011d3 | 588 | break; |
sahilmgandhi | 18:6a4db94011d3 | 589 | } |
sahilmgandhi | 18:6a4db94011d3 | 590 | |
sahilmgandhi | 18:6a4db94011d3 | 591 | /* Enable the TIM Break interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 592 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); |
sahilmgandhi | 18:6a4db94011d3 | 593 | |
sahilmgandhi | 18:6a4db94011d3 | 594 | /* Enable the Capture compare channel N */ |
sahilmgandhi | 18:6a4db94011d3 | 595 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
sahilmgandhi | 18:6a4db94011d3 | 596 | |
sahilmgandhi | 18:6a4db94011d3 | 597 | /* Enable the Main Output */ |
sahilmgandhi | 18:6a4db94011d3 | 598 | __HAL_TIM_MOE_ENABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 599 | |
sahilmgandhi | 18:6a4db94011d3 | 600 | /* Enable the Peripheral */ |
sahilmgandhi | 18:6a4db94011d3 | 601 | __HAL_TIM_ENABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 602 | |
sahilmgandhi | 18:6a4db94011d3 | 603 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 604 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 605 | } |
sahilmgandhi | 18:6a4db94011d3 | 606 | |
sahilmgandhi | 18:6a4db94011d3 | 607 | /** |
sahilmgandhi | 18:6a4db94011d3 | 608 | * @brief Stops the TIM Output Compare signal generation in interrupt mode |
sahilmgandhi | 18:6a4db94011d3 | 609 | * on the complementary output. |
sahilmgandhi | 18:6a4db94011d3 | 610 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 611 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 612 | * @param Channel: TIM Channel to be disabled. |
sahilmgandhi | 18:6a4db94011d3 | 613 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 614 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
sahilmgandhi | 18:6a4db94011d3 | 615 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
sahilmgandhi | 18:6a4db94011d3 | 616 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
sahilmgandhi | 18:6a4db94011d3 | 617 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
sahilmgandhi | 18:6a4db94011d3 | 618 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 619 | */ |
sahilmgandhi | 18:6a4db94011d3 | 620 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
sahilmgandhi | 18:6a4db94011d3 | 621 | { |
sahilmgandhi | 18:6a4db94011d3 | 622 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 623 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
sahilmgandhi | 18:6a4db94011d3 | 624 | |
sahilmgandhi | 18:6a4db94011d3 | 625 | switch (Channel) |
sahilmgandhi | 18:6a4db94011d3 | 626 | { |
sahilmgandhi | 18:6a4db94011d3 | 627 | case TIM_CHANNEL_1: |
sahilmgandhi | 18:6a4db94011d3 | 628 | { |
sahilmgandhi | 18:6a4db94011d3 | 629 | /* Disable the TIM Output Compare interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 630 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
sahilmgandhi | 18:6a4db94011d3 | 631 | } |
sahilmgandhi | 18:6a4db94011d3 | 632 | break; |
sahilmgandhi | 18:6a4db94011d3 | 633 | |
sahilmgandhi | 18:6a4db94011d3 | 634 | case TIM_CHANNEL_2: |
sahilmgandhi | 18:6a4db94011d3 | 635 | { |
sahilmgandhi | 18:6a4db94011d3 | 636 | /* Disable the TIM Output Compare interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 637 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
sahilmgandhi | 18:6a4db94011d3 | 638 | } |
sahilmgandhi | 18:6a4db94011d3 | 639 | break; |
sahilmgandhi | 18:6a4db94011d3 | 640 | |
sahilmgandhi | 18:6a4db94011d3 | 641 | case TIM_CHANNEL_3: |
sahilmgandhi | 18:6a4db94011d3 | 642 | { |
sahilmgandhi | 18:6a4db94011d3 | 643 | /* Disable the TIM Output Compare interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 644 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); |
sahilmgandhi | 18:6a4db94011d3 | 645 | } |
sahilmgandhi | 18:6a4db94011d3 | 646 | break; |
sahilmgandhi | 18:6a4db94011d3 | 647 | |
sahilmgandhi | 18:6a4db94011d3 | 648 | case TIM_CHANNEL_4: |
sahilmgandhi | 18:6a4db94011d3 | 649 | { |
sahilmgandhi | 18:6a4db94011d3 | 650 | /* Disable the TIM Output Compare interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 651 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); |
sahilmgandhi | 18:6a4db94011d3 | 652 | } |
sahilmgandhi | 18:6a4db94011d3 | 653 | break; |
sahilmgandhi | 18:6a4db94011d3 | 654 | |
sahilmgandhi | 18:6a4db94011d3 | 655 | default: |
sahilmgandhi | 18:6a4db94011d3 | 656 | break; |
sahilmgandhi | 18:6a4db94011d3 | 657 | } |
sahilmgandhi | 18:6a4db94011d3 | 658 | |
sahilmgandhi | 18:6a4db94011d3 | 659 | /* Disable the Capture compare channel N */ |
sahilmgandhi | 18:6a4db94011d3 | 660 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
sahilmgandhi | 18:6a4db94011d3 | 661 | |
sahilmgandhi | 18:6a4db94011d3 | 662 | /* Disable the TIM Break interrupt (only if no more channel is active) */ |
sahilmgandhi | 18:6a4db94011d3 | 663 | if((READ_REG(htim->Instance->CCER) & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET) |
sahilmgandhi | 18:6a4db94011d3 | 664 | { |
sahilmgandhi | 18:6a4db94011d3 | 665 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); |
sahilmgandhi | 18:6a4db94011d3 | 666 | } |
sahilmgandhi | 18:6a4db94011d3 | 667 | |
sahilmgandhi | 18:6a4db94011d3 | 668 | /* Disable the Main Output */ |
sahilmgandhi | 18:6a4db94011d3 | 669 | __HAL_TIM_MOE_DISABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 670 | |
sahilmgandhi | 18:6a4db94011d3 | 671 | /* Disable the Peripheral */ |
sahilmgandhi | 18:6a4db94011d3 | 672 | __HAL_TIM_DISABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 673 | |
sahilmgandhi | 18:6a4db94011d3 | 674 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 675 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 676 | } |
sahilmgandhi | 18:6a4db94011d3 | 677 | |
sahilmgandhi | 18:6a4db94011d3 | 678 | /** |
sahilmgandhi | 18:6a4db94011d3 | 679 | * @brief Starts the TIM Output Compare signal generation in DMA mode |
sahilmgandhi | 18:6a4db94011d3 | 680 | * on the complementary output. |
sahilmgandhi | 18:6a4db94011d3 | 681 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 682 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 683 | * @param Channel: TIM Channel to be enabled. |
sahilmgandhi | 18:6a4db94011d3 | 684 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 685 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
sahilmgandhi | 18:6a4db94011d3 | 686 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
sahilmgandhi | 18:6a4db94011d3 | 687 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
sahilmgandhi | 18:6a4db94011d3 | 688 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
sahilmgandhi | 18:6a4db94011d3 | 689 | * @param pData: The source Buffer address. |
sahilmgandhi | 18:6a4db94011d3 | 690 | * @param Length: The length of data to be transferred from memory to TIM peripheral |
sahilmgandhi | 18:6a4db94011d3 | 691 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 692 | */ |
sahilmgandhi | 18:6a4db94011d3 | 693 | HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) |
sahilmgandhi | 18:6a4db94011d3 | 694 | { |
sahilmgandhi | 18:6a4db94011d3 | 695 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 696 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
sahilmgandhi | 18:6a4db94011d3 | 697 | |
sahilmgandhi | 18:6a4db94011d3 | 698 | if((htim->State == HAL_TIM_STATE_BUSY)) |
sahilmgandhi | 18:6a4db94011d3 | 699 | { |
sahilmgandhi | 18:6a4db94011d3 | 700 | return HAL_BUSY; |
sahilmgandhi | 18:6a4db94011d3 | 701 | } |
sahilmgandhi | 18:6a4db94011d3 | 702 | else if((htim->State == HAL_TIM_STATE_READY)) |
sahilmgandhi | 18:6a4db94011d3 | 703 | { |
sahilmgandhi | 18:6a4db94011d3 | 704 | if(((uint32_t)pData == 0U ) && (Length > 0U)) |
sahilmgandhi | 18:6a4db94011d3 | 705 | { |
sahilmgandhi | 18:6a4db94011d3 | 706 | return HAL_ERROR; |
sahilmgandhi | 18:6a4db94011d3 | 707 | } |
sahilmgandhi | 18:6a4db94011d3 | 708 | else |
sahilmgandhi | 18:6a4db94011d3 | 709 | { |
sahilmgandhi | 18:6a4db94011d3 | 710 | htim->State = HAL_TIM_STATE_BUSY; |
sahilmgandhi | 18:6a4db94011d3 | 711 | } |
sahilmgandhi | 18:6a4db94011d3 | 712 | } |
sahilmgandhi | 18:6a4db94011d3 | 713 | switch (Channel) |
sahilmgandhi | 18:6a4db94011d3 | 714 | { |
sahilmgandhi | 18:6a4db94011d3 | 715 | case TIM_CHANNEL_1: |
sahilmgandhi | 18:6a4db94011d3 | 716 | { |
sahilmgandhi | 18:6a4db94011d3 | 717 | /* Set the DMA Period elapsed callback */ |
sahilmgandhi | 18:6a4db94011d3 | 718 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; |
sahilmgandhi | 18:6a4db94011d3 | 719 | |
sahilmgandhi | 18:6a4db94011d3 | 720 | /* Set the DMA error callback */ |
sahilmgandhi | 18:6a4db94011d3 | 721 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; |
sahilmgandhi | 18:6a4db94011d3 | 722 | |
sahilmgandhi | 18:6a4db94011d3 | 723 | /* Enable the DMA Stream */ |
sahilmgandhi | 18:6a4db94011d3 | 724 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); |
sahilmgandhi | 18:6a4db94011d3 | 725 | |
sahilmgandhi | 18:6a4db94011d3 | 726 | /* Enable the TIM Output Compare DMA request */ |
sahilmgandhi | 18:6a4db94011d3 | 727 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
sahilmgandhi | 18:6a4db94011d3 | 728 | } |
sahilmgandhi | 18:6a4db94011d3 | 729 | break; |
sahilmgandhi | 18:6a4db94011d3 | 730 | |
sahilmgandhi | 18:6a4db94011d3 | 731 | case TIM_CHANNEL_2: |
sahilmgandhi | 18:6a4db94011d3 | 732 | { |
sahilmgandhi | 18:6a4db94011d3 | 733 | /* Set the DMA Period elapsed callback */ |
sahilmgandhi | 18:6a4db94011d3 | 734 | htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; |
sahilmgandhi | 18:6a4db94011d3 | 735 | |
sahilmgandhi | 18:6a4db94011d3 | 736 | /* Set the DMA error callback */ |
sahilmgandhi | 18:6a4db94011d3 | 737 | htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; |
sahilmgandhi | 18:6a4db94011d3 | 738 | |
sahilmgandhi | 18:6a4db94011d3 | 739 | /* Enable the DMA Stream */ |
sahilmgandhi | 18:6a4db94011d3 | 740 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); |
sahilmgandhi | 18:6a4db94011d3 | 741 | |
sahilmgandhi | 18:6a4db94011d3 | 742 | /* Enable the TIM Output Compare DMA request */ |
sahilmgandhi | 18:6a4db94011d3 | 743 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); |
sahilmgandhi | 18:6a4db94011d3 | 744 | } |
sahilmgandhi | 18:6a4db94011d3 | 745 | break; |
sahilmgandhi | 18:6a4db94011d3 | 746 | |
sahilmgandhi | 18:6a4db94011d3 | 747 | case TIM_CHANNEL_3: |
sahilmgandhi | 18:6a4db94011d3 | 748 | { |
sahilmgandhi | 18:6a4db94011d3 | 749 | /* Set the DMA Period elapsed callback */ |
sahilmgandhi | 18:6a4db94011d3 | 750 | htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; |
sahilmgandhi | 18:6a4db94011d3 | 751 | |
sahilmgandhi | 18:6a4db94011d3 | 752 | /* Set the DMA error callback */ |
sahilmgandhi | 18:6a4db94011d3 | 753 | htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; |
sahilmgandhi | 18:6a4db94011d3 | 754 | |
sahilmgandhi | 18:6a4db94011d3 | 755 | /* Enable the DMA Stream */ |
sahilmgandhi | 18:6a4db94011d3 | 756 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); |
sahilmgandhi | 18:6a4db94011d3 | 757 | |
sahilmgandhi | 18:6a4db94011d3 | 758 | /* Enable the TIM Output Compare DMA request */ |
sahilmgandhi | 18:6a4db94011d3 | 759 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); |
sahilmgandhi | 18:6a4db94011d3 | 760 | } |
sahilmgandhi | 18:6a4db94011d3 | 761 | break; |
sahilmgandhi | 18:6a4db94011d3 | 762 | |
sahilmgandhi | 18:6a4db94011d3 | 763 | case TIM_CHANNEL_4: |
sahilmgandhi | 18:6a4db94011d3 | 764 | { |
sahilmgandhi | 18:6a4db94011d3 | 765 | /* Set the DMA Period elapsed callback */ |
sahilmgandhi | 18:6a4db94011d3 | 766 | htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; |
sahilmgandhi | 18:6a4db94011d3 | 767 | |
sahilmgandhi | 18:6a4db94011d3 | 768 | /* Set the DMA error callback */ |
sahilmgandhi | 18:6a4db94011d3 | 769 | htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; |
sahilmgandhi | 18:6a4db94011d3 | 770 | |
sahilmgandhi | 18:6a4db94011d3 | 771 | /* Enable the DMA Stream */ |
sahilmgandhi | 18:6a4db94011d3 | 772 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); |
sahilmgandhi | 18:6a4db94011d3 | 773 | |
sahilmgandhi | 18:6a4db94011d3 | 774 | /* Enable the TIM Output Compare DMA request */ |
sahilmgandhi | 18:6a4db94011d3 | 775 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); |
sahilmgandhi | 18:6a4db94011d3 | 776 | } |
sahilmgandhi | 18:6a4db94011d3 | 777 | break; |
sahilmgandhi | 18:6a4db94011d3 | 778 | |
sahilmgandhi | 18:6a4db94011d3 | 779 | default: |
sahilmgandhi | 18:6a4db94011d3 | 780 | break; |
sahilmgandhi | 18:6a4db94011d3 | 781 | } |
sahilmgandhi | 18:6a4db94011d3 | 782 | |
sahilmgandhi | 18:6a4db94011d3 | 783 | /* Enable the Capture compare channel N */ |
sahilmgandhi | 18:6a4db94011d3 | 784 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
sahilmgandhi | 18:6a4db94011d3 | 785 | |
sahilmgandhi | 18:6a4db94011d3 | 786 | /* Enable the Main Output */ |
sahilmgandhi | 18:6a4db94011d3 | 787 | __HAL_TIM_MOE_ENABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 788 | |
sahilmgandhi | 18:6a4db94011d3 | 789 | /* Enable the Peripheral */ |
sahilmgandhi | 18:6a4db94011d3 | 790 | __HAL_TIM_ENABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 791 | |
sahilmgandhi | 18:6a4db94011d3 | 792 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 793 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 794 | } |
sahilmgandhi | 18:6a4db94011d3 | 795 | |
sahilmgandhi | 18:6a4db94011d3 | 796 | /** |
sahilmgandhi | 18:6a4db94011d3 | 797 | * @brief Stops the TIM Output Compare signal generation in DMA mode |
sahilmgandhi | 18:6a4db94011d3 | 798 | * on the complementary output. |
sahilmgandhi | 18:6a4db94011d3 | 799 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 800 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 801 | * @param Channel: TIM Channel to be disabled. |
sahilmgandhi | 18:6a4db94011d3 | 802 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 803 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
sahilmgandhi | 18:6a4db94011d3 | 804 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
sahilmgandhi | 18:6a4db94011d3 | 805 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
sahilmgandhi | 18:6a4db94011d3 | 806 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
sahilmgandhi | 18:6a4db94011d3 | 807 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 808 | */ |
sahilmgandhi | 18:6a4db94011d3 | 809 | HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) |
sahilmgandhi | 18:6a4db94011d3 | 810 | { |
sahilmgandhi | 18:6a4db94011d3 | 811 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 812 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
sahilmgandhi | 18:6a4db94011d3 | 813 | |
sahilmgandhi | 18:6a4db94011d3 | 814 | switch (Channel) |
sahilmgandhi | 18:6a4db94011d3 | 815 | { |
sahilmgandhi | 18:6a4db94011d3 | 816 | case TIM_CHANNEL_1: |
sahilmgandhi | 18:6a4db94011d3 | 817 | { |
sahilmgandhi | 18:6a4db94011d3 | 818 | /* Disable the TIM Output Compare DMA request */ |
sahilmgandhi | 18:6a4db94011d3 | 819 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
sahilmgandhi | 18:6a4db94011d3 | 820 | } |
sahilmgandhi | 18:6a4db94011d3 | 821 | break; |
sahilmgandhi | 18:6a4db94011d3 | 822 | |
sahilmgandhi | 18:6a4db94011d3 | 823 | case TIM_CHANNEL_2: |
sahilmgandhi | 18:6a4db94011d3 | 824 | { |
sahilmgandhi | 18:6a4db94011d3 | 825 | /* Disable the TIM Output Compare DMA request */ |
sahilmgandhi | 18:6a4db94011d3 | 826 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); |
sahilmgandhi | 18:6a4db94011d3 | 827 | } |
sahilmgandhi | 18:6a4db94011d3 | 828 | break; |
sahilmgandhi | 18:6a4db94011d3 | 829 | |
sahilmgandhi | 18:6a4db94011d3 | 830 | case TIM_CHANNEL_3: |
sahilmgandhi | 18:6a4db94011d3 | 831 | { |
sahilmgandhi | 18:6a4db94011d3 | 832 | /* Disable the TIM Output Compare DMA request */ |
sahilmgandhi | 18:6a4db94011d3 | 833 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); |
sahilmgandhi | 18:6a4db94011d3 | 834 | } |
sahilmgandhi | 18:6a4db94011d3 | 835 | break; |
sahilmgandhi | 18:6a4db94011d3 | 836 | |
sahilmgandhi | 18:6a4db94011d3 | 837 | case TIM_CHANNEL_4: |
sahilmgandhi | 18:6a4db94011d3 | 838 | { |
sahilmgandhi | 18:6a4db94011d3 | 839 | /* Disable the TIM Output Compare interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 840 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); |
sahilmgandhi | 18:6a4db94011d3 | 841 | } |
sahilmgandhi | 18:6a4db94011d3 | 842 | break; |
sahilmgandhi | 18:6a4db94011d3 | 843 | |
sahilmgandhi | 18:6a4db94011d3 | 844 | default: |
sahilmgandhi | 18:6a4db94011d3 | 845 | break; |
sahilmgandhi | 18:6a4db94011d3 | 846 | } |
sahilmgandhi | 18:6a4db94011d3 | 847 | |
sahilmgandhi | 18:6a4db94011d3 | 848 | /* Disable the Capture compare channel N */ |
sahilmgandhi | 18:6a4db94011d3 | 849 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
sahilmgandhi | 18:6a4db94011d3 | 850 | |
sahilmgandhi | 18:6a4db94011d3 | 851 | /* Disable the Main Output */ |
sahilmgandhi | 18:6a4db94011d3 | 852 | __HAL_TIM_MOE_DISABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 853 | |
sahilmgandhi | 18:6a4db94011d3 | 854 | /* Disable the Peripheral */ |
sahilmgandhi | 18:6a4db94011d3 | 855 | __HAL_TIM_DISABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 856 | |
sahilmgandhi | 18:6a4db94011d3 | 857 | /* Change the htim state */ |
sahilmgandhi | 18:6a4db94011d3 | 858 | htim->State = HAL_TIM_STATE_READY; |
sahilmgandhi | 18:6a4db94011d3 | 859 | |
sahilmgandhi | 18:6a4db94011d3 | 860 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 861 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 862 | } |
sahilmgandhi | 18:6a4db94011d3 | 863 | /** |
sahilmgandhi | 18:6a4db94011d3 | 864 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 865 | */ |
sahilmgandhi | 18:6a4db94011d3 | 866 | |
sahilmgandhi | 18:6a4db94011d3 | 867 | /** @defgroup TIMEx_Exported_Functions_Group3 Timer Complementary PWM functions |
sahilmgandhi | 18:6a4db94011d3 | 868 | * @brief Timer Complementary PWM functions |
sahilmgandhi | 18:6a4db94011d3 | 869 | * |
sahilmgandhi | 18:6a4db94011d3 | 870 | @verbatim |
sahilmgandhi | 18:6a4db94011d3 | 871 | ============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 872 | ##### Timer Complementary PWM functions ##### |
sahilmgandhi | 18:6a4db94011d3 | 873 | ============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 874 | [..] |
sahilmgandhi | 18:6a4db94011d3 | 875 | This section provides functions allowing to: |
sahilmgandhi | 18:6a4db94011d3 | 876 | (+) Start the Complementary PWM. |
sahilmgandhi | 18:6a4db94011d3 | 877 | (+) Stop the Complementary PWM. |
sahilmgandhi | 18:6a4db94011d3 | 878 | (+) Start the Complementary PWM and enable interrupts. |
sahilmgandhi | 18:6a4db94011d3 | 879 | (+) Stop the Complementary PWM and disable interrupts. |
sahilmgandhi | 18:6a4db94011d3 | 880 | (+) Start the Complementary PWM and enable DMA transfers. |
sahilmgandhi | 18:6a4db94011d3 | 881 | (+) Stop the Complementary PWM and disable DMA transfers. |
sahilmgandhi | 18:6a4db94011d3 | 882 | (+) Start the Complementary Input Capture measurement. |
sahilmgandhi | 18:6a4db94011d3 | 883 | (+) Stop the Complementary Input Capture. |
sahilmgandhi | 18:6a4db94011d3 | 884 | (+) Start the Complementary Input Capture and enable interrupts. |
sahilmgandhi | 18:6a4db94011d3 | 885 | (+) Stop the Complementary Input Capture and disable interrupts. |
sahilmgandhi | 18:6a4db94011d3 | 886 | (+) Start the Complementary Input Capture and enable DMA transfers. |
sahilmgandhi | 18:6a4db94011d3 | 887 | (+) Stop the Complementary Input Capture and disable DMA transfers. |
sahilmgandhi | 18:6a4db94011d3 | 888 | (+) Start the Complementary One Pulse generation. |
sahilmgandhi | 18:6a4db94011d3 | 889 | (+) Stop the Complementary One Pulse. |
sahilmgandhi | 18:6a4db94011d3 | 890 | (+) Start the Complementary One Pulse and enable interrupts. |
sahilmgandhi | 18:6a4db94011d3 | 891 | (+) Stop the Complementary One Pulse and disable interrupts. |
sahilmgandhi | 18:6a4db94011d3 | 892 | |
sahilmgandhi | 18:6a4db94011d3 | 893 | @endverbatim |
sahilmgandhi | 18:6a4db94011d3 | 894 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 895 | */ |
sahilmgandhi | 18:6a4db94011d3 | 896 | |
sahilmgandhi | 18:6a4db94011d3 | 897 | /** |
sahilmgandhi | 18:6a4db94011d3 | 898 | * @brief Starts the PWM signal generation on the complementary output. |
sahilmgandhi | 18:6a4db94011d3 | 899 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 900 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 901 | * @param Channel: TIM Channel to be enabled. |
sahilmgandhi | 18:6a4db94011d3 | 902 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 903 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
sahilmgandhi | 18:6a4db94011d3 | 904 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
sahilmgandhi | 18:6a4db94011d3 | 905 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
sahilmgandhi | 18:6a4db94011d3 | 906 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
sahilmgandhi | 18:6a4db94011d3 | 907 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 908 | */ |
sahilmgandhi | 18:6a4db94011d3 | 909 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel) |
sahilmgandhi | 18:6a4db94011d3 | 910 | { |
sahilmgandhi | 18:6a4db94011d3 | 911 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 912 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
sahilmgandhi | 18:6a4db94011d3 | 913 | |
sahilmgandhi | 18:6a4db94011d3 | 914 | /* Enable the complementary PWM output */ |
sahilmgandhi | 18:6a4db94011d3 | 915 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
sahilmgandhi | 18:6a4db94011d3 | 916 | |
sahilmgandhi | 18:6a4db94011d3 | 917 | /* Enable the Main Output */ |
sahilmgandhi | 18:6a4db94011d3 | 918 | __HAL_TIM_MOE_ENABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 919 | |
sahilmgandhi | 18:6a4db94011d3 | 920 | /* Enable the Peripheral */ |
sahilmgandhi | 18:6a4db94011d3 | 921 | __HAL_TIM_ENABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 922 | |
sahilmgandhi | 18:6a4db94011d3 | 923 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 924 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 925 | } |
sahilmgandhi | 18:6a4db94011d3 | 926 | |
sahilmgandhi | 18:6a4db94011d3 | 927 | /** |
sahilmgandhi | 18:6a4db94011d3 | 928 | * @brief Stops the PWM signal generation on the complementary output. |
sahilmgandhi | 18:6a4db94011d3 | 929 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 930 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 931 | * @param Channel: TIM Channel to be disabled. |
sahilmgandhi | 18:6a4db94011d3 | 932 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 933 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
sahilmgandhi | 18:6a4db94011d3 | 934 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
sahilmgandhi | 18:6a4db94011d3 | 935 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
sahilmgandhi | 18:6a4db94011d3 | 936 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
sahilmgandhi | 18:6a4db94011d3 | 937 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 938 | */ |
sahilmgandhi | 18:6a4db94011d3 | 939 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel) |
sahilmgandhi | 18:6a4db94011d3 | 940 | { |
sahilmgandhi | 18:6a4db94011d3 | 941 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 942 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
sahilmgandhi | 18:6a4db94011d3 | 943 | |
sahilmgandhi | 18:6a4db94011d3 | 944 | /* Disable the complementary PWM output */ |
sahilmgandhi | 18:6a4db94011d3 | 945 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
sahilmgandhi | 18:6a4db94011d3 | 946 | |
sahilmgandhi | 18:6a4db94011d3 | 947 | /* Disable the Main Output */ |
sahilmgandhi | 18:6a4db94011d3 | 948 | __HAL_TIM_MOE_DISABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 949 | |
sahilmgandhi | 18:6a4db94011d3 | 950 | /* Disable the Peripheral */ |
sahilmgandhi | 18:6a4db94011d3 | 951 | __HAL_TIM_DISABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 952 | |
sahilmgandhi | 18:6a4db94011d3 | 953 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 954 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 955 | } |
sahilmgandhi | 18:6a4db94011d3 | 956 | |
sahilmgandhi | 18:6a4db94011d3 | 957 | /** |
sahilmgandhi | 18:6a4db94011d3 | 958 | * @brief Starts the PWM signal generation in interrupt mode on the |
sahilmgandhi | 18:6a4db94011d3 | 959 | * complementary output. |
sahilmgandhi | 18:6a4db94011d3 | 960 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 961 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 962 | * @param Channel: TIM Channel to be disabled. |
sahilmgandhi | 18:6a4db94011d3 | 963 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 964 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
sahilmgandhi | 18:6a4db94011d3 | 965 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
sahilmgandhi | 18:6a4db94011d3 | 966 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
sahilmgandhi | 18:6a4db94011d3 | 967 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
sahilmgandhi | 18:6a4db94011d3 | 968 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 969 | */ |
sahilmgandhi | 18:6a4db94011d3 | 970 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel) |
sahilmgandhi | 18:6a4db94011d3 | 971 | { |
sahilmgandhi | 18:6a4db94011d3 | 972 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 973 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
sahilmgandhi | 18:6a4db94011d3 | 974 | |
sahilmgandhi | 18:6a4db94011d3 | 975 | switch (Channel) |
sahilmgandhi | 18:6a4db94011d3 | 976 | { |
sahilmgandhi | 18:6a4db94011d3 | 977 | case TIM_CHANNEL_1: |
sahilmgandhi | 18:6a4db94011d3 | 978 | { |
sahilmgandhi | 18:6a4db94011d3 | 979 | /* Enable the TIM Capture/Compare 1 interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 980 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
sahilmgandhi | 18:6a4db94011d3 | 981 | } |
sahilmgandhi | 18:6a4db94011d3 | 982 | break; |
sahilmgandhi | 18:6a4db94011d3 | 983 | |
sahilmgandhi | 18:6a4db94011d3 | 984 | case TIM_CHANNEL_2: |
sahilmgandhi | 18:6a4db94011d3 | 985 | { |
sahilmgandhi | 18:6a4db94011d3 | 986 | /* Enable the TIM Capture/Compare 2 interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 987 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
sahilmgandhi | 18:6a4db94011d3 | 988 | } |
sahilmgandhi | 18:6a4db94011d3 | 989 | break; |
sahilmgandhi | 18:6a4db94011d3 | 990 | |
sahilmgandhi | 18:6a4db94011d3 | 991 | case TIM_CHANNEL_3: |
sahilmgandhi | 18:6a4db94011d3 | 992 | { |
sahilmgandhi | 18:6a4db94011d3 | 993 | /* Enable the TIM Capture/Compare 3 interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 994 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3); |
sahilmgandhi | 18:6a4db94011d3 | 995 | } |
sahilmgandhi | 18:6a4db94011d3 | 996 | break; |
sahilmgandhi | 18:6a4db94011d3 | 997 | |
sahilmgandhi | 18:6a4db94011d3 | 998 | case TIM_CHANNEL_4: |
sahilmgandhi | 18:6a4db94011d3 | 999 | { |
sahilmgandhi | 18:6a4db94011d3 | 1000 | /* Enable the TIM Capture/Compare 4 interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 1001 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC4); |
sahilmgandhi | 18:6a4db94011d3 | 1002 | } |
sahilmgandhi | 18:6a4db94011d3 | 1003 | break; |
sahilmgandhi | 18:6a4db94011d3 | 1004 | |
sahilmgandhi | 18:6a4db94011d3 | 1005 | default: |
sahilmgandhi | 18:6a4db94011d3 | 1006 | break; |
sahilmgandhi | 18:6a4db94011d3 | 1007 | } |
sahilmgandhi | 18:6a4db94011d3 | 1008 | |
sahilmgandhi | 18:6a4db94011d3 | 1009 | /* Enable the TIM Break interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 1010 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK); |
sahilmgandhi | 18:6a4db94011d3 | 1011 | |
sahilmgandhi | 18:6a4db94011d3 | 1012 | /* Enable the complementary PWM output */ |
sahilmgandhi | 18:6a4db94011d3 | 1013 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
sahilmgandhi | 18:6a4db94011d3 | 1014 | |
sahilmgandhi | 18:6a4db94011d3 | 1015 | /* Enable the Main Output */ |
sahilmgandhi | 18:6a4db94011d3 | 1016 | __HAL_TIM_MOE_ENABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1017 | |
sahilmgandhi | 18:6a4db94011d3 | 1018 | /* Enable the Peripheral */ |
sahilmgandhi | 18:6a4db94011d3 | 1019 | __HAL_TIM_ENABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1020 | |
sahilmgandhi | 18:6a4db94011d3 | 1021 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 1022 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 1023 | } |
sahilmgandhi | 18:6a4db94011d3 | 1024 | |
sahilmgandhi | 18:6a4db94011d3 | 1025 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1026 | * @brief Stops the PWM signal generation in interrupt mode on the |
sahilmgandhi | 18:6a4db94011d3 | 1027 | * complementary output. |
sahilmgandhi | 18:6a4db94011d3 | 1028 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 1029 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 1030 | * @param Channel: TIM Channel to be disabled. |
sahilmgandhi | 18:6a4db94011d3 | 1031 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1032 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
sahilmgandhi | 18:6a4db94011d3 | 1033 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
sahilmgandhi | 18:6a4db94011d3 | 1034 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
sahilmgandhi | 18:6a4db94011d3 | 1035 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
sahilmgandhi | 18:6a4db94011d3 | 1036 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 1037 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1038 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT (TIM_HandleTypeDef *htim, uint32_t Channel) |
sahilmgandhi | 18:6a4db94011d3 | 1039 | { |
sahilmgandhi | 18:6a4db94011d3 | 1040 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 1041 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
sahilmgandhi | 18:6a4db94011d3 | 1042 | |
sahilmgandhi | 18:6a4db94011d3 | 1043 | switch (Channel) |
sahilmgandhi | 18:6a4db94011d3 | 1044 | { |
sahilmgandhi | 18:6a4db94011d3 | 1045 | case TIM_CHANNEL_1: |
sahilmgandhi | 18:6a4db94011d3 | 1046 | { |
sahilmgandhi | 18:6a4db94011d3 | 1047 | /* Disable the TIM Capture/Compare 1 interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 1048 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
sahilmgandhi | 18:6a4db94011d3 | 1049 | } |
sahilmgandhi | 18:6a4db94011d3 | 1050 | break; |
sahilmgandhi | 18:6a4db94011d3 | 1051 | |
sahilmgandhi | 18:6a4db94011d3 | 1052 | case TIM_CHANNEL_2: |
sahilmgandhi | 18:6a4db94011d3 | 1053 | { |
sahilmgandhi | 18:6a4db94011d3 | 1054 | /* Disable the TIM Capture/Compare 2 interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 1055 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
sahilmgandhi | 18:6a4db94011d3 | 1056 | } |
sahilmgandhi | 18:6a4db94011d3 | 1057 | break; |
sahilmgandhi | 18:6a4db94011d3 | 1058 | |
sahilmgandhi | 18:6a4db94011d3 | 1059 | case TIM_CHANNEL_3: |
sahilmgandhi | 18:6a4db94011d3 | 1060 | { |
sahilmgandhi | 18:6a4db94011d3 | 1061 | /* Disable the TIM Capture/Compare 3 interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 1062 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3); |
sahilmgandhi | 18:6a4db94011d3 | 1063 | } |
sahilmgandhi | 18:6a4db94011d3 | 1064 | break; |
sahilmgandhi | 18:6a4db94011d3 | 1065 | |
sahilmgandhi | 18:6a4db94011d3 | 1066 | case TIM_CHANNEL_4: |
sahilmgandhi | 18:6a4db94011d3 | 1067 | { |
sahilmgandhi | 18:6a4db94011d3 | 1068 | /* Disable the TIM Capture/Compare 3 interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 1069 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC4); |
sahilmgandhi | 18:6a4db94011d3 | 1070 | } |
sahilmgandhi | 18:6a4db94011d3 | 1071 | break; |
sahilmgandhi | 18:6a4db94011d3 | 1072 | |
sahilmgandhi | 18:6a4db94011d3 | 1073 | default: |
sahilmgandhi | 18:6a4db94011d3 | 1074 | break; |
sahilmgandhi | 18:6a4db94011d3 | 1075 | } |
sahilmgandhi | 18:6a4db94011d3 | 1076 | |
sahilmgandhi | 18:6a4db94011d3 | 1077 | /* Disable the complementary PWM output */ |
sahilmgandhi | 18:6a4db94011d3 | 1078 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
sahilmgandhi | 18:6a4db94011d3 | 1079 | |
sahilmgandhi | 18:6a4db94011d3 | 1080 | /* Disable the TIM Break interrupt (only if no more channel is active) */ |
sahilmgandhi | 18:6a4db94011d3 | 1081 | if((READ_REG(htim->Instance->CCER) & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == RESET) |
sahilmgandhi | 18:6a4db94011d3 | 1082 | { |
sahilmgandhi | 18:6a4db94011d3 | 1083 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK); |
sahilmgandhi | 18:6a4db94011d3 | 1084 | } |
sahilmgandhi | 18:6a4db94011d3 | 1085 | |
sahilmgandhi | 18:6a4db94011d3 | 1086 | /* Disable the Main Output */ |
sahilmgandhi | 18:6a4db94011d3 | 1087 | __HAL_TIM_MOE_DISABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1088 | |
sahilmgandhi | 18:6a4db94011d3 | 1089 | /* Disable the Peripheral */ |
sahilmgandhi | 18:6a4db94011d3 | 1090 | __HAL_TIM_DISABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1091 | |
sahilmgandhi | 18:6a4db94011d3 | 1092 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 1093 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 1094 | } |
sahilmgandhi | 18:6a4db94011d3 | 1095 | |
sahilmgandhi | 18:6a4db94011d3 | 1096 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1097 | * @brief Starts the TIM PWM signal generation in DMA mode on the |
sahilmgandhi | 18:6a4db94011d3 | 1098 | * complementary output |
sahilmgandhi | 18:6a4db94011d3 | 1099 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 1100 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 1101 | * @param Channel: TIM Channel to be enabled. |
sahilmgandhi | 18:6a4db94011d3 | 1102 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1103 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
sahilmgandhi | 18:6a4db94011d3 | 1104 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
sahilmgandhi | 18:6a4db94011d3 | 1105 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
sahilmgandhi | 18:6a4db94011d3 | 1106 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
sahilmgandhi | 18:6a4db94011d3 | 1107 | * @param pData: The source Buffer address. |
sahilmgandhi | 18:6a4db94011d3 | 1108 | * @param Length: The length of data to be transferred from memory to TIM peripheral |
sahilmgandhi | 18:6a4db94011d3 | 1109 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 1110 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1111 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length) |
sahilmgandhi | 18:6a4db94011d3 | 1112 | { |
sahilmgandhi | 18:6a4db94011d3 | 1113 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 1114 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
sahilmgandhi | 18:6a4db94011d3 | 1115 | |
sahilmgandhi | 18:6a4db94011d3 | 1116 | if((htim->State == HAL_TIM_STATE_BUSY)) |
sahilmgandhi | 18:6a4db94011d3 | 1117 | { |
sahilmgandhi | 18:6a4db94011d3 | 1118 | return HAL_BUSY; |
sahilmgandhi | 18:6a4db94011d3 | 1119 | } |
sahilmgandhi | 18:6a4db94011d3 | 1120 | else if((htim->State == HAL_TIM_STATE_READY)) |
sahilmgandhi | 18:6a4db94011d3 | 1121 | { |
sahilmgandhi | 18:6a4db94011d3 | 1122 | if(((uint32_t)pData == 0U ) && (Length > 0U)) |
sahilmgandhi | 18:6a4db94011d3 | 1123 | { |
sahilmgandhi | 18:6a4db94011d3 | 1124 | return HAL_ERROR; |
sahilmgandhi | 18:6a4db94011d3 | 1125 | } |
sahilmgandhi | 18:6a4db94011d3 | 1126 | else |
sahilmgandhi | 18:6a4db94011d3 | 1127 | { |
sahilmgandhi | 18:6a4db94011d3 | 1128 | htim->State = HAL_TIM_STATE_BUSY; |
sahilmgandhi | 18:6a4db94011d3 | 1129 | } |
sahilmgandhi | 18:6a4db94011d3 | 1130 | } |
sahilmgandhi | 18:6a4db94011d3 | 1131 | switch (Channel) |
sahilmgandhi | 18:6a4db94011d3 | 1132 | { |
sahilmgandhi | 18:6a4db94011d3 | 1133 | case TIM_CHANNEL_1: |
sahilmgandhi | 18:6a4db94011d3 | 1134 | { |
sahilmgandhi | 18:6a4db94011d3 | 1135 | /* Set the DMA Period elapsed callback */ |
sahilmgandhi | 18:6a4db94011d3 | 1136 | htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt; |
sahilmgandhi | 18:6a4db94011d3 | 1137 | |
sahilmgandhi | 18:6a4db94011d3 | 1138 | /* Set the DMA error callback */ |
sahilmgandhi | 18:6a4db94011d3 | 1139 | htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ; |
sahilmgandhi | 18:6a4db94011d3 | 1140 | |
sahilmgandhi | 18:6a4db94011d3 | 1141 | /* Enable the DMA Stream */ |
sahilmgandhi | 18:6a4db94011d3 | 1142 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length); |
sahilmgandhi | 18:6a4db94011d3 | 1143 | |
sahilmgandhi | 18:6a4db94011d3 | 1144 | /* Enable the TIM Capture/Compare 1 DMA request */ |
sahilmgandhi | 18:6a4db94011d3 | 1145 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1); |
sahilmgandhi | 18:6a4db94011d3 | 1146 | } |
sahilmgandhi | 18:6a4db94011d3 | 1147 | break; |
sahilmgandhi | 18:6a4db94011d3 | 1148 | |
sahilmgandhi | 18:6a4db94011d3 | 1149 | case TIM_CHANNEL_2: |
sahilmgandhi | 18:6a4db94011d3 | 1150 | { |
sahilmgandhi | 18:6a4db94011d3 | 1151 | /* Set the DMA Period elapsed callback */ |
sahilmgandhi | 18:6a4db94011d3 | 1152 | htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt; |
sahilmgandhi | 18:6a4db94011d3 | 1153 | |
sahilmgandhi | 18:6a4db94011d3 | 1154 | /* Set the DMA error callback */ |
sahilmgandhi | 18:6a4db94011d3 | 1155 | htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ; |
sahilmgandhi | 18:6a4db94011d3 | 1156 | |
sahilmgandhi | 18:6a4db94011d3 | 1157 | /* Enable the DMA Stream */ |
sahilmgandhi | 18:6a4db94011d3 | 1158 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length); |
sahilmgandhi | 18:6a4db94011d3 | 1159 | |
sahilmgandhi | 18:6a4db94011d3 | 1160 | /* Enable the TIM Capture/Compare 2 DMA request */ |
sahilmgandhi | 18:6a4db94011d3 | 1161 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2); |
sahilmgandhi | 18:6a4db94011d3 | 1162 | } |
sahilmgandhi | 18:6a4db94011d3 | 1163 | break; |
sahilmgandhi | 18:6a4db94011d3 | 1164 | |
sahilmgandhi | 18:6a4db94011d3 | 1165 | case TIM_CHANNEL_3: |
sahilmgandhi | 18:6a4db94011d3 | 1166 | { |
sahilmgandhi | 18:6a4db94011d3 | 1167 | /* Set the DMA Period elapsed callback */ |
sahilmgandhi | 18:6a4db94011d3 | 1168 | htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt; |
sahilmgandhi | 18:6a4db94011d3 | 1169 | |
sahilmgandhi | 18:6a4db94011d3 | 1170 | /* Set the DMA error callback */ |
sahilmgandhi | 18:6a4db94011d3 | 1171 | htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ; |
sahilmgandhi | 18:6a4db94011d3 | 1172 | |
sahilmgandhi | 18:6a4db94011d3 | 1173 | /* Enable the DMA Stream */ |
sahilmgandhi | 18:6a4db94011d3 | 1174 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3,Length); |
sahilmgandhi | 18:6a4db94011d3 | 1175 | |
sahilmgandhi | 18:6a4db94011d3 | 1176 | /* Enable the TIM Capture/Compare 3 DMA request */ |
sahilmgandhi | 18:6a4db94011d3 | 1177 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3); |
sahilmgandhi | 18:6a4db94011d3 | 1178 | } |
sahilmgandhi | 18:6a4db94011d3 | 1179 | break; |
sahilmgandhi | 18:6a4db94011d3 | 1180 | |
sahilmgandhi | 18:6a4db94011d3 | 1181 | case TIM_CHANNEL_4: |
sahilmgandhi | 18:6a4db94011d3 | 1182 | { |
sahilmgandhi | 18:6a4db94011d3 | 1183 | /* Set the DMA Period elapsed callback */ |
sahilmgandhi | 18:6a4db94011d3 | 1184 | htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMADelayPulseCplt; |
sahilmgandhi | 18:6a4db94011d3 | 1185 | |
sahilmgandhi | 18:6a4db94011d3 | 1186 | /* Set the DMA error callback */ |
sahilmgandhi | 18:6a4db94011d3 | 1187 | htim->hdma[TIM_DMA_ID_CC4]->XferErrorCallback = TIM_DMAError ; |
sahilmgandhi | 18:6a4db94011d3 | 1188 | |
sahilmgandhi | 18:6a4db94011d3 | 1189 | /* Enable the DMA Stream */ |
sahilmgandhi | 18:6a4db94011d3 | 1190 | HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC4], (uint32_t)pData, (uint32_t)&htim->Instance->CCR4, Length); |
sahilmgandhi | 18:6a4db94011d3 | 1191 | |
sahilmgandhi | 18:6a4db94011d3 | 1192 | /* Enable the TIM Capture/Compare 4 DMA request */ |
sahilmgandhi | 18:6a4db94011d3 | 1193 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4); |
sahilmgandhi | 18:6a4db94011d3 | 1194 | } |
sahilmgandhi | 18:6a4db94011d3 | 1195 | break; |
sahilmgandhi | 18:6a4db94011d3 | 1196 | |
sahilmgandhi | 18:6a4db94011d3 | 1197 | default: |
sahilmgandhi | 18:6a4db94011d3 | 1198 | break; |
sahilmgandhi | 18:6a4db94011d3 | 1199 | } |
sahilmgandhi | 18:6a4db94011d3 | 1200 | |
sahilmgandhi | 18:6a4db94011d3 | 1201 | /* Enable the complementary PWM output */ |
sahilmgandhi | 18:6a4db94011d3 | 1202 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE); |
sahilmgandhi | 18:6a4db94011d3 | 1203 | |
sahilmgandhi | 18:6a4db94011d3 | 1204 | /* Enable the Main Output */ |
sahilmgandhi | 18:6a4db94011d3 | 1205 | __HAL_TIM_MOE_ENABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1206 | |
sahilmgandhi | 18:6a4db94011d3 | 1207 | /* Enable the Peripheral */ |
sahilmgandhi | 18:6a4db94011d3 | 1208 | __HAL_TIM_ENABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1209 | |
sahilmgandhi | 18:6a4db94011d3 | 1210 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 1211 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 1212 | } |
sahilmgandhi | 18:6a4db94011d3 | 1213 | |
sahilmgandhi | 18:6a4db94011d3 | 1214 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1215 | * @brief Stops the TIM PWM signal generation in DMA mode on the complementary |
sahilmgandhi | 18:6a4db94011d3 | 1216 | * output |
sahilmgandhi | 18:6a4db94011d3 | 1217 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 1218 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 1219 | * @param Channel: TIM Channel to be disabled. |
sahilmgandhi | 18:6a4db94011d3 | 1220 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1221 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
sahilmgandhi | 18:6a4db94011d3 | 1222 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
sahilmgandhi | 18:6a4db94011d3 | 1223 | * @arg TIM_CHANNEL_3: TIM Channel 3 selected |
sahilmgandhi | 18:6a4db94011d3 | 1224 | * @arg TIM_CHANNEL_4: TIM Channel 4 selected |
sahilmgandhi | 18:6a4db94011d3 | 1225 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 1226 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1227 | HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel) |
sahilmgandhi | 18:6a4db94011d3 | 1228 | { |
sahilmgandhi | 18:6a4db94011d3 | 1229 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 1230 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel)); |
sahilmgandhi | 18:6a4db94011d3 | 1231 | |
sahilmgandhi | 18:6a4db94011d3 | 1232 | switch (Channel) |
sahilmgandhi | 18:6a4db94011d3 | 1233 | { |
sahilmgandhi | 18:6a4db94011d3 | 1234 | case TIM_CHANNEL_1: |
sahilmgandhi | 18:6a4db94011d3 | 1235 | { |
sahilmgandhi | 18:6a4db94011d3 | 1236 | /* Disable the TIM Capture/Compare 1 DMA request */ |
sahilmgandhi | 18:6a4db94011d3 | 1237 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1); |
sahilmgandhi | 18:6a4db94011d3 | 1238 | } |
sahilmgandhi | 18:6a4db94011d3 | 1239 | break; |
sahilmgandhi | 18:6a4db94011d3 | 1240 | |
sahilmgandhi | 18:6a4db94011d3 | 1241 | case TIM_CHANNEL_2: |
sahilmgandhi | 18:6a4db94011d3 | 1242 | { |
sahilmgandhi | 18:6a4db94011d3 | 1243 | /* Disable the TIM Capture/Compare 2 DMA request */ |
sahilmgandhi | 18:6a4db94011d3 | 1244 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2); |
sahilmgandhi | 18:6a4db94011d3 | 1245 | } |
sahilmgandhi | 18:6a4db94011d3 | 1246 | break; |
sahilmgandhi | 18:6a4db94011d3 | 1247 | |
sahilmgandhi | 18:6a4db94011d3 | 1248 | case TIM_CHANNEL_3: |
sahilmgandhi | 18:6a4db94011d3 | 1249 | { |
sahilmgandhi | 18:6a4db94011d3 | 1250 | /* Disable the TIM Capture/Compare 3 DMA request */ |
sahilmgandhi | 18:6a4db94011d3 | 1251 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3); |
sahilmgandhi | 18:6a4db94011d3 | 1252 | } |
sahilmgandhi | 18:6a4db94011d3 | 1253 | break; |
sahilmgandhi | 18:6a4db94011d3 | 1254 | |
sahilmgandhi | 18:6a4db94011d3 | 1255 | case TIM_CHANNEL_4: |
sahilmgandhi | 18:6a4db94011d3 | 1256 | { |
sahilmgandhi | 18:6a4db94011d3 | 1257 | /* Disable the TIM Capture/Compare 4 DMA request */ |
sahilmgandhi | 18:6a4db94011d3 | 1258 | __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC4); |
sahilmgandhi | 18:6a4db94011d3 | 1259 | } |
sahilmgandhi | 18:6a4db94011d3 | 1260 | break; |
sahilmgandhi | 18:6a4db94011d3 | 1261 | |
sahilmgandhi | 18:6a4db94011d3 | 1262 | default: |
sahilmgandhi | 18:6a4db94011d3 | 1263 | break; |
sahilmgandhi | 18:6a4db94011d3 | 1264 | } |
sahilmgandhi | 18:6a4db94011d3 | 1265 | |
sahilmgandhi | 18:6a4db94011d3 | 1266 | /* Disable the complementary PWM output */ |
sahilmgandhi | 18:6a4db94011d3 | 1267 | TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE); |
sahilmgandhi | 18:6a4db94011d3 | 1268 | |
sahilmgandhi | 18:6a4db94011d3 | 1269 | /* Disable the Main Output */ |
sahilmgandhi | 18:6a4db94011d3 | 1270 | __HAL_TIM_MOE_DISABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1271 | |
sahilmgandhi | 18:6a4db94011d3 | 1272 | /* Disable the Peripheral */ |
sahilmgandhi | 18:6a4db94011d3 | 1273 | __HAL_TIM_DISABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1274 | |
sahilmgandhi | 18:6a4db94011d3 | 1275 | /* Change the htim state */ |
sahilmgandhi | 18:6a4db94011d3 | 1276 | htim->State = HAL_TIM_STATE_READY; |
sahilmgandhi | 18:6a4db94011d3 | 1277 | |
sahilmgandhi | 18:6a4db94011d3 | 1278 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 1279 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 1280 | } |
sahilmgandhi | 18:6a4db94011d3 | 1281 | |
sahilmgandhi | 18:6a4db94011d3 | 1282 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1283 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 1284 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1285 | |
sahilmgandhi | 18:6a4db94011d3 | 1286 | /** @defgroup TIMEx_Exported_Functions_Group4 Timer Complementary One Pulse functions |
sahilmgandhi | 18:6a4db94011d3 | 1287 | * @brief Timer Complementary One Pulse functions |
sahilmgandhi | 18:6a4db94011d3 | 1288 | * |
sahilmgandhi | 18:6a4db94011d3 | 1289 | @verbatim |
sahilmgandhi | 18:6a4db94011d3 | 1290 | ============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 1291 | ##### Timer Complementary One Pulse functions ##### |
sahilmgandhi | 18:6a4db94011d3 | 1292 | ============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 1293 | [..] |
sahilmgandhi | 18:6a4db94011d3 | 1294 | This section provides functions allowing to: |
sahilmgandhi | 18:6a4db94011d3 | 1295 | (+) Start the Complementary One Pulse generation. |
sahilmgandhi | 18:6a4db94011d3 | 1296 | (+) Stop the Complementary One Pulse. |
sahilmgandhi | 18:6a4db94011d3 | 1297 | (+) Start the Complementary One Pulse and enable interrupts. |
sahilmgandhi | 18:6a4db94011d3 | 1298 | (+) Stop the Complementary One Pulse and disable interrupts. |
sahilmgandhi | 18:6a4db94011d3 | 1299 | |
sahilmgandhi | 18:6a4db94011d3 | 1300 | @endverbatim |
sahilmgandhi | 18:6a4db94011d3 | 1301 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 1302 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1303 | |
sahilmgandhi | 18:6a4db94011d3 | 1304 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1305 | * @brief Starts the TIM One Pulse signal generation on the complementary |
sahilmgandhi | 18:6a4db94011d3 | 1306 | * output. |
sahilmgandhi | 18:6a4db94011d3 | 1307 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 1308 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 1309 | * @param OutputChannel: TIM Channel to be enabled. |
sahilmgandhi | 18:6a4db94011d3 | 1310 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1311 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
sahilmgandhi | 18:6a4db94011d3 | 1312 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
sahilmgandhi | 18:6a4db94011d3 | 1313 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 1314 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1315 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
sahilmgandhi | 18:6a4db94011d3 | 1316 | { |
sahilmgandhi | 18:6a4db94011d3 | 1317 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 1318 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
sahilmgandhi | 18:6a4db94011d3 | 1319 | |
sahilmgandhi | 18:6a4db94011d3 | 1320 | /* Enable the complementary One Pulse output */ |
sahilmgandhi | 18:6a4db94011d3 | 1321 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); |
sahilmgandhi | 18:6a4db94011d3 | 1322 | |
sahilmgandhi | 18:6a4db94011d3 | 1323 | /* Enable the Main Output */ |
sahilmgandhi | 18:6a4db94011d3 | 1324 | __HAL_TIM_MOE_ENABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1325 | |
sahilmgandhi | 18:6a4db94011d3 | 1326 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 1327 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 1328 | } |
sahilmgandhi | 18:6a4db94011d3 | 1329 | |
sahilmgandhi | 18:6a4db94011d3 | 1330 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1331 | * @brief Stops the TIM One Pulse signal generation on the complementary |
sahilmgandhi | 18:6a4db94011d3 | 1332 | * output. |
sahilmgandhi | 18:6a4db94011d3 | 1333 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 1334 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 1335 | * @param OutputChannel: TIM Channel to be disabled. |
sahilmgandhi | 18:6a4db94011d3 | 1336 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1337 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
sahilmgandhi | 18:6a4db94011d3 | 1338 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
sahilmgandhi | 18:6a4db94011d3 | 1339 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 1340 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1341 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
sahilmgandhi | 18:6a4db94011d3 | 1342 | { |
sahilmgandhi | 18:6a4db94011d3 | 1343 | |
sahilmgandhi | 18:6a4db94011d3 | 1344 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 1345 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
sahilmgandhi | 18:6a4db94011d3 | 1346 | |
sahilmgandhi | 18:6a4db94011d3 | 1347 | /* Disable the complementary One Pulse output */ |
sahilmgandhi | 18:6a4db94011d3 | 1348 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); |
sahilmgandhi | 18:6a4db94011d3 | 1349 | |
sahilmgandhi | 18:6a4db94011d3 | 1350 | /* Disable the Main Output */ |
sahilmgandhi | 18:6a4db94011d3 | 1351 | __HAL_TIM_MOE_DISABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1352 | |
sahilmgandhi | 18:6a4db94011d3 | 1353 | /* Disable the Peripheral */ |
sahilmgandhi | 18:6a4db94011d3 | 1354 | __HAL_TIM_DISABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1355 | |
sahilmgandhi | 18:6a4db94011d3 | 1356 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 1357 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 1358 | } |
sahilmgandhi | 18:6a4db94011d3 | 1359 | |
sahilmgandhi | 18:6a4db94011d3 | 1360 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1361 | * @brief Starts the TIM One Pulse signal generation in interrupt mode on the |
sahilmgandhi | 18:6a4db94011d3 | 1362 | * complementary channel. |
sahilmgandhi | 18:6a4db94011d3 | 1363 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 1364 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 1365 | * @param OutputChannel: TIM Channel to be enabled. |
sahilmgandhi | 18:6a4db94011d3 | 1366 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1367 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
sahilmgandhi | 18:6a4db94011d3 | 1368 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
sahilmgandhi | 18:6a4db94011d3 | 1369 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 1370 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1371 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
sahilmgandhi | 18:6a4db94011d3 | 1372 | { |
sahilmgandhi | 18:6a4db94011d3 | 1373 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 1374 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
sahilmgandhi | 18:6a4db94011d3 | 1375 | |
sahilmgandhi | 18:6a4db94011d3 | 1376 | /* Enable the TIM Capture/Compare 1 interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 1377 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1); |
sahilmgandhi | 18:6a4db94011d3 | 1378 | |
sahilmgandhi | 18:6a4db94011d3 | 1379 | /* Enable the TIM Capture/Compare 2 interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 1380 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2); |
sahilmgandhi | 18:6a4db94011d3 | 1381 | |
sahilmgandhi | 18:6a4db94011d3 | 1382 | /* Enable the complementary One Pulse output */ |
sahilmgandhi | 18:6a4db94011d3 | 1383 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE); |
sahilmgandhi | 18:6a4db94011d3 | 1384 | |
sahilmgandhi | 18:6a4db94011d3 | 1385 | /* Enable the Main Output */ |
sahilmgandhi | 18:6a4db94011d3 | 1386 | __HAL_TIM_MOE_ENABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1387 | |
sahilmgandhi | 18:6a4db94011d3 | 1388 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 1389 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 1390 | } |
sahilmgandhi | 18:6a4db94011d3 | 1391 | |
sahilmgandhi | 18:6a4db94011d3 | 1392 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1393 | * @brief Stops the TIM One Pulse signal generation in interrupt mode on the |
sahilmgandhi | 18:6a4db94011d3 | 1394 | * complementary channel. |
sahilmgandhi | 18:6a4db94011d3 | 1395 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 1396 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 1397 | * @param OutputChannel: TIM Channel to be disabled. |
sahilmgandhi | 18:6a4db94011d3 | 1398 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1399 | * @arg TIM_CHANNEL_1: TIM Channel 1 selected |
sahilmgandhi | 18:6a4db94011d3 | 1400 | * @arg TIM_CHANNEL_2: TIM Channel 2 selected |
sahilmgandhi | 18:6a4db94011d3 | 1401 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 1402 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1403 | HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel) |
sahilmgandhi | 18:6a4db94011d3 | 1404 | { |
sahilmgandhi | 18:6a4db94011d3 | 1405 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 1406 | assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel)); |
sahilmgandhi | 18:6a4db94011d3 | 1407 | |
sahilmgandhi | 18:6a4db94011d3 | 1408 | /* Disable the TIM Capture/Compare 1 interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 1409 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1); |
sahilmgandhi | 18:6a4db94011d3 | 1410 | |
sahilmgandhi | 18:6a4db94011d3 | 1411 | /* Disable the TIM Capture/Compare 2 interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 1412 | __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2); |
sahilmgandhi | 18:6a4db94011d3 | 1413 | |
sahilmgandhi | 18:6a4db94011d3 | 1414 | /* Disable the complementary One Pulse output */ |
sahilmgandhi | 18:6a4db94011d3 | 1415 | TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE); |
sahilmgandhi | 18:6a4db94011d3 | 1416 | |
sahilmgandhi | 18:6a4db94011d3 | 1417 | /* Disable the Main Output */ |
sahilmgandhi | 18:6a4db94011d3 | 1418 | __HAL_TIM_MOE_DISABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1419 | |
sahilmgandhi | 18:6a4db94011d3 | 1420 | /* Disable the Peripheral */ |
sahilmgandhi | 18:6a4db94011d3 | 1421 | __HAL_TIM_DISABLE(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1422 | |
sahilmgandhi | 18:6a4db94011d3 | 1423 | /* Return function status */ |
sahilmgandhi | 18:6a4db94011d3 | 1424 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 1425 | } |
sahilmgandhi | 18:6a4db94011d3 | 1426 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1427 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 1428 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1429 | |
sahilmgandhi | 18:6a4db94011d3 | 1430 | /** @defgroup TIMEx_Exported_Functions_Group5 Peripheral Control functions |
sahilmgandhi | 18:6a4db94011d3 | 1431 | * @brief Peripheral Control functions |
sahilmgandhi | 18:6a4db94011d3 | 1432 | * |
sahilmgandhi | 18:6a4db94011d3 | 1433 | @verbatim |
sahilmgandhi | 18:6a4db94011d3 | 1434 | ============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 1435 | ##### Peripheral Control functions ##### |
sahilmgandhi | 18:6a4db94011d3 | 1436 | ============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 1437 | [..] |
sahilmgandhi | 18:6a4db94011d3 | 1438 | This section provides functions allowing to: |
sahilmgandhi | 18:6a4db94011d3 | 1439 | (+) Configure The Input Output channels for OC, PWM, IC or One Pulse mode. |
sahilmgandhi | 18:6a4db94011d3 | 1440 | (+) Configure External Clock source. |
sahilmgandhi | 18:6a4db94011d3 | 1441 | (+) Configure Complementary channels, break features and dead time. |
sahilmgandhi | 18:6a4db94011d3 | 1442 | (+) Configure Master and the Slave synchronization. |
sahilmgandhi | 18:6a4db94011d3 | 1443 | (+) Configure the commutation event in case of use of the Hall sensor interface. |
sahilmgandhi | 18:6a4db94011d3 | 1444 | (+) Configure the DMA Burst Mode. |
sahilmgandhi | 18:6a4db94011d3 | 1445 | |
sahilmgandhi | 18:6a4db94011d3 | 1446 | @endverbatim |
sahilmgandhi | 18:6a4db94011d3 | 1447 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 1448 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1449 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1450 | * @brief Configure the TIM commutation event sequence. |
sahilmgandhi | 18:6a4db94011d3 | 1451 | * @note This function is mandatory to use the commutation event in order to |
sahilmgandhi | 18:6a4db94011d3 | 1452 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
sahilmgandhi | 18:6a4db94011d3 | 1453 | * the typical use of this feature is with the use of another Timer(interface Timer) |
sahilmgandhi | 18:6a4db94011d3 | 1454 | * configured in Hall sensor interface, this interface Timer will generate the |
sahilmgandhi | 18:6a4db94011d3 | 1455 | * commutation at its TRGO output (connected to Timer used in this function) each time |
sahilmgandhi | 18:6a4db94011d3 | 1456 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
sahilmgandhi | 18:6a4db94011d3 | 1457 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 1458 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 1459 | * @param InputTrigger: the Internal trigger corresponding to the Timer Interfacing with the Hall sensor. |
sahilmgandhi | 18:6a4db94011d3 | 1460 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1461 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
sahilmgandhi | 18:6a4db94011d3 | 1462 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
sahilmgandhi | 18:6a4db94011d3 | 1463 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
sahilmgandhi | 18:6a4db94011d3 | 1464 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
sahilmgandhi | 18:6a4db94011d3 | 1465 | * @arg TIM_TS_NONE: No trigger is needed |
sahilmgandhi | 18:6a4db94011d3 | 1466 | * @param CommutationSource: the Commutation Event source. |
sahilmgandhi | 18:6a4db94011d3 | 1467 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1468 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
sahilmgandhi | 18:6a4db94011d3 | 1469 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
sahilmgandhi | 18:6a4db94011d3 | 1470 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 1471 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1472 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) |
sahilmgandhi | 18:6a4db94011d3 | 1473 | { |
sahilmgandhi | 18:6a4db94011d3 | 1474 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 1475 | assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance)); |
sahilmgandhi | 18:6a4db94011d3 | 1476 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
sahilmgandhi | 18:6a4db94011d3 | 1477 | |
sahilmgandhi | 18:6a4db94011d3 | 1478 | __HAL_LOCK(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1479 | |
sahilmgandhi | 18:6a4db94011d3 | 1480 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
sahilmgandhi | 18:6a4db94011d3 | 1481 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
sahilmgandhi | 18:6a4db94011d3 | 1482 | { |
sahilmgandhi | 18:6a4db94011d3 | 1483 | /* Select the Input trigger */ |
sahilmgandhi | 18:6a4db94011d3 | 1484 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
sahilmgandhi | 18:6a4db94011d3 | 1485 | htim->Instance->SMCR |= InputTrigger; |
sahilmgandhi | 18:6a4db94011d3 | 1486 | } |
sahilmgandhi | 18:6a4db94011d3 | 1487 | |
sahilmgandhi | 18:6a4db94011d3 | 1488 | /* Select the Capture Compare preload feature */ |
sahilmgandhi | 18:6a4db94011d3 | 1489 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
sahilmgandhi | 18:6a4db94011d3 | 1490 | /* Select the Commutation event source */ |
sahilmgandhi | 18:6a4db94011d3 | 1491 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
sahilmgandhi | 18:6a4db94011d3 | 1492 | htim->Instance->CR2 |= CommutationSource; |
sahilmgandhi | 18:6a4db94011d3 | 1493 | |
sahilmgandhi | 18:6a4db94011d3 | 1494 | __HAL_UNLOCK(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1495 | |
sahilmgandhi | 18:6a4db94011d3 | 1496 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 1497 | } |
sahilmgandhi | 18:6a4db94011d3 | 1498 | |
sahilmgandhi | 18:6a4db94011d3 | 1499 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1500 | * @brief Configure the TIM commutation event sequence with interrupt. |
sahilmgandhi | 18:6a4db94011d3 | 1501 | * @note This function is mandatory to use the commutation event in order to |
sahilmgandhi | 18:6a4db94011d3 | 1502 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
sahilmgandhi | 18:6a4db94011d3 | 1503 | * the typical use of this feature is with the use of another Timer(interface Timer) |
sahilmgandhi | 18:6a4db94011d3 | 1504 | * configured in Hall sensor interface, this interface Timer will generate the |
sahilmgandhi | 18:6a4db94011d3 | 1505 | * commutation at its TRGO output (connected to Timer used in this function) each time |
sahilmgandhi | 18:6a4db94011d3 | 1506 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
sahilmgandhi | 18:6a4db94011d3 | 1507 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 1508 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 1509 | * @param InputTrigger: the Internal trigger corresponding to the Timer Interfacing with the Hall sensor. |
sahilmgandhi | 18:6a4db94011d3 | 1510 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1511 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
sahilmgandhi | 18:6a4db94011d3 | 1512 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
sahilmgandhi | 18:6a4db94011d3 | 1513 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
sahilmgandhi | 18:6a4db94011d3 | 1514 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
sahilmgandhi | 18:6a4db94011d3 | 1515 | * @arg TIM_TS_NONE: No trigger is needed |
sahilmgandhi | 18:6a4db94011d3 | 1516 | * @param CommutationSource: the Commutation Event source. |
sahilmgandhi | 18:6a4db94011d3 | 1517 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1518 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
sahilmgandhi | 18:6a4db94011d3 | 1519 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
sahilmgandhi | 18:6a4db94011d3 | 1520 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 1521 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1522 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) |
sahilmgandhi | 18:6a4db94011d3 | 1523 | { |
sahilmgandhi | 18:6a4db94011d3 | 1524 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 1525 | assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance)); |
sahilmgandhi | 18:6a4db94011d3 | 1526 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
sahilmgandhi | 18:6a4db94011d3 | 1527 | |
sahilmgandhi | 18:6a4db94011d3 | 1528 | __HAL_LOCK(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1529 | |
sahilmgandhi | 18:6a4db94011d3 | 1530 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
sahilmgandhi | 18:6a4db94011d3 | 1531 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
sahilmgandhi | 18:6a4db94011d3 | 1532 | { |
sahilmgandhi | 18:6a4db94011d3 | 1533 | /* Select the Input trigger */ |
sahilmgandhi | 18:6a4db94011d3 | 1534 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
sahilmgandhi | 18:6a4db94011d3 | 1535 | htim->Instance->SMCR |= InputTrigger; |
sahilmgandhi | 18:6a4db94011d3 | 1536 | } |
sahilmgandhi | 18:6a4db94011d3 | 1537 | |
sahilmgandhi | 18:6a4db94011d3 | 1538 | /* Select the Capture Compare preload feature */ |
sahilmgandhi | 18:6a4db94011d3 | 1539 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
sahilmgandhi | 18:6a4db94011d3 | 1540 | /* Select the Commutation event source */ |
sahilmgandhi | 18:6a4db94011d3 | 1541 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
sahilmgandhi | 18:6a4db94011d3 | 1542 | htim->Instance->CR2 |= CommutationSource; |
sahilmgandhi | 18:6a4db94011d3 | 1543 | |
sahilmgandhi | 18:6a4db94011d3 | 1544 | /* Enable the Commutation Interrupt Request */ |
sahilmgandhi | 18:6a4db94011d3 | 1545 | __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM); |
sahilmgandhi | 18:6a4db94011d3 | 1546 | |
sahilmgandhi | 18:6a4db94011d3 | 1547 | __HAL_UNLOCK(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1548 | |
sahilmgandhi | 18:6a4db94011d3 | 1549 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 1550 | } |
sahilmgandhi | 18:6a4db94011d3 | 1551 | |
sahilmgandhi | 18:6a4db94011d3 | 1552 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1553 | * @brief Configure the TIM commutation event sequence with DMA. |
sahilmgandhi | 18:6a4db94011d3 | 1554 | * @note This function is mandatory to use the commutation event in order to |
sahilmgandhi | 18:6a4db94011d3 | 1555 | * update the configuration at each commutation detection on the TRGI input of the Timer, |
sahilmgandhi | 18:6a4db94011d3 | 1556 | * the typical use of this feature is with the use of another Timer(interface Timer) |
sahilmgandhi | 18:6a4db94011d3 | 1557 | * configured in Hall sensor interface, this interface Timer will generate the |
sahilmgandhi | 18:6a4db94011d3 | 1558 | * commutation at its TRGO output (connected to Timer used in this function) each time |
sahilmgandhi | 18:6a4db94011d3 | 1559 | * the TI1 of the Interface Timer detect a commutation at its input TI1. |
sahilmgandhi | 18:6a4db94011d3 | 1560 | * @note: The user should configure the DMA in his own software, in This function only the COMDE bit is set |
sahilmgandhi | 18:6a4db94011d3 | 1561 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 1562 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 1563 | * @param InputTrigger: the Internal trigger corresponding to the Timer Interfacing with the Hall sensor. |
sahilmgandhi | 18:6a4db94011d3 | 1564 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1565 | * @arg TIM_TS_ITR0: Internal trigger 0 selected |
sahilmgandhi | 18:6a4db94011d3 | 1566 | * @arg TIM_TS_ITR1: Internal trigger 1 selected |
sahilmgandhi | 18:6a4db94011d3 | 1567 | * @arg TIM_TS_ITR2: Internal trigger 2 selected |
sahilmgandhi | 18:6a4db94011d3 | 1568 | * @arg TIM_TS_ITR3: Internal trigger 3 selected |
sahilmgandhi | 18:6a4db94011d3 | 1569 | * @arg TIM_TS_NONE: No trigger is needed |
sahilmgandhi | 18:6a4db94011d3 | 1570 | * @param CommutationSource: the Commutation Event source. |
sahilmgandhi | 18:6a4db94011d3 | 1571 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1572 | * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer |
sahilmgandhi | 18:6a4db94011d3 | 1573 | * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit |
sahilmgandhi | 18:6a4db94011d3 | 1574 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 1575 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1576 | HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource) |
sahilmgandhi | 18:6a4db94011d3 | 1577 | { |
sahilmgandhi | 18:6a4db94011d3 | 1578 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 1579 | assert_param(IS_TIM_ADVANCED_INSTANCE(htim->Instance)); |
sahilmgandhi | 18:6a4db94011d3 | 1580 | assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger)); |
sahilmgandhi | 18:6a4db94011d3 | 1581 | |
sahilmgandhi | 18:6a4db94011d3 | 1582 | __HAL_LOCK(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1583 | |
sahilmgandhi | 18:6a4db94011d3 | 1584 | if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) || |
sahilmgandhi | 18:6a4db94011d3 | 1585 | (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3)) |
sahilmgandhi | 18:6a4db94011d3 | 1586 | { |
sahilmgandhi | 18:6a4db94011d3 | 1587 | /* Select the Input trigger */ |
sahilmgandhi | 18:6a4db94011d3 | 1588 | htim->Instance->SMCR &= ~TIM_SMCR_TS; |
sahilmgandhi | 18:6a4db94011d3 | 1589 | htim->Instance->SMCR |= InputTrigger; |
sahilmgandhi | 18:6a4db94011d3 | 1590 | } |
sahilmgandhi | 18:6a4db94011d3 | 1591 | |
sahilmgandhi | 18:6a4db94011d3 | 1592 | /* Select the Capture Compare preload feature */ |
sahilmgandhi | 18:6a4db94011d3 | 1593 | htim->Instance->CR2 |= TIM_CR2_CCPC; |
sahilmgandhi | 18:6a4db94011d3 | 1594 | /* Select the Commutation event source */ |
sahilmgandhi | 18:6a4db94011d3 | 1595 | htim->Instance->CR2 &= ~TIM_CR2_CCUS; |
sahilmgandhi | 18:6a4db94011d3 | 1596 | htim->Instance->CR2 |= CommutationSource; |
sahilmgandhi | 18:6a4db94011d3 | 1597 | |
sahilmgandhi | 18:6a4db94011d3 | 1598 | /* Enable the Commutation DMA Request */ |
sahilmgandhi | 18:6a4db94011d3 | 1599 | /* Set the DMA Commutation Callback */ |
sahilmgandhi | 18:6a4db94011d3 | 1600 | htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt; |
sahilmgandhi | 18:6a4db94011d3 | 1601 | /* Set the DMA error callback */ |
sahilmgandhi | 18:6a4db94011d3 | 1602 | htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError; |
sahilmgandhi | 18:6a4db94011d3 | 1603 | |
sahilmgandhi | 18:6a4db94011d3 | 1604 | /* Enable the Commutation DMA Request */ |
sahilmgandhi | 18:6a4db94011d3 | 1605 | __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM); |
sahilmgandhi | 18:6a4db94011d3 | 1606 | |
sahilmgandhi | 18:6a4db94011d3 | 1607 | __HAL_UNLOCK(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1608 | |
sahilmgandhi | 18:6a4db94011d3 | 1609 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 1610 | } |
sahilmgandhi | 18:6a4db94011d3 | 1611 | |
sahilmgandhi | 18:6a4db94011d3 | 1612 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1613 | * @brief Configures the TIM in master mode. |
sahilmgandhi | 18:6a4db94011d3 | 1614 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 1615 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 1616 | * @param sMasterConfig: pointer to a TIM_MasterConfigTypeDef structure that |
sahilmgandhi | 18:6a4db94011d3 | 1617 | * contains the selected trigger output (TRGO) and the Master/Slave |
sahilmgandhi | 18:6a4db94011d3 | 1618 | * mode. |
sahilmgandhi | 18:6a4db94011d3 | 1619 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 1620 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1621 | HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig) |
sahilmgandhi | 18:6a4db94011d3 | 1622 | { |
sahilmgandhi | 18:6a4db94011d3 | 1623 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 1624 | assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance)); |
sahilmgandhi | 18:6a4db94011d3 | 1625 | assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger)); |
sahilmgandhi | 18:6a4db94011d3 | 1626 | assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode)); |
sahilmgandhi | 18:6a4db94011d3 | 1627 | |
sahilmgandhi | 18:6a4db94011d3 | 1628 | __HAL_LOCK(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1629 | |
sahilmgandhi | 18:6a4db94011d3 | 1630 | htim->State = HAL_TIM_STATE_BUSY; |
sahilmgandhi | 18:6a4db94011d3 | 1631 | |
sahilmgandhi | 18:6a4db94011d3 | 1632 | /* Reset the MMS Bits */ |
sahilmgandhi | 18:6a4db94011d3 | 1633 | htim->Instance->CR2 &= ~TIM_CR2_MMS; |
sahilmgandhi | 18:6a4db94011d3 | 1634 | /* Select the TRGO source */ |
sahilmgandhi | 18:6a4db94011d3 | 1635 | htim->Instance->CR2 |= sMasterConfig->MasterOutputTrigger; |
sahilmgandhi | 18:6a4db94011d3 | 1636 | |
sahilmgandhi | 18:6a4db94011d3 | 1637 | /* Reset the MSM Bit */ |
sahilmgandhi | 18:6a4db94011d3 | 1638 | htim->Instance->SMCR &= ~TIM_SMCR_MSM; |
sahilmgandhi | 18:6a4db94011d3 | 1639 | /* Set or Reset the MSM Bit */ |
sahilmgandhi | 18:6a4db94011d3 | 1640 | htim->Instance->SMCR |= sMasterConfig->MasterSlaveMode; |
sahilmgandhi | 18:6a4db94011d3 | 1641 | |
sahilmgandhi | 18:6a4db94011d3 | 1642 | htim->State = HAL_TIM_STATE_READY; |
sahilmgandhi | 18:6a4db94011d3 | 1643 | |
sahilmgandhi | 18:6a4db94011d3 | 1644 | __HAL_UNLOCK(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1645 | |
sahilmgandhi | 18:6a4db94011d3 | 1646 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 1647 | } |
sahilmgandhi | 18:6a4db94011d3 | 1648 | |
sahilmgandhi | 18:6a4db94011d3 | 1649 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1650 | * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State |
sahilmgandhi | 18:6a4db94011d3 | 1651 | * and the AOE(automatic output enable). |
sahilmgandhi | 18:6a4db94011d3 | 1652 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 1653 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 1654 | * @param sBreakDeadTimeConfig: pointer to a TIM_ConfigBreakDeadConfig_TypeDef structure that |
sahilmgandhi | 18:6a4db94011d3 | 1655 | * contains the BDTR Register configuration information for the TIM peripheral. |
sahilmgandhi | 18:6a4db94011d3 | 1656 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 1657 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1658 | HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, |
sahilmgandhi | 18:6a4db94011d3 | 1659 | TIM_BreakDeadTimeConfigTypeDef * sBreakDeadTimeConfig) |
sahilmgandhi | 18:6a4db94011d3 | 1660 | { |
sahilmgandhi | 18:6a4db94011d3 | 1661 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 1662 | assert_param(IS_TIM_CC4_INSTANCE(htim->Instance)); |
sahilmgandhi | 18:6a4db94011d3 | 1663 | assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode)); |
sahilmgandhi | 18:6a4db94011d3 | 1664 | assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode)); |
sahilmgandhi | 18:6a4db94011d3 | 1665 | assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel)); |
sahilmgandhi | 18:6a4db94011d3 | 1666 | assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState)); |
sahilmgandhi | 18:6a4db94011d3 | 1667 | assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity)); |
sahilmgandhi | 18:6a4db94011d3 | 1668 | assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput)); |
sahilmgandhi | 18:6a4db94011d3 | 1669 | assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime)); |
sahilmgandhi | 18:6a4db94011d3 | 1670 | |
sahilmgandhi | 18:6a4db94011d3 | 1671 | /* Process Locked */ |
sahilmgandhi | 18:6a4db94011d3 | 1672 | __HAL_LOCK(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1673 | |
sahilmgandhi | 18:6a4db94011d3 | 1674 | htim->State = HAL_TIM_STATE_BUSY; |
sahilmgandhi | 18:6a4db94011d3 | 1675 | |
sahilmgandhi | 18:6a4db94011d3 | 1676 | /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State, |
sahilmgandhi | 18:6a4db94011d3 | 1677 | the OSSI State, the dead time value and the Automatic Output Enable Bit */ |
sahilmgandhi | 18:6a4db94011d3 | 1678 | htim->Instance->BDTR = (uint32_t)sBreakDeadTimeConfig->OffStateRunMode | |
sahilmgandhi | 18:6a4db94011d3 | 1679 | sBreakDeadTimeConfig->OffStateIDLEMode | |
sahilmgandhi | 18:6a4db94011d3 | 1680 | sBreakDeadTimeConfig->LockLevel | |
sahilmgandhi | 18:6a4db94011d3 | 1681 | sBreakDeadTimeConfig->DeadTime | |
sahilmgandhi | 18:6a4db94011d3 | 1682 | sBreakDeadTimeConfig->BreakState | |
sahilmgandhi | 18:6a4db94011d3 | 1683 | sBreakDeadTimeConfig->BreakPolarity | |
sahilmgandhi | 18:6a4db94011d3 | 1684 | sBreakDeadTimeConfig->AutomaticOutput; |
sahilmgandhi | 18:6a4db94011d3 | 1685 | |
sahilmgandhi | 18:6a4db94011d3 | 1686 | |
sahilmgandhi | 18:6a4db94011d3 | 1687 | htim->State = HAL_TIM_STATE_READY; |
sahilmgandhi | 18:6a4db94011d3 | 1688 | |
sahilmgandhi | 18:6a4db94011d3 | 1689 | __HAL_UNLOCK(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1690 | |
sahilmgandhi | 18:6a4db94011d3 | 1691 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 1692 | } |
sahilmgandhi | 18:6a4db94011d3 | 1693 | |
sahilmgandhi | 18:6a4db94011d3 | 1694 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1695 | * @brief Configures the TIM2, TIM5 and TIM11 Remapping input capabilities. |
sahilmgandhi | 18:6a4db94011d3 | 1696 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 1697 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 1698 | * @param Remap: specifies the TIM input remapping source. |
sahilmgandhi | 18:6a4db94011d3 | 1699 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1700 | * @arg TIM_TIM2_TIM8_TRGO: TIM2 ITR1 input is connected to TIM8 Trigger output(default) |
sahilmgandhi | 18:6a4db94011d3 | 1701 | * @arg TIM_TIM2_ETH_PTP: TIM2 ITR1 input is connected to ETH PTP trigger output. |
sahilmgandhi | 18:6a4db94011d3 | 1702 | * @arg TIM_TIM2_USBFS_SOF: TIM2 ITR1 input is connected to USB FS SOF. |
sahilmgandhi | 18:6a4db94011d3 | 1703 | * @arg TIM_TIM2_USBHS_SOF: TIM2 ITR1 input is connected to USB HS SOF. |
sahilmgandhi | 18:6a4db94011d3 | 1704 | * @arg TIM_TIM5_GPIO: TIM5 CH4 input is connected to dedicated Timer pin(default) |
sahilmgandhi | 18:6a4db94011d3 | 1705 | * @arg TIM_TIM5_LSI: TIM5 CH4 input is connected to LSI clock. |
sahilmgandhi | 18:6a4db94011d3 | 1706 | * @arg TIM_TIM5_LSE: TIM5 CH4 input is connected to LSE clock. |
sahilmgandhi | 18:6a4db94011d3 | 1707 | * @arg TIM_TIM5_RTC: TIM5 CH4 input is connected to RTC Output event. |
sahilmgandhi | 18:6a4db94011d3 | 1708 | * @arg TIM_TIM11_GPIO: TIM11 CH4 input is connected to dedicated Timer pin(default) |
sahilmgandhi | 18:6a4db94011d3 | 1709 | * @arg TIM_TIM11_HSE: TIM11 CH4 input is connected to HSE_RTC clock |
sahilmgandhi | 18:6a4db94011d3 | 1710 | * (HSE divided by a programmable prescaler) |
sahilmgandhi | 18:6a4db94011d3 | 1711 | * @retval HAL status |
sahilmgandhi | 18:6a4db94011d3 | 1712 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1713 | HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap) |
sahilmgandhi | 18:6a4db94011d3 | 1714 | { |
sahilmgandhi | 18:6a4db94011d3 | 1715 | __HAL_LOCK(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1716 | |
sahilmgandhi | 18:6a4db94011d3 | 1717 | /* Check parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 1718 | assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance)); |
sahilmgandhi | 18:6a4db94011d3 | 1719 | assert_param(IS_TIM_REMAP(Remap)); |
sahilmgandhi | 18:6a4db94011d3 | 1720 | |
sahilmgandhi | 18:6a4db94011d3 | 1721 | /* Set the Timer remapping configuration */ |
sahilmgandhi | 18:6a4db94011d3 | 1722 | htim->Instance->OR = Remap; |
sahilmgandhi | 18:6a4db94011d3 | 1723 | |
sahilmgandhi | 18:6a4db94011d3 | 1724 | htim->State = HAL_TIM_STATE_READY; |
sahilmgandhi | 18:6a4db94011d3 | 1725 | |
sahilmgandhi | 18:6a4db94011d3 | 1726 | __HAL_UNLOCK(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1727 | |
sahilmgandhi | 18:6a4db94011d3 | 1728 | return HAL_OK; |
sahilmgandhi | 18:6a4db94011d3 | 1729 | } |
sahilmgandhi | 18:6a4db94011d3 | 1730 | |
sahilmgandhi | 18:6a4db94011d3 | 1731 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1732 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 1733 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1734 | |
sahilmgandhi | 18:6a4db94011d3 | 1735 | /** @defgroup TIMEx_Exported_Functions_Group6 Extension Callbacks functions |
sahilmgandhi | 18:6a4db94011d3 | 1736 | * @brief Extension Callbacks functions |
sahilmgandhi | 18:6a4db94011d3 | 1737 | * |
sahilmgandhi | 18:6a4db94011d3 | 1738 | @verbatim |
sahilmgandhi | 18:6a4db94011d3 | 1739 | ============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 1740 | ##### Extension Callbacks functions ##### |
sahilmgandhi | 18:6a4db94011d3 | 1741 | ============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 1742 | [..] |
sahilmgandhi | 18:6a4db94011d3 | 1743 | This section provides Extension TIM callback functions: |
sahilmgandhi | 18:6a4db94011d3 | 1744 | (+) Timer Commutation callback |
sahilmgandhi | 18:6a4db94011d3 | 1745 | (+) Timer Break callback |
sahilmgandhi | 18:6a4db94011d3 | 1746 | |
sahilmgandhi | 18:6a4db94011d3 | 1747 | @endverbatim |
sahilmgandhi | 18:6a4db94011d3 | 1748 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 1749 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1750 | |
sahilmgandhi | 18:6a4db94011d3 | 1751 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1752 | * @brief Hall commutation changed callback in non blocking mode |
sahilmgandhi | 18:6a4db94011d3 | 1753 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 1754 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 1755 | * @retval None |
sahilmgandhi | 18:6a4db94011d3 | 1756 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1757 | __weak void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim) |
sahilmgandhi | 18:6a4db94011d3 | 1758 | { |
sahilmgandhi | 18:6a4db94011d3 | 1759 | /* Prevent unused argument(s) compilation warning */ |
sahilmgandhi | 18:6a4db94011d3 | 1760 | UNUSED(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1761 | /* NOTE : This function Should not be modified, when the callback is needed, |
sahilmgandhi | 18:6a4db94011d3 | 1762 | the HAL_TIMEx_CommutationCallback could be implemented in the user file |
sahilmgandhi | 18:6a4db94011d3 | 1763 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1764 | } |
sahilmgandhi | 18:6a4db94011d3 | 1765 | |
sahilmgandhi | 18:6a4db94011d3 | 1766 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1767 | * @brief Hall Break detection callback in non blocking mode |
sahilmgandhi | 18:6a4db94011d3 | 1768 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 1769 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 1770 | * @retval None |
sahilmgandhi | 18:6a4db94011d3 | 1771 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1772 | __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) |
sahilmgandhi | 18:6a4db94011d3 | 1773 | { |
sahilmgandhi | 18:6a4db94011d3 | 1774 | /* Prevent unused argument(s) compilation warning */ |
sahilmgandhi | 18:6a4db94011d3 | 1775 | UNUSED(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1776 | /* NOTE : This function Should not be modified, when the callback is needed, |
sahilmgandhi | 18:6a4db94011d3 | 1777 | the HAL_TIMEx_BreakCallback could be implemented in the user file |
sahilmgandhi | 18:6a4db94011d3 | 1778 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1779 | } |
sahilmgandhi | 18:6a4db94011d3 | 1780 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1781 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 1782 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1783 | |
sahilmgandhi | 18:6a4db94011d3 | 1784 | /** @defgroup TIMEx_Exported_Functions_Group7 Extension Peripheral State functions |
sahilmgandhi | 18:6a4db94011d3 | 1785 | * @brief Extension Peripheral State functions |
sahilmgandhi | 18:6a4db94011d3 | 1786 | * |
sahilmgandhi | 18:6a4db94011d3 | 1787 | @verbatim |
sahilmgandhi | 18:6a4db94011d3 | 1788 | ============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 1789 | ##### Extension Peripheral State functions ##### |
sahilmgandhi | 18:6a4db94011d3 | 1790 | ============================================================================== |
sahilmgandhi | 18:6a4db94011d3 | 1791 | [..] |
sahilmgandhi | 18:6a4db94011d3 | 1792 | This subsection permits to get in run-time the status of the peripheral |
sahilmgandhi | 18:6a4db94011d3 | 1793 | and the data flow. |
sahilmgandhi | 18:6a4db94011d3 | 1794 | |
sahilmgandhi | 18:6a4db94011d3 | 1795 | @endverbatim |
sahilmgandhi | 18:6a4db94011d3 | 1796 | * @{ |
sahilmgandhi | 18:6a4db94011d3 | 1797 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1798 | |
sahilmgandhi | 18:6a4db94011d3 | 1799 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1800 | * @brief Return the TIM Hall Sensor interface state |
sahilmgandhi | 18:6a4db94011d3 | 1801 | * @param htim: pointer to a TIM_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 1802 | * the configuration information for TIM module. |
sahilmgandhi | 18:6a4db94011d3 | 1803 | * @retval HAL state |
sahilmgandhi | 18:6a4db94011d3 | 1804 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1805 | HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim) |
sahilmgandhi | 18:6a4db94011d3 | 1806 | { |
sahilmgandhi | 18:6a4db94011d3 | 1807 | return htim->State; |
sahilmgandhi | 18:6a4db94011d3 | 1808 | } |
sahilmgandhi | 18:6a4db94011d3 | 1809 | |
sahilmgandhi | 18:6a4db94011d3 | 1810 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1811 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 1812 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1813 | |
sahilmgandhi | 18:6a4db94011d3 | 1814 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1815 | * @brief TIM DMA Commutation callback. |
sahilmgandhi | 18:6a4db94011d3 | 1816 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
sahilmgandhi | 18:6a4db94011d3 | 1817 | * the configuration information for the specified DMA module. |
sahilmgandhi | 18:6a4db94011d3 | 1818 | * @retval None |
sahilmgandhi | 18:6a4db94011d3 | 1819 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1820 | void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma) |
sahilmgandhi | 18:6a4db94011d3 | 1821 | { |
sahilmgandhi | 18:6a4db94011d3 | 1822 | TIM_HandleTypeDef* htim = ( TIM_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
sahilmgandhi | 18:6a4db94011d3 | 1823 | |
sahilmgandhi | 18:6a4db94011d3 | 1824 | htim->State= HAL_TIM_STATE_READY; |
sahilmgandhi | 18:6a4db94011d3 | 1825 | |
sahilmgandhi | 18:6a4db94011d3 | 1826 | HAL_TIMEx_CommutationCallback(htim); |
sahilmgandhi | 18:6a4db94011d3 | 1827 | } |
sahilmgandhi | 18:6a4db94011d3 | 1828 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1829 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 1830 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1831 | |
sahilmgandhi | 18:6a4db94011d3 | 1832 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1833 | * @brief Enables or disables the TIM Capture Compare Channel xN. |
sahilmgandhi | 18:6a4db94011d3 | 1834 | * @param TIMx to select the TIM peripheral |
sahilmgandhi | 18:6a4db94011d3 | 1835 | * @param Channel: specifies the TIM Channel |
sahilmgandhi | 18:6a4db94011d3 | 1836 | * This parameter can be one of the following values: |
sahilmgandhi | 18:6a4db94011d3 | 1837 | * @arg TIM_Channel_1: TIM Channel 1 |
sahilmgandhi | 18:6a4db94011d3 | 1838 | * @arg TIM_Channel_2: TIM Channel 2 |
sahilmgandhi | 18:6a4db94011d3 | 1839 | * @arg TIM_Channel_3: TIM Channel 3 |
sahilmgandhi | 18:6a4db94011d3 | 1840 | * @param ChannelNState: specifies the TIM Channel CCxNE bit new state. |
sahilmgandhi | 18:6a4db94011d3 | 1841 | * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable. |
sahilmgandhi | 18:6a4db94011d3 | 1842 | * @retval None |
sahilmgandhi | 18:6a4db94011d3 | 1843 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1844 | static void TIM_CCxNChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelNState) |
sahilmgandhi | 18:6a4db94011d3 | 1845 | { |
sahilmgandhi | 18:6a4db94011d3 | 1846 | uint32_t tmp = 0U; |
sahilmgandhi | 18:6a4db94011d3 | 1847 | |
sahilmgandhi | 18:6a4db94011d3 | 1848 | /* Check the parameters */ |
sahilmgandhi | 18:6a4db94011d3 | 1849 | assert_param(IS_TIM_CC4_INSTANCE(TIMx)); |
sahilmgandhi | 18:6a4db94011d3 | 1850 | assert_param(IS_TIM_COMPLEMENTARY_CHANNELS(Channel)); |
sahilmgandhi | 18:6a4db94011d3 | 1851 | |
sahilmgandhi | 18:6a4db94011d3 | 1852 | tmp = TIM_CCER_CC1NE << Channel; |
sahilmgandhi | 18:6a4db94011d3 | 1853 | |
sahilmgandhi | 18:6a4db94011d3 | 1854 | /* Reset the CCxNE Bit */ |
sahilmgandhi | 18:6a4db94011d3 | 1855 | TIMx->CCER &= ~tmp; |
sahilmgandhi | 18:6a4db94011d3 | 1856 | |
sahilmgandhi | 18:6a4db94011d3 | 1857 | /* Set or reset the CCxNE Bit */ |
sahilmgandhi | 18:6a4db94011d3 | 1858 | TIMx->CCER |= (uint32_t)(ChannelNState << Channel); |
sahilmgandhi | 18:6a4db94011d3 | 1859 | } |
sahilmgandhi | 18:6a4db94011d3 | 1860 | |
sahilmgandhi | 18:6a4db94011d3 | 1861 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1862 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 1863 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1864 | |
sahilmgandhi | 18:6a4db94011d3 | 1865 | #endif /* HAL_TIM_MODULE_ENABLED */ |
sahilmgandhi | 18:6a4db94011d3 | 1866 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1867 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 1868 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1869 | |
sahilmgandhi | 18:6a4db94011d3 | 1870 | /** |
sahilmgandhi | 18:6a4db94011d3 | 1871 | * @} |
sahilmgandhi | 18:6a4db94011d3 | 1872 | */ |
sahilmgandhi | 18:6a4db94011d3 | 1873 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |