MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_sd.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f2xx_hal_sd.h
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.1.3
sahilmgandhi 18:6a4db94011d3 6 * @date 29-June-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief Header file of SD HAL module.
sahilmgandhi 18:6a4db94011d3 8 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 9 * @attention
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 12 *
sahilmgandhi 18:6a4db94011d3 13 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 14 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 15 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 16 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 18 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 19 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 21 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 22 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 23 *
sahilmgandhi 18:6a4db94011d3 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 34 *
sahilmgandhi 18:6a4db94011d3 35 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 36 */
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 /* Define to prevent recursive inclusion -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 39 #ifndef __STM32F2xx_HAL_SD_H
sahilmgandhi 18:6a4db94011d3 40 #define __STM32F2xx_HAL_SD_H
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 43 extern "C" {
sahilmgandhi 18:6a4db94011d3 44 #endif
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 47 #include "stm32f2xx_ll_sdmmc.h"
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 /** @addtogroup STM32F2xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 50 * @{
sahilmgandhi 18:6a4db94011d3 51 */
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 /** @defgroup SD SD
sahilmgandhi 18:6a4db94011d3 54 * @brief SD HAL module driver
sahilmgandhi 18:6a4db94011d3 55 * @{
sahilmgandhi 18:6a4db94011d3 56 */
sahilmgandhi 18:6a4db94011d3 57
sahilmgandhi 18:6a4db94011d3 58 /* Exported types ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 59 /** @defgroup SD_Exported_Types SD Exported Types
sahilmgandhi 18:6a4db94011d3 60 * @{
sahilmgandhi 18:6a4db94011d3 61 */
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 /** @defgroup SD_Exported_Types_Group1 SD Handle Structure definition
sahilmgandhi 18:6a4db94011d3 64 * @{
sahilmgandhi 18:6a4db94011d3 65 */
sahilmgandhi 18:6a4db94011d3 66 #define SD_InitTypeDef SDIO_InitTypeDef
sahilmgandhi 18:6a4db94011d3 67 #define SD_TypeDef SDIO_TypeDef
sahilmgandhi 18:6a4db94011d3 68
sahilmgandhi 18:6a4db94011d3 69 typedef struct
sahilmgandhi 18:6a4db94011d3 70 {
sahilmgandhi 18:6a4db94011d3 71 SD_TypeDef *Instance; /*!< SDIO register base address */
sahilmgandhi 18:6a4db94011d3 72
sahilmgandhi 18:6a4db94011d3 73 SD_InitTypeDef Init; /*!< SD required parameters */
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 HAL_LockTypeDef Lock; /*!< SD locking object */
sahilmgandhi 18:6a4db94011d3 76
sahilmgandhi 18:6a4db94011d3 77 uint32_t CardType; /*!< SD card type */
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 uint32_t RCA; /*!< SD relative card address */
sahilmgandhi 18:6a4db94011d3 80
sahilmgandhi 18:6a4db94011d3 81 uint32_t CSD[4]; /*!< SD card specific data table */
sahilmgandhi 18:6a4db94011d3 82
sahilmgandhi 18:6a4db94011d3 83 uint32_t CID[4]; /*!< SD card identification number table */
sahilmgandhi 18:6a4db94011d3 84
sahilmgandhi 18:6a4db94011d3 85 __IO uint32_t SdTransferCplt; /*!< SD transfer complete flag in non blocking mode */
sahilmgandhi 18:6a4db94011d3 86
sahilmgandhi 18:6a4db94011d3 87 __IO uint32_t SdTransferErr; /*!< SD transfer error flag in non blocking mode */
sahilmgandhi 18:6a4db94011d3 88
sahilmgandhi 18:6a4db94011d3 89 __IO uint32_t DmaTransferCplt; /*!< SD DMA transfer complete flag */
sahilmgandhi 18:6a4db94011d3 90
sahilmgandhi 18:6a4db94011d3 91 __IO uint32_t SdOperation; /*!< SD transfer operation (read/write) */
sahilmgandhi 18:6a4db94011d3 92
sahilmgandhi 18:6a4db94011d3 93 DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */
sahilmgandhi 18:6a4db94011d3 94
sahilmgandhi 18:6a4db94011d3 95 DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */
sahilmgandhi 18:6a4db94011d3 96
sahilmgandhi 18:6a4db94011d3 97 }SD_HandleTypeDef;
sahilmgandhi 18:6a4db94011d3 98 /**
sahilmgandhi 18:6a4db94011d3 99 * @}
sahilmgandhi 18:6a4db94011d3 100 */
sahilmgandhi 18:6a4db94011d3 101
sahilmgandhi 18:6a4db94011d3 102 /** @defgroup SD_Exported_Types_Group2 Card Specific Data: CSD Register
sahilmgandhi 18:6a4db94011d3 103 * @{
sahilmgandhi 18:6a4db94011d3 104 */
sahilmgandhi 18:6a4db94011d3 105 typedef struct
sahilmgandhi 18:6a4db94011d3 106 {
sahilmgandhi 18:6a4db94011d3 107 __IO uint8_t CSDStruct; /*!< CSD structure */
sahilmgandhi 18:6a4db94011d3 108 __IO uint8_t SysSpecVersion; /*!< System specification version */
sahilmgandhi 18:6a4db94011d3 109 __IO uint8_t Reserved1; /*!< Reserved */
sahilmgandhi 18:6a4db94011d3 110 __IO uint8_t TAAC; /*!< Data read access time 1 */
sahilmgandhi 18:6a4db94011d3 111 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
sahilmgandhi 18:6a4db94011d3 112 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
sahilmgandhi 18:6a4db94011d3 113 __IO uint16_t CardComdClasses; /*!< Card command classes */
sahilmgandhi 18:6a4db94011d3 114 __IO uint8_t RdBlockLen; /*!< Max. read data block length */
sahilmgandhi 18:6a4db94011d3 115 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
sahilmgandhi 18:6a4db94011d3 116 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
sahilmgandhi 18:6a4db94011d3 117 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
sahilmgandhi 18:6a4db94011d3 118 __IO uint8_t DSRImpl; /*!< DSR implemented */
sahilmgandhi 18:6a4db94011d3 119 __IO uint8_t Reserved2; /*!< Reserved */
sahilmgandhi 18:6a4db94011d3 120 __IO uint32_t DeviceSize; /*!< Device Size */
sahilmgandhi 18:6a4db94011d3 121 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
sahilmgandhi 18:6a4db94011d3 122 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
sahilmgandhi 18:6a4db94011d3 123 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
sahilmgandhi 18:6a4db94011d3 124 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
sahilmgandhi 18:6a4db94011d3 125 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
sahilmgandhi 18:6a4db94011d3 126 __IO uint8_t EraseGrSize; /*!< Erase group size */
sahilmgandhi 18:6a4db94011d3 127 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
sahilmgandhi 18:6a4db94011d3 128 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */
sahilmgandhi 18:6a4db94011d3 129 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
sahilmgandhi 18:6a4db94011d3 130 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
sahilmgandhi 18:6a4db94011d3 131 __IO uint8_t WrSpeedFact; /*!< Write speed factor */
sahilmgandhi 18:6a4db94011d3 132 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
sahilmgandhi 18:6a4db94011d3 133 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
sahilmgandhi 18:6a4db94011d3 134 __IO uint8_t Reserved3; /*!< Reserved */
sahilmgandhi 18:6a4db94011d3 135 __IO uint8_t ContentProtectAppli; /*!< Content protection application */
sahilmgandhi 18:6a4db94011d3 136 __IO uint8_t FileFormatGrouop; /*!< File format group */
sahilmgandhi 18:6a4db94011d3 137 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
sahilmgandhi 18:6a4db94011d3 138 __IO uint8_t PermWrProtect; /*!< Permanent write protection */
sahilmgandhi 18:6a4db94011d3 139 __IO uint8_t TempWrProtect; /*!< Temporary write protection */
sahilmgandhi 18:6a4db94011d3 140 __IO uint8_t FileFormat; /*!< File format */
sahilmgandhi 18:6a4db94011d3 141 __IO uint8_t ECC; /*!< ECC code */
sahilmgandhi 18:6a4db94011d3 142 __IO uint8_t CSD_CRC; /*!< CSD CRC */
sahilmgandhi 18:6a4db94011d3 143 __IO uint8_t Reserved4; /*!< Always 1 */
sahilmgandhi 18:6a4db94011d3 144
sahilmgandhi 18:6a4db94011d3 145 }HAL_SD_CSDTypedef;
sahilmgandhi 18:6a4db94011d3 146 /**
sahilmgandhi 18:6a4db94011d3 147 * @}
sahilmgandhi 18:6a4db94011d3 148 */
sahilmgandhi 18:6a4db94011d3 149
sahilmgandhi 18:6a4db94011d3 150 /** @defgroup SD_Exported_Types_Group3 Card Identification Data: CID Register
sahilmgandhi 18:6a4db94011d3 151 * @{
sahilmgandhi 18:6a4db94011d3 152 */
sahilmgandhi 18:6a4db94011d3 153 typedef struct
sahilmgandhi 18:6a4db94011d3 154 {
sahilmgandhi 18:6a4db94011d3 155 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */
sahilmgandhi 18:6a4db94011d3 156 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
sahilmgandhi 18:6a4db94011d3 157 __IO uint32_t ProdName1; /*!< Product Name part1 */
sahilmgandhi 18:6a4db94011d3 158 __IO uint8_t ProdName2; /*!< Product Name part2 */
sahilmgandhi 18:6a4db94011d3 159 __IO uint8_t ProdRev; /*!< Product Revision */
sahilmgandhi 18:6a4db94011d3 160 __IO uint32_t ProdSN; /*!< Product Serial Number */
sahilmgandhi 18:6a4db94011d3 161 __IO uint8_t Reserved1; /*!< Reserved1 */
sahilmgandhi 18:6a4db94011d3 162 __IO uint16_t ManufactDate; /*!< Manufacturing Date */
sahilmgandhi 18:6a4db94011d3 163 __IO uint8_t CID_CRC; /*!< CID CRC */
sahilmgandhi 18:6a4db94011d3 164 __IO uint8_t Reserved2; /*!< Always 1 */
sahilmgandhi 18:6a4db94011d3 165
sahilmgandhi 18:6a4db94011d3 166 }HAL_SD_CIDTypedef;
sahilmgandhi 18:6a4db94011d3 167 /**
sahilmgandhi 18:6a4db94011d3 168 * @}
sahilmgandhi 18:6a4db94011d3 169 */
sahilmgandhi 18:6a4db94011d3 170
sahilmgandhi 18:6a4db94011d3 171 /** @defgroup SD_Exported_Types_Group4 SD Card Status returned by ACMD13
sahilmgandhi 18:6a4db94011d3 172 * @{
sahilmgandhi 18:6a4db94011d3 173 */
sahilmgandhi 18:6a4db94011d3 174 typedef struct
sahilmgandhi 18:6a4db94011d3 175 {
sahilmgandhi 18:6a4db94011d3 176 __IO uint8_t DAT_BUS_WIDTH; /*!< Shows the currently defined data bus width */
sahilmgandhi 18:6a4db94011d3 177 __IO uint8_t SECURED_MODE; /*!< Card is in secured mode of operation */
sahilmgandhi 18:6a4db94011d3 178 __IO uint16_t SD_CARD_TYPE; /*!< Carries information about card type */
sahilmgandhi 18:6a4db94011d3 179 __IO uint32_t SIZE_OF_PROTECTED_AREA; /*!< Carries information about the capacity of protected area */
sahilmgandhi 18:6a4db94011d3 180 __IO uint8_t SPEED_CLASS; /*!< Carries information about the speed class of the card */
sahilmgandhi 18:6a4db94011d3 181 __IO uint8_t PERFORMANCE_MOVE; /*!< Carries information about the card's performance move */
sahilmgandhi 18:6a4db94011d3 182 __IO uint8_t AU_SIZE; /*!< Carries information about the card's allocation unit size */
sahilmgandhi 18:6a4db94011d3 183 __IO uint16_t ERASE_SIZE; /*!< Determines the number of AUs to be erased in one operation */
sahilmgandhi 18:6a4db94011d3 184 __IO uint8_t ERASE_TIMEOUT; /*!< Determines the timeout for any number of AU erase */
sahilmgandhi 18:6a4db94011d3 185 __IO uint8_t ERASE_OFFSET; /*!< Carries information about the erase offset */
sahilmgandhi 18:6a4db94011d3 186
sahilmgandhi 18:6a4db94011d3 187 }HAL_SD_CardStatusTypedef;
sahilmgandhi 18:6a4db94011d3 188 /**
sahilmgandhi 18:6a4db94011d3 189 * @}
sahilmgandhi 18:6a4db94011d3 190 */
sahilmgandhi 18:6a4db94011d3 191
sahilmgandhi 18:6a4db94011d3 192 /** @defgroup SD_Exported_Types_Group5 SD Card information structure
sahilmgandhi 18:6a4db94011d3 193 * @{
sahilmgandhi 18:6a4db94011d3 194 */
sahilmgandhi 18:6a4db94011d3 195 typedef struct
sahilmgandhi 18:6a4db94011d3 196 {
sahilmgandhi 18:6a4db94011d3 197 HAL_SD_CSDTypedef SD_csd; /*!< SD card specific data register */
sahilmgandhi 18:6a4db94011d3 198 HAL_SD_CIDTypedef SD_cid; /*!< SD card identification number register */
sahilmgandhi 18:6a4db94011d3 199 uint64_t CardCapacity; /*!< Card capacity */
sahilmgandhi 18:6a4db94011d3 200 uint32_t CardBlockSize; /*!< Card block size */
sahilmgandhi 18:6a4db94011d3 201 uint16_t RCA; /*!< SD relative card address */
sahilmgandhi 18:6a4db94011d3 202 uint8_t CardType; /*!< SD card type */
sahilmgandhi 18:6a4db94011d3 203
sahilmgandhi 18:6a4db94011d3 204 }HAL_SD_CardInfoTypedef;
sahilmgandhi 18:6a4db94011d3 205 /**
sahilmgandhi 18:6a4db94011d3 206 * @}
sahilmgandhi 18:6a4db94011d3 207 */
sahilmgandhi 18:6a4db94011d3 208
sahilmgandhi 18:6a4db94011d3 209 /** @defgroup SD_Exported_Types_Group6 SD Error status enumeration Structure definition
sahilmgandhi 18:6a4db94011d3 210 * @{
sahilmgandhi 18:6a4db94011d3 211 */
sahilmgandhi 18:6a4db94011d3 212 typedef enum
sahilmgandhi 18:6a4db94011d3 213 {
sahilmgandhi 18:6a4db94011d3 214 /**
sahilmgandhi 18:6a4db94011d3 215 * @brief SD specific error defines
sahilmgandhi 18:6a4db94011d3 216 */
sahilmgandhi 18:6a4db94011d3 217 SD_CMD_CRC_FAIL = (1U), /*!< Command response received (but CRC check failed) */
sahilmgandhi 18:6a4db94011d3 218 SD_DATA_CRC_FAIL = (2U), /*!< Data block sent/received (CRC check failed) */
sahilmgandhi 18:6a4db94011d3 219 SD_CMD_RSP_TIMEOUT = (3U), /*!< Command response timeout */
sahilmgandhi 18:6a4db94011d3 220 SD_DATA_TIMEOUT = (4U), /*!< Data timeout */
sahilmgandhi 18:6a4db94011d3 221 SD_TX_UNDERRUN = (5U), /*!< Transmit FIFO underrun */
sahilmgandhi 18:6a4db94011d3 222 SD_RX_OVERRUN = (6U), /*!< Receive FIFO overrun */
sahilmgandhi 18:6a4db94011d3 223 SD_START_BIT_ERR = (7U), /*!< Start bit not detected on all data signals in wide bus mode */
sahilmgandhi 18:6a4db94011d3 224 SD_CMD_OUT_OF_RANGE = (8U), /*!< Command's argument was out of range. */
sahilmgandhi 18:6a4db94011d3 225 SD_ADDR_MISALIGNED = (9U), /*!< Misaligned address */
sahilmgandhi 18:6a4db94011d3 226 SD_BLOCK_LEN_ERR = (10U), /*!< Transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */
sahilmgandhi 18:6a4db94011d3 227 SD_ERASE_SEQ_ERR = (11U), /*!< An error in the sequence of erase command occurs. */
sahilmgandhi 18:6a4db94011d3 228 SD_BAD_ERASE_PARAM = (12U), /*!< An invalid selection for erase groups */
sahilmgandhi 18:6a4db94011d3 229 SD_WRITE_PROT_VIOLATION = (13U), /*!< Attempt to program a write protect block */
sahilmgandhi 18:6a4db94011d3 230 SD_LOCK_UNLOCK_FAILED = (14U), /*!< Sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */
sahilmgandhi 18:6a4db94011d3 231 SD_COM_CRC_FAILED = (15U), /*!< CRC check of the previous command failed */
sahilmgandhi 18:6a4db94011d3 232 SD_ILLEGAL_CMD = (16U), /*!< Command is not legal for the card state */
sahilmgandhi 18:6a4db94011d3 233 SD_CARD_ECC_FAILED = (17U), /*!< Card internal ECC was applied but failed to correct the data */
sahilmgandhi 18:6a4db94011d3 234 SD_CC_ERROR = (18U), /*!< Internal card controller error */
sahilmgandhi 18:6a4db94011d3 235 SD_GENERAL_UNKNOWN_ERROR = (19U), /*!< General or unknown error */
sahilmgandhi 18:6a4db94011d3 236 SD_STREAM_READ_UNDERRUN = (20U), /*!< The card could not sustain data transfer in stream read operation. */
sahilmgandhi 18:6a4db94011d3 237 SD_STREAM_WRITE_OVERRUN = (21U), /*!< The card could not sustain data programming in stream mode */
sahilmgandhi 18:6a4db94011d3 238 SD_CID_CSD_OVERWRITE = (22U), /*!< CID/CSD overwrite error */
sahilmgandhi 18:6a4db94011d3 239 SD_WP_ERASE_SKIP = (23U), /*!< Only partial address space was erased */
sahilmgandhi 18:6a4db94011d3 240 SD_CARD_ECC_DISABLED = (24U), /*!< Command has been executed without using internal ECC */
sahilmgandhi 18:6a4db94011d3 241 SD_ERASE_RESET = (25U), /*!< Erase sequence was cleared before executing because an out of erase sequence command was received */
sahilmgandhi 18:6a4db94011d3 242 SD_AKE_SEQ_ERROR = (26U), /*!< Error in sequence of authentication. */
sahilmgandhi 18:6a4db94011d3 243 SD_INVALID_VOLTRANGE = (27U),
sahilmgandhi 18:6a4db94011d3 244 SD_ADDR_OUT_OF_RANGE = (28U),
sahilmgandhi 18:6a4db94011d3 245 SD_SWITCH_ERROR = (29U),
sahilmgandhi 18:6a4db94011d3 246 SD_SDIO_DISABLED = (30U),
sahilmgandhi 18:6a4db94011d3 247 SD_SDIO_FUNCTION_BUSY = (31U),
sahilmgandhi 18:6a4db94011d3 248 SD_SDIO_FUNCTION_FAILED = (32U),
sahilmgandhi 18:6a4db94011d3 249 SD_SDIO_UNKNOWN_FUNCTION = (33U),
sahilmgandhi 18:6a4db94011d3 250
sahilmgandhi 18:6a4db94011d3 251 /**
sahilmgandhi 18:6a4db94011d3 252 * @brief Standard error defines
sahilmgandhi 18:6a4db94011d3 253 */
sahilmgandhi 18:6a4db94011d3 254 SD_INTERNAL_ERROR = (34U),
sahilmgandhi 18:6a4db94011d3 255 SD_NOT_CONFIGURED = (35U),
sahilmgandhi 18:6a4db94011d3 256 SD_REQUEST_PENDING = (36U),
sahilmgandhi 18:6a4db94011d3 257 SD_REQUEST_NOT_APPLICABLE = (37U),
sahilmgandhi 18:6a4db94011d3 258 SD_INVALID_PARAMETER = (38U),
sahilmgandhi 18:6a4db94011d3 259 SD_UNSUPPORTED_FEATURE = (39U),
sahilmgandhi 18:6a4db94011d3 260 SD_UNSUPPORTED_HW = (40U),
sahilmgandhi 18:6a4db94011d3 261 SD_ERROR = (41U),
sahilmgandhi 18:6a4db94011d3 262 SD_OK = (0U)
sahilmgandhi 18:6a4db94011d3 263
sahilmgandhi 18:6a4db94011d3 264 }HAL_SD_ErrorTypedef;
sahilmgandhi 18:6a4db94011d3 265 /**
sahilmgandhi 18:6a4db94011d3 266 * @}
sahilmgandhi 18:6a4db94011d3 267 */
sahilmgandhi 18:6a4db94011d3 268
sahilmgandhi 18:6a4db94011d3 269 /** @defgroup SD_Exported_Types_Group7 SD Transfer state enumeration structure
sahilmgandhi 18:6a4db94011d3 270 * @{
sahilmgandhi 18:6a4db94011d3 271 */
sahilmgandhi 18:6a4db94011d3 272 typedef enum
sahilmgandhi 18:6a4db94011d3 273 {
sahilmgandhi 18:6a4db94011d3 274 SD_TRANSFER_OK = 0U, /*!< Transfer success */
sahilmgandhi 18:6a4db94011d3 275 SD_TRANSFER_BUSY = 1U, /*!< Transfer is occurring */
sahilmgandhi 18:6a4db94011d3 276 SD_TRANSFER_ERROR = 2U /*!< Transfer failed */
sahilmgandhi 18:6a4db94011d3 277
sahilmgandhi 18:6a4db94011d3 278 }HAL_SD_TransferStateTypedef;
sahilmgandhi 18:6a4db94011d3 279 /**
sahilmgandhi 18:6a4db94011d3 280 * @}
sahilmgandhi 18:6a4db94011d3 281 */
sahilmgandhi 18:6a4db94011d3 282
sahilmgandhi 18:6a4db94011d3 283 /** @defgroup SD_Exported_Types_Group8 SD Card State enumeration structure
sahilmgandhi 18:6a4db94011d3 284 * @{
sahilmgandhi 18:6a4db94011d3 285 */
sahilmgandhi 18:6a4db94011d3 286 typedef enum
sahilmgandhi 18:6a4db94011d3 287 {
sahilmgandhi 18:6a4db94011d3 288 SD_CARD_READY = ((uint32_t)0x00000001U), /*!< Card state is ready */
sahilmgandhi 18:6a4db94011d3 289 SD_CARD_IDENTIFICATION = ((uint32_t)0x00000002U), /*!< Card is in identification state */
sahilmgandhi 18:6a4db94011d3 290 SD_CARD_STANDBY = ((uint32_t)0x00000003U), /*!< Card is in standby state */
sahilmgandhi 18:6a4db94011d3 291 SD_CARD_TRANSFER = ((uint32_t)0x00000004U), /*!< Card is in transfer state */
sahilmgandhi 18:6a4db94011d3 292 SD_CARD_SENDING = ((uint32_t)0x00000005U), /*!< Card is sending an operation */
sahilmgandhi 18:6a4db94011d3 293 SD_CARD_RECEIVING = ((uint32_t)0x00000006U), /*!< Card is receiving operation information */
sahilmgandhi 18:6a4db94011d3 294 SD_CARD_PROGRAMMING = ((uint32_t)0x00000007U), /*!< Card is in programming state */
sahilmgandhi 18:6a4db94011d3 295 SD_CARD_DISCONNECTED = ((uint32_t)0x00000008U), /*!< Card is disconnected */
sahilmgandhi 18:6a4db94011d3 296 SD_CARD_ERROR = ((uint32_t)0x000000FFU) /*!< Card is in error state */
sahilmgandhi 18:6a4db94011d3 297
sahilmgandhi 18:6a4db94011d3 298 }HAL_SD_CardStateTypedef;
sahilmgandhi 18:6a4db94011d3 299 /**
sahilmgandhi 18:6a4db94011d3 300 * @}
sahilmgandhi 18:6a4db94011d3 301 */
sahilmgandhi 18:6a4db94011d3 302
sahilmgandhi 18:6a4db94011d3 303 /** @defgroup SD_Exported_Types_Group9 SD Operation enumeration structure
sahilmgandhi 18:6a4db94011d3 304 * @{
sahilmgandhi 18:6a4db94011d3 305 */
sahilmgandhi 18:6a4db94011d3 306 typedef enum
sahilmgandhi 18:6a4db94011d3 307 {
sahilmgandhi 18:6a4db94011d3 308 SD_READ_SINGLE_BLOCK = 0U, /*!< Read single block operation */
sahilmgandhi 18:6a4db94011d3 309 SD_READ_MULTIPLE_BLOCK = 1U, /*!< Read multiple blocks operation */
sahilmgandhi 18:6a4db94011d3 310 SD_WRITE_SINGLE_BLOCK = 2U, /*!< Write single block operation */
sahilmgandhi 18:6a4db94011d3 311 SD_WRITE_MULTIPLE_BLOCK = 3U /*!< Write multiple blocks operation */
sahilmgandhi 18:6a4db94011d3 312
sahilmgandhi 18:6a4db94011d3 313 }HAL_SD_OperationTypedef;
sahilmgandhi 18:6a4db94011d3 314 /**
sahilmgandhi 18:6a4db94011d3 315 * @}
sahilmgandhi 18:6a4db94011d3 316 */
sahilmgandhi 18:6a4db94011d3 317
sahilmgandhi 18:6a4db94011d3 318 /**
sahilmgandhi 18:6a4db94011d3 319 * @}
sahilmgandhi 18:6a4db94011d3 320 */
sahilmgandhi 18:6a4db94011d3 321
sahilmgandhi 18:6a4db94011d3 322 /* Exported constants --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 323 /** @defgroup SD_Exported_Constants SD Exported Constants
sahilmgandhi 18:6a4db94011d3 324 * @{
sahilmgandhi 18:6a4db94011d3 325 */
sahilmgandhi 18:6a4db94011d3 326
sahilmgandhi 18:6a4db94011d3 327 /**
sahilmgandhi 18:6a4db94011d3 328 * @brief SD Commands Index
sahilmgandhi 18:6a4db94011d3 329 */
sahilmgandhi 18:6a4db94011d3 330 #define SD_CMD_GO_IDLE_STATE ((uint8_t)0U) /*!< Resets the SD memory card. */
sahilmgandhi 18:6a4db94011d3 331 #define SD_CMD_SEND_OP_COND ((uint8_t)1U) /*!< Sends host capacity support information and activates the card's initialization process. */
sahilmgandhi 18:6a4db94011d3 332 #define SD_CMD_ALL_SEND_CID ((uint8_t)2U) /*!< Asks any card connected to the host to send the CID numbers on the CMD line. */
sahilmgandhi 18:6a4db94011d3 333 #define SD_CMD_SET_REL_ADDR ((uint8_t)3U) /*!< Asks the card to publish a new relative address (RCA). */
sahilmgandhi 18:6a4db94011d3 334 #define SD_CMD_SET_DSR ((uint8_t)4U) /*!< Programs the DSR of all cards. */
sahilmgandhi 18:6a4db94011d3 335 #define SD_CMD_SDIO_SEN_OP_COND ((uint8_t)5U) /*!< Sends host capacity support information (HCS) and asks the accessed card to send its
sahilmgandhi 18:6a4db94011d3 336 operating condition register (OCR) content in the response on the CMD line. */
sahilmgandhi 18:6a4db94011d3 337 #define SD_CMD_HS_SWITCH ((uint8_t)6U) /*!< Checks switchable function (mode 0) and switch card function (mode 1). */
sahilmgandhi 18:6a4db94011d3 338 #define SD_CMD_SEL_DESEL_CARD ((uint8_t)7U) /*!< Selects the card by its own relative address and gets deselected by any other address */
sahilmgandhi 18:6a4db94011d3 339 #define SD_CMD_HS_SEND_EXT_CSD ((uint8_t)8U) /*!< Sends SD Memory Card interface condition, which includes host supply voltage information
sahilmgandhi 18:6a4db94011d3 340 and asks the card whether card supports voltage. */
sahilmgandhi 18:6a4db94011d3 341 #define SD_CMD_SEND_CSD ((uint8_t)9U) /*!< Addressed card sends its card specific data (CSD) on the CMD line. */
sahilmgandhi 18:6a4db94011d3 342 #define SD_CMD_SEND_CID ((uint8_t)10U) /*!< Addressed card sends its card identification (CID) on the CMD line. */
sahilmgandhi 18:6a4db94011d3 343 #define SD_CMD_READ_DAT_UNTIL_STOP ((uint8_t)11U) /*!< SD card doesn't support it. */
sahilmgandhi 18:6a4db94011d3 344 #define SD_CMD_STOP_TRANSMISSION ((uint8_t)12U) /*!< Forces the card to stop transmission. */
sahilmgandhi 18:6a4db94011d3 345 #define SD_CMD_SEND_STATUS ((uint8_t)13U) /*!< Addressed card sends its status register. */
sahilmgandhi 18:6a4db94011d3 346 #define SD_CMD_HS_BUSTEST_READ ((uint8_t)14U)
sahilmgandhi 18:6a4db94011d3 347 #define SD_CMD_GO_INACTIVE_STATE ((uint8_t)15U) /*!< Sends an addressed card into the inactive state. */
sahilmgandhi 18:6a4db94011d3 348 #define SD_CMD_SET_BLOCKLEN ((uint8_t)16U) /*!< Sets the block length (in bytes for SDSC) for all following block commands
sahilmgandhi 18:6a4db94011d3 349 (read, write, lock). Default block length is fixed to 512 Bytes. Not effective
sahilmgandhi 18:6a4db94011d3 350 for SDHS and SDXC. */
sahilmgandhi 18:6a4db94011d3 351 #define SD_CMD_READ_SINGLE_BLOCK ((uint8_t)17U) /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
sahilmgandhi 18:6a4db94011d3 352 fixed 512 bytes in case of SDHC and SDXC. */
sahilmgandhi 18:6a4db94011d3 353 #define SD_CMD_READ_MULT_BLOCK ((uint8_t)18U) /*!< Continuously transfers data blocks from card to host until interrupted by
sahilmgandhi 18:6a4db94011d3 354 STOP_TRANSMISSION command. */
sahilmgandhi 18:6a4db94011d3 355 #define SD_CMD_HS_BUSTEST_WRITE ((uint8_t)19U) /*!< 64 bytes tuning pattern is sent for SDR50 and SDR104. */
sahilmgandhi 18:6a4db94011d3 356 #define SD_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20U) /*!< Speed class control command. */
sahilmgandhi 18:6a4db94011d3 357 #define SD_CMD_SET_BLOCK_COUNT ((uint8_t)23U) /*!< Specify block count for CMD18 and CMD25. */
sahilmgandhi 18:6a4db94011d3 358 #define SD_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24U) /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
sahilmgandhi 18:6a4db94011d3 359 fixed 512 bytes in case of SDHC and SDXC. */
sahilmgandhi 18:6a4db94011d3 360 #define SD_CMD_WRITE_MULT_BLOCK ((uint8_t)25U) /*!< Continuously writes blocks of data until a STOP_TRANSMISSION follows. */
sahilmgandhi 18:6a4db94011d3 361 #define SD_CMD_PROG_CID ((uint8_t)26U) /*!< Reserved for manufacturers. */
sahilmgandhi 18:6a4db94011d3 362 #define SD_CMD_PROG_CSD ((uint8_t)27U) /*!< Programming of the programmable bits of the CSD. */
sahilmgandhi 18:6a4db94011d3 363 #define SD_CMD_SET_WRITE_PROT ((uint8_t)28U) /*!< Sets the write protection bit of the addressed group. */
sahilmgandhi 18:6a4db94011d3 364 #define SD_CMD_CLR_WRITE_PROT ((uint8_t)29U) /*!< Clears the write protection bit of the addressed group. */
sahilmgandhi 18:6a4db94011d3 365 #define SD_CMD_SEND_WRITE_PROT ((uint8_t)30U) /*!< Asks the card to send the status of the write protection bits. */
sahilmgandhi 18:6a4db94011d3 366 #define SD_CMD_SD_ERASE_GRP_START ((uint8_t)32U) /*!< Sets the address of the first write block to be erased. (For SD card only). */
sahilmgandhi 18:6a4db94011d3 367 #define SD_CMD_SD_ERASE_GRP_END ((uint8_t)33U) /*!< Sets the address of the last write block of the continuous range to be erased. */
sahilmgandhi 18:6a4db94011d3 368 #define SD_CMD_ERASE_GRP_START ((uint8_t)35U) /*!< Sets the address of the first write block to be erased. Reserved for each command
sahilmgandhi 18:6a4db94011d3 369 system set by switch function command (CMD6). */
sahilmgandhi 18:6a4db94011d3 370 #define SD_CMD_ERASE_GRP_END ((uint8_t)36U) /*!< Sets the address of the last write block of the continuous range to be erased.
sahilmgandhi 18:6a4db94011d3 371 Reserved for each command system set by switch function command (CMD6). */
sahilmgandhi 18:6a4db94011d3 372 #define SD_CMD_ERASE ((uint8_t)38U) /*!< Reserved for SD security applications. */
sahilmgandhi 18:6a4db94011d3 373 #define SD_CMD_FAST_IO ((uint8_t)39U) /*!< SD card doesn't support it (Reserved). */
sahilmgandhi 18:6a4db94011d3 374 #define SD_CMD_GO_IRQ_STATE ((uint8_t)40U) /*!< SD card doesn't support it (Reserved). */
sahilmgandhi 18:6a4db94011d3 375 #define SD_CMD_LOCK_UNLOCK ((uint8_t)42U) /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by
sahilmgandhi 18:6a4db94011d3 376 the SET_BLOCK_LEN command. */
sahilmgandhi 18:6a4db94011d3 377 #define SD_CMD_APP_CMD ((uint8_t)55U) /*!< Indicates to the card that the next command is an application specific command rather
sahilmgandhi 18:6a4db94011d3 378 than a standard command. */
sahilmgandhi 18:6a4db94011d3 379 #define SD_CMD_GEN_CMD ((uint8_t)56U) /*!< Used either to transfer a data block to the card or to get a data block from the card
sahilmgandhi 18:6a4db94011d3 380 for general purpose/application specific commands. */
sahilmgandhi 18:6a4db94011d3 381 #define SD_CMD_NO_CMD ((uint8_t)64U)
sahilmgandhi 18:6a4db94011d3 382
sahilmgandhi 18:6a4db94011d3 383 /**
sahilmgandhi 18:6a4db94011d3 384 * @brief Following commands are SD Card Specific commands.
sahilmgandhi 18:6a4db94011d3 385 * SDIO_APP_CMD should be sent before sending these commands.
sahilmgandhi 18:6a4db94011d3 386 */
sahilmgandhi 18:6a4db94011d3 387 #define SD_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6U) /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus
sahilmgandhi 18:6a4db94011d3 388 widths are given in SCR register. */
sahilmgandhi 18:6a4db94011d3 389 #define SD_CMD_SD_APP_STATUS ((uint8_t)13U) /*!< (ACMD13) Sends the SD status. */
sahilmgandhi 18:6a4db94011d3 390 #define SD_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22U) /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with
sahilmgandhi 18:6a4db94011d3 391 32bit+CRC data block. */
sahilmgandhi 18:6a4db94011d3 392 #define SD_CMD_SD_APP_OP_COND ((uint8_t)41U) /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to
sahilmgandhi 18:6a4db94011d3 393 send its operating condition register (OCR) content in the response on the CMD line. */
sahilmgandhi 18:6a4db94011d3 394 #define SD_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42U) /*!< (ACMD42) Connects/Disconnects the 50 KOhm pull-up resistor on CD/DAT3 (pin 1) of the card. */
sahilmgandhi 18:6a4db94011d3 395 #define SD_CMD_SD_APP_SEND_SCR ((uint8_t)51U) /*!< Reads the SD Configuration Register (SCR). */
sahilmgandhi 18:6a4db94011d3 396 #define SD_CMD_SDIO_RW_DIRECT ((uint8_t)52U) /*!< For SD I/O card only, reserved for security specification. */
sahilmgandhi 18:6a4db94011d3 397 #define SD_CMD_SDIO_RW_EXTENDED ((uint8_t)53U) /*!< For SD I/O card only, reserved for security specification. */
sahilmgandhi 18:6a4db94011d3 398
sahilmgandhi 18:6a4db94011d3 399 /**
sahilmgandhi 18:6a4db94011d3 400 * @brief Following commands are SD Card Specific security commands.
sahilmgandhi 18:6a4db94011d3 401 * SD_CMD_APP_CMD should be sent before sending these commands.
sahilmgandhi 18:6a4db94011d3 402 */
sahilmgandhi 18:6a4db94011d3 403 #define SD_CMD_SD_APP_GET_MKB ((uint8_t)43U) /*!< For SD card only */
sahilmgandhi 18:6a4db94011d3 404 #define SD_CMD_SD_APP_GET_MID ((uint8_t)44U) /*!< For SD card only */
sahilmgandhi 18:6a4db94011d3 405 #define SD_CMD_SD_APP_SET_CER_RN1 ((uint8_t)45U) /*!< For SD card only */
sahilmgandhi 18:6a4db94011d3 406 #define SD_CMD_SD_APP_GET_CER_RN2 ((uint8_t)46U) /*!< For SD card only */
sahilmgandhi 18:6a4db94011d3 407 #define SD_CMD_SD_APP_SET_CER_RES2 ((uint8_t)47U) /*!< For SD card only */
sahilmgandhi 18:6a4db94011d3 408 #define SD_CMD_SD_APP_GET_CER_RES1 ((uint8_t)48U) /*!< For SD card only */
sahilmgandhi 18:6a4db94011d3 409 #define SD_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18U) /*!< For SD card only */
sahilmgandhi 18:6a4db94011d3 410 #define SD_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25U) /*!< For SD card only */
sahilmgandhi 18:6a4db94011d3 411 #define SD_CMD_SD_APP_SECURE_ERASE ((uint8_t)38U) /*!< For SD card only */
sahilmgandhi 18:6a4db94011d3 412 #define SD_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49U) /*!< For SD card only */
sahilmgandhi 18:6a4db94011d3 413 #define SD_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48U) /*!< For SD card only */
sahilmgandhi 18:6a4db94011d3 414
sahilmgandhi 18:6a4db94011d3 415 /**
sahilmgandhi 18:6a4db94011d3 416 * @brief Supported SD Memory Cards
sahilmgandhi 18:6a4db94011d3 417 */
sahilmgandhi 18:6a4db94011d3 418 #define STD_CAPACITY_SD_CARD_V1_1 ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 419 #define STD_CAPACITY_SD_CARD_V2_0 ((uint32_t)0x00000001U)
sahilmgandhi 18:6a4db94011d3 420 #define HIGH_CAPACITY_SD_CARD ((uint32_t)0x00000002U)
sahilmgandhi 18:6a4db94011d3 421 #define MULTIMEDIA_CARD ((uint32_t)0x00000003U)
sahilmgandhi 18:6a4db94011d3 422 #define SECURE_DIGITAL_IO_CARD ((uint32_t)0x00000004U)
sahilmgandhi 18:6a4db94011d3 423 #define HIGH_SPEED_MULTIMEDIA_CARD ((uint32_t)0x00000005U)
sahilmgandhi 18:6a4db94011d3 424 #define SECURE_DIGITAL_IO_COMBO_CARD ((uint32_t)0x00000006U)
sahilmgandhi 18:6a4db94011d3 425 #define HIGH_CAPACITY_MMC_CARD ((uint32_t)0x00000007U)
sahilmgandhi 18:6a4db94011d3 426 /**
sahilmgandhi 18:6a4db94011d3 427 * @}
sahilmgandhi 18:6a4db94011d3 428 */
sahilmgandhi 18:6a4db94011d3 429
sahilmgandhi 18:6a4db94011d3 430 /* Exported macro ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 431 /** @defgroup SD_Exported_macros SD Exported Macros
sahilmgandhi 18:6a4db94011d3 432 * @brief macros to handle interrupts and specific clock configurations
sahilmgandhi 18:6a4db94011d3 433 * @{
sahilmgandhi 18:6a4db94011d3 434 */
sahilmgandhi 18:6a4db94011d3 435
sahilmgandhi 18:6a4db94011d3 436 /**
sahilmgandhi 18:6a4db94011d3 437 * @brief Enable the SD device.
sahilmgandhi 18:6a4db94011d3 438 * @retval None
sahilmgandhi 18:6a4db94011d3 439 */
sahilmgandhi 18:6a4db94011d3 440 #define __HAL_SD_SDIO_ENABLE() __SDIO_ENABLE()
sahilmgandhi 18:6a4db94011d3 441
sahilmgandhi 18:6a4db94011d3 442 /**
sahilmgandhi 18:6a4db94011d3 443 * @brief Disable the SD device.
sahilmgandhi 18:6a4db94011d3 444 * @retval None
sahilmgandhi 18:6a4db94011d3 445 */
sahilmgandhi 18:6a4db94011d3 446 #define __HAL_SD_SDIO_DISABLE() __SDIO_DISABLE()
sahilmgandhi 18:6a4db94011d3 447
sahilmgandhi 18:6a4db94011d3 448 /**
sahilmgandhi 18:6a4db94011d3 449 * @brief Enable the SDIO DMA transfer.
sahilmgandhi 18:6a4db94011d3 450 * @retval None
sahilmgandhi 18:6a4db94011d3 451 */
sahilmgandhi 18:6a4db94011d3 452 #define __HAL_SD_SDIO_DMA_ENABLE() __SDIO_DMA_ENABLE()
sahilmgandhi 18:6a4db94011d3 453
sahilmgandhi 18:6a4db94011d3 454 /**
sahilmgandhi 18:6a4db94011d3 455 * @brief Disable the SDIO DMA transfer.
sahilmgandhi 18:6a4db94011d3 456 * @retval None
sahilmgandhi 18:6a4db94011d3 457 */
sahilmgandhi 18:6a4db94011d3 458 #define __HAL_SD_SDIO_DMA_DISABLE() __SDIO_DMA_DISABLE()
sahilmgandhi 18:6a4db94011d3 459
sahilmgandhi 18:6a4db94011d3 460 /**
sahilmgandhi 18:6a4db94011d3 461 * @brief Enable the SD device interrupt.
sahilmgandhi 18:6a4db94011d3 462 * @param __HANDLE__: SD Handle
sahilmgandhi 18:6a4db94011d3 463 * @param __INTERRUPT__: specifies the SDIO interrupt sources to be enabled.
sahilmgandhi 18:6a4db94011d3 464 * This parameter can be one or a combination of the following values:
sahilmgandhi 18:6a4db94011d3 465 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
sahilmgandhi 18:6a4db94011d3 466 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
sahilmgandhi 18:6a4db94011d3 467 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
sahilmgandhi 18:6a4db94011d3 468 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
sahilmgandhi 18:6a4db94011d3 469 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
sahilmgandhi 18:6a4db94011d3 470 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
sahilmgandhi 18:6a4db94011d3 471 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
sahilmgandhi 18:6a4db94011d3 472 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
sahilmgandhi 18:6a4db94011d3 473 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
sahilmgandhi 18:6a4db94011d3 474 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
sahilmgandhi 18:6a4db94011d3 475 * bus mode interrupt
sahilmgandhi 18:6a4db94011d3 476 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
sahilmgandhi 18:6a4db94011d3 477 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
sahilmgandhi 18:6a4db94011d3 478 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
sahilmgandhi 18:6a4db94011d3 479 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
sahilmgandhi 18:6a4db94011d3 480 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
sahilmgandhi 18:6a4db94011d3 481 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
sahilmgandhi 18:6a4db94011d3 482 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
sahilmgandhi 18:6a4db94011d3 483 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
sahilmgandhi 18:6a4db94011d3 484 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
sahilmgandhi 18:6a4db94011d3 485 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
sahilmgandhi 18:6a4db94011d3 486 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
sahilmgandhi 18:6a4db94011d3 487 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
sahilmgandhi 18:6a4db94011d3 488 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
sahilmgandhi 18:6a4db94011d3 489 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
sahilmgandhi 18:6a4db94011d3 490 * @retval None
sahilmgandhi 18:6a4db94011d3 491 */
sahilmgandhi 18:6a4db94011d3 492 #define __HAL_SD_SDIO_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 493
sahilmgandhi 18:6a4db94011d3 494 /**
sahilmgandhi 18:6a4db94011d3 495 * @brief Disable the SD device interrupt.
sahilmgandhi 18:6a4db94011d3 496 * @param __HANDLE__: SD Handle
sahilmgandhi 18:6a4db94011d3 497 * @param __INTERRUPT__: specifies the SDIO interrupt sources to be disabled.
sahilmgandhi 18:6a4db94011d3 498 * This parameter can be one or a combination of the following values:
sahilmgandhi 18:6a4db94011d3 499 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
sahilmgandhi 18:6a4db94011d3 500 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
sahilmgandhi 18:6a4db94011d3 501 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
sahilmgandhi 18:6a4db94011d3 502 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
sahilmgandhi 18:6a4db94011d3 503 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
sahilmgandhi 18:6a4db94011d3 504 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
sahilmgandhi 18:6a4db94011d3 505 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
sahilmgandhi 18:6a4db94011d3 506 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
sahilmgandhi 18:6a4db94011d3 507 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
sahilmgandhi 18:6a4db94011d3 508 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
sahilmgandhi 18:6a4db94011d3 509 * bus mode interrupt
sahilmgandhi 18:6a4db94011d3 510 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
sahilmgandhi 18:6a4db94011d3 511 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
sahilmgandhi 18:6a4db94011d3 512 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
sahilmgandhi 18:6a4db94011d3 513 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
sahilmgandhi 18:6a4db94011d3 514 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
sahilmgandhi 18:6a4db94011d3 515 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
sahilmgandhi 18:6a4db94011d3 516 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
sahilmgandhi 18:6a4db94011d3 517 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
sahilmgandhi 18:6a4db94011d3 518 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
sahilmgandhi 18:6a4db94011d3 519 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
sahilmgandhi 18:6a4db94011d3 520 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
sahilmgandhi 18:6a4db94011d3 521 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
sahilmgandhi 18:6a4db94011d3 522 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
sahilmgandhi 18:6a4db94011d3 523 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
sahilmgandhi 18:6a4db94011d3 524 * @retval None
sahilmgandhi 18:6a4db94011d3 525 */
sahilmgandhi 18:6a4db94011d3 526 #define __HAL_SD_SDIO_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 527
sahilmgandhi 18:6a4db94011d3 528 /**
sahilmgandhi 18:6a4db94011d3 529 * @brief Check whether the specified SD flag is set or not.
sahilmgandhi 18:6a4db94011d3 530 * @param __HANDLE__: SD Handle
sahilmgandhi 18:6a4db94011d3 531 * @param __FLAG__: specifies the flag to check.
sahilmgandhi 18:6a4db94011d3 532 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 533 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
sahilmgandhi 18:6a4db94011d3 534 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
sahilmgandhi 18:6a4db94011d3 535 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
sahilmgandhi 18:6a4db94011d3 536 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
sahilmgandhi 18:6a4db94011d3 537 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
sahilmgandhi 18:6a4db94011d3 538 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
sahilmgandhi 18:6a4db94011d3 539 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
sahilmgandhi 18:6a4db94011d3 540 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
sahilmgandhi 18:6a4db94011d3 541 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
sahilmgandhi 18:6a4db94011d3 542 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode.
sahilmgandhi 18:6a4db94011d3 543 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
sahilmgandhi 18:6a4db94011d3 544 * @arg SDIO_FLAG_CMDACT: Command transfer in progress
sahilmgandhi 18:6a4db94011d3 545 * @arg SDIO_FLAG_TXACT: Data transmit in progress
sahilmgandhi 18:6a4db94011d3 546 * @arg SDIO_FLAG_RXACT: Data receive in progress
sahilmgandhi 18:6a4db94011d3 547 * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
sahilmgandhi 18:6a4db94011d3 548 * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
sahilmgandhi 18:6a4db94011d3 549 * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full
sahilmgandhi 18:6a4db94011d3 550 * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full
sahilmgandhi 18:6a4db94011d3 551 * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty
sahilmgandhi 18:6a4db94011d3 552 * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty
sahilmgandhi 18:6a4db94011d3 553 * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO
sahilmgandhi 18:6a4db94011d3 554 * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO
sahilmgandhi 18:6a4db94011d3 555 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
sahilmgandhi 18:6a4db94011d3 556 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
sahilmgandhi 18:6a4db94011d3 557 * @retval The new state of SD FLAG (SET or RESET).
sahilmgandhi 18:6a4db94011d3 558 */
sahilmgandhi 18:6a4db94011d3 559 #define __HAL_SD_SDIO_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
sahilmgandhi 18:6a4db94011d3 560
sahilmgandhi 18:6a4db94011d3 561 /**
sahilmgandhi 18:6a4db94011d3 562 * @brief Clear the SD's pending flags.
sahilmgandhi 18:6a4db94011d3 563 * @param __HANDLE__: SD Handle
sahilmgandhi 18:6a4db94011d3 564 * @param __FLAG__: specifies the flag to clear.
sahilmgandhi 18:6a4db94011d3 565 * This parameter can be one or a combination of the following values:
sahilmgandhi 18:6a4db94011d3 566 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
sahilmgandhi 18:6a4db94011d3 567 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
sahilmgandhi 18:6a4db94011d3 568 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
sahilmgandhi 18:6a4db94011d3 569 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
sahilmgandhi 18:6a4db94011d3 570 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
sahilmgandhi 18:6a4db94011d3 571 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
sahilmgandhi 18:6a4db94011d3 572 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
sahilmgandhi 18:6a4db94011d3 573 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
sahilmgandhi 18:6a4db94011d3 574 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
sahilmgandhi 18:6a4db94011d3 575 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode
sahilmgandhi 18:6a4db94011d3 576 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
sahilmgandhi 18:6a4db94011d3 577 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
sahilmgandhi 18:6a4db94011d3 578 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
sahilmgandhi 18:6a4db94011d3 579 * @retval None
sahilmgandhi 18:6a4db94011d3 580 */
sahilmgandhi 18:6a4db94011d3 581 #define __HAL_SD_SDIO_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
sahilmgandhi 18:6a4db94011d3 582
sahilmgandhi 18:6a4db94011d3 583 /**
sahilmgandhi 18:6a4db94011d3 584 * @brief Check whether the specified SD interrupt has occurred or not.
sahilmgandhi 18:6a4db94011d3 585 * @param __HANDLE__: SD Handle
sahilmgandhi 18:6a4db94011d3 586 * @param __INTERRUPT__: specifies the SDIO interrupt source to check.
sahilmgandhi 18:6a4db94011d3 587 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 588 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
sahilmgandhi 18:6a4db94011d3 589 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
sahilmgandhi 18:6a4db94011d3 590 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
sahilmgandhi 18:6a4db94011d3 591 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
sahilmgandhi 18:6a4db94011d3 592 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
sahilmgandhi 18:6a4db94011d3 593 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
sahilmgandhi 18:6a4db94011d3 594 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
sahilmgandhi 18:6a4db94011d3 595 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
sahilmgandhi 18:6a4db94011d3 596 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
sahilmgandhi 18:6a4db94011d3 597 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
sahilmgandhi 18:6a4db94011d3 598 * bus mode interrupt
sahilmgandhi 18:6a4db94011d3 599 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
sahilmgandhi 18:6a4db94011d3 600 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
sahilmgandhi 18:6a4db94011d3 601 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
sahilmgandhi 18:6a4db94011d3 602 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
sahilmgandhi 18:6a4db94011d3 603 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
sahilmgandhi 18:6a4db94011d3 604 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
sahilmgandhi 18:6a4db94011d3 605 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
sahilmgandhi 18:6a4db94011d3 606 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
sahilmgandhi 18:6a4db94011d3 607 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
sahilmgandhi 18:6a4db94011d3 608 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
sahilmgandhi 18:6a4db94011d3 609 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
sahilmgandhi 18:6a4db94011d3 610 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
sahilmgandhi 18:6a4db94011d3 611 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
sahilmgandhi 18:6a4db94011d3 612 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
sahilmgandhi 18:6a4db94011d3 613 * @retval The new state of SD IT (SET or RESET).
sahilmgandhi 18:6a4db94011d3 614 */
sahilmgandhi 18:6a4db94011d3 615 #define __HAL_SD_SDIO_GET_IT (__HANDLE__, __INTERRUPT__) __SDIO_GET_IT ((__HANDLE__)->Instance, __INTERRUPT__)
sahilmgandhi 18:6a4db94011d3 616
sahilmgandhi 18:6a4db94011d3 617 /**
sahilmgandhi 18:6a4db94011d3 618 * @brief Clear the SD's interrupt pending bits.
sahilmgandhi 18:6a4db94011d3 619 * @param __HANDLE__ : SD Handle
sahilmgandhi 18:6a4db94011d3 620 * @param __INTERRUPT__: specifies the interrupt pending bit to clear.
sahilmgandhi 18:6a4db94011d3 621 * This parameter can be one or a combination of the following values:
sahilmgandhi 18:6a4db94011d3 622 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
sahilmgandhi 18:6a4db94011d3 623 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
sahilmgandhi 18:6a4db94011d3 624 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
sahilmgandhi 18:6a4db94011d3 625 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
sahilmgandhi 18:6a4db94011d3 626 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
sahilmgandhi 18:6a4db94011d3 627 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
sahilmgandhi 18:6a4db94011d3 628 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
sahilmgandhi 18:6a4db94011d3 629 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
sahilmgandhi 18:6a4db94011d3 630 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIO_DCOUNT, is zero) interrupt
sahilmgandhi 18:6a4db94011d3 631 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
sahilmgandhi 18:6a4db94011d3 632 * bus mode interrupt
sahilmgandhi 18:6a4db94011d3 633 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
sahilmgandhi 18:6a4db94011d3 634 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61
sahilmgandhi 18:6a4db94011d3 635 * @retval None
sahilmgandhi 18:6a4db94011d3 636 */
sahilmgandhi 18:6a4db94011d3 637 #define __HAL_SD_SDIO_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 638 /**
sahilmgandhi 18:6a4db94011d3 639 * @}
sahilmgandhi 18:6a4db94011d3 640 */
sahilmgandhi 18:6a4db94011d3 641
sahilmgandhi 18:6a4db94011d3 642 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 643 /** @defgroup SD_Exported_Functions SD Exported Functions
sahilmgandhi 18:6a4db94011d3 644 * @{
sahilmgandhi 18:6a4db94011d3 645 */
sahilmgandhi 18:6a4db94011d3 646
sahilmgandhi 18:6a4db94011d3 647 /** @defgroup SD_Exported_Functions_Group1 Initialization and de-initialization functions
sahilmgandhi 18:6a4db94011d3 648 * @{
sahilmgandhi 18:6a4db94011d3 649 */
sahilmgandhi 18:6a4db94011d3 650 HAL_SD_ErrorTypedef HAL_SD_Init(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *SDCardInfo);
sahilmgandhi 18:6a4db94011d3 651 HAL_StatusTypeDef HAL_SD_DeInit (SD_HandleTypeDef *hsd);
sahilmgandhi 18:6a4db94011d3 652 void HAL_SD_MspInit(SD_HandleTypeDef *hsd);
sahilmgandhi 18:6a4db94011d3 653 void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd);
sahilmgandhi 18:6a4db94011d3 654 /**
sahilmgandhi 18:6a4db94011d3 655 * @}
sahilmgandhi 18:6a4db94011d3 656 */
sahilmgandhi 18:6a4db94011d3 657
sahilmgandhi 18:6a4db94011d3 658 /** @defgroup SD_Exported_Functions_Group2 I/O operation functions
sahilmgandhi 18:6a4db94011d3 659 * @{
sahilmgandhi 18:6a4db94011d3 660 */
sahilmgandhi 18:6a4db94011d3 661 /* Blocking mode: Polling */
sahilmgandhi 18:6a4db94011d3 662 HAL_SD_ErrorTypedef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
sahilmgandhi 18:6a4db94011d3 663 HAL_SD_ErrorTypedef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
sahilmgandhi 18:6a4db94011d3 664 HAL_SD_ErrorTypedef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint64_t startaddr, uint64_t endaddr);
sahilmgandhi 18:6a4db94011d3 665
sahilmgandhi 18:6a4db94011d3 666 /* Non-Blocking mode: Interrupt */
sahilmgandhi 18:6a4db94011d3 667 void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd);
sahilmgandhi 18:6a4db94011d3 668
sahilmgandhi 18:6a4db94011d3 669 /* Callback in non blocking modes (DMA) */
sahilmgandhi 18:6a4db94011d3 670 void HAL_SD_DMA_RxCpltCallback(DMA_HandleTypeDef *hdma);
sahilmgandhi 18:6a4db94011d3 671 void HAL_SD_DMA_RxErrorCallback(DMA_HandleTypeDef *hdma);
sahilmgandhi 18:6a4db94011d3 672 void HAL_SD_DMA_TxCpltCallback(DMA_HandleTypeDef *hdma);
sahilmgandhi 18:6a4db94011d3 673 void HAL_SD_DMA_TxErrorCallback(DMA_HandleTypeDef *hdma);
sahilmgandhi 18:6a4db94011d3 674 void HAL_SD_XferCpltCallback(SD_HandleTypeDef *hsd);
sahilmgandhi 18:6a4db94011d3 675 void HAL_SD_XferErrorCallback(SD_HandleTypeDef *hsd);
sahilmgandhi 18:6a4db94011d3 676
sahilmgandhi 18:6a4db94011d3 677 /* Non-Blocking mode: DMA */
sahilmgandhi 18:6a4db94011d3 678 HAL_SD_ErrorTypedef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
sahilmgandhi 18:6a4db94011d3 679 HAL_SD_ErrorTypedef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
sahilmgandhi 18:6a4db94011d3 680 HAL_SD_ErrorTypedef HAL_SD_CheckWriteOperation(SD_HandleTypeDef *hsd, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 681 HAL_SD_ErrorTypedef HAL_SD_CheckReadOperation(SD_HandleTypeDef *hsd, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 682 /**
sahilmgandhi 18:6a4db94011d3 683 * @}
sahilmgandhi 18:6a4db94011d3 684 */
sahilmgandhi 18:6a4db94011d3 685
sahilmgandhi 18:6a4db94011d3 686 /** @defgroup SD_Exported_Functions_Group3 Peripheral Control functions
sahilmgandhi 18:6a4db94011d3 687 * @{
sahilmgandhi 18:6a4db94011d3 688 */
sahilmgandhi 18:6a4db94011d3 689 HAL_SD_ErrorTypedef HAL_SD_Get_CardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *pCardInfo);
sahilmgandhi 18:6a4db94011d3 690 HAL_SD_ErrorTypedef HAL_SD_WideBusOperation_Config(SD_HandleTypeDef *hsd, uint32_t WideMode);
sahilmgandhi 18:6a4db94011d3 691 HAL_SD_ErrorTypedef HAL_SD_StopTransfer(SD_HandleTypeDef *hsd);
sahilmgandhi 18:6a4db94011d3 692 HAL_SD_ErrorTypedef HAL_SD_HighSpeed (SD_HandleTypeDef *hsd);
sahilmgandhi 18:6a4db94011d3 693 /**
sahilmgandhi 18:6a4db94011d3 694 * @}
sahilmgandhi 18:6a4db94011d3 695 */
sahilmgandhi 18:6a4db94011d3 696
sahilmgandhi 18:6a4db94011d3 697 /* Peripheral State functions ************************************************/
sahilmgandhi 18:6a4db94011d3 698 /** @defgroup SD_Exported_Functions_Group4 Peripheral State functions
sahilmgandhi 18:6a4db94011d3 699 * @{
sahilmgandhi 18:6a4db94011d3 700 */
sahilmgandhi 18:6a4db94011d3 701 HAL_SD_ErrorTypedef HAL_SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus);
sahilmgandhi 18:6a4db94011d3 702 HAL_SD_ErrorTypedef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypedef *pCardStatus);
sahilmgandhi 18:6a4db94011d3 703 HAL_SD_TransferStateTypedef HAL_SD_GetStatus(SD_HandleTypeDef *hsd);
sahilmgandhi 18:6a4db94011d3 704 /**
sahilmgandhi 18:6a4db94011d3 705 * @}
sahilmgandhi 18:6a4db94011d3 706 */
sahilmgandhi 18:6a4db94011d3 707
sahilmgandhi 18:6a4db94011d3 708 /**
sahilmgandhi 18:6a4db94011d3 709 * @}
sahilmgandhi 18:6a4db94011d3 710 */
sahilmgandhi 18:6a4db94011d3 711
sahilmgandhi 18:6a4db94011d3 712 /* Private types -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 713 /** @defgroup SD_Private_Types SD Private Types
sahilmgandhi 18:6a4db94011d3 714 * @{
sahilmgandhi 18:6a4db94011d3 715 */
sahilmgandhi 18:6a4db94011d3 716
sahilmgandhi 18:6a4db94011d3 717 /**
sahilmgandhi 18:6a4db94011d3 718 * @}
sahilmgandhi 18:6a4db94011d3 719 */
sahilmgandhi 18:6a4db94011d3 720
sahilmgandhi 18:6a4db94011d3 721 /* Private defines -----------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 722 /** @defgroup SD_Private_Defines SD Private Defines
sahilmgandhi 18:6a4db94011d3 723 * @{
sahilmgandhi 18:6a4db94011d3 724 */
sahilmgandhi 18:6a4db94011d3 725
sahilmgandhi 18:6a4db94011d3 726 /**
sahilmgandhi 18:6a4db94011d3 727 * @}
sahilmgandhi 18:6a4db94011d3 728 */
sahilmgandhi 18:6a4db94011d3 729
sahilmgandhi 18:6a4db94011d3 730 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 731 /** @defgroup SD_Private_Variables SD Private Variables
sahilmgandhi 18:6a4db94011d3 732 * @{
sahilmgandhi 18:6a4db94011d3 733 */
sahilmgandhi 18:6a4db94011d3 734
sahilmgandhi 18:6a4db94011d3 735 /**
sahilmgandhi 18:6a4db94011d3 736 * @}
sahilmgandhi 18:6a4db94011d3 737 */
sahilmgandhi 18:6a4db94011d3 738
sahilmgandhi 18:6a4db94011d3 739 /* Private constants ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 740 /** @defgroup SD_Private_Constants SD Private Constants
sahilmgandhi 18:6a4db94011d3 741 * @{
sahilmgandhi 18:6a4db94011d3 742 */
sahilmgandhi 18:6a4db94011d3 743
sahilmgandhi 18:6a4db94011d3 744 /**
sahilmgandhi 18:6a4db94011d3 745 * @}
sahilmgandhi 18:6a4db94011d3 746 */
sahilmgandhi 18:6a4db94011d3 747
sahilmgandhi 18:6a4db94011d3 748 /* Private macros ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 749 /** @defgroup SD_Private_Macros SD Private Macros
sahilmgandhi 18:6a4db94011d3 750 * @{
sahilmgandhi 18:6a4db94011d3 751 */
sahilmgandhi 18:6a4db94011d3 752
sahilmgandhi 18:6a4db94011d3 753 /**
sahilmgandhi 18:6a4db94011d3 754 * @}
sahilmgandhi 18:6a4db94011d3 755 */
sahilmgandhi 18:6a4db94011d3 756
sahilmgandhi 18:6a4db94011d3 757 /* Private functions prototypes ----------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 758 /** @defgroup SD_Private_Functions_Prototypes SD Private Functions Prototypes
sahilmgandhi 18:6a4db94011d3 759 * @{
sahilmgandhi 18:6a4db94011d3 760 */
sahilmgandhi 18:6a4db94011d3 761
sahilmgandhi 18:6a4db94011d3 762 /**
sahilmgandhi 18:6a4db94011d3 763 * @}
sahilmgandhi 18:6a4db94011d3 764 */
sahilmgandhi 18:6a4db94011d3 765
sahilmgandhi 18:6a4db94011d3 766 /* Private functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 767 /** @defgroup SD_Private_Functions SD Private Functions
sahilmgandhi 18:6a4db94011d3 768 * @{
sahilmgandhi 18:6a4db94011d3 769 */
sahilmgandhi 18:6a4db94011d3 770
sahilmgandhi 18:6a4db94011d3 771 /**
sahilmgandhi 18:6a4db94011d3 772 * @}
sahilmgandhi 18:6a4db94011d3 773 */
sahilmgandhi 18:6a4db94011d3 774
sahilmgandhi 18:6a4db94011d3 775 /**
sahilmgandhi 18:6a4db94011d3 776 * @}
sahilmgandhi 18:6a4db94011d3 777 */
sahilmgandhi 18:6a4db94011d3 778
sahilmgandhi 18:6a4db94011d3 779 /**
sahilmgandhi 18:6a4db94011d3 780 * @}
sahilmgandhi 18:6a4db94011d3 781 */
sahilmgandhi 18:6a4db94011d3 782
sahilmgandhi 18:6a4db94011d3 783 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 784 }
sahilmgandhi 18:6a4db94011d3 785 #endif
sahilmgandhi 18:6a4db94011d3 786
sahilmgandhi 18:6a4db94011d3 787 #endif /* __STM32F2xx_HAL_SD_H */
sahilmgandhi 18:6a4db94011d3 788
sahilmgandhi 18:6a4db94011d3 789 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/