MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_rcc_ex.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f2xx_hal_rcc_ex.c
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.1.3
sahilmgandhi 18:6a4db94011d3 6 * @date 29-June-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief Extension RCC HAL module driver.
sahilmgandhi 18:6a4db94011d3 8 * This file provides firmware functions to manage the following
sahilmgandhi 18:6a4db94011d3 9 * functionalities RCC extension peripheral:
sahilmgandhi 18:6a4db94011d3 10 * + Extended Peripheral Control functions
sahilmgandhi 18:6a4db94011d3 11 *
sahilmgandhi 18:6a4db94011d3 12 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 13 * @attention
sahilmgandhi 18:6a4db94011d3 14 *
sahilmgandhi 18:6a4db94011d3 15 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 16 *
sahilmgandhi 18:6a4db94011d3 17 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 18 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 19 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 20 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 21 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 22 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 23 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 24 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 25 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 26 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 27 *
sahilmgandhi 18:6a4db94011d3 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 29 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 31 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 34 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 36 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 37 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 38 *
sahilmgandhi 18:6a4db94011d3 39 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 40 */
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 43 #include "stm32f2xx_hal.h"
sahilmgandhi 18:6a4db94011d3 44
sahilmgandhi 18:6a4db94011d3 45 /** @addtogroup STM32F2xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 46 * @{
sahilmgandhi 18:6a4db94011d3 47 */
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 /** @defgroup RCCEx RCCEx
sahilmgandhi 18:6a4db94011d3 50 * @brief RCCEx HAL module driver
sahilmgandhi 18:6a4db94011d3 51 * @{
sahilmgandhi 18:6a4db94011d3 52 */
sahilmgandhi 18:6a4db94011d3 53
sahilmgandhi 18:6a4db94011d3 54 #ifdef HAL_RCC_MODULE_ENABLED
sahilmgandhi 18:6a4db94011d3 55
sahilmgandhi 18:6a4db94011d3 56 /* Private typedef -----------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 57 /* Private define ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 58 /** @addtogroup RCCEx_Private_Constants
sahilmgandhi 18:6a4db94011d3 59 * @{
sahilmgandhi 18:6a4db94011d3 60 */
sahilmgandhi 18:6a4db94011d3 61 /**
sahilmgandhi 18:6a4db94011d3 62 * @}
sahilmgandhi 18:6a4db94011d3 63 */
sahilmgandhi 18:6a4db94011d3 64 /* Private macro -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 65 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 66 /* Private function prototypes -----------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 67 /* Private functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 68 /** @defgroup RCCEx_Exported_Functions RCCEx Exported Functions
sahilmgandhi 18:6a4db94011d3 69 * @{
sahilmgandhi 18:6a4db94011d3 70 */
sahilmgandhi 18:6a4db94011d3 71
sahilmgandhi 18:6a4db94011d3 72 /** @defgroup RCCEx_Exported_Functions_Group1 Extended Peripheral Control functions
sahilmgandhi 18:6a4db94011d3 73 * @brief Extended Peripheral Control functions
sahilmgandhi 18:6a4db94011d3 74 *
sahilmgandhi 18:6a4db94011d3 75 @verbatim
sahilmgandhi 18:6a4db94011d3 76 ===============================================================================
sahilmgandhi 18:6a4db94011d3 77 ##### Extended Peripheral Control functions #####
sahilmgandhi 18:6a4db94011d3 78 ===============================================================================
sahilmgandhi 18:6a4db94011d3 79 [..]
sahilmgandhi 18:6a4db94011d3 80 This subsection provides a set of functions allowing to control the RCC Clocks
sahilmgandhi 18:6a4db94011d3 81 frequencies.
sahilmgandhi 18:6a4db94011d3 82 [..]
sahilmgandhi 18:6a4db94011d3 83 (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to
sahilmgandhi 18:6a4db94011d3 84 select the RTC clock source; in this case the Backup domain will be reset in
sahilmgandhi 18:6a4db94011d3 85 order to modify the RTC Clock source, as consequence RTC registers (including
sahilmgandhi 18:6a4db94011d3 86 the backup registers) and RCC_BDCR register are set to their reset values.
sahilmgandhi 18:6a4db94011d3 87
sahilmgandhi 18:6a4db94011d3 88 @endverbatim
sahilmgandhi 18:6a4db94011d3 89 * @{
sahilmgandhi 18:6a4db94011d3 90 */
sahilmgandhi 18:6a4db94011d3 91
sahilmgandhi 18:6a4db94011d3 92 /**
sahilmgandhi 18:6a4db94011d3 93 * @brief Initializes the RCC extended peripherals clocks according to the specified parameters in the
sahilmgandhi 18:6a4db94011d3 94 * RCC_PeriphCLKInitTypeDef.
sahilmgandhi 18:6a4db94011d3 95 * @param PeriphClkInit: pointer to an RCC_PeriphCLKInitTypeDef structure that
sahilmgandhi 18:6a4db94011d3 96 * contains the configuration information for the Extended Peripherals clocks(I2S and RTC clocks).
sahilmgandhi 18:6a4db94011d3 97 *
sahilmgandhi 18:6a4db94011d3 98 * @note A caution to be taken when HAL_RCCEx_PeriphCLKConfig() is used to select RTC clock selection, in this case
sahilmgandhi 18:6a4db94011d3 99 * the Reset of Backup domain will be applied in order to modify the RTC Clock source as consequence all backup
sahilmgandhi 18:6a4db94011d3 100 * domain (RTC and RCC_BDCR register expect BKPSRAM) will be reset
sahilmgandhi 18:6a4db94011d3 101 *
sahilmgandhi 18:6a4db94011d3 102 * @retval HAL status
sahilmgandhi 18:6a4db94011d3 103 */
sahilmgandhi 18:6a4db94011d3 104 HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
sahilmgandhi 18:6a4db94011d3 105 {
sahilmgandhi 18:6a4db94011d3 106 uint32_t tickstart = 0U;
sahilmgandhi 18:6a4db94011d3 107 uint32_t tmpreg1 = 0U;
sahilmgandhi 18:6a4db94011d3 108
sahilmgandhi 18:6a4db94011d3 109 /* Check the parameters */
sahilmgandhi 18:6a4db94011d3 110 assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
sahilmgandhi 18:6a4db94011d3 111
sahilmgandhi 18:6a4db94011d3 112 /*---------------------------- I2S configuration ---------------------------*/
sahilmgandhi 18:6a4db94011d3 113 if(((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_I2S) == (RCC_PERIPHCLK_I2S))|| \
sahilmgandhi 18:6a4db94011d3 114 (PeriphClkInit->PeriphClockSelection == RCC_PERIPHCLK_PLLI2S))
sahilmgandhi 18:6a4db94011d3 115 {
sahilmgandhi 18:6a4db94011d3 116 /* check for Parameters */
sahilmgandhi 18:6a4db94011d3 117 assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
sahilmgandhi 18:6a4db94011d3 118 assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN));
sahilmgandhi 18:6a4db94011d3 119
sahilmgandhi 18:6a4db94011d3 120 /* Disable the PLLI2S */
sahilmgandhi 18:6a4db94011d3 121 __HAL_RCC_PLLI2S_DISABLE();
sahilmgandhi 18:6a4db94011d3 122 /* Get tick */
sahilmgandhi 18:6a4db94011d3 123 tickstart = HAL_GetTick();
sahilmgandhi 18:6a4db94011d3 124 /* Wait till PLLI2S is disabled */
sahilmgandhi 18:6a4db94011d3 125 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET)
sahilmgandhi 18:6a4db94011d3 126 {
sahilmgandhi 18:6a4db94011d3 127 if((HAL_GetTick() - tickstart ) > PLLI2S_TIMEOUT_VALUE)
sahilmgandhi 18:6a4db94011d3 128 {
sahilmgandhi 18:6a4db94011d3 129 /* return in case of Timeout detected */
sahilmgandhi 18:6a4db94011d3 130 return HAL_TIMEOUT;
sahilmgandhi 18:6a4db94011d3 131 }
sahilmgandhi 18:6a4db94011d3 132 }
sahilmgandhi 18:6a4db94011d3 133 /* Configure the PLLI2S division factors */
sahilmgandhi 18:6a4db94011d3 134 /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) * (PLLI2SN/PLLM) */
sahilmgandhi 18:6a4db94011d3 135 /* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */
sahilmgandhi 18:6a4db94011d3 136 __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SR);
sahilmgandhi 18:6a4db94011d3 137
sahilmgandhi 18:6a4db94011d3 138 /* Enable the PLLI2S */
sahilmgandhi 18:6a4db94011d3 139 __HAL_RCC_PLLI2S_ENABLE();
sahilmgandhi 18:6a4db94011d3 140 /* Get tick */
sahilmgandhi 18:6a4db94011d3 141 tickstart = HAL_GetTick();
sahilmgandhi 18:6a4db94011d3 142 /* Wait till PLLI2S is ready */
sahilmgandhi 18:6a4db94011d3 143 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET)
sahilmgandhi 18:6a4db94011d3 144 {
sahilmgandhi 18:6a4db94011d3 145 if((HAL_GetTick() - tickstart ) > PLLI2S_TIMEOUT_VALUE)
sahilmgandhi 18:6a4db94011d3 146 {
sahilmgandhi 18:6a4db94011d3 147 /* return in case of Timeout detected */
sahilmgandhi 18:6a4db94011d3 148 return HAL_TIMEOUT;
sahilmgandhi 18:6a4db94011d3 149 }
sahilmgandhi 18:6a4db94011d3 150 }
sahilmgandhi 18:6a4db94011d3 151 }
sahilmgandhi 18:6a4db94011d3 152 /*--------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 153
sahilmgandhi 18:6a4db94011d3 154 /*---------------------------- RTC configuration ---------------------------*/
sahilmgandhi 18:6a4db94011d3 155 if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC))
sahilmgandhi 18:6a4db94011d3 156 {
sahilmgandhi 18:6a4db94011d3 157 /* Check for RTC Parameters used to output RTCCLK */
sahilmgandhi 18:6a4db94011d3 158 assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
sahilmgandhi 18:6a4db94011d3 159
sahilmgandhi 18:6a4db94011d3 160 /* Enable Power Clock*/
sahilmgandhi 18:6a4db94011d3 161 __HAL_RCC_PWR_CLK_ENABLE();
sahilmgandhi 18:6a4db94011d3 162
sahilmgandhi 18:6a4db94011d3 163 /* Enable write access to Backup domain */
sahilmgandhi 18:6a4db94011d3 164 PWR->CR |= PWR_CR_DBP;
sahilmgandhi 18:6a4db94011d3 165
sahilmgandhi 18:6a4db94011d3 166 /* Get tick */
sahilmgandhi 18:6a4db94011d3 167 tickstart = HAL_GetTick();
sahilmgandhi 18:6a4db94011d3 168
sahilmgandhi 18:6a4db94011d3 169 while((PWR->CR & PWR_CR_DBP) == RESET)
sahilmgandhi 18:6a4db94011d3 170 {
sahilmgandhi 18:6a4db94011d3 171 if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE)
sahilmgandhi 18:6a4db94011d3 172 {
sahilmgandhi 18:6a4db94011d3 173 return HAL_TIMEOUT;
sahilmgandhi 18:6a4db94011d3 174 }
sahilmgandhi 18:6a4db94011d3 175 }
sahilmgandhi 18:6a4db94011d3 176 /* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
sahilmgandhi 18:6a4db94011d3 177 tmpreg1 = (RCC->BDCR & RCC_BDCR_RTCSEL);
sahilmgandhi 18:6a4db94011d3 178 if((tmpreg1 != 0x00000000U) && ((tmpreg1) != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
sahilmgandhi 18:6a4db94011d3 179 {
sahilmgandhi 18:6a4db94011d3 180 /* Store the content of BDCR register before the reset of Backup Domain */
sahilmgandhi 18:6a4db94011d3 181 tmpreg1 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
sahilmgandhi 18:6a4db94011d3 182 /* RTC Clock selection can be changed only if the Backup Domain is reset */
sahilmgandhi 18:6a4db94011d3 183 __HAL_RCC_BACKUPRESET_FORCE();
sahilmgandhi 18:6a4db94011d3 184 __HAL_RCC_BACKUPRESET_RELEASE();
sahilmgandhi 18:6a4db94011d3 185 /* Restore the Content of BDCR register */
sahilmgandhi 18:6a4db94011d3 186 RCC->BDCR = tmpreg1;
sahilmgandhi 18:6a4db94011d3 187
sahilmgandhi 18:6a4db94011d3 188 /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */
sahilmgandhi 18:6a4db94011d3 189 if(HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON))
sahilmgandhi 18:6a4db94011d3 190 {
sahilmgandhi 18:6a4db94011d3 191 /* Get tick */
sahilmgandhi 18:6a4db94011d3 192 tickstart = HAL_GetTick();
sahilmgandhi 18:6a4db94011d3 193
sahilmgandhi 18:6a4db94011d3 194 /* Wait till LSE is ready */
sahilmgandhi 18:6a4db94011d3 195 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
sahilmgandhi 18:6a4db94011d3 196 {
sahilmgandhi 18:6a4db94011d3 197 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
sahilmgandhi 18:6a4db94011d3 198 {
sahilmgandhi 18:6a4db94011d3 199 return HAL_TIMEOUT;
sahilmgandhi 18:6a4db94011d3 200 }
sahilmgandhi 18:6a4db94011d3 201 }
sahilmgandhi 18:6a4db94011d3 202 }
sahilmgandhi 18:6a4db94011d3 203 }
sahilmgandhi 18:6a4db94011d3 204 __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
sahilmgandhi 18:6a4db94011d3 205 }
sahilmgandhi 18:6a4db94011d3 206 /*--------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 207
sahilmgandhi 18:6a4db94011d3 208 return HAL_OK;
sahilmgandhi 18:6a4db94011d3 209 }
sahilmgandhi 18:6a4db94011d3 210
sahilmgandhi 18:6a4db94011d3 211 /**
sahilmgandhi 18:6a4db94011d3 212 * @brief Configures the RCC_OscInitStruct according to the internal
sahilmgandhi 18:6a4db94011d3 213 * RCC configuration registers.
sahilmgandhi 18:6a4db94011d3 214 * @param PeriphClkInit: pointer to an RCC_PeriphCLKInitTypeDef structure that
sahilmgandhi 18:6a4db94011d3 215 * will be configured.
sahilmgandhi 18:6a4db94011d3 216 * @retval None
sahilmgandhi 18:6a4db94011d3 217 */
sahilmgandhi 18:6a4db94011d3 218 void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
sahilmgandhi 18:6a4db94011d3 219 {
sahilmgandhi 18:6a4db94011d3 220 uint32_t tempreg;
sahilmgandhi 18:6a4db94011d3 221
sahilmgandhi 18:6a4db94011d3 222 /* Set all possible values for the extended clock type parameter------------*/
sahilmgandhi 18:6a4db94011d3 223 PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_I2S | RCC_PERIPHCLK_RTC;
sahilmgandhi 18:6a4db94011d3 224
sahilmgandhi 18:6a4db94011d3 225 /* Get the PLLI2S Clock configuration --------------------------------------*/
sahilmgandhi 18:6a4db94011d3 226 PeriphClkInit->PLLI2S.PLLI2SN = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> POSITION_VAL(RCC_PLLI2SCFGR_PLLI2SN));
sahilmgandhi 18:6a4db94011d3 227 PeriphClkInit->PLLI2S.PLLI2SR = (uint32_t)((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> POSITION_VAL(RCC_PLLI2SCFGR_PLLI2SR));
sahilmgandhi 18:6a4db94011d3 228
sahilmgandhi 18:6a4db94011d3 229 /* Get the RTC Clock configuration -----------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 230 tempreg = (RCC->CFGR & RCC_CFGR_RTCPRE);
sahilmgandhi 18:6a4db94011d3 231 PeriphClkInit->RTCClockSelection = (uint32_t)((tempreg) | (RCC->BDCR & RCC_BDCR_RTCSEL));
sahilmgandhi 18:6a4db94011d3 232
sahilmgandhi 18:6a4db94011d3 233 }
sahilmgandhi 18:6a4db94011d3 234 /**
sahilmgandhi 18:6a4db94011d3 235 * @}
sahilmgandhi 18:6a4db94011d3 236 */
sahilmgandhi 18:6a4db94011d3 237
sahilmgandhi 18:6a4db94011d3 238 /**
sahilmgandhi 18:6a4db94011d3 239 * @}
sahilmgandhi 18:6a4db94011d3 240 */
sahilmgandhi 18:6a4db94011d3 241
sahilmgandhi 18:6a4db94011d3 242 #endif /* HAL_RCC_MODULE_ENABLED */
sahilmgandhi 18:6a4db94011d3 243 /**
sahilmgandhi 18:6a4db94011d3 244 * @}
sahilmgandhi 18:6a4db94011d3 245 */
sahilmgandhi 18:6a4db94011d3 246
sahilmgandhi 18:6a4db94011d3 247 /**
sahilmgandhi 18:6a4db94011d3 248 * @}
sahilmgandhi 18:6a4db94011d3 249 */
sahilmgandhi 18:6a4db94011d3 250
sahilmgandhi 18:6a4db94011d3 251 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/