Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f2xx_hal_pwr_ex.h
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.1.3
sahilmgandhi 18:6a4db94011d3 6 * @date 29-June-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief Header file of PWR HAL Extension module.
sahilmgandhi 18:6a4db94011d3 8 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 9 * @attention
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 12 *
sahilmgandhi 18:6a4db94011d3 13 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 14 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 15 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 16 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 18 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 19 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 21 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 22 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 23 *
sahilmgandhi 18:6a4db94011d3 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 34 *
sahilmgandhi 18:6a4db94011d3 35 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 36 */
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 /* Define to prevent recursive inclusion -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 39 #ifndef __STM32F2xx_HAL_PWR_EX_H
sahilmgandhi 18:6a4db94011d3 40 #define __STM32F2xx_HAL_PWR_EX_H
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 43 extern "C" {
sahilmgandhi 18:6a4db94011d3 44 #endif
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 47 #include "stm32f2xx_hal_def.h"
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 /** @addtogroup STM32F2xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 50 * @{
sahilmgandhi 18:6a4db94011d3 51 */
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 /** @addtogroup PWREx
sahilmgandhi 18:6a4db94011d3 54 * @{
sahilmgandhi 18:6a4db94011d3 55 */
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 /* Exported types ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 58 /* Exported constants --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 59 /** @defgroup PWREx_Exported_Constants PWR Exported Constants
sahilmgandhi 18:6a4db94011d3 60 * @{
sahilmgandhi 18:6a4db94011d3 61 */
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 /**
sahilmgandhi 18:6a4db94011d3 64 * @}
sahilmgandhi 18:6a4db94011d3 65 */
sahilmgandhi 18:6a4db94011d3 66
sahilmgandhi 18:6a4db94011d3 67 /* Exported macro ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 68 /** @defgroup PWREx_Exported_Constants PWR Exported Constants
sahilmgandhi 18:6a4db94011d3 69 * @{
sahilmgandhi 18:6a4db94011d3 70 */
sahilmgandhi 18:6a4db94011d3 71 /**
sahilmgandhi 18:6a4db94011d3 72 * @}
sahilmgandhi 18:6a4db94011d3 73 */
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 76 /** @addtogroup PWREx_Exported_Functions PWR Exported Functions
sahilmgandhi 18:6a4db94011d3 77 * @{
sahilmgandhi 18:6a4db94011d3 78 */
sahilmgandhi 18:6a4db94011d3 79
sahilmgandhi 18:6a4db94011d3 80 /** @addtogroup PWREx_Exported_Functions_Group1
sahilmgandhi 18:6a4db94011d3 81 * @{
sahilmgandhi 18:6a4db94011d3 82 */
sahilmgandhi 18:6a4db94011d3 83 void HAL_PWREx_EnableFlashPowerDown(void);
sahilmgandhi 18:6a4db94011d3 84 void HAL_PWREx_DisableFlashPowerDown(void);
sahilmgandhi 18:6a4db94011d3 85 HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void);
sahilmgandhi 18:6a4db94011d3 86 HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void);
sahilmgandhi 18:6a4db94011d3 87 /**
sahilmgandhi 18:6a4db94011d3 88 * @}
sahilmgandhi 18:6a4db94011d3 89 */
sahilmgandhi 18:6a4db94011d3 90
sahilmgandhi 18:6a4db94011d3 91 /**
sahilmgandhi 18:6a4db94011d3 92 * @}
sahilmgandhi 18:6a4db94011d3 93 */
sahilmgandhi 18:6a4db94011d3 94 /* Private types -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 95 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 96 /* Private constants ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 97 /** @defgroup PWREx_Private_Constants PWR Private Constants
sahilmgandhi 18:6a4db94011d3 98 * @{
sahilmgandhi 18:6a4db94011d3 99 */
sahilmgandhi 18:6a4db94011d3 100
sahilmgandhi 18:6a4db94011d3 101 /** @defgroup PWREx_register_alias_address PWR Register alias address
sahilmgandhi 18:6a4db94011d3 102 * @{
sahilmgandhi 18:6a4db94011d3 103 */
sahilmgandhi 18:6a4db94011d3 104 /* ------------- PWR registers bit address in the alias region ---------------*/
sahilmgandhi 18:6a4db94011d3 105 /* --- CR Register ---*/
sahilmgandhi 18:6a4db94011d3 106 /* Alias word address of FPDS bit */
sahilmgandhi 18:6a4db94011d3 107 #define FPDS_BIT_NUMBER POSITION_VAL(PWR_CR_FPDS)
sahilmgandhi 18:6a4db94011d3 108 #define CR_FPDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (FPDS_BIT_NUMBER * 4U))
sahilmgandhi 18:6a4db94011d3 109
sahilmgandhi 18:6a4db94011d3 110 /**
sahilmgandhi 18:6a4db94011d3 111 * @}
sahilmgandhi 18:6a4db94011d3 112 */
sahilmgandhi 18:6a4db94011d3 113
sahilmgandhi 18:6a4db94011d3 114 /** @defgroup PWREx_CSR_register_alias PWR CSR Register alias address
sahilmgandhi 18:6a4db94011d3 115 * @{
sahilmgandhi 18:6a4db94011d3 116 */
sahilmgandhi 18:6a4db94011d3 117 /* --- CSR Register ---*/
sahilmgandhi 18:6a4db94011d3 118 /* Alias word address of BRE bit */
sahilmgandhi 18:6a4db94011d3 119 #define BRE_BIT_NUMBER POSITION_VAL(PWR_CSR_BRE)
sahilmgandhi 18:6a4db94011d3 120 #define CSR_BRE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (BRE_BIT_NUMBER * 4U))
sahilmgandhi 18:6a4db94011d3 121 /**
sahilmgandhi 18:6a4db94011d3 122 * @}
sahilmgandhi 18:6a4db94011d3 123 */
sahilmgandhi 18:6a4db94011d3 124
sahilmgandhi 18:6a4db94011d3 125 /**
sahilmgandhi 18:6a4db94011d3 126 * @}
sahilmgandhi 18:6a4db94011d3 127 */
sahilmgandhi 18:6a4db94011d3 128
sahilmgandhi 18:6a4db94011d3 129 /* Private macros ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 130 /** @defgroup PWREx_Private_Macros PWR Private Macros
sahilmgandhi 18:6a4db94011d3 131 * @{
sahilmgandhi 18:6a4db94011d3 132 */
sahilmgandhi 18:6a4db94011d3 133
sahilmgandhi 18:6a4db94011d3 134 /** @defgroup PWREx_IS_PWR_Definitions PWR Private macros to check input parameters
sahilmgandhi 18:6a4db94011d3 135 * @{
sahilmgandhi 18:6a4db94011d3 136 */
sahilmgandhi 18:6a4db94011d3 137
sahilmgandhi 18:6a4db94011d3 138 /**
sahilmgandhi 18:6a4db94011d3 139 * @}
sahilmgandhi 18:6a4db94011d3 140 */
sahilmgandhi 18:6a4db94011d3 141
sahilmgandhi 18:6a4db94011d3 142 /**
sahilmgandhi 18:6a4db94011d3 143 * @}
sahilmgandhi 18:6a4db94011d3 144 */
sahilmgandhi 18:6a4db94011d3 145
sahilmgandhi 18:6a4db94011d3 146 /**
sahilmgandhi 18:6a4db94011d3 147 * @}
sahilmgandhi 18:6a4db94011d3 148 */
sahilmgandhi 18:6a4db94011d3 149
sahilmgandhi 18:6a4db94011d3 150 /**
sahilmgandhi 18:6a4db94011d3 151 * @}
sahilmgandhi 18:6a4db94011d3 152 */
sahilmgandhi 18:6a4db94011d3 153
sahilmgandhi 18:6a4db94011d3 154 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 155 }
sahilmgandhi 18:6a4db94011d3 156 #endif
sahilmgandhi 18:6a4db94011d3 157
sahilmgandhi 18:6a4db94011d3 158
sahilmgandhi 18:6a4db94011d3 159 #endif /* __STM32F2xx_HAL_PWR_EX_H */
sahilmgandhi 18:6a4db94011d3 160
sahilmgandhi 18:6a4db94011d3 161 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/