MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_iwdg.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f2xx_hal_iwdg.h
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.1.3
sahilmgandhi 18:6a4db94011d3 6 * @date 29-June-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief Header file of IWDG HAL module.
sahilmgandhi 18:6a4db94011d3 8 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 9 * @attention
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 12 *
sahilmgandhi 18:6a4db94011d3 13 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 14 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 15 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 16 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 18 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 19 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 21 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 22 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 23 *
sahilmgandhi 18:6a4db94011d3 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 34 *
sahilmgandhi 18:6a4db94011d3 35 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 36 */
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 /* Define to prevent recursive inclusion -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 39 #ifndef __STM32F2xx_HAL_IWDG_H
sahilmgandhi 18:6a4db94011d3 40 #define __STM32F2xx_HAL_IWDG_H
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 43 extern "C" {
sahilmgandhi 18:6a4db94011d3 44 #endif
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 47 #include "stm32f2xx_hal_def.h"
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 /** @addtogroup STM32F2xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 50 * @{
sahilmgandhi 18:6a4db94011d3 51 */
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 /** @addtogroup IWDG
sahilmgandhi 18:6a4db94011d3 54 * @{
sahilmgandhi 18:6a4db94011d3 55 */
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 /* Exported types ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 58 /** @defgroup IWDG_Exported_Types IWDG Exported Types
sahilmgandhi 18:6a4db94011d3 59 * @{
sahilmgandhi 18:6a4db94011d3 60 */
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 /**
sahilmgandhi 18:6a4db94011d3 63 * @brief IWDG Init structure definition
sahilmgandhi 18:6a4db94011d3 64 */
sahilmgandhi 18:6a4db94011d3 65 typedef struct
sahilmgandhi 18:6a4db94011d3 66 {
sahilmgandhi 18:6a4db94011d3 67 uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
sahilmgandhi 18:6a4db94011d3 68 This parameter can be a value of @ref IWDG_Prescaler */
sahilmgandhi 18:6a4db94011d3 69
sahilmgandhi 18:6a4db94011d3 70 uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
sahilmgandhi 18:6a4db94011d3 71 This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
sahilmgandhi 18:6a4db94011d3 72
sahilmgandhi 18:6a4db94011d3 73 } IWDG_InitTypeDef;
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 /**
sahilmgandhi 18:6a4db94011d3 76 * @brief IWDG Handle Structure definition
sahilmgandhi 18:6a4db94011d3 77 */
sahilmgandhi 18:6a4db94011d3 78 typedef struct
sahilmgandhi 18:6a4db94011d3 79 {
sahilmgandhi 18:6a4db94011d3 80 IWDG_TypeDef *Instance; /*!< Register base address */
sahilmgandhi 18:6a4db94011d3 81
sahilmgandhi 18:6a4db94011d3 82 IWDG_InitTypeDef Init; /*!< IWDG required parameters */
sahilmgandhi 18:6a4db94011d3 83
sahilmgandhi 18:6a4db94011d3 84 }IWDG_HandleTypeDef;
sahilmgandhi 18:6a4db94011d3 85
sahilmgandhi 18:6a4db94011d3 86 /**
sahilmgandhi 18:6a4db94011d3 87 * @}
sahilmgandhi 18:6a4db94011d3 88 */
sahilmgandhi 18:6a4db94011d3 89
sahilmgandhi 18:6a4db94011d3 90 /* Exported constants --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 91 /** @defgroup IWDG_Exported_Constants IWDG Exported Constants
sahilmgandhi 18:6a4db94011d3 92 * @{
sahilmgandhi 18:6a4db94011d3 93 */
sahilmgandhi 18:6a4db94011d3 94
sahilmgandhi 18:6a4db94011d3 95 /** @defgroup IWDG_Prescaler IWDG Prescaler
sahilmgandhi 18:6a4db94011d3 96 * @{
sahilmgandhi 18:6a4db94011d3 97 */
sahilmgandhi 18:6a4db94011d3 98 #define IWDG_PRESCALER_4 0x00000000U /*!< IWDG prescaler set to 4 */
sahilmgandhi 18:6a4db94011d3 99 #define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */
sahilmgandhi 18:6a4db94011d3 100 #define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */
sahilmgandhi 18:6a4db94011d3 101 #define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */
sahilmgandhi 18:6a4db94011d3 102 #define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */
sahilmgandhi 18:6a4db94011d3 103 #define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */
sahilmgandhi 18:6a4db94011d3 104 #define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */
sahilmgandhi 18:6a4db94011d3 105 /**
sahilmgandhi 18:6a4db94011d3 106 * @}
sahilmgandhi 18:6a4db94011d3 107 */
sahilmgandhi 18:6a4db94011d3 108
sahilmgandhi 18:6a4db94011d3 109 /**
sahilmgandhi 18:6a4db94011d3 110 * @}
sahilmgandhi 18:6a4db94011d3 111 */
sahilmgandhi 18:6a4db94011d3 112
sahilmgandhi 18:6a4db94011d3 113 /**
sahilmgandhi 18:6a4db94011d3 114 * @}
sahilmgandhi 18:6a4db94011d3 115 */
sahilmgandhi 18:6a4db94011d3 116
sahilmgandhi 18:6a4db94011d3 117 /* Exported macros -----------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 118 /** @defgroup IWDG_Exported_Macros IWDG Exported Macros
sahilmgandhi 18:6a4db94011d3 119 * @{
sahilmgandhi 18:6a4db94011d3 120 */
sahilmgandhi 18:6a4db94011d3 121
sahilmgandhi 18:6a4db94011d3 122 /**
sahilmgandhi 18:6a4db94011d3 123 * @brief Enable the IWDG peripheral.
sahilmgandhi 18:6a4db94011d3 124 * @param __HANDLE__ IWDG handle
sahilmgandhi 18:6a4db94011d3 125 * @retval None
sahilmgandhi 18:6a4db94011d3 126 */
sahilmgandhi 18:6a4db94011d3 127 #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
sahilmgandhi 18:6a4db94011d3 128
sahilmgandhi 18:6a4db94011d3 129 /**
sahilmgandhi 18:6a4db94011d3 130 * @brief Reload IWDG counter with value defined in the reload register
sahilmgandhi 18:6a4db94011d3 131 * (write access to IWDG_PR & IWDG_RLR registers disabled).
sahilmgandhi 18:6a4db94011d3 132 * @param __HANDLE__ IWDG handle
sahilmgandhi 18:6a4db94011d3 133 * @retval None
sahilmgandhi 18:6a4db94011d3 134 */
sahilmgandhi 18:6a4db94011d3 135 #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
sahilmgandhi 18:6a4db94011d3 136
sahilmgandhi 18:6a4db94011d3 137 /**
sahilmgandhi 18:6a4db94011d3 138 * @}
sahilmgandhi 18:6a4db94011d3 139 */
sahilmgandhi 18:6a4db94011d3 140
sahilmgandhi 18:6a4db94011d3 141 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 142 /** @defgroup IWDG_Exported_Functions IWDG Exported Functions
sahilmgandhi 18:6a4db94011d3 143 * @{
sahilmgandhi 18:6a4db94011d3 144 */
sahilmgandhi 18:6a4db94011d3 145
sahilmgandhi 18:6a4db94011d3 146 /** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
sahilmgandhi 18:6a4db94011d3 147 * @{
sahilmgandhi 18:6a4db94011d3 148 */
sahilmgandhi 18:6a4db94011d3 149 /* Initialization/Start functions ********************************************/
sahilmgandhi 18:6a4db94011d3 150 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
sahilmgandhi 18:6a4db94011d3 151 /**
sahilmgandhi 18:6a4db94011d3 152 * @}
sahilmgandhi 18:6a4db94011d3 153 */
sahilmgandhi 18:6a4db94011d3 154
sahilmgandhi 18:6a4db94011d3 155 /** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
sahilmgandhi 18:6a4db94011d3 156 * @{
sahilmgandhi 18:6a4db94011d3 157 */
sahilmgandhi 18:6a4db94011d3 158 /* I/O operation functions ****************************************************/
sahilmgandhi 18:6a4db94011d3 159 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
sahilmgandhi 18:6a4db94011d3 160 /**
sahilmgandhi 18:6a4db94011d3 161 * @}
sahilmgandhi 18:6a4db94011d3 162 */
sahilmgandhi 18:6a4db94011d3 163
sahilmgandhi 18:6a4db94011d3 164 /**
sahilmgandhi 18:6a4db94011d3 165 * @}
sahilmgandhi 18:6a4db94011d3 166 */
sahilmgandhi 18:6a4db94011d3 167
sahilmgandhi 18:6a4db94011d3 168 /* Private constants ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 169 /** @defgroup IWDG_Private_Constants IWDG Private Constants
sahilmgandhi 18:6a4db94011d3 170 * @{
sahilmgandhi 18:6a4db94011d3 171 */
sahilmgandhi 18:6a4db94011d3 172
sahilmgandhi 18:6a4db94011d3 173 /**
sahilmgandhi 18:6a4db94011d3 174 * @brief IWDG Key Register BitMask
sahilmgandhi 18:6a4db94011d3 175 */
sahilmgandhi 18:6a4db94011d3 176 #define IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */
sahilmgandhi 18:6a4db94011d3 177 #define IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */
sahilmgandhi 18:6a4db94011d3 178 #define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */
sahilmgandhi 18:6a4db94011d3 179 #define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */
sahilmgandhi 18:6a4db94011d3 180
sahilmgandhi 18:6a4db94011d3 181 /**
sahilmgandhi 18:6a4db94011d3 182 * @}
sahilmgandhi 18:6a4db94011d3 183 */
sahilmgandhi 18:6a4db94011d3 184
sahilmgandhi 18:6a4db94011d3 185 /* Private macros ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 186 /** @defgroup IWDG_Private_Macros IWDG Private Macros
sahilmgandhi 18:6a4db94011d3 187 * @{
sahilmgandhi 18:6a4db94011d3 188 */
sahilmgandhi 18:6a4db94011d3 189
sahilmgandhi 18:6a4db94011d3 190 /**
sahilmgandhi 18:6a4db94011d3 191 * @brief Enable write access to IWDG_PR and IWDG_RLR registers.
sahilmgandhi 18:6a4db94011d3 192 * @param __HANDLE__ IWDG handle
sahilmgandhi 18:6a4db94011d3 193 * @retval None
sahilmgandhi 18:6a4db94011d3 194 */
sahilmgandhi 18:6a4db94011d3 195 #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
sahilmgandhi 18:6a4db94011d3 196
sahilmgandhi 18:6a4db94011d3 197 /**
sahilmgandhi 18:6a4db94011d3 198 * @brief Disable write access to IWDG_PR and IWDG_RLR registers.
sahilmgandhi 18:6a4db94011d3 199 * @param __HANDLE__ IWDG handle
sahilmgandhi 18:6a4db94011d3 200 * @retval None
sahilmgandhi 18:6a4db94011d3 201 */
sahilmgandhi 18:6a4db94011d3 202 #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
sahilmgandhi 18:6a4db94011d3 203
sahilmgandhi 18:6a4db94011d3 204 /**
sahilmgandhi 18:6a4db94011d3 205 * @brief Check IWDG prescaler value.
sahilmgandhi 18:6a4db94011d3 206 * @param __PRESCALER__ IWDG prescaler value
sahilmgandhi 18:6a4db94011d3 207 * @retval None
sahilmgandhi 18:6a4db94011d3 208 */
sahilmgandhi 18:6a4db94011d3 209 #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
sahilmgandhi 18:6a4db94011d3 210 ((__PRESCALER__) == IWDG_PRESCALER_8) || \
sahilmgandhi 18:6a4db94011d3 211 ((__PRESCALER__) == IWDG_PRESCALER_16) || \
sahilmgandhi 18:6a4db94011d3 212 ((__PRESCALER__) == IWDG_PRESCALER_32) || \
sahilmgandhi 18:6a4db94011d3 213 ((__PRESCALER__) == IWDG_PRESCALER_64) || \
sahilmgandhi 18:6a4db94011d3 214 ((__PRESCALER__) == IWDG_PRESCALER_128)|| \
sahilmgandhi 18:6a4db94011d3 215 ((__PRESCALER__) == IWDG_PRESCALER_256))
sahilmgandhi 18:6a4db94011d3 216
sahilmgandhi 18:6a4db94011d3 217 /**
sahilmgandhi 18:6a4db94011d3 218 * @brief Check IWDG reload value.
sahilmgandhi 18:6a4db94011d3 219 * @param __RELOAD__ IWDG reload value
sahilmgandhi 18:6a4db94011d3 220 * @retval None
sahilmgandhi 18:6a4db94011d3 221 */
sahilmgandhi 18:6a4db94011d3 222 #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL)
sahilmgandhi 18:6a4db94011d3 223
sahilmgandhi 18:6a4db94011d3 224 /**
sahilmgandhi 18:6a4db94011d3 225 * @}
sahilmgandhi 18:6a4db94011d3 226 */
sahilmgandhi 18:6a4db94011d3 227
sahilmgandhi 18:6a4db94011d3 228 /**
sahilmgandhi 18:6a4db94011d3 229 * @}
sahilmgandhi 18:6a4db94011d3 230 */
sahilmgandhi 18:6a4db94011d3 231
sahilmgandhi 18:6a4db94011d3 232 /**
sahilmgandhi 18:6a4db94011d3 233 * @}
sahilmgandhi 18:6a4db94011d3 234 */
sahilmgandhi 18:6a4db94011d3 235
sahilmgandhi 18:6a4db94011d3 236
sahilmgandhi 18:6a4db94011d3 237 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 238 }
sahilmgandhi 18:6a4db94011d3 239 #endif
sahilmgandhi 18:6a4db94011d3 240
sahilmgandhi 18:6a4db94011d3 241 #endif /* __STM32F2xx_HAL_IWDG_H */
sahilmgandhi 18:6a4db94011d3 242
sahilmgandhi 18:6a4db94011d3 243 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/