Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f2xx_hal_i2s.h
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.1.3
sahilmgandhi 18:6a4db94011d3 6 * @date 29-June-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief Header file of I2S HAL module.
sahilmgandhi 18:6a4db94011d3 8 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 9 * @attention
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 12 *
sahilmgandhi 18:6a4db94011d3 13 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 14 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 15 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 16 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 18 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 19 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 21 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 22 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 23 *
sahilmgandhi 18:6a4db94011d3 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 34 *
sahilmgandhi 18:6a4db94011d3 35 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 36 */
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 /* Define to prevent recursive inclusion -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 39 #ifndef __STM32F2xx_HAL_I2S_H
sahilmgandhi 18:6a4db94011d3 40 #define __STM32F2xx_HAL_I2S_H
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 43 extern "C" {
sahilmgandhi 18:6a4db94011d3 44 #endif
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 47 #include "stm32f2xx_hal_def.h"
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 /** @addtogroup STM32F2xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 50 * @{
sahilmgandhi 18:6a4db94011d3 51 */
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 /** @addtogroup I2S
sahilmgandhi 18:6a4db94011d3 54 * @{
sahilmgandhi 18:6a4db94011d3 55 */
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 /* Exported types ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 58 /** @defgroup I2S_Exported_Types I2S Exported Types
sahilmgandhi 18:6a4db94011d3 59 * @{
sahilmgandhi 18:6a4db94011d3 60 */
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 /**
sahilmgandhi 18:6a4db94011d3 63 * @brief I2S Init structure definition
sahilmgandhi 18:6a4db94011d3 64 */
sahilmgandhi 18:6a4db94011d3 65 typedef struct
sahilmgandhi 18:6a4db94011d3 66 {
sahilmgandhi 18:6a4db94011d3 67 uint32_t Mode; /*!< Specifies the I2S operating mode.
sahilmgandhi 18:6a4db94011d3 68 This parameter can be a value of @ref I2S_Mode */
sahilmgandhi 18:6a4db94011d3 69
sahilmgandhi 18:6a4db94011d3 70 uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
sahilmgandhi 18:6a4db94011d3 71 This parameter can be a value of @ref I2S_Standard */
sahilmgandhi 18:6a4db94011d3 72
sahilmgandhi 18:6a4db94011d3 73 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
sahilmgandhi 18:6a4db94011d3 74 This parameter can be a value of @ref I2S_Data_Format */
sahilmgandhi 18:6a4db94011d3 75
sahilmgandhi 18:6a4db94011d3 76 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
sahilmgandhi 18:6a4db94011d3 77 This parameter can be a value of @ref I2S_MCLK_Output */
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
sahilmgandhi 18:6a4db94011d3 80 This parameter can be a value of @ref I2S_Audio_Frequency */
sahilmgandhi 18:6a4db94011d3 81
sahilmgandhi 18:6a4db94011d3 82 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
sahilmgandhi 18:6a4db94011d3 83 This parameter can be a value of @ref I2S_Clock_Polarity */
sahilmgandhi 18:6a4db94011d3 84
sahilmgandhi 18:6a4db94011d3 85 uint32_t ClockSource; /*!< Specifies the I2S Clock Source.
sahilmgandhi 18:6a4db94011d3 86 This parameter can be a value of @ref I2S_Clock_Source */
sahilmgandhi 18:6a4db94011d3 87
sahilmgandhi 18:6a4db94011d3 88 }I2S_InitTypeDef;
sahilmgandhi 18:6a4db94011d3 89
sahilmgandhi 18:6a4db94011d3 90 /**
sahilmgandhi 18:6a4db94011d3 91 * @brief HAL State structures definition
sahilmgandhi 18:6a4db94011d3 92 */
sahilmgandhi 18:6a4db94011d3 93 typedef enum
sahilmgandhi 18:6a4db94011d3 94 {
sahilmgandhi 18:6a4db94011d3 95 HAL_I2S_STATE_RESET = 0x00U, /*!< I2S not yet initialized or disabled */
sahilmgandhi 18:6a4db94011d3 96 HAL_I2S_STATE_READY = 0x01U, /*!< I2S initialized and ready for use */
sahilmgandhi 18:6a4db94011d3 97 HAL_I2S_STATE_BUSY = 0x02U, /*!< I2S internal process is ongoing */
sahilmgandhi 18:6a4db94011d3 98 HAL_I2S_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */
sahilmgandhi 18:6a4db94011d3 99 HAL_I2S_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
sahilmgandhi 18:6a4db94011d3 100 HAL_I2S_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission and Reception process is ongoing */
sahilmgandhi 18:6a4db94011d3 101 HAL_I2S_STATE_TIMEOUT = 0x03U, /*!< I2S timeout state */
sahilmgandhi 18:6a4db94011d3 102 HAL_I2S_STATE_ERROR = 0x04U /*!< I2S error state */
sahilmgandhi 18:6a4db94011d3 103
sahilmgandhi 18:6a4db94011d3 104 }HAL_I2S_StateTypeDef;
sahilmgandhi 18:6a4db94011d3 105
sahilmgandhi 18:6a4db94011d3 106 /**
sahilmgandhi 18:6a4db94011d3 107 * @brief I2S handle Structure definition
sahilmgandhi 18:6a4db94011d3 108 */
sahilmgandhi 18:6a4db94011d3 109 typedef struct
sahilmgandhi 18:6a4db94011d3 110 {
sahilmgandhi 18:6a4db94011d3 111 SPI_TypeDef *Instance; /* I2S registers base address */
sahilmgandhi 18:6a4db94011d3 112
sahilmgandhi 18:6a4db94011d3 113 I2S_InitTypeDef Init; /* I2S communication parameters */
sahilmgandhi 18:6a4db94011d3 114
sahilmgandhi 18:6a4db94011d3 115 uint16_t *pTxBuffPtr; /* Pointer to I2S Tx transfer buffer */
sahilmgandhi 18:6a4db94011d3 116
sahilmgandhi 18:6a4db94011d3 117 __IO uint16_t TxXferSize; /* I2S Tx transfer size */
sahilmgandhi 18:6a4db94011d3 118
sahilmgandhi 18:6a4db94011d3 119 __IO uint16_t TxXferCount; /* I2S Tx transfer Counter */
sahilmgandhi 18:6a4db94011d3 120
sahilmgandhi 18:6a4db94011d3 121 uint16_t *pRxBuffPtr; /* Pointer to I2S Rx transfer buffer */
sahilmgandhi 18:6a4db94011d3 122
sahilmgandhi 18:6a4db94011d3 123 __IO uint16_t RxXferSize; /* I2S Rx transfer size */
sahilmgandhi 18:6a4db94011d3 124
sahilmgandhi 18:6a4db94011d3 125 __IO uint16_t RxXferCount; /* I2S Rx transfer counter */
sahilmgandhi 18:6a4db94011d3 126
sahilmgandhi 18:6a4db94011d3 127 DMA_HandleTypeDef *hdmatx; /* I2S Tx DMA handle parameters */
sahilmgandhi 18:6a4db94011d3 128
sahilmgandhi 18:6a4db94011d3 129 DMA_HandleTypeDef *hdmarx; /* I2S Rx DMA handle parameters */
sahilmgandhi 18:6a4db94011d3 130
sahilmgandhi 18:6a4db94011d3 131 __IO HAL_LockTypeDef Lock; /* I2S locking object */
sahilmgandhi 18:6a4db94011d3 132
sahilmgandhi 18:6a4db94011d3 133 __IO HAL_I2S_StateTypeDef State; /* I2S communication state */
sahilmgandhi 18:6a4db94011d3 134
sahilmgandhi 18:6a4db94011d3 135 __IO uint32_t ErrorCode; /* I2S Error code */
sahilmgandhi 18:6a4db94011d3 136
sahilmgandhi 18:6a4db94011d3 137 }I2S_HandleTypeDef;
sahilmgandhi 18:6a4db94011d3 138 /**
sahilmgandhi 18:6a4db94011d3 139 * @}
sahilmgandhi 18:6a4db94011d3 140 */
sahilmgandhi 18:6a4db94011d3 141
sahilmgandhi 18:6a4db94011d3 142 /* Exported constants --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 143 /** @defgroup I2S_Exported_Constants I2S Exported Constants
sahilmgandhi 18:6a4db94011d3 144 * @{
sahilmgandhi 18:6a4db94011d3 145 */
sahilmgandhi 18:6a4db94011d3 146
sahilmgandhi 18:6a4db94011d3 147 /** @defgroup I2S_Error_Code I2S Error Code
sahilmgandhi 18:6a4db94011d3 148 * @brief I2S Error Code
sahilmgandhi 18:6a4db94011d3 149 * @{
sahilmgandhi 18:6a4db94011d3 150 */
sahilmgandhi 18:6a4db94011d3 151 #define HAL_I2S_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
sahilmgandhi 18:6a4db94011d3 152 #define HAL_I2S_ERROR_UDR ((uint32_t)0x00000001U) /*!< I2S Underrun error */
sahilmgandhi 18:6a4db94011d3 153 #define HAL_I2S_ERROR_OVR ((uint32_t)0x00000002U) /*!< I2S Overrun error */
sahilmgandhi 18:6a4db94011d3 154 #define HAL_I2SEX_ERROR_UDR ((uint32_t)0x00000004U) /*!< I2S extended Underrun error */
sahilmgandhi 18:6a4db94011d3 155 #define HAL_I2SEX_ERROR_OVR ((uint32_t)0x00000008U) /*!< I2S extended Overrun error */
sahilmgandhi 18:6a4db94011d3 156 #define HAL_I2S_ERROR_FRE ((uint32_t)0x00000010U) /*!< I2S Frame format error */
sahilmgandhi 18:6a4db94011d3 157 #define HAL_I2S_ERROR_DMA ((uint32_t)0x00000020U) /*!< DMA transfer error */
sahilmgandhi 18:6a4db94011d3 158 /**
sahilmgandhi 18:6a4db94011d3 159 * @}
sahilmgandhi 18:6a4db94011d3 160 */
sahilmgandhi 18:6a4db94011d3 161
sahilmgandhi 18:6a4db94011d3 162 /** @defgroup I2S_Clock_Source I2S Clock Source
sahilmgandhi 18:6a4db94011d3 163 * @{
sahilmgandhi 18:6a4db94011d3 164 */
sahilmgandhi 18:6a4db94011d3 165 #define I2S_CLOCK_PLL ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 166 #define I2S_CLOCK_EXTERNAL ((uint32_t)0x00000001U)
sahilmgandhi 18:6a4db94011d3 167 /**
sahilmgandhi 18:6a4db94011d3 168 * @}
sahilmgandhi 18:6a4db94011d3 169 */
sahilmgandhi 18:6a4db94011d3 170
sahilmgandhi 18:6a4db94011d3 171 /** @defgroup I2S_Mode I2S Mode
sahilmgandhi 18:6a4db94011d3 172 * @{
sahilmgandhi 18:6a4db94011d3 173 */
sahilmgandhi 18:6a4db94011d3 174 #define I2S_MODE_SLAVE_TX ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 175 #define I2S_MODE_SLAVE_RX ((uint32_t)0x00000100U)
sahilmgandhi 18:6a4db94011d3 176 #define I2S_MODE_MASTER_TX ((uint32_t)0x00000200U)
sahilmgandhi 18:6a4db94011d3 177 #define I2S_MODE_MASTER_RX ((uint32_t)0x00000300U)
sahilmgandhi 18:6a4db94011d3 178 /**
sahilmgandhi 18:6a4db94011d3 179 * @}
sahilmgandhi 18:6a4db94011d3 180 */
sahilmgandhi 18:6a4db94011d3 181
sahilmgandhi 18:6a4db94011d3 182 /** @defgroup I2S_Standard I2S Standard
sahilmgandhi 18:6a4db94011d3 183 * @{
sahilmgandhi 18:6a4db94011d3 184 */
sahilmgandhi 18:6a4db94011d3 185 #define I2S_STANDARD_PHILIPS ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 186 #define I2S_STANDARD_MSB ((uint32_t)0x00000010U)
sahilmgandhi 18:6a4db94011d3 187 #define I2S_STANDARD_LSB ((uint32_t)0x00000020U)
sahilmgandhi 18:6a4db94011d3 188 #define I2S_STANDARD_PCM_SHORT ((uint32_t)0x00000030U)
sahilmgandhi 18:6a4db94011d3 189 #define I2S_STANDARD_PCM_LONG ((uint32_t)0x000000B0U)
sahilmgandhi 18:6a4db94011d3 190 /**
sahilmgandhi 18:6a4db94011d3 191 * @}
sahilmgandhi 18:6a4db94011d3 192 */
sahilmgandhi 18:6a4db94011d3 193
sahilmgandhi 18:6a4db94011d3 194 /** @defgroup I2S_Data_Format I2S Data Format
sahilmgandhi 18:6a4db94011d3 195 * @{
sahilmgandhi 18:6a4db94011d3 196 */
sahilmgandhi 18:6a4db94011d3 197 #define I2S_DATAFORMAT_16B ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 198 #define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t)0x00000001U)
sahilmgandhi 18:6a4db94011d3 199 #define I2S_DATAFORMAT_24B ((uint32_t)0x00000003U)
sahilmgandhi 18:6a4db94011d3 200 #define I2S_DATAFORMAT_32B ((uint32_t)0x00000005U)
sahilmgandhi 18:6a4db94011d3 201 /**
sahilmgandhi 18:6a4db94011d3 202 * @}
sahilmgandhi 18:6a4db94011d3 203 */
sahilmgandhi 18:6a4db94011d3 204
sahilmgandhi 18:6a4db94011d3 205 /** @defgroup I2S_MCLK_Output I2S Mclk Output
sahilmgandhi 18:6a4db94011d3 206 * @{
sahilmgandhi 18:6a4db94011d3 207 */
sahilmgandhi 18:6a4db94011d3 208 #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE)
sahilmgandhi 18:6a4db94011d3 209 #define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 210 /**
sahilmgandhi 18:6a4db94011d3 211 * @}
sahilmgandhi 18:6a4db94011d3 212 */
sahilmgandhi 18:6a4db94011d3 213
sahilmgandhi 18:6a4db94011d3 214 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency
sahilmgandhi 18:6a4db94011d3 215 * @{
sahilmgandhi 18:6a4db94011d3 216 */
sahilmgandhi 18:6a4db94011d3 217 #define I2S_AUDIOFREQ_192K ((uint32_t)192000U)
sahilmgandhi 18:6a4db94011d3 218 #define I2S_AUDIOFREQ_96K ((uint32_t)96000U)
sahilmgandhi 18:6a4db94011d3 219 #define I2S_AUDIOFREQ_48K ((uint32_t)48000U)
sahilmgandhi 18:6a4db94011d3 220 #define I2S_AUDIOFREQ_44K ((uint32_t)44100U)
sahilmgandhi 18:6a4db94011d3 221 #define I2S_AUDIOFREQ_32K ((uint32_t)32000U)
sahilmgandhi 18:6a4db94011d3 222 #define I2S_AUDIOFREQ_22K ((uint32_t)22050U)
sahilmgandhi 18:6a4db94011d3 223 #define I2S_AUDIOFREQ_16K ((uint32_t)16000U)
sahilmgandhi 18:6a4db94011d3 224 #define I2S_AUDIOFREQ_11K ((uint32_t)11025U)
sahilmgandhi 18:6a4db94011d3 225 #define I2S_AUDIOFREQ_8K ((uint32_t)8000U)
sahilmgandhi 18:6a4db94011d3 226 #define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2U)
sahilmgandhi 18:6a4db94011d3 227 /**
sahilmgandhi 18:6a4db94011d3 228 * @}
sahilmgandhi 18:6a4db94011d3 229 */
sahilmgandhi 18:6a4db94011d3 230
sahilmgandhi 18:6a4db94011d3 231 /** @defgroup I2S_Clock_Polarity I2S Clock Polarity
sahilmgandhi 18:6a4db94011d3 232 * @{
sahilmgandhi 18:6a4db94011d3 233 */
sahilmgandhi 18:6a4db94011d3 234 #define I2S_CPOL_LOW ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 235 #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL)
sahilmgandhi 18:6a4db94011d3 236 /**
sahilmgandhi 18:6a4db94011d3 237 * @}
sahilmgandhi 18:6a4db94011d3 238 */
sahilmgandhi 18:6a4db94011d3 239
sahilmgandhi 18:6a4db94011d3 240 /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
sahilmgandhi 18:6a4db94011d3 241 * @{
sahilmgandhi 18:6a4db94011d3 242 */
sahilmgandhi 18:6a4db94011d3 243 #define I2S_IT_TXE SPI_CR2_TXEIE
sahilmgandhi 18:6a4db94011d3 244 #define I2S_IT_RXNE SPI_CR2_RXNEIE
sahilmgandhi 18:6a4db94011d3 245 #define I2S_IT_ERR SPI_CR2_ERRIE
sahilmgandhi 18:6a4db94011d3 246 /**
sahilmgandhi 18:6a4db94011d3 247 * @}
sahilmgandhi 18:6a4db94011d3 248 */
sahilmgandhi 18:6a4db94011d3 249
sahilmgandhi 18:6a4db94011d3 250 /** @defgroup I2S_Flags_Definition I2S Flags Definition
sahilmgandhi 18:6a4db94011d3 251 * @{
sahilmgandhi 18:6a4db94011d3 252 */
sahilmgandhi 18:6a4db94011d3 253 #define I2S_FLAG_TXE SPI_SR_TXE
sahilmgandhi 18:6a4db94011d3 254 #define I2S_FLAG_RXNE SPI_SR_RXNE
sahilmgandhi 18:6a4db94011d3 255
sahilmgandhi 18:6a4db94011d3 256 #define I2S_FLAG_UDR SPI_SR_UDR
sahilmgandhi 18:6a4db94011d3 257 #define I2S_FLAG_OVR SPI_SR_OVR
sahilmgandhi 18:6a4db94011d3 258 #define I2S_FLAG_FRE SPI_SR_FRE
sahilmgandhi 18:6a4db94011d3 259
sahilmgandhi 18:6a4db94011d3 260 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
sahilmgandhi 18:6a4db94011d3 261 #define I2S_FLAG_BSY SPI_SR_BSY
sahilmgandhi 18:6a4db94011d3 262 /**
sahilmgandhi 18:6a4db94011d3 263 * @}
sahilmgandhi 18:6a4db94011d3 264 */
sahilmgandhi 18:6a4db94011d3 265
sahilmgandhi 18:6a4db94011d3 266 /**
sahilmgandhi 18:6a4db94011d3 267 * @}
sahilmgandhi 18:6a4db94011d3 268 */
sahilmgandhi 18:6a4db94011d3 269
sahilmgandhi 18:6a4db94011d3 270 /* Exported macro ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 271 /** @defgroup I2S_Exported_Macros I2S Exported Macros
sahilmgandhi 18:6a4db94011d3 272 * @{
sahilmgandhi 18:6a4db94011d3 273 */
sahilmgandhi 18:6a4db94011d3 274
sahilmgandhi 18:6a4db94011d3 275 /** @brief Reset I2S handle state
sahilmgandhi 18:6a4db94011d3 276 * @param __HANDLE__: specifies the I2S Handle.
sahilmgandhi 18:6a4db94011d3 277 * @retval None
sahilmgandhi 18:6a4db94011d3 278 */
sahilmgandhi 18:6a4db94011d3 279 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
sahilmgandhi 18:6a4db94011d3 280
sahilmgandhi 18:6a4db94011d3 281 /** @brief Enable or disable the specified SPI peripheral (in I2S mode).
sahilmgandhi 18:6a4db94011d3 282 * @param __HANDLE__: specifies the I2S Handle.
sahilmgandhi 18:6a4db94011d3 283 * @retval None
sahilmgandhi 18:6a4db94011d3 284 */
sahilmgandhi 18:6a4db94011d3 285 #define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE)
sahilmgandhi 18:6a4db94011d3 286 #define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &= ~SPI_I2SCFGR_I2SE)
sahilmgandhi 18:6a4db94011d3 287
sahilmgandhi 18:6a4db94011d3 288 /** @brief Enable or disable the specified I2S interrupts.
sahilmgandhi 18:6a4db94011d3 289 * @param __HANDLE__: specifies the I2S Handle.
sahilmgandhi 18:6a4db94011d3 290 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
sahilmgandhi 18:6a4db94011d3 291 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 292 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
sahilmgandhi 18:6a4db94011d3 293 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
sahilmgandhi 18:6a4db94011d3 294 * @arg I2S_IT_ERR: Error interrupt enable
sahilmgandhi 18:6a4db94011d3 295 * @retval None
sahilmgandhi 18:6a4db94011d3 296 */
sahilmgandhi 18:6a4db94011d3 297 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 298 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= ~(__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 299
sahilmgandhi 18:6a4db94011d3 300 /** @brief Checks if the specified I2S interrupt source is enabled or disabled.
sahilmgandhi 18:6a4db94011d3 301 * @param __HANDLE__: specifies the I2S Handle.
sahilmgandhi 18:6a4db94011d3 302 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
sahilmgandhi 18:6a4db94011d3 303 * @param __INTERRUPT__: specifies the I2S interrupt source to check.
sahilmgandhi 18:6a4db94011d3 304 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 305 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
sahilmgandhi 18:6a4db94011d3 306 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
sahilmgandhi 18:6a4db94011d3 307 * @arg I2S_IT_ERR: Error interrupt enable
sahilmgandhi 18:6a4db94011d3 308 * @retval The new state of __IT__ (TRUE or FALSE).
sahilmgandhi 18:6a4db94011d3 309 */
sahilmgandhi 18:6a4db94011d3 310 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
sahilmgandhi 18:6a4db94011d3 311
sahilmgandhi 18:6a4db94011d3 312 /** @brief Checks whether the specified I2S flag is set or not.
sahilmgandhi 18:6a4db94011d3 313 * @param __HANDLE__: specifies the I2S Handle.
sahilmgandhi 18:6a4db94011d3 314 * @param __FLAG__: specifies the flag to check.
sahilmgandhi 18:6a4db94011d3 315 * This parameter can be one of the following values:
sahilmgandhi 18:6a4db94011d3 316 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
sahilmgandhi 18:6a4db94011d3 317 * @arg I2S_FLAG_TXE: Transmit buffer empty flag
sahilmgandhi 18:6a4db94011d3 318 * @arg I2S_FLAG_UDR: Underrun flag
sahilmgandhi 18:6a4db94011d3 319 * @arg I2S_FLAG_OVR: Overrun flag
sahilmgandhi 18:6a4db94011d3 320 * @arg I2S_FLAG_FRE: Frame error flag
sahilmgandhi 18:6a4db94011d3 321 * @arg I2S_FLAG_CHSIDE: Channel Side flag
sahilmgandhi 18:6a4db94011d3 322 * @arg I2S_FLAG_BSY: Busy flag
sahilmgandhi 18:6a4db94011d3 323 * @retval The new state of __FLAG__ (TRUE or FALSE).
sahilmgandhi 18:6a4db94011d3 324 */
sahilmgandhi 18:6a4db94011d3 325 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
sahilmgandhi 18:6a4db94011d3 326
sahilmgandhi 18:6a4db94011d3 327 /** @brief Clears the I2S OVR pending flag.
sahilmgandhi 18:6a4db94011d3 328 * @param __HANDLE__: specifies the I2S Handle.
sahilmgandhi 18:6a4db94011d3 329 * @retval None
sahilmgandhi 18:6a4db94011d3 330 */
sahilmgandhi 18:6a4db94011d3 331 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) \
sahilmgandhi 18:6a4db94011d3 332 do{ \
sahilmgandhi 18:6a4db94011d3 333 __IO uint32_t tmpreg_ovr = 0x00U; \
sahilmgandhi 18:6a4db94011d3 334 tmpreg_ovr = (__HANDLE__)->Instance->DR; \
sahilmgandhi 18:6a4db94011d3 335 tmpreg_ovr = (__HANDLE__)->Instance->SR; \
sahilmgandhi 18:6a4db94011d3 336 UNUSED(tmpreg_ovr ); \
sahilmgandhi 18:6a4db94011d3 337 } while(0)
sahilmgandhi 18:6a4db94011d3 338
sahilmgandhi 18:6a4db94011d3 339 /** @brief Clears the I2S UDR pending flag.
sahilmgandhi 18:6a4db94011d3 340 * @param __HANDLE__: specifies the I2S Handle.
sahilmgandhi 18:6a4db94011d3 341 * @retval None
sahilmgandhi 18:6a4db94011d3 342 */
sahilmgandhi 18:6a4db94011d3 343 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) \
sahilmgandhi 18:6a4db94011d3 344 do{ \
sahilmgandhi 18:6a4db94011d3 345 __IO uint32_t tmpreg_udr = 0x00U; \
sahilmgandhi 18:6a4db94011d3 346 tmpreg_udr = (__HANDLE__)->Instance->SR; \
sahilmgandhi 18:6a4db94011d3 347 UNUSED(tmpreg_udr); \
sahilmgandhi 18:6a4db94011d3 348 } while(0)
sahilmgandhi 18:6a4db94011d3 349 /**
sahilmgandhi 18:6a4db94011d3 350 * @}
sahilmgandhi 18:6a4db94011d3 351 */
sahilmgandhi 18:6a4db94011d3 352
sahilmgandhi 18:6a4db94011d3 353 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 354 /** @addtogroup I2S_Exported_Functions
sahilmgandhi 18:6a4db94011d3 355 * @{
sahilmgandhi 18:6a4db94011d3 356 */
sahilmgandhi 18:6a4db94011d3 357
sahilmgandhi 18:6a4db94011d3 358 /** @addtogroup I2S_Exported_Functions_Group1
sahilmgandhi 18:6a4db94011d3 359 * @{
sahilmgandhi 18:6a4db94011d3 360 */
sahilmgandhi 18:6a4db94011d3 361 /* Initialization/de-initialization functions **********************************/
sahilmgandhi 18:6a4db94011d3 362 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
sahilmgandhi 18:6a4db94011d3 363 HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
sahilmgandhi 18:6a4db94011d3 364 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
sahilmgandhi 18:6a4db94011d3 365 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
sahilmgandhi 18:6a4db94011d3 366 /**
sahilmgandhi 18:6a4db94011d3 367 * @}
sahilmgandhi 18:6a4db94011d3 368 */
sahilmgandhi 18:6a4db94011d3 369
sahilmgandhi 18:6a4db94011d3 370 /** @addtogroup I2S_Exported_Functions_Group2
sahilmgandhi 18:6a4db94011d3 371 * @{
sahilmgandhi 18:6a4db94011d3 372 */
sahilmgandhi 18:6a4db94011d3 373 /* I/O operation functions *****************************************************/
sahilmgandhi 18:6a4db94011d3 374 /* Blocking mode: Polling */
sahilmgandhi 18:6a4db94011d3 375 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 376 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
sahilmgandhi 18:6a4db94011d3 377
sahilmgandhi 18:6a4db94011d3 378 /* Non-Blocking mode: Interrupt */
sahilmgandhi 18:6a4db94011d3 379 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 380 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 381 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
sahilmgandhi 18:6a4db94011d3 382
sahilmgandhi 18:6a4db94011d3 383 /* Non-Blocking mode: DMA */
sahilmgandhi 18:6a4db94011d3 384 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 385 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
sahilmgandhi 18:6a4db94011d3 386
sahilmgandhi 18:6a4db94011d3 387 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
sahilmgandhi 18:6a4db94011d3 388 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
sahilmgandhi 18:6a4db94011d3 389 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
sahilmgandhi 18:6a4db94011d3 390
sahilmgandhi 18:6a4db94011d3 391 /* Peripheral Control and State functions **************************************/
sahilmgandhi 18:6a4db94011d3 392 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
sahilmgandhi 18:6a4db94011d3 393 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
sahilmgandhi 18:6a4db94011d3 394
sahilmgandhi 18:6a4db94011d3 395 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
sahilmgandhi 18:6a4db94011d3 396 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
sahilmgandhi 18:6a4db94011d3 397 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
sahilmgandhi 18:6a4db94011d3 398 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
sahilmgandhi 18:6a4db94011d3 399 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
sahilmgandhi 18:6a4db94011d3 400 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
sahilmgandhi 18:6a4db94011d3 401 /**
sahilmgandhi 18:6a4db94011d3 402 * @}
sahilmgandhi 18:6a4db94011d3 403 */
sahilmgandhi 18:6a4db94011d3 404
sahilmgandhi 18:6a4db94011d3 405 /**
sahilmgandhi 18:6a4db94011d3 406 * @}
sahilmgandhi 18:6a4db94011d3 407 */
sahilmgandhi 18:6a4db94011d3 408
sahilmgandhi 18:6a4db94011d3 409 /* Private types -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 410 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 411 /* Private constants ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 412 /** @defgroup I2S_Private_Constants I2S Private Constants
sahilmgandhi 18:6a4db94011d3 413 * @{
sahilmgandhi 18:6a4db94011d3 414 */
sahilmgandhi 18:6a4db94011d3 415
sahilmgandhi 18:6a4db94011d3 416 /**
sahilmgandhi 18:6a4db94011d3 417 * @}
sahilmgandhi 18:6a4db94011d3 418 */
sahilmgandhi 18:6a4db94011d3 419
sahilmgandhi 18:6a4db94011d3 420 /* Private macros ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 421 /** @defgroup I2S_Private_Macros I2S Private Macros
sahilmgandhi 18:6a4db94011d3 422 * @{
sahilmgandhi 18:6a4db94011d3 423 */
sahilmgandhi 18:6a4db94011d3 424 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) || \
sahilmgandhi 18:6a4db94011d3 425 ((CLOCK) == I2S_CLOCK_PLL))
sahilmgandhi 18:6a4db94011d3 426
sahilmgandhi 18:6a4db94011d3 427 #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \
sahilmgandhi 18:6a4db94011d3 428 ((MODE) == I2S_MODE_SLAVE_RX) || \
sahilmgandhi 18:6a4db94011d3 429 ((MODE) == I2S_MODE_MASTER_TX) || \
sahilmgandhi 18:6a4db94011d3 430 ((MODE) == I2S_MODE_MASTER_RX))
sahilmgandhi 18:6a4db94011d3 431
sahilmgandhi 18:6a4db94011d3 432 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \
sahilmgandhi 18:6a4db94011d3 433 ((STANDARD) == I2S_STANDARD_MSB) || \
sahilmgandhi 18:6a4db94011d3 434 ((STANDARD) == I2S_STANDARD_LSB) || \
sahilmgandhi 18:6a4db94011d3 435 ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
sahilmgandhi 18:6a4db94011d3 436 ((STANDARD) == I2S_STANDARD_PCM_LONG))
sahilmgandhi 18:6a4db94011d3 437
sahilmgandhi 18:6a4db94011d3 438 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \
sahilmgandhi 18:6a4db94011d3 439 ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
sahilmgandhi 18:6a4db94011d3 440 ((FORMAT) == I2S_DATAFORMAT_24B) || \
sahilmgandhi 18:6a4db94011d3 441 ((FORMAT) == I2S_DATAFORMAT_32B))
sahilmgandhi 18:6a4db94011d3 442
sahilmgandhi 18:6a4db94011d3 443 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
sahilmgandhi 18:6a4db94011d3 444 ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
sahilmgandhi 18:6a4db94011d3 445
sahilmgandhi 18:6a4db94011d3 446 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \
sahilmgandhi 18:6a4db94011d3 447 ((FREQ) <= I2S_AUDIOFREQ_192K)) || \
sahilmgandhi 18:6a4db94011d3 448 ((FREQ) == I2S_AUDIOFREQ_DEFAULT))
sahilmgandhi 18:6a4db94011d3 449
sahilmgandhi 18:6a4db94011d3 450 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
sahilmgandhi 18:6a4db94011d3 451 ((CPOL) == I2S_CPOL_HIGH))
sahilmgandhi 18:6a4db94011d3 452
sahilmgandhi 18:6a4db94011d3 453 /**
sahilmgandhi 18:6a4db94011d3 454 * @}
sahilmgandhi 18:6a4db94011d3 455 */
sahilmgandhi 18:6a4db94011d3 456
sahilmgandhi 18:6a4db94011d3 457 /* Private functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 458 /** @defgroup I2S_Private_Functions I2S Private Functions
sahilmgandhi 18:6a4db94011d3 459 * @{
sahilmgandhi 18:6a4db94011d3 460 */
sahilmgandhi 18:6a4db94011d3 461 /**
sahilmgandhi 18:6a4db94011d3 462 * @}
sahilmgandhi 18:6a4db94011d3 463 */
sahilmgandhi 18:6a4db94011d3 464
sahilmgandhi 18:6a4db94011d3 465 /**
sahilmgandhi 18:6a4db94011d3 466 * @}
sahilmgandhi 18:6a4db94011d3 467 */
sahilmgandhi 18:6a4db94011d3 468
sahilmgandhi 18:6a4db94011d3 469 /**
sahilmgandhi 18:6a4db94011d3 470 * @}
sahilmgandhi 18:6a4db94011d3 471 */
sahilmgandhi 18:6a4db94011d3 472
sahilmgandhi 18:6a4db94011d3 473 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 474 }
sahilmgandhi 18:6a4db94011d3 475 #endif
sahilmgandhi 18:6a4db94011d3 476
sahilmgandhi 18:6a4db94011d3 477
sahilmgandhi 18:6a4db94011d3 478 #endif /* __STM32F2xx_HAL_I2S_H */
sahilmgandhi 18:6a4db94011d3 479
sahilmgandhi 18:6a4db94011d3 480 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/