MouseCode - Mouse code for the MacroRat

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Mouse code for the MacroRat

Dependencies: ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_i2c.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:: sahilmgandhi
Date:: Sat Jun 03 00:22:44 2017 +0000
Revision:: 46:b156ef445742
Parent:: 18:6a4db94011d3

Final code for internal battlebot competition.

Who changed what in which revision?

User	Revision	Line number	New contents of line
sahilmgandhi	18:6a4db94011d3	1	/**
sahilmgandhi	18:6a4db94011d3	2	******************************************************************************
sahilmgandhi	18:6a4db94011d3	3	* @file stm32f2xx_hal_i2c.c
sahilmgandhi	18:6a4db94011d3	4	* @author MCD Application Team
sahilmgandhi	18:6a4db94011d3	5	* @version V1.1.3
sahilmgandhi	18:6a4db94011d3	6	* @date 29-June-2016
sahilmgandhi	18:6a4db94011d3	7	* @brief I2C HAL module driver.
sahilmgandhi	18:6a4db94011d3	8	* This file provides firmware functions to manage the following
sahilmgandhi	18:6a4db94011d3	9	* functionalities of the Inter Integrated Circuit (I2C) peripheral:
sahilmgandhi	18:6a4db94011d3	10	* + Initialization and de-initialization functions
sahilmgandhi	18:6a4db94011d3	11	* + IO operation functions
sahilmgandhi	18:6a4db94011d3	12	* + Peripheral Control functions
sahilmgandhi	18:6a4db94011d3	13	* + Peripheral State, Mode and Error functions
sahilmgandhi	18:6a4db94011d3	14	*
sahilmgandhi	18:6a4db94011d3	15	@verbatim
sahilmgandhi	18:6a4db94011d3	16	==============================================================================
sahilmgandhi	18:6a4db94011d3	17	##### How to use this driver #####
sahilmgandhi	18:6a4db94011d3	18	==============================================================================
sahilmgandhi	18:6a4db94011d3	19	[..]
sahilmgandhi	18:6a4db94011d3	20	The I2C HAL driver can be used as follows:
sahilmgandhi	18:6a4db94011d3	21
sahilmgandhi	18:6a4db94011d3	22	(#) Declare a I2C_HandleTypeDef handle structure, for example:
sahilmgandhi	18:6a4db94011d3	23	I2C_HandleTypeDef hi2c;
sahilmgandhi	18:6a4db94011d3	24
sahilmgandhi	18:6a4db94011d3	25	(#)Initialize the I2C low level resources by implement the HAL_I2C_MspInit() API:
sahilmgandhi	18:6a4db94011d3	26	(##) Enable the I2Cx interface clock
sahilmgandhi	18:6a4db94011d3	27	(##) I2C pins configuration
sahilmgandhi	18:6a4db94011d3	28	(+++) Enable the clock for the I2C GPIOs
sahilmgandhi	18:6a4db94011d3	29	(+++) Configure I2C pins as alternate function open-drain
sahilmgandhi	18:6a4db94011d3	30	(##) NVIC configuration if you need to use interrupt process
sahilmgandhi	18:6a4db94011d3	31	(+++) Configure the I2Cx interrupt priority
sahilmgandhi	18:6a4db94011d3	32	(+++) Enable the NVIC I2C IRQ Channel
sahilmgandhi	18:6a4db94011d3	33	(##) DMA Configuration if you need to use DMA process
sahilmgandhi	18:6a4db94011d3	34	(+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream
sahilmgandhi	18:6a4db94011d3	35	(+++) Enable the DMAx interface clock using
sahilmgandhi	18:6a4db94011d3	36	(+++) Configure the DMA handle parameters
sahilmgandhi	18:6a4db94011d3	37	(+++) Configure the DMA Tx or Rx Stream
sahilmgandhi	18:6a4db94011d3	38	(+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
sahilmgandhi	18:6a4db94011d3	39	(+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
sahilmgandhi	18:6a4db94011d3	40	the DMA Tx or Rx Stream
sahilmgandhi	18:6a4db94011d3	41
sahilmgandhi	18:6a4db94011d3	42	(#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
sahilmgandhi	18:6a4db94011d3	43	Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
sahilmgandhi	18:6a4db94011d3	44
sahilmgandhi	18:6a4db94011d3	45	(#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
sahilmgandhi	18:6a4db94011d3	46	(GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
sahilmgandhi	18:6a4db94011d3	47
sahilmgandhi	18:6a4db94011d3	48	(#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
sahilmgandhi	18:6a4db94011d3	49
sahilmgandhi	18:6a4db94011d3	50	(#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
sahilmgandhi	18:6a4db94011d3	51
sahilmgandhi	18:6a4db94011d3	52	* Polling mode IO operation *
sahilmgandhi	18:6a4db94011d3	53	=================================
sahilmgandhi	18:6a4db94011d3	54	[..]
sahilmgandhi	18:6a4db94011d3	55	(+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
sahilmgandhi	18:6a4db94011d3	56	(+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
sahilmgandhi	18:6a4db94011d3	57	(+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
sahilmgandhi	18:6a4db94011d3	58	(+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
sahilmgandhi	18:6a4db94011d3	59
sahilmgandhi	18:6a4db94011d3	60	* Polling mode IO MEM operation *
sahilmgandhi	18:6a4db94011d3	61	=====================================
sahilmgandhi	18:6a4db94011d3	62	[..]
sahilmgandhi	18:6a4db94011d3	63	(+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
sahilmgandhi	18:6a4db94011d3	64	(+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
sahilmgandhi	18:6a4db94011d3	65
sahilmgandhi	18:6a4db94011d3	66
sahilmgandhi	18:6a4db94011d3	67	* Interrupt mode IO operation *
sahilmgandhi	18:6a4db94011d3	68	===================================
sahilmgandhi	18:6a4db94011d3	69	[..]
sahilmgandhi	18:6a4db94011d3	70	(+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	71	(+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	72	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
sahilmgandhi	18:6a4db94011d3	73	(+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT()
sahilmgandhi	18:6a4db94011d3	74	(+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	75	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
sahilmgandhi	18:6a4db94011d3	76	(+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	77	(+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	78	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
sahilmgandhi	18:6a4db94011d3	79	(+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT()
sahilmgandhi	18:6a4db94011d3	80	(+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	81	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
sahilmgandhi	18:6a4db94011d3	82	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
sahilmgandhi	18:6a4db94011d3	83	add his own code by customization of function pointer HAL_I2C_ErrorCallback
sahilmgandhi	18:6a4db94011d3	84	(+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
sahilmgandhi	18:6a4db94011d3	85	(+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	86	add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
sahilmgandhi	18:6a4db94011d3	87
sahilmgandhi	18:6a4db94011d3	88	* Interrupt mode IO sequential operation *
sahilmgandhi	18:6a4db94011d3	89	==============================================
sahilmgandhi	18:6a4db94011d3	90	[..]
sahilmgandhi	18:6a4db94011d3	91	(@) These interfaces allow to manage a sequential transfer with a repeated start condition
sahilmgandhi	18:6a4db94011d3	92	when a direction change during transfer
sahilmgandhi	18:6a4db94011d3	93	[..]
sahilmgandhi	18:6a4db94011d3	94	(+) A specific option field manage the different steps of a sequential transfer
sahilmgandhi	18:6a4db94011d3	95	(+) Option field values are defined through @ref I2C_XFEROPTIONS and are listed below:
sahilmgandhi	18:6a4db94011d3	96	(++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
sahilmgandhi	18:6a4db94011d3	97	(++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
sahilmgandhi	18:6a4db94011d3	98	and data to transfer without a final stop condition
sahilmgandhi	18:6a4db94011d3	99	(++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
sahilmgandhi	18:6a4db94011d3	100	and with new data to transfer if the direction change or manage only the new data to transfer
sahilmgandhi	18:6a4db94011d3	101	if no direction change and without a final stop condition in both cases
sahilmgandhi	18:6a4db94011d3	102	(++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address
sahilmgandhi	18:6a4db94011d3	103	and with new data to transfer if the direction change or manage only the new data to transfer
sahilmgandhi	18:6a4db94011d3	104	if no direction change and with a final stop condition in both cases
sahilmgandhi	18:6a4db94011d3	105
sahilmgandhi	18:6a4db94011d3	106	(+) Differents sequential I2C interfaces are listed below:
sahilmgandhi	18:6a4db94011d3	107	(++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	108	(+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	109	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	110	(++) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Receive_IT()
sahilmgandhi	18:6a4db94011d3	111	(+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	112	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	113	(++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
sahilmgandhi	18:6a4db94011d3	114	(+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	115	add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
sahilmgandhi	18:6a4db94011d3	116	(++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT()
sahilmgandhi	18:6a4db94011d3	117	(+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	118	add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
sahilmgandhi	18:6a4db94011d3	119	(+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	120	add his own code by customization of function pointer HAL_I2C_ListenCpltCallback()
sahilmgandhi	18:6a4db94011d3	121	(++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	122	(+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	123	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	124	(++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Receive_IT()
sahilmgandhi	18:6a4db94011d3	125	(+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	126	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	127	(++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
sahilmgandhi	18:6a4db94011d3	128	add his own code by customization of function pointer HAL_I2C_ErrorCallback()
sahilmgandhi	18:6a4db94011d3	129	(++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
sahilmgandhi	18:6a4db94011d3	130	(++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	131	add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
sahilmgandhi	18:6a4db94011d3	132
sahilmgandhi	18:6a4db94011d3	133	* Interrupt mode IO MEM operation *
sahilmgandhi	18:6a4db94011d3	134	=======================================
sahilmgandhi	18:6a4db94011d3	135	[..]
sahilmgandhi	18:6a4db94011d3	136	(+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using
sahilmgandhi	18:6a4db94011d3	137	HAL_I2C_Mem_Write_IT()
sahilmgandhi	18:6a4db94011d3	138	(+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	139	add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
sahilmgandhi	18:6a4db94011d3	140	(+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using
sahilmgandhi	18:6a4db94011d3	141	HAL_I2C_Mem_Read_IT()
sahilmgandhi	18:6a4db94011d3	142	(+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	143	add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
sahilmgandhi	18:6a4db94011d3	144	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
sahilmgandhi	18:6a4db94011d3	145	add his own code by customization of function pointer HAL_I2C_ErrorCallback
sahilmgandhi	18:6a4db94011d3	146
sahilmgandhi	18:6a4db94011d3	147	* DMA mode IO operation *
sahilmgandhi	18:6a4db94011d3	148	==============================
sahilmgandhi	18:6a4db94011d3	149	[..]
sahilmgandhi	18:6a4db94011d3	150	(+) Transmit in master mode an amount of data in non blocking mode (DMA) using
sahilmgandhi	18:6a4db94011d3	151	HAL_I2C_Master_Transmit_DMA()
sahilmgandhi	18:6a4db94011d3	152	(+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	153	add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
sahilmgandhi	18:6a4db94011d3	154	(+) Receive in master mode an amount of data in non blocking mode (DMA) using
sahilmgandhi	18:6a4db94011d3	155	HAL_I2C_Master_Receive_DMA()
sahilmgandhi	18:6a4db94011d3	156	(+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	157	add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
sahilmgandhi	18:6a4db94011d3	158	(+) Transmit in slave mode an amount of data in non blocking mode (DMA) using
sahilmgandhi	18:6a4db94011d3	159	HAL_I2C_Slave_Transmit_DMA()
sahilmgandhi	18:6a4db94011d3	160	(+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	161	add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
sahilmgandhi	18:6a4db94011d3	162	(+) Receive in slave mode an amount of data in non blocking mode (DMA) using
sahilmgandhi	18:6a4db94011d3	163	HAL_I2C_Slave_Receive_DMA()
sahilmgandhi	18:6a4db94011d3	164	(+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	165	add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
sahilmgandhi	18:6a4db94011d3	166	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
sahilmgandhi	18:6a4db94011d3	167	add his own code by customization of function pointer HAL_I2C_ErrorCallback
sahilmgandhi	18:6a4db94011d3	168	(+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
sahilmgandhi	18:6a4db94011d3	169	(+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
sahilmgandhi	18:6a4db94011d3	170	add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
sahilmgandhi	18:6a4db94011d3	171
sahilmgandhi	18:6a4db94011d3	172	* DMA mode IO MEM operation *
sahilmgandhi	18:6a4db94011d3	173	=================================
sahilmgandhi	18:6a4db94011d3	174	[..]
sahilmgandhi	18:6a4db94011d3	175	(+) Write an amount of data in no-blocking mode with DMA to a specific memory address using
sahilmgandhi	18:6a4db94011d3	176	HAL_I2C_Mem_Write_DMA()
sahilmgandhi	18:6a4db94011d3	177	(+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	178	add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
sahilmgandhi	18:6a4db94011d3	179	(+) Read an amount of data in no-blocking mode with DMA from a specific memory address using
sahilmgandhi	18:6a4db94011d3	180	HAL_I2C_Mem_Read_DMA()
sahilmgandhi	18:6a4db94011d3	181	(+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
sahilmgandhi	18:6a4db94011d3	182	add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
sahilmgandhi	18:6a4db94011d3	183	(+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
sahilmgandhi	18:6a4db94011d3	184	add his own code by customization of function pointer HAL_I2C_ErrorCallback
sahilmgandhi	18:6a4db94011d3	185
sahilmgandhi	18:6a4db94011d3	186
sahilmgandhi	18:6a4db94011d3	187	* I2C HAL driver macros list *
sahilmgandhi	18:6a4db94011d3	188	==================================
sahilmgandhi	18:6a4db94011d3	189	[..]
sahilmgandhi	18:6a4db94011d3	190	Below the list of most used macros in I2C HAL driver.
sahilmgandhi	18:6a4db94011d3	191
sahilmgandhi	18:6a4db94011d3	192	(+) __HAL_I2C_ENABLE: Enable the I2C peripheral
sahilmgandhi	18:6a4db94011d3	193	(+) __HAL_I2C_DISABLE: Disable the I2C peripheral
sahilmgandhi	18:6a4db94011d3	194	(+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not
sahilmgandhi	18:6a4db94011d3	195	(+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag
sahilmgandhi	18:6a4db94011d3	196	(+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
sahilmgandhi	18:6a4db94011d3	197	(+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
sahilmgandhi	18:6a4db94011d3	198
sahilmgandhi	18:6a4db94011d3	199	[..]
sahilmgandhi	18:6a4db94011d3	200	(@) You can refer to the I2C HAL driver header file for more useful macros
sahilmgandhi	18:6a4db94011d3	201
sahilmgandhi	18:6a4db94011d3	202
sahilmgandhi	18:6a4db94011d3	203	@endverbatim
sahilmgandhi	18:6a4db94011d3	204	******************************************************************************
sahilmgandhi	18:6a4db94011d3	205	* @attention
sahilmgandhi	18:6a4db94011d3	206	*
sahilmgandhi	18:6a4db94011d3	207	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi	18:6a4db94011d3	208	*
sahilmgandhi	18:6a4db94011d3	209	* Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi	18:6a4db94011d3	210	* are permitted provided that the following conditions are met:
sahilmgandhi	18:6a4db94011d3	211	* 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi	18:6a4db94011d3	212	* this list of conditions and the following disclaimer.
sahilmgandhi	18:6a4db94011d3	213	* 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi	18:6a4db94011d3	214	* this list of conditions and the following disclaimer in the documentation
sahilmgandhi	18:6a4db94011d3	215	* and/or other materials provided with the distribution.
sahilmgandhi	18:6a4db94011d3	216	* 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi	18:6a4db94011d3	217	* may be used to endorse or promote products derived from this software
sahilmgandhi	18:6a4db94011d3	218	* without specific prior written permission.
sahilmgandhi	18:6a4db94011d3	219	*
sahilmgandhi	18:6a4db94011d3	220	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi	18:6a4db94011d3	221	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi	18:6a4db94011d3	222	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi	18:6a4db94011d3	223	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi	18:6a4db94011d3	224	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi	18:6a4db94011d3	225	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi	18:6a4db94011d3	226	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi	18:6a4db94011d3	227	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi	18:6a4db94011d3	228	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi	18:6a4db94011d3	229	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi	18:6a4db94011d3	230	*
sahilmgandhi	18:6a4db94011d3	231	******************************************************************************
sahilmgandhi	18:6a4db94011d3	232	*/
sahilmgandhi	18:6a4db94011d3	233
sahilmgandhi	18:6a4db94011d3	234	/* Includes ------------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	235	#include "stm32f2xx_hal.h"
sahilmgandhi	18:6a4db94011d3	236
sahilmgandhi	18:6a4db94011d3	237	/** @addtogroup STM32F2xx_HAL_Driver
sahilmgandhi	18:6a4db94011d3	238	* @{
sahilmgandhi	18:6a4db94011d3	239	*/
sahilmgandhi	18:6a4db94011d3	240
sahilmgandhi	18:6a4db94011d3	241	/** @defgroup I2C I2C
sahilmgandhi	18:6a4db94011d3	242	* @brief I2C HAL module driver
sahilmgandhi	18:6a4db94011d3	243	* @{
sahilmgandhi	18:6a4db94011d3	244	*/
sahilmgandhi	18:6a4db94011d3	245
sahilmgandhi	18:6a4db94011d3	246	#ifdef HAL_I2C_MODULE_ENABLED
sahilmgandhi	18:6a4db94011d3	247
sahilmgandhi	18:6a4db94011d3	248	/* Private typedef -----------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	249	/* Private define ------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	250	/** @addtogroup I2C_Private_Define
sahilmgandhi	18:6a4db94011d3	251	* @{
sahilmgandhi	18:6a4db94011d3	252	*/
sahilmgandhi	18:6a4db94011d3	253	#define I2C_TIMEOUT_FLAG ((uint32_t)35U) /!< Timeout 35 ms /
sahilmgandhi	18:6a4db94011d3	254	#define I2C_TIMEOUT_BUSY_FLAG ((uint32_t)25U) /!< Timeout 25 ms /
sahilmgandhi	18:6a4db94011d3	255	#define I2C_NO_OPTION_FRAME ((uint32_t)0xFFFF0000U) /!< XferOptions default value /
sahilmgandhi	18:6a4db94011d3	256
sahilmgandhi	18:6a4db94011d3	257	/* Private define for @ref PreviousState usage */
sahilmgandhi	18:6a4db94011d3	258	#define I2C_STATE_MSK ((uint32_t)((HAL_I2C_STATE_BUSY_TX \| HAL_I2C_STATE_BUSY_RX) & (~(uint32_t)HAL_I2C_STATE_READY))) /!< Mask State define, keep only RX and TX bits /
sahilmgandhi	18:6a4db94011d3	259	#define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /!< Default Value /
sahilmgandhi	18:6a4db94011d3	260	#define I2C_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) \| HAL_I2C_MODE_MASTER)) /!< Master Busy TX, combinaison of State LSB and Mode enum /
sahilmgandhi	18:6a4db94011d3	261	#define I2C_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) \| HAL_I2C_MODE_MASTER)) /!< Master Busy RX, combinaison of State LSB and Mode enum /
sahilmgandhi	18:6a4db94011d3	262	#define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) \| HAL_I2C_MODE_SLAVE)) /!< Slave Busy TX, combinaison of State LSB and Mode enum /
sahilmgandhi	18:6a4db94011d3	263	#define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) \| HAL_I2C_MODE_SLAVE)) /!< Slave Busy RX, combinaison of State LSB and Mode enum /
sahilmgandhi	18:6a4db94011d3	264
sahilmgandhi	18:6a4db94011d3	265	/**
sahilmgandhi	18:6a4db94011d3	266	* @}
sahilmgandhi	18:6a4db94011d3	267	*/
sahilmgandhi	18:6a4db94011d3	268
sahilmgandhi	18:6a4db94011d3	269	/* Private macro -------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	270	/* Private variables ---------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	271	/* Private function prototypes -----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	272	/** @addtogroup I2C_Private_Functions
sahilmgandhi	18:6a4db94011d3	273	* @{
sahilmgandhi	18:6a4db94011d3	274	*/
sahilmgandhi	18:6a4db94011d3	275	/* Private functions to handle DMA transfer */
sahilmgandhi	18:6a4db94011d3	276	static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	277	static void I2C_DMAError(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	278	static void I2C_DMAAbort(DMA_HandleTypeDef *hdma);
sahilmgandhi	18:6a4db94011d3	279
sahilmgandhi	18:6a4db94011d3	280	static void I2C_ITError(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	281
sahilmgandhi	18:6a4db94011d3	282	static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	283	static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	284	static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	285	static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	286	static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	287	static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	288	static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	289	static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	290	static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	291	static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
sahilmgandhi	18:6a4db94011d3	292	static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	293
sahilmgandhi	18:6a4db94011d3	294	/* Private functions for I2C transfer IRQ handler */
sahilmgandhi	18:6a4db94011d3	295	static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	296	static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	297	static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	298	static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	299	static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	300	static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	301	static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	302
sahilmgandhi	18:6a4db94011d3	303	static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	304	static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	305	static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	306	static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	307	static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	308	static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	309	static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
sahilmgandhi	18:6a4db94011d3	310	/**
sahilmgandhi	18:6a4db94011d3	311	* @}
sahilmgandhi	18:6a4db94011d3	312	*/
sahilmgandhi	18:6a4db94011d3	313
sahilmgandhi	18:6a4db94011d3	314	/* Exported functions --------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	315	/** @defgroup I2C_Exported_Functions I2C Exported Functions
sahilmgandhi	18:6a4db94011d3	316	* @{
sahilmgandhi	18:6a4db94011d3	317	*/
sahilmgandhi	18:6a4db94011d3	318
sahilmgandhi	18:6a4db94011d3	319	/** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
sahilmgandhi	18:6a4db94011d3	320	* @brief Initialization and Configuration functions
sahilmgandhi	18:6a4db94011d3	321	*
sahilmgandhi	18:6a4db94011d3	322	@verbatim
sahilmgandhi	18:6a4db94011d3	323	===============================================================================
sahilmgandhi	18:6a4db94011d3	324	##### Initialization and de-initialization functions #####
sahilmgandhi	18:6a4db94011d3	325	===============================================================================
sahilmgandhi	18:6a4db94011d3	326	[..] This subsection provides a set of functions allowing to initialize and
sahilmgandhi	18:6a4db94011d3	327	de-initialize the I2Cx peripheral:
sahilmgandhi	18:6a4db94011d3	328
sahilmgandhi	18:6a4db94011d3	329	(+) User must Implement HAL_I2C_MspInit() function in which he configures
sahilmgandhi	18:6a4db94011d3	330	all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
sahilmgandhi	18:6a4db94011d3	331
sahilmgandhi	18:6a4db94011d3	332	(+) Call the function HAL_I2C_Init() to configure the selected device with
sahilmgandhi	18:6a4db94011d3	333	the selected configuration:
sahilmgandhi	18:6a4db94011d3	334	(++) Communication Speed
sahilmgandhi	18:6a4db94011d3	335	(++) Duty cycle
sahilmgandhi	18:6a4db94011d3	336	(++) Addressing mode
sahilmgandhi	18:6a4db94011d3	337	(++) Own Address 1
sahilmgandhi	18:6a4db94011d3	338	(++) Dual Addressing mode
sahilmgandhi	18:6a4db94011d3	339	(++) Own Address 2
sahilmgandhi	18:6a4db94011d3	340	(++) General call mode
sahilmgandhi	18:6a4db94011d3	341	(++) Nostretch mode
sahilmgandhi	18:6a4db94011d3	342
sahilmgandhi	18:6a4db94011d3	343	(+) Call the function HAL_I2C_DeInit() to restore the default configuration
sahilmgandhi	18:6a4db94011d3	344	of the selected I2Cx peripheral.
sahilmgandhi	18:6a4db94011d3	345
sahilmgandhi	18:6a4db94011d3	346	@endverbatim
sahilmgandhi	18:6a4db94011d3	347	* @{
sahilmgandhi	18:6a4db94011d3	348	*/
sahilmgandhi	18:6a4db94011d3	349
sahilmgandhi	18:6a4db94011d3	350	/**
sahilmgandhi	18:6a4db94011d3	351	* @brief Initializes the I2C according to the specified parameters
sahilmgandhi	18:6a4db94011d3	352	* in the I2C_InitTypeDef and create the associated handle.
sahilmgandhi	18:6a4db94011d3	353	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	354	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	355	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	356	*/
sahilmgandhi	18:6a4db94011d3	357	HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	358	{
sahilmgandhi	18:6a4db94011d3	359	uint32_t freqrange = 0U;
sahilmgandhi	18:6a4db94011d3	360	uint32_t pclk1 = 0U;
sahilmgandhi	18:6a4db94011d3	361
sahilmgandhi	18:6a4db94011d3	362	/* Check the I2C handle allocation */
sahilmgandhi	18:6a4db94011d3	363	if(hi2c == NULL)
sahilmgandhi	18:6a4db94011d3	364	{
sahilmgandhi	18:6a4db94011d3	365	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	366	}
sahilmgandhi	18:6a4db94011d3	367
sahilmgandhi	18:6a4db94011d3	368	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	369	assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
sahilmgandhi	18:6a4db94011d3	370	assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
sahilmgandhi	18:6a4db94011d3	371	assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
sahilmgandhi	18:6a4db94011d3	372	assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
sahilmgandhi	18:6a4db94011d3	373	assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
sahilmgandhi	18:6a4db94011d3	374	assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
sahilmgandhi	18:6a4db94011d3	375	assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
sahilmgandhi	18:6a4db94011d3	376	assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
sahilmgandhi	18:6a4db94011d3	377	assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
sahilmgandhi	18:6a4db94011d3	378
sahilmgandhi	18:6a4db94011d3	379	if(hi2c->State == HAL_I2C_STATE_RESET)
sahilmgandhi	18:6a4db94011d3	380	{
sahilmgandhi	18:6a4db94011d3	381	/* Allocate lock resource and initialize it */
sahilmgandhi	18:6a4db94011d3	382	hi2c->Lock = HAL_UNLOCKED;
sahilmgandhi	18:6a4db94011d3	383	/* Init the low level hardware : GPIO, CLOCK, NVIC */
sahilmgandhi	18:6a4db94011d3	384	HAL_I2C_MspInit(hi2c);
sahilmgandhi	18:6a4db94011d3	385	}
sahilmgandhi	18:6a4db94011d3	386
sahilmgandhi	18:6a4db94011d3	387	hi2c->State = HAL_I2C_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	388
sahilmgandhi	18:6a4db94011d3	389	/* Disable the selected I2C peripheral */
sahilmgandhi	18:6a4db94011d3	390	__HAL_I2C_DISABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	391
sahilmgandhi	18:6a4db94011d3	392	/* Get PCLK1 frequency */
sahilmgandhi	18:6a4db94011d3	393	pclk1 = HAL_RCC_GetPCLK1Freq();
sahilmgandhi	18:6a4db94011d3	394
sahilmgandhi	18:6a4db94011d3	395	/* Calculate frequency range */
sahilmgandhi	18:6a4db94011d3	396	freqrange = I2C_FREQRANGE(pclk1);
sahilmgandhi	18:6a4db94011d3	397
sahilmgandhi	18:6a4db94011d3	398	/---------------------------- I2Cx CR2 Configuration ----------------------/
sahilmgandhi	18:6a4db94011d3	399	/* Configure I2Cx: Frequency range */
sahilmgandhi	18:6a4db94011d3	400	hi2c->Instance->CR2 = freqrange;
sahilmgandhi	18:6a4db94011d3	401
sahilmgandhi	18:6a4db94011d3	402	/---------------------------- I2Cx TRISE Configuration --------------------/
sahilmgandhi	18:6a4db94011d3	403	/* Configure I2Cx: Rise Time */
sahilmgandhi	18:6a4db94011d3	404	hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
sahilmgandhi	18:6a4db94011d3	405
sahilmgandhi	18:6a4db94011d3	406	/---------------------------- I2Cx CCR Configuration ----------------------/
sahilmgandhi	18:6a4db94011d3	407	/* Configure I2Cx: Speed */
sahilmgandhi	18:6a4db94011d3	408	hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
sahilmgandhi	18:6a4db94011d3	409
sahilmgandhi	18:6a4db94011d3	410	/---------------------------- I2Cx CR1 Configuration ----------------------/
sahilmgandhi	18:6a4db94011d3	411	/* Configure I2Cx: Generalcall and NoStretch mode */
sahilmgandhi	18:6a4db94011d3	412	hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode \| hi2c->Init.NoStretchMode);
sahilmgandhi	18:6a4db94011d3	413
sahilmgandhi	18:6a4db94011d3	414	/---------------------------- I2Cx OAR1 Configuration ---------------------/
sahilmgandhi	18:6a4db94011d3	415	/* Configure I2Cx: Own Address1 and addressing mode */
sahilmgandhi	18:6a4db94011d3	416	hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode \| hi2c->Init.OwnAddress1);
sahilmgandhi	18:6a4db94011d3	417
sahilmgandhi	18:6a4db94011d3	418	/---------------------------- I2Cx OAR2 Configuration ---------------------/
sahilmgandhi	18:6a4db94011d3	419	/* Configure I2Cx: Dual mode and Own Address2 */
sahilmgandhi	18:6a4db94011d3	420	hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode \| hi2c->Init.OwnAddress2);
sahilmgandhi	18:6a4db94011d3	421
sahilmgandhi	18:6a4db94011d3	422	/* Enable the selected I2C peripheral */
sahilmgandhi	18:6a4db94011d3	423	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	424
sahilmgandhi	18:6a4db94011d3	425	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	426	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	427	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	428	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	429
sahilmgandhi	18:6a4db94011d3	430	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	431	}
sahilmgandhi	18:6a4db94011d3	432
sahilmgandhi	18:6a4db94011d3	433	/**
sahilmgandhi	18:6a4db94011d3	434	* @brief DeInitializes the I2C peripheral.
sahilmgandhi	18:6a4db94011d3	435	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	436	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	437	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	438	*/
sahilmgandhi	18:6a4db94011d3	439	HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	440	{
sahilmgandhi	18:6a4db94011d3	441	/* Check the I2C handle allocation */
sahilmgandhi	18:6a4db94011d3	442	if(hi2c == NULL)
sahilmgandhi	18:6a4db94011d3	443	{
sahilmgandhi	18:6a4db94011d3	444	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	445	}
sahilmgandhi	18:6a4db94011d3	446
sahilmgandhi	18:6a4db94011d3	447	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	448	assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
sahilmgandhi	18:6a4db94011d3	449
sahilmgandhi	18:6a4db94011d3	450	hi2c->State = HAL_I2C_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	451
sahilmgandhi	18:6a4db94011d3	452	/* Disable the I2C Peripheral Clock */
sahilmgandhi	18:6a4db94011d3	453	__HAL_I2C_DISABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	454
sahilmgandhi	18:6a4db94011d3	455	/* DeInit the low level hardware: GPIO, CLOCK, NVIC */
sahilmgandhi	18:6a4db94011d3	456	HAL_I2C_MspDeInit(hi2c);
sahilmgandhi	18:6a4db94011d3	457
sahilmgandhi	18:6a4db94011d3	458	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	459	hi2c->State = HAL_I2C_STATE_RESET;
sahilmgandhi	18:6a4db94011d3	460	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	461	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	462
sahilmgandhi	18:6a4db94011d3	463	/* Release Lock */
sahilmgandhi	18:6a4db94011d3	464	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	465
sahilmgandhi	18:6a4db94011d3	466	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	467	}
sahilmgandhi	18:6a4db94011d3	468
sahilmgandhi	18:6a4db94011d3	469	/**
sahilmgandhi	18:6a4db94011d3	470	* @brief I2C MSP Init.
sahilmgandhi	18:6a4db94011d3	471	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	472	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	473	* @retval None
sahilmgandhi	18:6a4db94011d3	474	*/
sahilmgandhi	18:6a4db94011d3	475	__weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	476	{
sahilmgandhi	18:6a4db94011d3	477	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	478	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	479	/* NOTE : This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	480	the HAL_I2C_MspInit could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	481	*/
sahilmgandhi	18:6a4db94011d3	482	}
sahilmgandhi	18:6a4db94011d3	483
sahilmgandhi	18:6a4db94011d3	484	/**
sahilmgandhi	18:6a4db94011d3	485	* @brief I2C MSP DeInit
sahilmgandhi	18:6a4db94011d3	486	* @param hi2c: pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	487	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	488	* @retval None
sahilmgandhi	18:6a4db94011d3	489	*/
sahilmgandhi	18:6a4db94011d3	490	__weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	491	{
sahilmgandhi	18:6a4db94011d3	492	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	493	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	494	/* NOTE : This function Should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	495	the HAL_I2C_MspDeInit could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	496	*/
sahilmgandhi	18:6a4db94011d3	497	}
sahilmgandhi	18:6a4db94011d3	498
sahilmgandhi	18:6a4db94011d3	499	/**
sahilmgandhi	18:6a4db94011d3	500	* @}
sahilmgandhi	18:6a4db94011d3	501	*/
sahilmgandhi	18:6a4db94011d3	502
sahilmgandhi	18:6a4db94011d3	503	/** @defgroup I2C_Exported_Functions_Group2 IO operation functions
sahilmgandhi	18:6a4db94011d3	504	* @brief Data transfers functions
sahilmgandhi	18:6a4db94011d3	505	*
sahilmgandhi	18:6a4db94011d3	506	@verbatim
sahilmgandhi	18:6a4db94011d3	507	===============================================================================
sahilmgandhi	18:6a4db94011d3	508	##### IO operation functions #####
sahilmgandhi	18:6a4db94011d3	509	===============================================================================
sahilmgandhi	18:6a4db94011d3	510	[..]
sahilmgandhi	18:6a4db94011d3	511	This subsection provides a set of functions allowing to manage the I2C data
sahilmgandhi	18:6a4db94011d3	512	transfers.
sahilmgandhi	18:6a4db94011d3	513
sahilmgandhi	18:6a4db94011d3	514	(#) There are two modes of transfer:
sahilmgandhi	18:6a4db94011d3	515	(++) Blocking mode : The communication is performed in the polling mode.
sahilmgandhi	18:6a4db94011d3	516	The status of all data processing is returned by the same function
sahilmgandhi	18:6a4db94011d3	517	after finishing transfer.
sahilmgandhi	18:6a4db94011d3	518	(++) No-Blocking mode : The communication is performed using Interrupts
sahilmgandhi	18:6a4db94011d3	519	or DMA. These functions return the status of the transfer startup.
sahilmgandhi	18:6a4db94011d3	520	The end of the data processing will be indicated through the
sahilmgandhi	18:6a4db94011d3	521	dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
sahilmgandhi	18:6a4db94011d3	522	using DMA mode.
sahilmgandhi	18:6a4db94011d3	523
sahilmgandhi	18:6a4db94011d3	524	(#) Blocking mode functions are :
sahilmgandhi	18:6a4db94011d3	525	(++) HAL_I2C_Master_Transmit()
sahilmgandhi	18:6a4db94011d3	526	(++) HAL_I2C_Master_Receive()
sahilmgandhi	18:6a4db94011d3	527	(++) HAL_I2C_Slave_Transmit()
sahilmgandhi	18:6a4db94011d3	528	(++) HAL_I2C_Slave_Receive()
sahilmgandhi	18:6a4db94011d3	529	(++) HAL_I2C_Mem_Write()
sahilmgandhi	18:6a4db94011d3	530	(++) HAL_I2C_Mem_Read()
sahilmgandhi	18:6a4db94011d3	531	(++) HAL_I2C_IsDeviceReady()
sahilmgandhi	18:6a4db94011d3	532
sahilmgandhi	18:6a4db94011d3	533	(#) No-Blocking mode functions with Interrupt are :
sahilmgandhi	18:6a4db94011d3	534	(++) HAL_I2C_Master_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	535	(++) HAL_I2C_Master_Receive_IT()
sahilmgandhi	18:6a4db94011d3	536	(++) HAL_I2C_Slave_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	537	(++) HAL_I2C_Slave_Receive_IT()
sahilmgandhi	18:6a4db94011d3	538	(++) HAL_I2C_Master_Sequential_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	539	(++) HAL_I2C_Master_Sequential_Receive_IT()
sahilmgandhi	18:6a4db94011d3	540	(++) HAL_I2C_Slave_Sequential_Transmit_IT()
sahilmgandhi	18:6a4db94011d3	541	(++) HAL_I2C_Slave_Sequential_Receive_IT()
sahilmgandhi	18:6a4db94011d3	542	(++) HAL_I2C_Mem_Write_IT()
sahilmgandhi	18:6a4db94011d3	543	(++) HAL_I2C_Mem_Read_IT()
sahilmgandhi	18:6a4db94011d3	544
sahilmgandhi	18:6a4db94011d3	545	(#) No-Blocking mode functions with DMA are :
sahilmgandhi	18:6a4db94011d3	546	(++) HAL_I2C_Master_Transmit_DMA()
sahilmgandhi	18:6a4db94011d3	547	(++) HAL_I2C_Master_Receive_DMA()
sahilmgandhi	18:6a4db94011d3	548	(++) HAL_I2C_Slave_Transmit_DMA()
sahilmgandhi	18:6a4db94011d3	549	(++) HAL_I2C_Slave_Receive_DMA()
sahilmgandhi	18:6a4db94011d3	550	(++) HAL_I2C_Mem_Write_DMA()
sahilmgandhi	18:6a4db94011d3	551	(++) HAL_I2C_Mem_Read_DMA()
sahilmgandhi	18:6a4db94011d3	552
sahilmgandhi	18:6a4db94011d3	553	(#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
sahilmgandhi	18:6a4db94011d3	554	(++) HAL_I2C_MemTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	555	(++) HAL_I2C_MemRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	556	(++) HAL_I2C_MasterTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	557	(++) HAL_I2C_MasterRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	558	(++) HAL_I2C_SlaveTxCpltCallback()
sahilmgandhi	18:6a4db94011d3	559	(++) HAL_I2C_SlaveRxCpltCallback()
sahilmgandhi	18:6a4db94011d3	560	(++) HAL_I2C_ErrorCallback()
sahilmgandhi	18:6a4db94011d3	561	(++) HAL_I2C_AbortCpltCallback()
sahilmgandhi	18:6a4db94011d3	562
sahilmgandhi	18:6a4db94011d3	563	@endverbatim
sahilmgandhi	18:6a4db94011d3	564	* @{
sahilmgandhi	18:6a4db94011d3	565	*/
sahilmgandhi	18:6a4db94011d3	566
sahilmgandhi	18:6a4db94011d3	567	/**
sahilmgandhi	18:6a4db94011d3	568	* @brief Transmits in master mode an amount of data in blocking mode.
sahilmgandhi	18:6a4db94011d3	569	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	570	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	571	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	572	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	573	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	574	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	575	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	576	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	577	*/
sahilmgandhi	18:6a4db94011d3	578	HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	579	{
sahilmgandhi	18:6a4db94011d3	580	uint32_t tickstart = 0x00U;
sahilmgandhi	18:6a4db94011d3	581
sahilmgandhi	18:6a4db94011d3	582	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	583	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	584
sahilmgandhi	18:6a4db94011d3	585	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	586	{
sahilmgandhi	18:6a4db94011d3	587	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	588	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	589	{
sahilmgandhi	18:6a4db94011d3	590	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	591	}
sahilmgandhi	18:6a4db94011d3	592
sahilmgandhi	18:6a4db94011d3	593	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	594	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	595
sahilmgandhi	18:6a4db94011d3	596	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	597	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	598	{
sahilmgandhi	18:6a4db94011d3	599	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	600	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	601	}
sahilmgandhi	18:6a4db94011d3	602
sahilmgandhi	18:6a4db94011d3	603	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	604	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	605
sahilmgandhi	18:6a4db94011d3	606	hi2c->State = HAL_I2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	607	hi2c->Mode = HAL_I2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	608	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	609
sahilmgandhi	18:6a4db94011d3	610	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	611	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	612	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	613	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	614	hi2c->XferSize = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	615
sahilmgandhi	18:6a4db94011d3	616	/* Send Slave Address */
sahilmgandhi	18:6a4db94011d3	617	if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	618	{
sahilmgandhi	18:6a4db94011d3	619	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	620	{
sahilmgandhi	18:6a4db94011d3	621	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	622	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	623	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	624	}
sahilmgandhi	18:6a4db94011d3	625	else
sahilmgandhi	18:6a4db94011d3	626	{
sahilmgandhi	18:6a4db94011d3	627	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	628	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	629	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	630	}
sahilmgandhi	18:6a4db94011d3	631	}
sahilmgandhi	18:6a4db94011d3	632
sahilmgandhi	18:6a4db94011d3	633	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	634	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	635
sahilmgandhi	18:6a4db94011d3	636	while(hi2c->XferSize > 0U)
sahilmgandhi	18:6a4db94011d3	637	{
sahilmgandhi	18:6a4db94011d3	638	/* Wait until TXE flag is set */
sahilmgandhi	18:6a4db94011d3	639	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	640	{
sahilmgandhi	18:6a4db94011d3	641	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	642	{
sahilmgandhi	18:6a4db94011d3	643	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	644	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	645	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	646	}
sahilmgandhi	18:6a4db94011d3	647	else
sahilmgandhi	18:6a4db94011d3	648	{
sahilmgandhi	18:6a4db94011d3	649	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	650	}
sahilmgandhi	18:6a4db94011d3	651	}
sahilmgandhi	18:6a4db94011d3	652
sahilmgandhi	18:6a4db94011d3	653	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	654	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
sahilmgandhi	18:6a4db94011d3	655	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	656	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	657
sahilmgandhi	18:6a4db94011d3	658	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
sahilmgandhi	18:6a4db94011d3	659	{
sahilmgandhi	18:6a4db94011d3	660	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	661	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
sahilmgandhi	18:6a4db94011d3	662	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	663	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	664	}
sahilmgandhi	18:6a4db94011d3	665
sahilmgandhi	18:6a4db94011d3	666	/* Wait until BTF flag is set */
sahilmgandhi	18:6a4db94011d3	667	if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	668	{
sahilmgandhi	18:6a4db94011d3	669	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	670	{
sahilmgandhi	18:6a4db94011d3	671	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	672	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	673	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	674	}
sahilmgandhi	18:6a4db94011d3	675	else
sahilmgandhi	18:6a4db94011d3	676	{
sahilmgandhi	18:6a4db94011d3	677	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	678	}
sahilmgandhi	18:6a4db94011d3	679	}
sahilmgandhi	18:6a4db94011d3	680	}
sahilmgandhi	18:6a4db94011d3	681
sahilmgandhi	18:6a4db94011d3	682	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	683	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	684
sahilmgandhi	18:6a4db94011d3	685	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	686	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	687
sahilmgandhi	18:6a4db94011d3	688	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	689	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	690
sahilmgandhi	18:6a4db94011d3	691	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	692	}
sahilmgandhi	18:6a4db94011d3	693	else
sahilmgandhi	18:6a4db94011d3	694	{
sahilmgandhi	18:6a4db94011d3	695	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	696	}
sahilmgandhi	18:6a4db94011d3	697	}
sahilmgandhi	18:6a4db94011d3	698
sahilmgandhi	18:6a4db94011d3	699	/**
sahilmgandhi	18:6a4db94011d3	700	* @brief Receives in master mode an amount of data in blocking mode.
sahilmgandhi	18:6a4db94011d3	701	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	702	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	703	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	704	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	705	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	706	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	707	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	708	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	709	*/
sahilmgandhi	18:6a4db94011d3	710	HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	711	{
sahilmgandhi	18:6a4db94011d3	712	uint32_t tickstart = 0x00U;
sahilmgandhi	18:6a4db94011d3	713
sahilmgandhi	18:6a4db94011d3	714	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	715	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	716
sahilmgandhi	18:6a4db94011d3	717	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	718	{
sahilmgandhi	18:6a4db94011d3	719	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	720	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	721	{
sahilmgandhi	18:6a4db94011d3	722	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	723	}
sahilmgandhi	18:6a4db94011d3	724
sahilmgandhi	18:6a4db94011d3	725	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	726	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	727
sahilmgandhi	18:6a4db94011d3	728	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	729	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	730	{
sahilmgandhi	18:6a4db94011d3	731	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	732	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	733	}
sahilmgandhi	18:6a4db94011d3	734
sahilmgandhi	18:6a4db94011d3	735	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	736	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	737
sahilmgandhi	18:6a4db94011d3	738	hi2c->State = HAL_I2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	739	hi2c->Mode = HAL_I2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	740	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	741
sahilmgandhi	18:6a4db94011d3	742	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	743	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	744	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	745	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	746	hi2c->XferSize = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	747
sahilmgandhi	18:6a4db94011d3	748	/* Send Slave Address */
sahilmgandhi	18:6a4db94011d3	749	if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	750	{
sahilmgandhi	18:6a4db94011d3	751	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	752	{
sahilmgandhi	18:6a4db94011d3	753	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	754	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	755	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	756	}
sahilmgandhi	18:6a4db94011d3	757	else
sahilmgandhi	18:6a4db94011d3	758	{
sahilmgandhi	18:6a4db94011d3	759	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	760	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	761	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	762	}
sahilmgandhi	18:6a4db94011d3	763	}
sahilmgandhi	18:6a4db94011d3	764
sahilmgandhi	18:6a4db94011d3	765	if(hi2c->XferSize == 0U)
sahilmgandhi	18:6a4db94011d3	766	{
sahilmgandhi	18:6a4db94011d3	767	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	768	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	769
sahilmgandhi	18:6a4db94011d3	770	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	771	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	772	}
sahilmgandhi	18:6a4db94011d3	773	else if(hi2c->XferSize == 1U)
sahilmgandhi	18:6a4db94011d3	774	{
sahilmgandhi	18:6a4db94011d3	775	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	776	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	777
sahilmgandhi	18:6a4db94011d3	778	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	779	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	780
sahilmgandhi	18:6a4db94011d3	781	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	782	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	783	}
sahilmgandhi	18:6a4db94011d3	784	else if(hi2c->XferSize == 2U)
sahilmgandhi	18:6a4db94011d3	785	{
sahilmgandhi	18:6a4db94011d3	786	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	787	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	788
sahilmgandhi	18:6a4db94011d3	789	/* Enable Pos */
sahilmgandhi	18:6a4db94011d3	790	hi2c->Instance->CR1 \|= I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	791
sahilmgandhi	18:6a4db94011d3	792	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	793	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	794	}
sahilmgandhi	18:6a4db94011d3	795	else
sahilmgandhi	18:6a4db94011d3	796	{
sahilmgandhi	18:6a4db94011d3	797	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	798	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	799
sahilmgandhi	18:6a4db94011d3	800	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	801	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	802	}
sahilmgandhi	18:6a4db94011d3	803
sahilmgandhi	18:6a4db94011d3	804	while(hi2c->XferSize > 0U)
sahilmgandhi	18:6a4db94011d3	805	{
sahilmgandhi	18:6a4db94011d3	806	if(hi2c->XferSize <= 3U)
sahilmgandhi	18:6a4db94011d3	807	{
sahilmgandhi	18:6a4db94011d3	808	/* One byte */
sahilmgandhi	18:6a4db94011d3	809	if(hi2c->XferSize == 1U)
sahilmgandhi	18:6a4db94011d3	810	{
sahilmgandhi	18:6a4db94011d3	811	/* Wait until RXNE flag is set */
sahilmgandhi	18:6a4db94011d3	812	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	813	{
sahilmgandhi	18:6a4db94011d3	814	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
sahilmgandhi	18:6a4db94011d3	815	{
sahilmgandhi	18:6a4db94011d3	816	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	817	}
sahilmgandhi	18:6a4db94011d3	818	else
sahilmgandhi	18:6a4db94011d3	819	{
sahilmgandhi	18:6a4db94011d3	820	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	821	}
sahilmgandhi	18:6a4db94011d3	822	}
sahilmgandhi	18:6a4db94011d3	823
sahilmgandhi	18:6a4db94011d3	824	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	825	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	826	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	827	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	828	}
sahilmgandhi	18:6a4db94011d3	829	/* Two bytes */
sahilmgandhi	18:6a4db94011d3	830	else if(hi2c->XferSize == 2U)
sahilmgandhi	18:6a4db94011d3	831	{
sahilmgandhi	18:6a4db94011d3	832	/* Wait until BTF flag is set */
sahilmgandhi	18:6a4db94011d3	833	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	834	{
sahilmgandhi	18:6a4db94011d3	835	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	836	}
sahilmgandhi	18:6a4db94011d3	837
sahilmgandhi	18:6a4db94011d3	838	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	839	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	840
sahilmgandhi	18:6a4db94011d3	841	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	842	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	843	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	844	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	845
sahilmgandhi	18:6a4db94011d3	846	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	847	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	848	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	849	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	850	}
sahilmgandhi	18:6a4db94011d3	851	/* 3 Last bytes */
sahilmgandhi	18:6a4db94011d3	852	else
sahilmgandhi	18:6a4db94011d3	853	{
sahilmgandhi	18:6a4db94011d3	854	/* Wait until BTF flag is set */
sahilmgandhi	18:6a4db94011d3	855	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	856	{
sahilmgandhi	18:6a4db94011d3	857	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	858	}
sahilmgandhi	18:6a4db94011d3	859
sahilmgandhi	18:6a4db94011d3	860	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	861	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	862
sahilmgandhi	18:6a4db94011d3	863	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	864	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	865	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	866	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	867
sahilmgandhi	18:6a4db94011d3	868	/* Wait until BTF flag is set */
sahilmgandhi	18:6a4db94011d3	869	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	870	{
sahilmgandhi	18:6a4db94011d3	871	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	872	}
sahilmgandhi	18:6a4db94011d3	873
sahilmgandhi	18:6a4db94011d3	874	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	875	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	876
sahilmgandhi	18:6a4db94011d3	877	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	878	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	879	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	880	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	881
sahilmgandhi	18:6a4db94011d3	882	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	883	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	884	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	885	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	886	}
sahilmgandhi	18:6a4db94011d3	887	}
sahilmgandhi	18:6a4db94011d3	888	else
sahilmgandhi	18:6a4db94011d3	889	{
sahilmgandhi	18:6a4db94011d3	890	/* Wait until RXNE flag is set */
sahilmgandhi	18:6a4db94011d3	891	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	892	{
sahilmgandhi	18:6a4db94011d3	893	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
sahilmgandhi	18:6a4db94011d3	894	{
sahilmgandhi	18:6a4db94011d3	895	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	896	}
sahilmgandhi	18:6a4db94011d3	897	else
sahilmgandhi	18:6a4db94011d3	898	{
sahilmgandhi	18:6a4db94011d3	899	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	900	}
sahilmgandhi	18:6a4db94011d3	901	}
sahilmgandhi	18:6a4db94011d3	902
sahilmgandhi	18:6a4db94011d3	903	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	904	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	905	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	906	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	907
sahilmgandhi	18:6a4db94011d3	908	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
sahilmgandhi	18:6a4db94011d3	909	{
sahilmgandhi	18:6a4db94011d3	910	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	911	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	912	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	913	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	914	}
sahilmgandhi	18:6a4db94011d3	915	}
sahilmgandhi	18:6a4db94011d3	916	}
sahilmgandhi	18:6a4db94011d3	917
sahilmgandhi	18:6a4db94011d3	918	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	919	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	920
sahilmgandhi	18:6a4db94011d3	921	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	922	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	923
sahilmgandhi	18:6a4db94011d3	924	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	925	}
sahilmgandhi	18:6a4db94011d3	926	else
sahilmgandhi	18:6a4db94011d3	927	{
sahilmgandhi	18:6a4db94011d3	928	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	929	}
sahilmgandhi	18:6a4db94011d3	930	}
sahilmgandhi	18:6a4db94011d3	931
sahilmgandhi	18:6a4db94011d3	932	/**
sahilmgandhi	18:6a4db94011d3	933	* @brief Transmits in slave mode an amount of data in blocking mode.
sahilmgandhi	18:6a4db94011d3	934	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	935	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	936	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	937	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	938	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	939	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	940	*/
sahilmgandhi	18:6a4db94011d3	941	HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	942	{
sahilmgandhi	18:6a4db94011d3	943	uint32_t tickstart = 0x00U;
sahilmgandhi	18:6a4db94011d3	944
sahilmgandhi	18:6a4db94011d3	945	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	946	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	947
sahilmgandhi	18:6a4db94011d3	948	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	949	{
sahilmgandhi	18:6a4db94011d3	950	if((pData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	951	{
sahilmgandhi	18:6a4db94011d3	952	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	953	}
sahilmgandhi	18:6a4db94011d3	954
sahilmgandhi	18:6a4db94011d3	955	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	956	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	957
sahilmgandhi	18:6a4db94011d3	958	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	959	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	960	{
sahilmgandhi	18:6a4db94011d3	961	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	962	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	963	}
sahilmgandhi	18:6a4db94011d3	964
sahilmgandhi	18:6a4db94011d3	965	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	966	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	967
sahilmgandhi	18:6a4db94011d3	968	hi2c->State = HAL_I2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	969	hi2c->Mode = HAL_I2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	970	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	971
sahilmgandhi	18:6a4db94011d3	972	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	973	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	974	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	975	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	976	hi2c->XferSize = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	977
sahilmgandhi	18:6a4db94011d3	978	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	979	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	980
sahilmgandhi	18:6a4db94011d3	981	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	982	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	983	{
sahilmgandhi	18:6a4db94011d3	984	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	985	}
sahilmgandhi	18:6a4db94011d3	986
sahilmgandhi	18:6a4db94011d3	987	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	988	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	989
sahilmgandhi	18:6a4db94011d3	990	/* If 10bit addressing mode is selected */
sahilmgandhi	18:6a4db94011d3	991	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
sahilmgandhi	18:6a4db94011d3	992	{
sahilmgandhi	18:6a4db94011d3	993	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	994	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	995	{
sahilmgandhi	18:6a4db94011d3	996	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	997	}
sahilmgandhi	18:6a4db94011d3	998
sahilmgandhi	18:6a4db94011d3	999	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	1000	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	1001	}
sahilmgandhi	18:6a4db94011d3	1002
sahilmgandhi	18:6a4db94011d3	1003	while(hi2c->XferSize > 0U)
sahilmgandhi	18:6a4db94011d3	1004	{
sahilmgandhi	18:6a4db94011d3	1005	/* Wait until TXE flag is set */
sahilmgandhi	18:6a4db94011d3	1006	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1007	{
sahilmgandhi	18:6a4db94011d3	1008	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1009	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1010
sahilmgandhi	18:6a4db94011d3	1011	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	1012	{
sahilmgandhi	18:6a4db94011d3	1013	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1014	}
sahilmgandhi	18:6a4db94011d3	1015	else
sahilmgandhi	18:6a4db94011d3	1016	{
sahilmgandhi	18:6a4db94011d3	1017	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1018	}
sahilmgandhi	18:6a4db94011d3	1019	}
sahilmgandhi	18:6a4db94011d3	1020
sahilmgandhi	18:6a4db94011d3	1021	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	1022	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
sahilmgandhi	18:6a4db94011d3	1023	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	1024	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	1025
sahilmgandhi	18:6a4db94011d3	1026	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
sahilmgandhi	18:6a4db94011d3	1027	{
sahilmgandhi	18:6a4db94011d3	1028	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	1029	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
sahilmgandhi	18:6a4db94011d3	1030	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	1031	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	1032	}
sahilmgandhi	18:6a4db94011d3	1033	}
sahilmgandhi	18:6a4db94011d3	1034
sahilmgandhi	18:6a4db94011d3	1035	/* Wait until AF flag is set */
sahilmgandhi	18:6a4db94011d3	1036	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1037	{
sahilmgandhi	18:6a4db94011d3	1038	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1039	}
sahilmgandhi	18:6a4db94011d3	1040
sahilmgandhi	18:6a4db94011d3	1041	/* Clear AF flag */
sahilmgandhi	18:6a4db94011d3	1042	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	1043
sahilmgandhi	18:6a4db94011d3	1044	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1045	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1046
sahilmgandhi	18:6a4db94011d3	1047	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1048	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	1049
sahilmgandhi	18:6a4db94011d3	1050	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1051	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1052
sahilmgandhi	18:6a4db94011d3	1053	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1054	}
sahilmgandhi	18:6a4db94011d3	1055	else
sahilmgandhi	18:6a4db94011d3	1056	{
sahilmgandhi	18:6a4db94011d3	1057	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1058	}
sahilmgandhi	18:6a4db94011d3	1059	}
sahilmgandhi	18:6a4db94011d3	1060
sahilmgandhi	18:6a4db94011d3	1061	/**
sahilmgandhi	18:6a4db94011d3	1062	* @brief Receive in slave mode an amount of data in blocking mode
sahilmgandhi	18:6a4db94011d3	1063	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1064	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	1065	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1066	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1067	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	1068	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1069	*/
sahilmgandhi	18:6a4db94011d3	1070	HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	1071	{
sahilmgandhi	18:6a4db94011d3	1072	uint32_t tickstart = 0x00U;
sahilmgandhi	18:6a4db94011d3	1073
sahilmgandhi	18:6a4db94011d3	1074	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	1075	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	1076
sahilmgandhi	18:6a4db94011d3	1077	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1078	{
sahilmgandhi	18:6a4db94011d3	1079	if((pData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	1080	{
sahilmgandhi	18:6a4db94011d3	1081	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1082	}
sahilmgandhi	18:6a4db94011d3	1083
sahilmgandhi	18:6a4db94011d3	1084	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1085	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1086
sahilmgandhi	18:6a4db94011d3	1087	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	1088	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	1089	{
sahilmgandhi	18:6a4db94011d3	1090	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	1091	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	1092	}
sahilmgandhi	18:6a4db94011d3	1093
sahilmgandhi	18:6a4db94011d3	1094	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	1095	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	1096
sahilmgandhi	18:6a4db94011d3	1097	hi2c->State = HAL_I2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	1098	hi2c->Mode = HAL_I2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	1099	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1100
sahilmgandhi	18:6a4db94011d3	1101	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	1102	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1103	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1104	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	1105	hi2c->XferSize = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	1106
sahilmgandhi	18:6a4db94011d3	1107	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1108	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1109
sahilmgandhi	18:6a4db94011d3	1110	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	1111	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1112	{
sahilmgandhi	18:6a4db94011d3	1113	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1114	}
sahilmgandhi	18:6a4db94011d3	1115
sahilmgandhi	18:6a4db94011d3	1116	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	1117	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	1118
sahilmgandhi	18:6a4db94011d3	1119	while(hi2c->XferSize > 0U)
sahilmgandhi	18:6a4db94011d3	1120	{
sahilmgandhi	18:6a4db94011d3	1121	/* Wait until RXNE flag is set */
sahilmgandhi	18:6a4db94011d3	1122	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1123	{
sahilmgandhi	18:6a4db94011d3	1124	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1125	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1126
sahilmgandhi	18:6a4db94011d3	1127	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
sahilmgandhi	18:6a4db94011d3	1128	{
sahilmgandhi	18:6a4db94011d3	1129	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1130	}
sahilmgandhi	18:6a4db94011d3	1131	else
sahilmgandhi	18:6a4db94011d3	1132	{
sahilmgandhi	18:6a4db94011d3	1133	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1134	}
sahilmgandhi	18:6a4db94011d3	1135	}
sahilmgandhi	18:6a4db94011d3	1136
sahilmgandhi	18:6a4db94011d3	1137	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	1138	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	1139	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	1140	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	1141
sahilmgandhi	18:6a4db94011d3	1142	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
sahilmgandhi	18:6a4db94011d3	1143	{
sahilmgandhi	18:6a4db94011d3	1144	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	1145	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	1146	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	1147	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	1148	}
sahilmgandhi	18:6a4db94011d3	1149	}
sahilmgandhi	18:6a4db94011d3	1150
sahilmgandhi	18:6a4db94011d3	1151	/* Wait until STOP flag is set */
sahilmgandhi	18:6a4db94011d3	1152	if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	1153	{
sahilmgandhi	18:6a4db94011d3	1154	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1155	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1156
sahilmgandhi	18:6a4db94011d3	1157	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	1158	{
sahilmgandhi	18:6a4db94011d3	1159	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1160	}
sahilmgandhi	18:6a4db94011d3	1161	else
sahilmgandhi	18:6a4db94011d3	1162	{
sahilmgandhi	18:6a4db94011d3	1163	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1164	}
sahilmgandhi	18:6a4db94011d3	1165	}
sahilmgandhi	18:6a4db94011d3	1166
sahilmgandhi	18:6a4db94011d3	1167	/* Clear STOP flag */
sahilmgandhi	18:6a4db94011d3	1168	__HAL_I2C_CLEAR_STOPFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	1169
sahilmgandhi	18:6a4db94011d3	1170	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1171	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1172
sahilmgandhi	18:6a4db94011d3	1173	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1174	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	1175
sahilmgandhi	18:6a4db94011d3	1176	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1177	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1178
sahilmgandhi	18:6a4db94011d3	1179	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1180	}
sahilmgandhi	18:6a4db94011d3	1181	else
sahilmgandhi	18:6a4db94011d3	1182	{
sahilmgandhi	18:6a4db94011d3	1183	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1184	}
sahilmgandhi	18:6a4db94011d3	1185	}
sahilmgandhi	18:6a4db94011d3	1186
sahilmgandhi	18:6a4db94011d3	1187	/**
sahilmgandhi	18:6a4db94011d3	1188	* @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	1189	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1190	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	1191	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	1192	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	1193	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1194	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1195	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1196	*/
sahilmgandhi	18:6a4db94011d3	1197	HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	1198	{
sahilmgandhi	18:6a4db94011d3	1199	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	1200
sahilmgandhi	18:6a4db94011d3	1201	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1202	{
sahilmgandhi	18:6a4db94011d3	1203	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	1204	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	1205	do
sahilmgandhi	18:6a4db94011d3	1206	{
sahilmgandhi	18:6a4db94011d3	1207	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	1208	{
sahilmgandhi	18:6a4db94011d3	1209	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	1210	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1211
sahilmgandhi	18:6a4db94011d3	1212	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1213	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1214
sahilmgandhi	18:6a4db94011d3	1215	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1216	}
sahilmgandhi	18:6a4db94011d3	1217	}
sahilmgandhi	18:6a4db94011d3	1218	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	1219
sahilmgandhi	18:6a4db94011d3	1220	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1221	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1222
sahilmgandhi	18:6a4db94011d3	1223	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	1224	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	1225	{
sahilmgandhi	18:6a4db94011d3	1226	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	1227	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	1228	}
sahilmgandhi	18:6a4db94011d3	1229
sahilmgandhi	18:6a4db94011d3	1230	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	1231	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	1232
sahilmgandhi	18:6a4db94011d3	1233	hi2c->State = HAL_I2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	1234	hi2c->Mode = HAL_I2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	1235	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1236
sahilmgandhi	18:6a4db94011d3	1237	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	1238	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1239	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1240	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	1241	hi2c->XferSize = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	1242	hi2c->Devaddress = DevAddress;
sahilmgandhi	18:6a4db94011d3	1243
sahilmgandhi	18:6a4db94011d3	1244	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	1245	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	1246
sahilmgandhi	18:6a4db94011d3	1247	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1248	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1249
sahilmgandhi	18:6a4db94011d3	1250	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1251	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1252	process unlock */
sahilmgandhi	18:6a4db94011d3	1253	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1254	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	1255
sahilmgandhi	18:6a4db94011d3	1256	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1257	}
sahilmgandhi	18:6a4db94011d3	1258	else
sahilmgandhi	18:6a4db94011d3	1259	{
sahilmgandhi	18:6a4db94011d3	1260	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1261	}
sahilmgandhi	18:6a4db94011d3	1262	}
sahilmgandhi	18:6a4db94011d3	1263
sahilmgandhi	18:6a4db94011d3	1264	/**
sahilmgandhi	18:6a4db94011d3	1265	* @brief Receive in master mode an amount of data in non-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	1266	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1267	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	1268	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	1269	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	1270	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1271	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1272	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1273	*/
sahilmgandhi	18:6a4db94011d3	1274	HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	1275	{
sahilmgandhi	18:6a4db94011d3	1276	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	1277
sahilmgandhi	18:6a4db94011d3	1278	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1279	{
sahilmgandhi	18:6a4db94011d3	1280	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	1281	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	1282	do
sahilmgandhi	18:6a4db94011d3	1283	{
sahilmgandhi	18:6a4db94011d3	1284	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	1285	{
sahilmgandhi	18:6a4db94011d3	1286	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	1287	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1288
sahilmgandhi	18:6a4db94011d3	1289	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1290	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1291
sahilmgandhi	18:6a4db94011d3	1292	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1293	}
sahilmgandhi	18:6a4db94011d3	1294	}
sahilmgandhi	18:6a4db94011d3	1295	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	1296
sahilmgandhi	18:6a4db94011d3	1297	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1298	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1299
sahilmgandhi	18:6a4db94011d3	1300	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	1301	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	1302	{
sahilmgandhi	18:6a4db94011d3	1303	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	1304	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	1305	}
sahilmgandhi	18:6a4db94011d3	1306
sahilmgandhi	18:6a4db94011d3	1307	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	1308	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	1309
sahilmgandhi	18:6a4db94011d3	1310	hi2c->State = HAL_I2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	1311	hi2c->Mode = HAL_I2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	1312	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1313
sahilmgandhi	18:6a4db94011d3	1314	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	1315	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1316	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1317	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	1318	hi2c->XferSize = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	1319	hi2c->Devaddress = DevAddress;
sahilmgandhi	18:6a4db94011d3	1320
sahilmgandhi	18:6a4db94011d3	1321	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	1322	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1323
sahilmgandhi	18:6a4db94011d3	1324	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	1325	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	1326
sahilmgandhi	18:6a4db94011d3	1327	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1328	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1329
sahilmgandhi	18:6a4db94011d3	1330	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1331	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1332	process unlock */
sahilmgandhi	18:6a4db94011d3	1333
sahilmgandhi	18:6a4db94011d3	1334	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1335	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	1336
sahilmgandhi	18:6a4db94011d3	1337	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1338	}
sahilmgandhi	18:6a4db94011d3	1339	else
sahilmgandhi	18:6a4db94011d3	1340	{
sahilmgandhi	18:6a4db94011d3	1341	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1342	}
sahilmgandhi	18:6a4db94011d3	1343	}
sahilmgandhi	18:6a4db94011d3	1344
sahilmgandhi	18:6a4db94011d3	1345	/**
sahilmgandhi	18:6a4db94011d3	1346	* @brief Sequential transmit in master mode an amount of data in non-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	1347	* @note This interface allow to manage repeated start condition when a direction change during transfer
sahilmgandhi	18:6a4db94011d3	1348	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1349	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	1350	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	1351	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	1352	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1353	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1354	* @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
sahilmgandhi	18:6a4db94011d3	1355	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1356	*/
sahilmgandhi	18:6a4db94011d3	1357	HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions)
sahilmgandhi	18:6a4db94011d3	1358	{
sahilmgandhi	18:6a4db94011d3	1359	__IO uint32_t Prev_State = 0x00U;
sahilmgandhi	18:6a4db94011d3	1360	__IO uint32_t count = 0x00U;
sahilmgandhi	18:6a4db94011d3	1361
sahilmgandhi	18:6a4db94011d3	1362	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	1363	assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
sahilmgandhi	18:6a4db94011d3	1364
sahilmgandhi	18:6a4db94011d3	1365	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1366	{
sahilmgandhi	18:6a4db94011d3	1367	/* Check Busy Flag only if FIRST call of Master interface */
sahilmgandhi	18:6a4db94011d3	1368	if((XferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (XferOptions == I2C_FIRST_FRAME))
sahilmgandhi	18:6a4db94011d3	1369	{
sahilmgandhi	18:6a4db94011d3	1370	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	1371	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	1372	do
sahilmgandhi	18:6a4db94011d3	1373	{
sahilmgandhi	18:6a4db94011d3	1374	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	1375	{
sahilmgandhi	18:6a4db94011d3	1376	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	1377	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1378
sahilmgandhi	18:6a4db94011d3	1379	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1380	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1381
sahilmgandhi	18:6a4db94011d3	1382	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1383	}
sahilmgandhi	18:6a4db94011d3	1384	}
sahilmgandhi	18:6a4db94011d3	1385	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	1386	}
sahilmgandhi	18:6a4db94011d3	1387
sahilmgandhi	18:6a4db94011d3	1388	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1389	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1390
sahilmgandhi	18:6a4db94011d3	1391	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	1392	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	1393	{
sahilmgandhi	18:6a4db94011d3	1394	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	1395	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	1396	}
sahilmgandhi	18:6a4db94011d3	1397
sahilmgandhi	18:6a4db94011d3	1398	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	1399	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	1400
sahilmgandhi	18:6a4db94011d3	1401	hi2c->State = HAL_I2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	1402	hi2c->Mode = HAL_I2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	1403	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1404
sahilmgandhi	18:6a4db94011d3	1405	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	1406	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1407	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1408	hi2c->XferOptions = XferOptions;
sahilmgandhi	18:6a4db94011d3	1409	hi2c->XferSize = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	1410	hi2c->Devaddress = DevAddress;
sahilmgandhi	18:6a4db94011d3	1411
sahilmgandhi	18:6a4db94011d3	1412	Prev_State = hi2c->PreviousState;
sahilmgandhi	18:6a4db94011d3	1413
sahilmgandhi	18:6a4db94011d3	1414	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	1415	if((Prev_State == I2C_STATE_MASTER_BUSY_RX) \|\| (Prev_State == I2C_STATE_NONE))
sahilmgandhi	18:6a4db94011d3	1416	{
sahilmgandhi	18:6a4db94011d3	1417	/* Generate Start condition if first transfer */
sahilmgandhi	18:6a4db94011d3	1418	if((XferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (XferOptions == I2C_FIRST_FRAME))
sahilmgandhi	18:6a4db94011d3	1419	{
sahilmgandhi	18:6a4db94011d3	1420	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	1421	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	1422	}
sahilmgandhi	18:6a4db94011d3	1423	else if(Prev_State == I2C_STATE_MASTER_BUSY_RX)
sahilmgandhi	18:6a4db94011d3	1424	{
sahilmgandhi	18:6a4db94011d3	1425	/* Generate ReStart */
sahilmgandhi	18:6a4db94011d3	1426	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	1427	}
sahilmgandhi	18:6a4db94011d3	1428	}
sahilmgandhi	18:6a4db94011d3	1429
sahilmgandhi	18:6a4db94011d3	1430	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1431	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1432
sahilmgandhi	18:6a4db94011d3	1433	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1434	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1435	process unlock */
sahilmgandhi	18:6a4db94011d3	1436
sahilmgandhi	18:6a4db94011d3	1437	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1438	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	1439
sahilmgandhi	18:6a4db94011d3	1440	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1441	}
sahilmgandhi	18:6a4db94011d3	1442	else
sahilmgandhi	18:6a4db94011d3	1443	{
sahilmgandhi	18:6a4db94011d3	1444	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1445	}
sahilmgandhi	18:6a4db94011d3	1446	}
sahilmgandhi	18:6a4db94011d3	1447
sahilmgandhi	18:6a4db94011d3	1448	/**
sahilmgandhi	18:6a4db94011d3	1449	* @brief Sequential receive in master mode an amount of data in non-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	1450	* @note This interface allow to manage repeated start condition when a direction change during transfer
sahilmgandhi	18:6a4db94011d3	1451	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1452	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	1453	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	1454	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	1455	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1456	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1457	* @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
sahilmgandhi	18:6a4db94011d3	1458	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1459	*/
sahilmgandhi	18:6a4db94011d3	1460	HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size, uint32_t XferOptions)
sahilmgandhi	18:6a4db94011d3	1461	{
sahilmgandhi	18:6a4db94011d3	1462	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	1463
sahilmgandhi	18:6a4db94011d3	1464	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	1465	assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
sahilmgandhi	18:6a4db94011d3	1466
sahilmgandhi	18:6a4db94011d3	1467	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1468	{
sahilmgandhi	18:6a4db94011d3	1469	/* Check Busy Flag only if FIRST call of Master interface */
sahilmgandhi	18:6a4db94011d3	1470	if((XferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (XferOptions == I2C_FIRST_FRAME))
sahilmgandhi	18:6a4db94011d3	1471	{
sahilmgandhi	18:6a4db94011d3	1472	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	1473	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	1474	do
sahilmgandhi	18:6a4db94011d3	1475	{
sahilmgandhi	18:6a4db94011d3	1476	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	1477	{
sahilmgandhi	18:6a4db94011d3	1478	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	1479	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1480
sahilmgandhi	18:6a4db94011d3	1481	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1482	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1483
sahilmgandhi	18:6a4db94011d3	1484	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1485	}
sahilmgandhi	18:6a4db94011d3	1486	}
sahilmgandhi	18:6a4db94011d3	1487	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	1488	}
sahilmgandhi	18:6a4db94011d3	1489
sahilmgandhi	18:6a4db94011d3	1490	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1491	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1492
sahilmgandhi	18:6a4db94011d3	1493	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	1494	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	1495	{
sahilmgandhi	18:6a4db94011d3	1496	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	1497	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	1498	}
sahilmgandhi	18:6a4db94011d3	1499
sahilmgandhi	18:6a4db94011d3	1500	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	1501	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	1502
sahilmgandhi	18:6a4db94011d3	1503	hi2c->State = HAL_I2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	1504	hi2c->Mode = HAL_I2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	1505	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1506
sahilmgandhi	18:6a4db94011d3	1507	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	1508	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1509	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1510	hi2c->XferOptions = XferOptions;
sahilmgandhi	18:6a4db94011d3	1511	hi2c->XferSize = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	1512	hi2c->Devaddress = DevAddress;
sahilmgandhi	18:6a4db94011d3	1513
sahilmgandhi	18:6a4db94011d3	1514	if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) \|\| (hi2c->PreviousState == I2C_STATE_NONE))
sahilmgandhi	18:6a4db94011d3	1515	{
sahilmgandhi	18:6a4db94011d3	1516	/* Generate Start condition if first transfer */
sahilmgandhi	18:6a4db94011d3	1517	if((XferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (XferOptions == I2C_FIRST_FRAME) \|\| (XferOptions == I2C_NO_OPTION_FRAME))
sahilmgandhi	18:6a4db94011d3	1518	{
sahilmgandhi	18:6a4db94011d3	1519	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	1520	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1521
sahilmgandhi	18:6a4db94011d3	1522	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	1523	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	1524	}
sahilmgandhi	18:6a4db94011d3	1525	else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
sahilmgandhi	18:6a4db94011d3	1526	{
sahilmgandhi	18:6a4db94011d3	1527	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	1528	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1529
sahilmgandhi	18:6a4db94011d3	1530	/* Generate ReStart */
sahilmgandhi	18:6a4db94011d3	1531	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	1532	}
sahilmgandhi	18:6a4db94011d3	1533	}
sahilmgandhi	18:6a4db94011d3	1534
sahilmgandhi	18:6a4db94011d3	1535	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1536	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1537
sahilmgandhi	18:6a4db94011d3	1538	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1539	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1540	process unlock */
sahilmgandhi	18:6a4db94011d3	1541
sahilmgandhi	18:6a4db94011d3	1542	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1543	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	1544
sahilmgandhi	18:6a4db94011d3	1545	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1546	}
sahilmgandhi	18:6a4db94011d3	1547	else
sahilmgandhi	18:6a4db94011d3	1548	{
sahilmgandhi	18:6a4db94011d3	1549	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1550	}
sahilmgandhi	18:6a4db94011d3	1551	}
sahilmgandhi	18:6a4db94011d3	1552
sahilmgandhi	18:6a4db94011d3	1553	/**
sahilmgandhi	18:6a4db94011d3	1554	* @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	1555	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1556	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	1557	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1558	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1559	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1560	*/
sahilmgandhi	18:6a4db94011d3	1561	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	1562	{
sahilmgandhi	18:6a4db94011d3	1563	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	1564
sahilmgandhi	18:6a4db94011d3	1565	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1566	{
sahilmgandhi	18:6a4db94011d3	1567	if((pData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	1568	{
sahilmgandhi	18:6a4db94011d3	1569	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1570	}
sahilmgandhi	18:6a4db94011d3	1571
sahilmgandhi	18:6a4db94011d3	1572	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	1573	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	1574	do
sahilmgandhi	18:6a4db94011d3	1575	{
sahilmgandhi	18:6a4db94011d3	1576	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	1577	{
sahilmgandhi	18:6a4db94011d3	1578	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	1579	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1580
sahilmgandhi	18:6a4db94011d3	1581	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1582	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1583
sahilmgandhi	18:6a4db94011d3	1584	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1585	}
sahilmgandhi	18:6a4db94011d3	1586	}
sahilmgandhi	18:6a4db94011d3	1587	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	1588
sahilmgandhi	18:6a4db94011d3	1589	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1590	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1591
sahilmgandhi	18:6a4db94011d3	1592	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	1593	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	1594	{
sahilmgandhi	18:6a4db94011d3	1595	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	1596	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	1597	}
sahilmgandhi	18:6a4db94011d3	1598
sahilmgandhi	18:6a4db94011d3	1599	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	1600	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	1601
sahilmgandhi	18:6a4db94011d3	1602	hi2c->State = HAL_I2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	1603	hi2c->Mode = HAL_I2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	1604	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1605
sahilmgandhi	18:6a4db94011d3	1606	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	1607	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1608	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1609	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	1610	hi2c->XferSize = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	1611
sahilmgandhi	18:6a4db94011d3	1612	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1613	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1614
sahilmgandhi	18:6a4db94011d3	1615	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1616	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1617
sahilmgandhi	18:6a4db94011d3	1618	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1619	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1620	process unlock */
sahilmgandhi	18:6a4db94011d3	1621
sahilmgandhi	18:6a4db94011d3	1622	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1623	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	1624
sahilmgandhi	18:6a4db94011d3	1625	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1626	}
sahilmgandhi	18:6a4db94011d3	1627	else
sahilmgandhi	18:6a4db94011d3	1628	{
sahilmgandhi	18:6a4db94011d3	1629	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1630	}
sahilmgandhi	18:6a4db94011d3	1631	}
sahilmgandhi	18:6a4db94011d3	1632
sahilmgandhi	18:6a4db94011d3	1633	/**
sahilmgandhi	18:6a4db94011d3	1634	* @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	1635	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1636	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	1637	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1638	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1639	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1640	*/
sahilmgandhi	18:6a4db94011d3	1641	HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	1642	{
sahilmgandhi	18:6a4db94011d3	1643	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	1644
sahilmgandhi	18:6a4db94011d3	1645	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1646	{
sahilmgandhi	18:6a4db94011d3	1647	if((pData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	1648	{
sahilmgandhi	18:6a4db94011d3	1649	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1650	}
sahilmgandhi	18:6a4db94011d3	1651
sahilmgandhi	18:6a4db94011d3	1652	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	1653	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	1654	do
sahilmgandhi	18:6a4db94011d3	1655	{
sahilmgandhi	18:6a4db94011d3	1656	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	1657	{
sahilmgandhi	18:6a4db94011d3	1658	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	1659	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1660
sahilmgandhi	18:6a4db94011d3	1661	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1662	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1663
sahilmgandhi	18:6a4db94011d3	1664	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1665	}
sahilmgandhi	18:6a4db94011d3	1666	}
sahilmgandhi	18:6a4db94011d3	1667	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	1668
sahilmgandhi	18:6a4db94011d3	1669	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1670	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1671
sahilmgandhi	18:6a4db94011d3	1672	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	1673	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	1674	{
sahilmgandhi	18:6a4db94011d3	1675	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	1676	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	1677	}
sahilmgandhi	18:6a4db94011d3	1678
sahilmgandhi	18:6a4db94011d3	1679	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	1680	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	1681
sahilmgandhi	18:6a4db94011d3	1682	hi2c->State = HAL_I2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	1683	hi2c->Mode = HAL_I2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	1684	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1685
sahilmgandhi	18:6a4db94011d3	1686	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	1687	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1688	hi2c->XferSize = Size;
sahilmgandhi	18:6a4db94011d3	1689	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1690	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	1691
sahilmgandhi	18:6a4db94011d3	1692	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1693	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1694
sahilmgandhi	18:6a4db94011d3	1695	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1696	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1697
sahilmgandhi	18:6a4db94011d3	1698	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1699	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1700	process unlock */
sahilmgandhi	18:6a4db94011d3	1701
sahilmgandhi	18:6a4db94011d3	1702	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1703	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	1704
sahilmgandhi	18:6a4db94011d3	1705	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1706	}
sahilmgandhi	18:6a4db94011d3	1707	else
sahilmgandhi	18:6a4db94011d3	1708	{
sahilmgandhi	18:6a4db94011d3	1709	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1710	}
sahilmgandhi	18:6a4db94011d3	1711	}
sahilmgandhi	18:6a4db94011d3	1712
sahilmgandhi	18:6a4db94011d3	1713	/**
sahilmgandhi	18:6a4db94011d3	1714	* @brief Sequential transmit in slave mode an amount of data in no-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	1715	* @note This interface allow to manage repeated start condition when a direction change during transfer
sahilmgandhi	18:6a4db94011d3	1716	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1717	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	1718	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1719	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1720	* @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
sahilmgandhi	18:6a4db94011d3	1721	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1722	*/
sahilmgandhi	18:6a4db94011d3	1723	HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t XferOptions)
sahilmgandhi	18:6a4db94011d3	1724	{
sahilmgandhi	18:6a4db94011d3	1725	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	1726	assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
sahilmgandhi	18:6a4db94011d3	1727
sahilmgandhi	18:6a4db94011d3	1728	if(hi2c->State == HAL_I2C_STATE_LISTEN)
sahilmgandhi	18:6a4db94011d3	1729	{
sahilmgandhi	18:6a4db94011d3	1730	if((pData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	1731	{
sahilmgandhi	18:6a4db94011d3	1732	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1733	}
sahilmgandhi	18:6a4db94011d3	1734
sahilmgandhi	18:6a4db94011d3	1735	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1736	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1737
sahilmgandhi	18:6a4db94011d3	1738	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	1739	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	1740	{
sahilmgandhi	18:6a4db94011d3	1741	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	1742	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	1743	}
sahilmgandhi	18:6a4db94011d3	1744
sahilmgandhi	18:6a4db94011d3	1745	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	1746	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	1747
sahilmgandhi	18:6a4db94011d3	1748	hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN;
sahilmgandhi	18:6a4db94011d3	1749	hi2c->Mode = HAL_I2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	1750	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1751
sahilmgandhi	18:6a4db94011d3	1752	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	1753	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1754	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1755	hi2c->XferOptions = XferOptions;
sahilmgandhi	18:6a4db94011d3	1756	hi2c->XferSize = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	1757
sahilmgandhi	18:6a4db94011d3	1758	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	1759	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	1760
sahilmgandhi	18:6a4db94011d3	1761	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1762	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1763
sahilmgandhi	18:6a4db94011d3	1764	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1765	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1766	process unlock */
sahilmgandhi	18:6a4db94011d3	1767
sahilmgandhi	18:6a4db94011d3	1768	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1769	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	1770
sahilmgandhi	18:6a4db94011d3	1771	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1772	}
sahilmgandhi	18:6a4db94011d3	1773	else
sahilmgandhi	18:6a4db94011d3	1774	{
sahilmgandhi	18:6a4db94011d3	1775	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1776	}
sahilmgandhi	18:6a4db94011d3	1777	}
sahilmgandhi	18:6a4db94011d3	1778
sahilmgandhi	18:6a4db94011d3	1779	/**
sahilmgandhi	18:6a4db94011d3	1780	* @brief Sequential receive in slave mode an amount of data in non-blocking mode with Interrupt
sahilmgandhi	18:6a4db94011d3	1781	* @note This interface allow to manage repeated start condition when a direction change during transfer
sahilmgandhi	18:6a4db94011d3	1782	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1783	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	1784	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1785	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1786	* @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
sahilmgandhi	18:6a4db94011d3	1787	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1788	*/
sahilmgandhi	18:6a4db94011d3	1789	HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size, uint32_t XferOptions)
sahilmgandhi	18:6a4db94011d3	1790	{
sahilmgandhi	18:6a4db94011d3	1791	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	1792	assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
sahilmgandhi	18:6a4db94011d3	1793
sahilmgandhi	18:6a4db94011d3	1794	if(hi2c->State == HAL_I2C_STATE_LISTEN)
sahilmgandhi	18:6a4db94011d3	1795	{
sahilmgandhi	18:6a4db94011d3	1796	if((pData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	1797	{
sahilmgandhi	18:6a4db94011d3	1798	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	1799	}
sahilmgandhi	18:6a4db94011d3	1800
sahilmgandhi	18:6a4db94011d3	1801	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1802	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1803
sahilmgandhi	18:6a4db94011d3	1804	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	1805	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	1806	{
sahilmgandhi	18:6a4db94011d3	1807	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	1808	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	1809	}
sahilmgandhi	18:6a4db94011d3	1810
sahilmgandhi	18:6a4db94011d3	1811	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	1812	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	1813
sahilmgandhi	18:6a4db94011d3	1814	hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN;
sahilmgandhi	18:6a4db94011d3	1815	hi2c->Mode = HAL_I2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	1816	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1817
sahilmgandhi	18:6a4db94011d3	1818	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	1819	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1820	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1821	hi2c->XferOptions = XferOptions;
sahilmgandhi	18:6a4db94011d3	1822	hi2c->XferSize = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	1823
sahilmgandhi	18:6a4db94011d3	1824	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	1825	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	1826
sahilmgandhi	18:6a4db94011d3	1827	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1828	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1829
sahilmgandhi	18:6a4db94011d3	1830	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1831	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1832	process unlock */
sahilmgandhi	18:6a4db94011d3	1833
sahilmgandhi	18:6a4db94011d3	1834	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1835	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	1836
sahilmgandhi	18:6a4db94011d3	1837	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1838	}
sahilmgandhi	18:6a4db94011d3	1839	else
sahilmgandhi	18:6a4db94011d3	1840	{
sahilmgandhi	18:6a4db94011d3	1841	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1842	}
sahilmgandhi	18:6a4db94011d3	1843	}
sahilmgandhi	18:6a4db94011d3	1844
sahilmgandhi	18:6a4db94011d3	1845	/**
sahilmgandhi	18:6a4db94011d3	1846	* @brief Enable the Address listen mode with Interrupt.
sahilmgandhi	18:6a4db94011d3	1847	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1848	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	1849	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1850	*/
sahilmgandhi	18:6a4db94011d3	1851	HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	1852	{
sahilmgandhi	18:6a4db94011d3	1853	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1854	{
sahilmgandhi	18:6a4db94011d3	1855	hi2c->State = HAL_I2C_STATE_LISTEN;
sahilmgandhi	18:6a4db94011d3	1856
sahilmgandhi	18:6a4db94011d3	1857	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	1858	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	1859	{
sahilmgandhi	18:6a4db94011d3	1860	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	1861	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	1862	}
sahilmgandhi	18:6a4db94011d3	1863
sahilmgandhi	18:6a4db94011d3	1864	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1865	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1866
sahilmgandhi	18:6a4db94011d3	1867	/* Enable EVT and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1868	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	1869
sahilmgandhi	18:6a4db94011d3	1870	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1871	}
sahilmgandhi	18:6a4db94011d3	1872	else
sahilmgandhi	18:6a4db94011d3	1873	{
sahilmgandhi	18:6a4db94011d3	1874	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1875	}
sahilmgandhi	18:6a4db94011d3	1876	}
sahilmgandhi	18:6a4db94011d3	1877
sahilmgandhi	18:6a4db94011d3	1878	/**
sahilmgandhi	18:6a4db94011d3	1879	* @brief Disable the Address listen mode with Interrupt.
sahilmgandhi	18:6a4db94011d3	1880	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1881	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	1882	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1883	*/
sahilmgandhi	18:6a4db94011d3	1884	HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	1885	{
sahilmgandhi	18:6a4db94011d3	1886	/* Declaration of tmp to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	1887	uint32_t tmp;
sahilmgandhi	18:6a4db94011d3	1888
sahilmgandhi	18:6a4db94011d3	1889	/* Disable Address listen mode only if a transfer is not ongoing */
sahilmgandhi	18:6a4db94011d3	1890	if(hi2c->State == HAL_I2C_STATE_LISTEN)
sahilmgandhi	18:6a4db94011d3	1891	{
sahilmgandhi	18:6a4db94011d3	1892	tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
sahilmgandhi	18:6a4db94011d3	1893	hi2c->PreviousState = tmp \| (uint32_t)(hi2c->Mode);
sahilmgandhi	18:6a4db94011d3	1894	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1895	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	1896
sahilmgandhi	18:6a4db94011d3	1897	/* Disable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	1898	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1899
sahilmgandhi	18:6a4db94011d3	1900	/* Disable EVT and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1901	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	1902
sahilmgandhi	18:6a4db94011d3	1903	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	1904	}
sahilmgandhi	18:6a4db94011d3	1905	else
sahilmgandhi	18:6a4db94011d3	1906	{
sahilmgandhi	18:6a4db94011d3	1907	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	1908	}
sahilmgandhi	18:6a4db94011d3	1909	}
sahilmgandhi	18:6a4db94011d3	1910
sahilmgandhi	18:6a4db94011d3	1911	/**
sahilmgandhi	18:6a4db94011d3	1912	* @brief Transmit in master mode an amount of data in non-blocking mode with DMA
sahilmgandhi	18:6a4db94011d3	1913	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	1914	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	1915	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	1916	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	1917	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	1918	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	1919	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	1920	*/
sahilmgandhi	18:6a4db94011d3	1921	HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	1922	{
sahilmgandhi	18:6a4db94011d3	1923	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	1924
sahilmgandhi	18:6a4db94011d3	1925	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	1926	{
sahilmgandhi	18:6a4db94011d3	1927	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	1928	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	1929	do
sahilmgandhi	18:6a4db94011d3	1930	{
sahilmgandhi	18:6a4db94011d3	1931	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	1932	{
sahilmgandhi	18:6a4db94011d3	1933	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	1934	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	1935
sahilmgandhi	18:6a4db94011d3	1936	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1937	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1938
sahilmgandhi	18:6a4db94011d3	1939	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	1940	}
sahilmgandhi	18:6a4db94011d3	1941	}
sahilmgandhi	18:6a4db94011d3	1942	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	1943
sahilmgandhi	18:6a4db94011d3	1944	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	1945	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1946
sahilmgandhi	18:6a4db94011d3	1947	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	1948	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	1949	{
sahilmgandhi	18:6a4db94011d3	1950	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	1951	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	1952	}
sahilmgandhi	18:6a4db94011d3	1953
sahilmgandhi	18:6a4db94011d3	1954	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	1955	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	1956
sahilmgandhi	18:6a4db94011d3	1957	hi2c->State = HAL_I2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	1958	hi2c->Mode = HAL_I2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	1959	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	1960
sahilmgandhi	18:6a4db94011d3	1961	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	1962	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	1963	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	1964	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	1965	hi2c->XferSize = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	1966	hi2c->Devaddress = DevAddress;
sahilmgandhi	18:6a4db94011d3	1967
sahilmgandhi	18:6a4db94011d3	1968	if(hi2c->XferSize > 0U)
sahilmgandhi	18:6a4db94011d3	1969	{
sahilmgandhi	18:6a4db94011d3	1970	/* Set the I2C DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	1971	hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
sahilmgandhi	18:6a4db94011d3	1972
sahilmgandhi	18:6a4db94011d3	1973	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	1974	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
sahilmgandhi	18:6a4db94011d3	1975
sahilmgandhi	18:6a4db94011d3	1976	/* Set the unused DMA callbacks to NULL */
sahilmgandhi	18:6a4db94011d3	1977	hi2c->hdmatx->XferHalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	1978	hi2c->hdmatx->XferM1CpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	1979	hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	1980	hi2c->hdmatx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	1981
sahilmgandhi	18:6a4db94011d3	1982	/* Enable the DMA Stream */
sahilmgandhi	18:6a4db94011d3	1983	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
sahilmgandhi	18:6a4db94011d3	1984
sahilmgandhi	18:6a4db94011d3	1985	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	1986	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	1987
sahilmgandhi	18:6a4db94011d3	1988	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	1989	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	1990
sahilmgandhi	18:6a4db94011d3	1991	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	1992	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	1993
sahilmgandhi	18:6a4db94011d3	1994	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	1995	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	1996	process unlock */
sahilmgandhi	18:6a4db94011d3	1997
sahilmgandhi	18:6a4db94011d3	1998	/* Enable EVT and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	1999	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	2000
sahilmgandhi	18:6a4db94011d3	2001	/* Enable DMA Request */
sahilmgandhi	18:6a4db94011d3	2002	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
sahilmgandhi	18:6a4db94011d3	2003	}
sahilmgandhi	18:6a4db94011d3	2004	else
sahilmgandhi	18:6a4db94011d3	2005	{
sahilmgandhi	18:6a4db94011d3	2006	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	2007	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	2008
sahilmgandhi	18:6a4db94011d3	2009	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	2010	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	2011
sahilmgandhi	18:6a4db94011d3	2012	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2013	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2014
sahilmgandhi	18:6a4db94011d3	2015	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	2016	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	2017	process unlock */
sahilmgandhi	18:6a4db94011d3	2018
sahilmgandhi	18:6a4db94011d3	2019	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	2020	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	2021	}
sahilmgandhi	18:6a4db94011d3	2022
sahilmgandhi	18:6a4db94011d3	2023	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2024	}
sahilmgandhi	18:6a4db94011d3	2025	else
sahilmgandhi	18:6a4db94011d3	2026	{
sahilmgandhi	18:6a4db94011d3	2027	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2028	}
sahilmgandhi	18:6a4db94011d3	2029	}
sahilmgandhi	18:6a4db94011d3	2030
sahilmgandhi	18:6a4db94011d3	2031	/**
sahilmgandhi	18:6a4db94011d3	2032	* @brief Receive in master mode an amount of data in non-blocking mode with DMA
sahilmgandhi	18:6a4db94011d3	2033	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2034	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	2035	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	2036	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	2037	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2038	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	2039	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2040	*/
sahilmgandhi	18:6a4db94011d3	2041	HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	2042	{
sahilmgandhi	18:6a4db94011d3	2043	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	2044
sahilmgandhi	18:6a4db94011d3	2045	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2046	{
sahilmgandhi	18:6a4db94011d3	2047	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	2048	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	2049	do
sahilmgandhi	18:6a4db94011d3	2050	{
sahilmgandhi	18:6a4db94011d3	2051	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	2052	{
sahilmgandhi	18:6a4db94011d3	2053	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	2054	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2055
sahilmgandhi	18:6a4db94011d3	2056	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2057	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2058
sahilmgandhi	18:6a4db94011d3	2059	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2060	}
sahilmgandhi	18:6a4db94011d3	2061	}
sahilmgandhi	18:6a4db94011d3	2062	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	2063
sahilmgandhi	18:6a4db94011d3	2064	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2065	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2066
sahilmgandhi	18:6a4db94011d3	2067	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	2068	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	2069	{
sahilmgandhi	18:6a4db94011d3	2070	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	2071	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	2072	}
sahilmgandhi	18:6a4db94011d3	2073
sahilmgandhi	18:6a4db94011d3	2074	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	2075	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	2076
sahilmgandhi	18:6a4db94011d3	2077	hi2c->State = HAL_I2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	2078	hi2c->Mode = HAL_I2C_MODE_MASTER;
sahilmgandhi	18:6a4db94011d3	2079	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2080
sahilmgandhi	18:6a4db94011d3	2081	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	2082	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	2083	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	2084	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	2085	hi2c->XferSize = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	2086	hi2c->Devaddress = DevAddress;
sahilmgandhi	18:6a4db94011d3	2087
sahilmgandhi	18:6a4db94011d3	2088	if(hi2c->XferSize > 0U)
sahilmgandhi	18:6a4db94011d3	2089	{
sahilmgandhi	18:6a4db94011d3	2090	/* Set the I2C DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	2091	hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
sahilmgandhi	18:6a4db94011d3	2092
sahilmgandhi	18:6a4db94011d3	2093	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	2094	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
sahilmgandhi	18:6a4db94011d3	2095
sahilmgandhi	18:6a4db94011d3	2096	/* Set the unused DMA callbacks to NULL */
sahilmgandhi	18:6a4db94011d3	2097	hi2c->hdmarx->XferHalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2098	hi2c->hdmarx->XferM1CpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2099	hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2100	hi2c->hdmarx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2101
sahilmgandhi	18:6a4db94011d3	2102	/* Enable the DMA Stream */
sahilmgandhi	18:6a4db94011d3	2103	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
sahilmgandhi	18:6a4db94011d3	2104
sahilmgandhi	18:6a4db94011d3	2105	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	2106	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	2107
sahilmgandhi	18:6a4db94011d3	2108	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	2109	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	2110
sahilmgandhi	18:6a4db94011d3	2111	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2112	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2113
sahilmgandhi	18:6a4db94011d3	2114	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	2115	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	2116	process unlock */
sahilmgandhi	18:6a4db94011d3	2117
sahilmgandhi	18:6a4db94011d3	2118	/* Enable EVT and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	2119	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	2120
sahilmgandhi	18:6a4db94011d3	2121	/* Enable DMA Request */
sahilmgandhi	18:6a4db94011d3	2122	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
sahilmgandhi	18:6a4db94011d3	2123	}
sahilmgandhi	18:6a4db94011d3	2124	else
sahilmgandhi	18:6a4db94011d3	2125	{
sahilmgandhi	18:6a4db94011d3	2126	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	2127	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	2128
sahilmgandhi	18:6a4db94011d3	2129	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	2130	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	2131
sahilmgandhi	18:6a4db94011d3	2132	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2133	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2134
sahilmgandhi	18:6a4db94011d3	2135	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	2136	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	2137	process unlock */
sahilmgandhi	18:6a4db94011d3	2138
sahilmgandhi	18:6a4db94011d3	2139	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	2140	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	2141	}
sahilmgandhi	18:6a4db94011d3	2142
sahilmgandhi	18:6a4db94011d3	2143	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2144	}
sahilmgandhi	18:6a4db94011d3	2145	else
sahilmgandhi	18:6a4db94011d3	2146	{
sahilmgandhi	18:6a4db94011d3	2147	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2148	}
sahilmgandhi	18:6a4db94011d3	2149	}
sahilmgandhi	18:6a4db94011d3	2150
sahilmgandhi	18:6a4db94011d3	2151	/**
sahilmgandhi	18:6a4db94011d3	2152	* @brief Abort a master I2C process communication with Interrupt.
sahilmgandhi	18:6a4db94011d3	2153	* @note This abort can be called only if state is ready
sahilmgandhi	18:6a4db94011d3	2154	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2155	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	2156	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	2157	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	2158	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2159	*/
sahilmgandhi	18:6a4db94011d3	2160	HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
sahilmgandhi	18:6a4db94011d3	2161	{
sahilmgandhi	18:6a4db94011d3	2162	/* Abort Master transfer during Receive or Transmit process */
sahilmgandhi	18:6a4db94011d3	2163	if(hi2c->Mode == HAL_I2C_MODE_MASTER)
sahilmgandhi	18:6a4db94011d3	2164	{
sahilmgandhi	18:6a4db94011d3	2165	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2166	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2167
sahilmgandhi	18:6a4db94011d3	2168	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	2169	hi2c->State = HAL_I2C_STATE_ABORT;
sahilmgandhi	18:6a4db94011d3	2170
sahilmgandhi	18:6a4db94011d3	2171	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	2172	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	2173
sahilmgandhi	18:6a4db94011d3	2174	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	2175	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	2176
sahilmgandhi	18:6a4db94011d3	2177	hi2c->XferCount = 0U;
sahilmgandhi	18:6a4db94011d3	2178
sahilmgandhi	18:6a4db94011d3	2179	/* Disable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	2180	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	2181
sahilmgandhi	18:6a4db94011d3	2182	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2183	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2184
sahilmgandhi	18:6a4db94011d3	2185	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	2186	I2C_ITError(hi2c);
sahilmgandhi	18:6a4db94011d3	2187
sahilmgandhi	18:6a4db94011d3	2188	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2189	}
sahilmgandhi	18:6a4db94011d3	2190	else
sahilmgandhi	18:6a4db94011d3	2191	{
sahilmgandhi	18:6a4db94011d3	2192	/* Wrong usage of abort function */
sahilmgandhi	18:6a4db94011d3	2193	/* This function should be used only in case of abort monitored by master device */
sahilmgandhi	18:6a4db94011d3	2194	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2195	}
sahilmgandhi	18:6a4db94011d3	2196	}
sahilmgandhi	18:6a4db94011d3	2197
sahilmgandhi	18:6a4db94011d3	2198	/**
sahilmgandhi	18:6a4db94011d3	2199	* @brief Transmit in slave mode an amount of data in non-blocking mode with DMA
sahilmgandhi	18:6a4db94011d3	2200	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2201	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	2202	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2203	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	2204	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2205	*/
sahilmgandhi	18:6a4db94011d3	2206	HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	2207	{
sahilmgandhi	18:6a4db94011d3	2208	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	2209
sahilmgandhi	18:6a4db94011d3	2210	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2211	{
sahilmgandhi	18:6a4db94011d3	2212	if((pData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	2213	{
sahilmgandhi	18:6a4db94011d3	2214	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2215	}
sahilmgandhi	18:6a4db94011d3	2216
sahilmgandhi	18:6a4db94011d3	2217	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	2218	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	2219	do
sahilmgandhi	18:6a4db94011d3	2220	{
sahilmgandhi	18:6a4db94011d3	2221	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	2222	{
sahilmgandhi	18:6a4db94011d3	2223	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	2224	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2225
sahilmgandhi	18:6a4db94011d3	2226	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2227	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2228
sahilmgandhi	18:6a4db94011d3	2229	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2230	}
sahilmgandhi	18:6a4db94011d3	2231	}
sahilmgandhi	18:6a4db94011d3	2232	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	2233
sahilmgandhi	18:6a4db94011d3	2234	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2235	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2236
sahilmgandhi	18:6a4db94011d3	2237	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	2238	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	2239	{
sahilmgandhi	18:6a4db94011d3	2240	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	2241	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	2242	}
sahilmgandhi	18:6a4db94011d3	2243
sahilmgandhi	18:6a4db94011d3	2244	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	2245	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	2246
sahilmgandhi	18:6a4db94011d3	2247	hi2c->State = HAL_I2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	2248	hi2c->Mode = HAL_I2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	2249	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2250
sahilmgandhi	18:6a4db94011d3	2251	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	2252	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	2253	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	2254	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	2255	hi2c->XferSize = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	2256
sahilmgandhi	18:6a4db94011d3	2257	/* Set the I2C DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	2258	hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
sahilmgandhi	18:6a4db94011d3	2259
sahilmgandhi	18:6a4db94011d3	2260	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	2261	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
sahilmgandhi	18:6a4db94011d3	2262
sahilmgandhi	18:6a4db94011d3	2263	/* Set the unused DMA callbacks to NULL */
sahilmgandhi	18:6a4db94011d3	2264	hi2c->hdmatx->XferHalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2265	hi2c->hdmatx->XferM1CpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2266	hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2267	hi2c->hdmatx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2268
sahilmgandhi	18:6a4db94011d3	2269	/* Enable the DMA Stream */
sahilmgandhi	18:6a4db94011d3	2270	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
sahilmgandhi	18:6a4db94011d3	2271
sahilmgandhi	18:6a4db94011d3	2272	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	2273	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	2274
sahilmgandhi	18:6a4db94011d3	2275	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2276	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2277
sahilmgandhi	18:6a4db94011d3	2278	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	2279	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	2280	process unlock */
sahilmgandhi	18:6a4db94011d3	2281	/* Enable EVT and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	2282	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	2283
sahilmgandhi	18:6a4db94011d3	2284	/* Enable DMA Request */
sahilmgandhi	18:6a4db94011d3	2285	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
sahilmgandhi	18:6a4db94011d3	2286
sahilmgandhi	18:6a4db94011d3	2287	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2288	}
sahilmgandhi	18:6a4db94011d3	2289	else
sahilmgandhi	18:6a4db94011d3	2290	{
sahilmgandhi	18:6a4db94011d3	2291	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2292	}
sahilmgandhi	18:6a4db94011d3	2293	}
sahilmgandhi	18:6a4db94011d3	2294
sahilmgandhi	18:6a4db94011d3	2295	/**
sahilmgandhi	18:6a4db94011d3	2296	* @brief Receive in slave mode an amount of data in non-blocking mode with DMA
sahilmgandhi	18:6a4db94011d3	2297	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2298	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	2299	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2300	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	2301	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2302	*/
sahilmgandhi	18:6a4db94011d3	2303	HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef hi2c, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	2304	{
sahilmgandhi	18:6a4db94011d3	2305	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	2306
sahilmgandhi	18:6a4db94011d3	2307	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2308	{
sahilmgandhi	18:6a4db94011d3	2309	if((pData == NULL) \|\| (Size == 0U))
sahilmgandhi	18:6a4db94011d3	2310	{
sahilmgandhi	18:6a4db94011d3	2311	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2312	}
sahilmgandhi	18:6a4db94011d3	2313
sahilmgandhi	18:6a4db94011d3	2314	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	2315	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	2316	do
sahilmgandhi	18:6a4db94011d3	2317	{
sahilmgandhi	18:6a4db94011d3	2318	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	2319	{
sahilmgandhi	18:6a4db94011d3	2320	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	2321	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2322
sahilmgandhi	18:6a4db94011d3	2323	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2324	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2325
sahilmgandhi	18:6a4db94011d3	2326	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2327	}
sahilmgandhi	18:6a4db94011d3	2328	}
sahilmgandhi	18:6a4db94011d3	2329	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	2330
sahilmgandhi	18:6a4db94011d3	2331	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2332	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2333
sahilmgandhi	18:6a4db94011d3	2334	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	2335	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	2336	{
sahilmgandhi	18:6a4db94011d3	2337	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	2338	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	2339	}
sahilmgandhi	18:6a4db94011d3	2340
sahilmgandhi	18:6a4db94011d3	2341	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	2342	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	2343
sahilmgandhi	18:6a4db94011d3	2344	hi2c->State = HAL_I2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	2345	hi2c->Mode = HAL_I2C_MODE_SLAVE;
sahilmgandhi	18:6a4db94011d3	2346	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2347
sahilmgandhi	18:6a4db94011d3	2348	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	2349	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	2350	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	2351	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	2352	hi2c->XferSize = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	2353
sahilmgandhi	18:6a4db94011d3	2354	/* Set the I2C DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	2355	hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
sahilmgandhi	18:6a4db94011d3	2356
sahilmgandhi	18:6a4db94011d3	2357	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	2358	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
sahilmgandhi	18:6a4db94011d3	2359
sahilmgandhi	18:6a4db94011d3	2360	/* Set the unused DMA callbacks to NULL */
sahilmgandhi	18:6a4db94011d3	2361	hi2c->hdmarx->XferHalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2362	hi2c->hdmarx->XferM1CpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2363	hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2364	hi2c->hdmarx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	2365
sahilmgandhi	18:6a4db94011d3	2366	/* Enable the DMA Stream */
sahilmgandhi	18:6a4db94011d3	2367	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
sahilmgandhi	18:6a4db94011d3	2368
sahilmgandhi	18:6a4db94011d3	2369	/* Enable Address Acknowledge */
sahilmgandhi	18:6a4db94011d3	2370	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	2371
sahilmgandhi	18:6a4db94011d3	2372	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2373	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2374
sahilmgandhi	18:6a4db94011d3	2375	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	2376	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	2377	process unlock */
sahilmgandhi	18:6a4db94011d3	2378	/* Enable EVT and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	2379	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	2380
sahilmgandhi	18:6a4db94011d3	2381	/* Enable DMA Request */
sahilmgandhi	18:6a4db94011d3	2382	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
sahilmgandhi	18:6a4db94011d3	2383
sahilmgandhi	18:6a4db94011d3	2384	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2385	}
sahilmgandhi	18:6a4db94011d3	2386	else
sahilmgandhi	18:6a4db94011d3	2387	{
sahilmgandhi	18:6a4db94011d3	2388	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2389	}
sahilmgandhi	18:6a4db94011d3	2390	}
sahilmgandhi	18:6a4db94011d3	2391	/**
sahilmgandhi	18:6a4db94011d3	2392	* @brief Write an amount of data in blocking mode to a specific memory address
sahilmgandhi	18:6a4db94011d3	2393	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2394	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	2395	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	2396	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	2397	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	2398	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2399	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	2400	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	2401	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2402	*/
sahilmgandhi	18:6a4db94011d3	2403	HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	2404	{
sahilmgandhi	18:6a4db94011d3	2405	uint32_t tickstart = 0x00U;
sahilmgandhi	18:6a4db94011d3	2406
sahilmgandhi	18:6a4db94011d3	2407	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	2408	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	2409
sahilmgandhi	18:6a4db94011d3	2410	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	2411	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
sahilmgandhi	18:6a4db94011d3	2412
sahilmgandhi	18:6a4db94011d3	2413	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2414	{
sahilmgandhi	18:6a4db94011d3	2415	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	2416	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2417	{
sahilmgandhi	18:6a4db94011d3	2418	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2419	}
sahilmgandhi	18:6a4db94011d3	2420
sahilmgandhi	18:6a4db94011d3	2421	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2422	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2423
sahilmgandhi	18:6a4db94011d3	2424	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	2425	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	2426	{
sahilmgandhi	18:6a4db94011d3	2427	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	2428	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	2429	}
sahilmgandhi	18:6a4db94011d3	2430
sahilmgandhi	18:6a4db94011d3	2431	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	2432	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	2433
sahilmgandhi	18:6a4db94011d3	2434	hi2c->State = HAL_I2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	2435	hi2c->Mode = HAL_I2C_MODE_MEM;
sahilmgandhi	18:6a4db94011d3	2436	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2437
sahilmgandhi	18:6a4db94011d3	2438	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	2439	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	2440	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	2441	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	2442	hi2c->XferSize = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	2443
sahilmgandhi	18:6a4db94011d3	2444	/* Send Slave Address and Memory Address */
sahilmgandhi	18:6a4db94011d3	2445	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2446	{
sahilmgandhi	18:6a4db94011d3	2447	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	2448	{
sahilmgandhi	18:6a4db94011d3	2449	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2450	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2451	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2452	}
sahilmgandhi	18:6a4db94011d3	2453	else
sahilmgandhi	18:6a4db94011d3	2454	{
sahilmgandhi	18:6a4db94011d3	2455	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2456	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2457	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2458	}
sahilmgandhi	18:6a4db94011d3	2459	}
sahilmgandhi	18:6a4db94011d3	2460
sahilmgandhi	18:6a4db94011d3	2461	while(hi2c->XferSize > 0U)
sahilmgandhi	18:6a4db94011d3	2462	{
sahilmgandhi	18:6a4db94011d3	2463	/* Wait until TXE flag is set */
sahilmgandhi	18:6a4db94011d3	2464	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2465	{
sahilmgandhi	18:6a4db94011d3	2466	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	2467	{
sahilmgandhi	18:6a4db94011d3	2468	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	2469	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	2470	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2471	}
sahilmgandhi	18:6a4db94011d3	2472	else
sahilmgandhi	18:6a4db94011d3	2473	{
sahilmgandhi	18:6a4db94011d3	2474	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2475	}
sahilmgandhi	18:6a4db94011d3	2476	}
sahilmgandhi	18:6a4db94011d3	2477
sahilmgandhi	18:6a4db94011d3	2478	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	2479	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
sahilmgandhi	18:6a4db94011d3	2480	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	2481	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	2482
sahilmgandhi	18:6a4db94011d3	2483	if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
sahilmgandhi	18:6a4db94011d3	2484	{
sahilmgandhi	18:6a4db94011d3	2485	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	2486	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
sahilmgandhi	18:6a4db94011d3	2487	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	2488	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	2489	}
sahilmgandhi	18:6a4db94011d3	2490	}
sahilmgandhi	18:6a4db94011d3	2491
sahilmgandhi	18:6a4db94011d3	2492	/* Wait until BTF flag is set */
sahilmgandhi	18:6a4db94011d3	2493	if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2494	{
sahilmgandhi	18:6a4db94011d3	2495	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	2496	{
sahilmgandhi	18:6a4db94011d3	2497	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	2498	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	2499	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2500	}
sahilmgandhi	18:6a4db94011d3	2501	else
sahilmgandhi	18:6a4db94011d3	2502	{
sahilmgandhi	18:6a4db94011d3	2503	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2504	}
sahilmgandhi	18:6a4db94011d3	2505	}
sahilmgandhi	18:6a4db94011d3	2506
sahilmgandhi	18:6a4db94011d3	2507	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	2508	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	2509
sahilmgandhi	18:6a4db94011d3	2510	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2511	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	2512
sahilmgandhi	18:6a4db94011d3	2513	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2514	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2515
sahilmgandhi	18:6a4db94011d3	2516	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2517	}
sahilmgandhi	18:6a4db94011d3	2518	else
sahilmgandhi	18:6a4db94011d3	2519	{
sahilmgandhi	18:6a4db94011d3	2520	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2521	}
sahilmgandhi	18:6a4db94011d3	2522	}
sahilmgandhi	18:6a4db94011d3	2523
sahilmgandhi	18:6a4db94011d3	2524	/**
sahilmgandhi	18:6a4db94011d3	2525	* @brief Read an amount of data in blocking mode from a specific memory address
sahilmgandhi	18:6a4db94011d3	2526	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2527	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	2528	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	2529	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	2530	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	2531	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2532	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	2533	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	2534	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2535	*/
sahilmgandhi	18:6a4db94011d3	2536	HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	2537	{
sahilmgandhi	18:6a4db94011d3	2538	uint32_t tickstart = 0x00U;
sahilmgandhi	18:6a4db94011d3	2539
sahilmgandhi	18:6a4db94011d3	2540	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	2541	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	2542
sahilmgandhi	18:6a4db94011d3	2543	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	2544	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
sahilmgandhi	18:6a4db94011d3	2545
sahilmgandhi	18:6a4db94011d3	2546	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2547	{
sahilmgandhi	18:6a4db94011d3	2548	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	2549	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2550	{
sahilmgandhi	18:6a4db94011d3	2551	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2552	}
sahilmgandhi	18:6a4db94011d3	2553
sahilmgandhi	18:6a4db94011d3	2554	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2555	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2556
sahilmgandhi	18:6a4db94011d3	2557	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	2558	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	2559	{
sahilmgandhi	18:6a4db94011d3	2560	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	2561	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	2562	}
sahilmgandhi	18:6a4db94011d3	2563
sahilmgandhi	18:6a4db94011d3	2564	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	2565	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	2566
sahilmgandhi	18:6a4db94011d3	2567	hi2c->State = HAL_I2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	2568	hi2c->Mode = HAL_I2C_MODE_MEM;
sahilmgandhi	18:6a4db94011d3	2569	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2570
sahilmgandhi	18:6a4db94011d3	2571	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	2572	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	2573	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	2574	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	2575	hi2c->XferSize = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	2576
sahilmgandhi	18:6a4db94011d3	2577	/* Send Slave Address and Memory Address */
sahilmgandhi	18:6a4db94011d3	2578	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2579	{
sahilmgandhi	18:6a4db94011d3	2580	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	2581	{
sahilmgandhi	18:6a4db94011d3	2582	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2583	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2584	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2585	}
sahilmgandhi	18:6a4db94011d3	2586	else
sahilmgandhi	18:6a4db94011d3	2587	{
sahilmgandhi	18:6a4db94011d3	2588	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2589	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2590	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2591	}
sahilmgandhi	18:6a4db94011d3	2592	}
sahilmgandhi	18:6a4db94011d3	2593
sahilmgandhi	18:6a4db94011d3	2594	if(hi2c->XferSize == 0U)
sahilmgandhi	18:6a4db94011d3	2595	{
sahilmgandhi	18:6a4db94011d3	2596	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	2597	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	2598
sahilmgandhi	18:6a4db94011d3	2599	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	2600	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	2601	}
sahilmgandhi	18:6a4db94011d3	2602	else if(hi2c->XferSize == 1U)
sahilmgandhi	18:6a4db94011d3	2603	{
sahilmgandhi	18:6a4db94011d3	2604	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	2605	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	2606
sahilmgandhi	18:6a4db94011d3	2607	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	2608	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	2609
sahilmgandhi	18:6a4db94011d3	2610	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	2611	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	2612	}
sahilmgandhi	18:6a4db94011d3	2613	else if(hi2c->XferSize == 2U)
sahilmgandhi	18:6a4db94011d3	2614	{
sahilmgandhi	18:6a4db94011d3	2615	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	2616	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	2617
sahilmgandhi	18:6a4db94011d3	2618	/* Enable Pos */
sahilmgandhi	18:6a4db94011d3	2619	hi2c->Instance->CR1 \|= I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	2620
sahilmgandhi	18:6a4db94011d3	2621	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	2622	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	2623	}
sahilmgandhi	18:6a4db94011d3	2624	else
sahilmgandhi	18:6a4db94011d3	2625	{
sahilmgandhi	18:6a4db94011d3	2626	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	2627	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	2628	}
sahilmgandhi	18:6a4db94011d3	2629
sahilmgandhi	18:6a4db94011d3	2630	while(hi2c->XferSize > 0U)
sahilmgandhi	18:6a4db94011d3	2631	{
sahilmgandhi	18:6a4db94011d3	2632	if(hi2c->XferSize <= 3U)
sahilmgandhi	18:6a4db94011d3	2633	{
sahilmgandhi	18:6a4db94011d3	2634	/* One byte */
sahilmgandhi	18:6a4db94011d3	2635	if(hi2c->XferSize== 1U)
sahilmgandhi	18:6a4db94011d3	2636	{
sahilmgandhi	18:6a4db94011d3	2637	/* Wait until RXNE flag is set */
sahilmgandhi	18:6a4db94011d3	2638	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2639	{
sahilmgandhi	18:6a4db94011d3	2640	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
sahilmgandhi	18:6a4db94011d3	2641	{
sahilmgandhi	18:6a4db94011d3	2642	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2643	}
sahilmgandhi	18:6a4db94011d3	2644	else
sahilmgandhi	18:6a4db94011d3	2645	{
sahilmgandhi	18:6a4db94011d3	2646	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2647	}
sahilmgandhi	18:6a4db94011d3	2648	}
sahilmgandhi	18:6a4db94011d3	2649
sahilmgandhi	18:6a4db94011d3	2650	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	2651	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	2652	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	2653	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	2654	}
sahilmgandhi	18:6a4db94011d3	2655	/* Two bytes */
sahilmgandhi	18:6a4db94011d3	2656	else if(Size == 2U)
sahilmgandhi	18:6a4db94011d3	2657	{
sahilmgandhi	18:6a4db94011d3	2658	/* Wait until BTF flag is set */
sahilmgandhi	18:6a4db94011d3	2659	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2660	{
sahilmgandhi	18:6a4db94011d3	2661	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2662	}
sahilmgandhi	18:6a4db94011d3	2663
sahilmgandhi	18:6a4db94011d3	2664	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	2665	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	2666
sahilmgandhi	18:6a4db94011d3	2667	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	2668	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	2669	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	2670	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	2671
sahilmgandhi	18:6a4db94011d3	2672	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	2673	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	2674	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	2675	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	2676	}
sahilmgandhi	18:6a4db94011d3	2677	/* 3 Last bytes */
sahilmgandhi	18:6a4db94011d3	2678	else
sahilmgandhi	18:6a4db94011d3	2679	{
sahilmgandhi	18:6a4db94011d3	2680	/* Wait until BTF flag is set */
sahilmgandhi	18:6a4db94011d3	2681	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2682	{
sahilmgandhi	18:6a4db94011d3	2683	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2684	}
sahilmgandhi	18:6a4db94011d3	2685
sahilmgandhi	18:6a4db94011d3	2686	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	2687	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	2688
sahilmgandhi	18:6a4db94011d3	2689	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	2690	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	2691	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	2692	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	2693
sahilmgandhi	18:6a4db94011d3	2694	/* Wait until BTF flag is set */
sahilmgandhi	18:6a4db94011d3	2695	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2696	{
sahilmgandhi	18:6a4db94011d3	2697	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2698	}
sahilmgandhi	18:6a4db94011d3	2699
sahilmgandhi	18:6a4db94011d3	2700	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	2701	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	2702
sahilmgandhi	18:6a4db94011d3	2703	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	2704	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	2705	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	2706	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	2707
sahilmgandhi	18:6a4db94011d3	2708	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	2709	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	2710	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	2711	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	2712	}
sahilmgandhi	18:6a4db94011d3	2713	}
sahilmgandhi	18:6a4db94011d3	2714	else
sahilmgandhi	18:6a4db94011d3	2715	{
sahilmgandhi	18:6a4db94011d3	2716	/* Wait until RXNE flag is set */
sahilmgandhi	18:6a4db94011d3	2717	if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	2718	{
sahilmgandhi	18:6a4db94011d3	2719	if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
sahilmgandhi	18:6a4db94011d3	2720	{
sahilmgandhi	18:6a4db94011d3	2721	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2722	}
sahilmgandhi	18:6a4db94011d3	2723	else
sahilmgandhi	18:6a4db94011d3	2724	{
sahilmgandhi	18:6a4db94011d3	2725	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	2726	}
sahilmgandhi	18:6a4db94011d3	2727	}
sahilmgandhi	18:6a4db94011d3	2728
sahilmgandhi	18:6a4db94011d3	2729	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	2730	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	2731	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	2732	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	2733
sahilmgandhi	18:6a4db94011d3	2734	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
sahilmgandhi	18:6a4db94011d3	2735	{
sahilmgandhi	18:6a4db94011d3	2736	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	2737	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	2738	hi2c->XferSize--;
sahilmgandhi	18:6a4db94011d3	2739	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	2740	}
sahilmgandhi	18:6a4db94011d3	2741	}
sahilmgandhi	18:6a4db94011d3	2742	}
sahilmgandhi	18:6a4db94011d3	2743
sahilmgandhi	18:6a4db94011d3	2744	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2745	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	2746
sahilmgandhi	18:6a4db94011d3	2747	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2748	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2749
sahilmgandhi	18:6a4db94011d3	2750	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2751	}
sahilmgandhi	18:6a4db94011d3	2752	else
sahilmgandhi	18:6a4db94011d3	2753	{
sahilmgandhi	18:6a4db94011d3	2754	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2755	}
sahilmgandhi	18:6a4db94011d3	2756	}
sahilmgandhi	18:6a4db94011d3	2757
sahilmgandhi	18:6a4db94011d3	2758	/**
sahilmgandhi	18:6a4db94011d3	2759	* @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address
sahilmgandhi	18:6a4db94011d3	2760	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2761	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	2762	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	2763	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	2764	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	2765	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2766	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	2767	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2768	*/
sahilmgandhi	18:6a4db94011d3	2769	HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	2770	{
sahilmgandhi	18:6a4db94011d3	2771	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	2772
sahilmgandhi	18:6a4db94011d3	2773	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	2774	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
sahilmgandhi	18:6a4db94011d3	2775
sahilmgandhi	18:6a4db94011d3	2776	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2777	{
sahilmgandhi	18:6a4db94011d3	2778	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	2779	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	2780	do
sahilmgandhi	18:6a4db94011d3	2781	{
sahilmgandhi	18:6a4db94011d3	2782	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	2783	{
sahilmgandhi	18:6a4db94011d3	2784	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	2785	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2786
sahilmgandhi	18:6a4db94011d3	2787	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2788	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2789
sahilmgandhi	18:6a4db94011d3	2790	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2791	}
sahilmgandhi	18:6a4db94011d3	2792	}
sahilmgandhi	18:6a4db94011d3	2793	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	2794
sahilmgandhi	18:6a4db94011d3	2795	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2796	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2797
sahilmgandhi	18:6a4db94011d3	2798	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	2799	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	2800	{
sahilmgandhi	18:6a4db94011d3	2801	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	2802	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	2803	}
sahilmgandhi	18:6a4db94011d3	2804
sahilmgandhi	18:6a4db94011d3	2805	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	2806	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	2807
sahilmgandhi	18:6a4db94011d3	2808	hi2c->State = HAL_I2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	2809	hi2c->Mode = HAL_I2C_MODE_MEM;
sahilmgandhi	18:6a4db94011d3	2810	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2811
sahilmgandhi	18:6a4db94011d3	2812	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	2813	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	2814	hi2c->XferSize = Size;
sahilmgandhi	18:6a4db94011d3	2815	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	2816	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	2817	hi2c->Devaddress = DevAddress;
sahilmgandhi	18:6a4db94011d3	2818	hi2c->Memaddress = MemAddress;
sahilmgandhi	18:6a4db94011d3	2819	hi2c->MemaddSize = MemAddSize;
sahilmgandhi	18:6a4db94011d3	2820	hi2c->EventCount = 0U;
sahilmgandhi	18:6a4db94011d3	2821
sahilmgandhi	18:6a4db94011d3	2822	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	2823	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	2824
sahilmgandhi	18:6a4db94011d3	2825	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2826	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2827
sahilmgandhi	18:6a4db94011d3	2828	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	2829	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	2830	process unlock */
sahilmgandhi	18:6a4db94011d3	2831
sahilmgandhi	18:6a4db94011d3	2832	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	2833	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	2834
sahilmgandhi	18:6a4db94011d3	2835	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2836	}
sahilmgandhi	18:6a4db94011d3	2837	else
sahilmgandhi	18:6a4db94011d3	2838	{
sahilmgandhi	18:6a4db94011d3	2839	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2840	}
sahilmgandhi	18:6a4db94011d3	2841	}
sahilmgandhi	18:6a4db94011d3	2842
sahilmgandhi	18:6a4db94011d3	2843	/**
sahilmgandhi	18:6a4db94011d3	2844	* @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address
sahilmgandhi	18:6a4db94011d3	2845	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2846	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	2847	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	2848	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	2849	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	2850	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2851	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	2852	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2853	*/
sahilmgandhi	18:6a4db94011d3	2854	HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	2855	{
sahilmgandhi	18:6a4db94011d3	2856	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	2857
sahilmgandhi	18:6a4db94011d3	2858	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	2859	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
sahilmgandhi	18:6a4db94011d3	2860
sahilmgandhi	18:6a4db94011d3	2861	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2862	{
sahilmgandhi	18:6a4db94011d3	2863	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	2864	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	2865	do
sahilmgandhi	18:6a4db94011d3	2866	{
sahilmgandhi	18:6a4db94011d3	2867	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	2868	{
sahilmgandhi	18:6a4db94011d3	2869	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	2870	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2871
sahilmgandhi	18:6a4db94011d3	2872	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2873	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2874
sahilmgandhi	18:6a4db94011d3	2875	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2876	}
sahilmgandhi	18:6a4db94011d3	2877	}
sahilmgandhi	18:6a4db94011d3	2878	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	2879
sahilmgandhi	18:6a4db94011d3	2880	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2881	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2882
sahilmgandhi	18:6a4db94011d3	2883	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	2884	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	2885	{
sahilmgandhi	18:6a4db94011d3	2886	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	2887	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	2888	}
sahilmgandhi	18:6a4db94011d3	2889
sahilmgandhi	18:6a4db94011d3	2890	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	2891	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	2892
sahilmgandhi	18:6a4db94011d3	2893	hi2c->State = HAL_I2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	2894	hi2c->Mode = HAL_I2C_MODE_MEM;
sahilmgandhi	18:6a4db94011d3	2895	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2896
sahilmgandhi	18:6a4db94011d3	2897	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	2898	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	2899	hi2c->XferSize = Size;
sahilmgandhi	18:6a4db94011d3	2900	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	2901	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	2902	hi2c->Devaddress = DevAddress;
sahilmgandhi	18:6a4db94011d3	2903	hi2c->Memaddress = MemAddress;
sahilmgandhi	18:6a4db94011d3	2904	hi2c->MemaddSize = MemAddSize;
sahilmgandhi	18:6a4db94011d3	2905	hi2c->EventCount = 0U;
sahilmgandhi	18:6a4db94011d3	2906
sahilmgandhi	18:6a4db94011d3	2907	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	2908	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	2909
sahilmgandhi	18:6a4db94011d3	2910	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	2911	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	2912
sahilmgandhi	18:6a4db94011d3	2913	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2914	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2915
sahilmgandhi	18:6a4db94011d3	2916	if(hi2c->XferSize > 0U)
sahilmgandhi	18:6a4db94011d3	2917	{
sahilmgandhi	18:6a4db94011d3	2918	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	2919	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	2920	process unlock */
sahilmgandhi	18:6a4db94011d3	2921
sahilmgandhi	18:6a4db94011d3	2922	/* Enable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	2923	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	2924	}
sahilmgandhi	18:6a4db94011d3	2925	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	2926	}
sahilmgandhi	18:6a4db94011d3	2927	else
sahilmgandhi	18:6a4db94011d3	2928	{
sahilmgandhi	18:6a4db94011d3	2929	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	2930	}
sahilmgandhi	18:6a4db94011d3	2931	}
sahilmgandhi	18:6a4db94011d3	2932
sahilmgandhi	18:6a4db94011d3	2933	/**
sahilmgandhi	18:6a4db94011d3	2934	* @brief Write an amount of data in non-blocking mode with DMA to a specific memory address
sahilmgandhi	18:6a4db94011d3	2935	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	2936	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	2937	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	2938	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	2939	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	2940	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	2941	* @param Size Amount of data to be sent
sahilmgandhi	18:6a4db94011d3	2942	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	2943	*/
sahilmgandhi	18:6a4db94011d3	2944	HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	2945	{
sahilmgandhi	18:6a4db94011d3	2946	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	2947
sahilmgandhi	18:6a4db94011d3	2948	uint32_t tickstart = 0x00U;
sahilmgandhi	18:6a4db94011d3	2949
sahilmgandhi	18:6a4db94011d3	2950	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	2951	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	2952
sahilmgandhi	18:6a4db94011d3	2953	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	2954	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
sahilmgandhi	18:6a4db94011d3	2955
sahilmgandhi	18:6a4db94011d3	2956	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	2957	{
sahilmgandhi	18:6a4db94011d3	2958	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	2959	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	2960	do
sahilmgandhi	18:6a4db94011d3	2961	{
sahilmgandhi	18:6a4db94011d3	2962	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	2963	{
sahilmgandhi	18:6a4db94011d3	2964	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	2965	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	2966
sahilmgandhi	18:6a4db94011d3	2967	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	2968	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2969
sahilmgandhi	18:6a4db94011d3	2970	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	2971	}
sahilmgandhi	18:6a4db94011d3	2972	}
sahilmgandhi	18:6a4db94011d3	2973	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	2974
sahilmgandhi	18:6a4db94011d3	2975	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	2976	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	2977
sahilmgandhi	18:6a4db94011d3	2978	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	2979	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	2980	{
sahilmgandhi	18:6a4db94011d3	2981	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	2982	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	2983	}
sahilmgandhi	18:6a4db94011d3	2984
sahilmgandhi	18:6a4db94011d3	2985	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	2986	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	2987
sahilmgandhi	18:6a4db94011d3	2988	hi2c->State = HAL_I2C_STATE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	2989	hi2c->Mode = HAL_I2C_MODE_MEM;
sahilmgandhi	18:6a4db94011d3	2990	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	2991
sahilmgandhi	18:6a4db94011d3	2992	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	2993	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	2994	hi2c->XferSize = Size;
sahilmgandhi	18:6a4db94011d3	2995	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	2996	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	2997
sahilmgandhi	18:6a4db94011d3	2998	if(hi2c->XferSize > 0U)
sahilmgandhi	18:6a4db94011d3	2999	{
sahilmgandhi	18:6a4db94011d3	3000	/* Set the I2C DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	3001	hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
sahilmgandhi	18:6a4db94011d3	3002
sahilmgandhi	18:6a4db94011d3	3003	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	3004	hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
sahilmgandhi	18:6a4db94011d3	3005
sahilmgandhi	18:6a4db94011d3	3006	/* Set the unused DMA callbacks to NULL */
sahilmgandhi	18:6a4db94011d3	3007	hi2c->hdmatx->XferHalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	3008	hi2c->hdmatx->XferM1CpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	3009	hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	3010	hi2c->hdmatx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	3011
sahilmgandhi	18:6a4db94011d3	3012	/* Enable the DMA Stream */
sahilmgandhi	18:6a4db94011d3	3013	HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
sahilmgandhi	18:6a4db94011d3	3014
sahilmgandhi	18:6a4db94011d3	3015	/* Send Slave Address and Memory Address */
sahilmgandhi	18:6a4db94011d3	3016	if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	3017	{
sahilmgandhi	18:6a4db94011d3	3018	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	3019	{
sahilmgandhi	18:6a4db94011d3	3020	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3021	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3022	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	3023	}
sahilmgandhi	18:6a4db94011d3	3024	else
sahilmgandhi	18:6a4db94011d3	3025	{
sahilmgandhi	18:6a4db94011d3	3026	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3027	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3028	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	3029	}
sahilmgandhi	18:6a4db94011d3	3030	}
sahilmgandhi	18:6a4db94011d3	3031
sahilmgandhi	18:6a4db94011d3	3032	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	3033	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	3034
sahilmgandhi	18:6a4db94011d3	3035	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3036	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3037
sahilmgandhi	18:6a4db94011d3	3038	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	3039	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	3040	process unlock */
sahilmgandhi	18:6a4db94011d3	3041	/* Enable ERR interrupt */
sahilmgandhi	18:6a4db94011d3	3042	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	3043
sahilmgandhi	18:6a4db94011d3	3044	/* Enable DMA Request */
sahilmgandhi	18:6a4db94011d3	3045	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
sahilmgandhi	18:6a4db94011d3	3046	}
sahilmgandhi	18:6a4db94011d3	3047	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	3048	}
sahilmgandhi	18:6a4db94011d3	3049	else
sahilmgandhi	18:6a4db94011d3	3050	{
sahilmgandhi	18:6a4db94011d3	3051	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	3052	}
sahilmgandhi	18:6a4db94011d3	3053	}
sahilmgandhi	18:6a4db94011d3	3054
sahilmgandhi	18:6a4db94011d3	3055	/**
sahilmgandhi	18:6a4db94011d3	3056	* @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address.
sahilmgandhi	18:6a4db94011d3	3057	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3058	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	3059	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	3060	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	3061	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	3062	* @param pData Pointer to data buffer
sahilmgandhi	18:6a4db94011d3	3063	* @param Size Amount of data to be read
sahilmgandhi	18:6a4db94011d3	3064	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	3065	*/
sahilmgandhi	18:6a4db94011d3	3066	HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t pData, uint16_t Size)
sahilmgandhi	18:6a4db94011d3	3067	{
sahilmgandhi	18:6a4db94011d3	3068	uint32_t tickstart = 0x00U;
sahilmgandhi	18:6a4db94011d3	3069
sahilmgandhi	18:6a4db94011d3	3070	/* Init tickstart for timeout management*/
sahilmgandhi	18:6a4db94011d3	3071	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	3072
sahilmgandhi	18:6a4db94011d3	3073	__IO uint32_t count = 0U;
sahilmgandhi	18:6a4db94011d3	3074
sahilmgandhi	18:6a4db94011d3	3075	/* Check the parameters */
sahilmgandhi	18:6a4db94011d3	3076	assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
sahilmgandhi	18:6a4db94011d3	3077
sahilmgandhi	18:6a4db94011d3	3078	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	3079	{
sahilmgandhi	18:6a4db94011d3	3080	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	3081	count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
sahilmgandhi	18:6a4db94011d3	3082	do
sahilmgandhi	18:6a4db94011d3	3083	{
sahilmgandhi	18:6a4db94011d3	3084	if(count-- == 0U)
sahilmgandhi	18:6a4db94011d3	3085	{
sahilmgandhi	18:6a4db94011d3	3086	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	3087	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3088
sahilmgandhi	18:6a4db94011d3	3089	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3090	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3091
sahilmgandhi	18:6a4db94011d3	3092	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	3093	}
sahilmgandhi	18:6a4db94011d3	3094	}
sahilmgandhi	18:6a4db94011d3	3095	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
sahilmgandhi	18:6a4db94011d3	3096
sahilmgandhi	18:6a4db94011d3	3097	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	3098	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3099
sahilmgandhi	18:6a4db94011d3	3100	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	3101	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	3102	{
sahilmgandhi	18:6a4db94011d3	3103	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	3104	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	3105	}
sahilmgandhi	18:6a4db94011d3	3106
sahilmgandhi	18:6a4db94011d3	3107	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	3108	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	3109
sahilmgandhi	18:6a4db94011d3	3110	hi2c->State = HAL_I2C_STATE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	3111	hi2c->Mode = HAL_I2C_MODE_MEM;
sahilmgandhi	18:6a4db94011d3	3112	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	3113
sahilmgandhi	18:6a4db94011d3	3114	/* Prepare transfer parameters */
sahilmgandhi	18:6a4db94011d3	3115	hi2c->pBuffPtr = pData;
sahilmgandhi	18:6a4db94011d3	3116	hi2c->XferCount = Size;
sahilmgandhi	18:6a4db94011d3	3117	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	3118	hi2c->XferSize = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	3119
sahilmgandhi	18:6a4db94011d3	3120	if(hi2c->XferSize > 0U)
sahilmgandhi	18:6a4db94011d3	3121	{
sahilmgandhi	18:6a4db94011d3	3122	/* Set the I2C DMA transfer complete callback */
sahilmgandhi	18:6a4db94011d3	3123	hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
sahilmgandhi	18:6a4db94011d3	3124
sahilmgandhi	18:6a4db94011d3	3125	/* Set the DMA error callback */
sahilmgandhi	18:6a4db94011d3	3126	hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
sahilmgandhi	18:6a4db94011d3	3127
sahilmgandhi	18:6a4db94011d3	3128	/* Set the unused DMA callbacks to NULL */
sahilmgandhi	18:6a4db94011d3	3129	hi2c->hdmarx->XferHalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	3130	hi2c->hdmarx->XferM1CpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	3131	hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
sahilmgandhi	18:6a4db94011d3	3132	hi2c->hdmarx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	3133
sahilmgandhi	18:6a4db94011d3	3134	/* Enable the DMA Stream */
sahilmgandhi	18:6a4db94011d3	3135	HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
sahilmgandhi	18:6a4db94011d3	3136
sahilmgandhi	18:6a4db94011d3	3137	/* Send Slave Address and Memory Address */
sahilmgandhi	18:6a4db94011d3	3138	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	3139	{
sahilmgandhi	18:6a4db94011d3	3140	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	3141	{
sahilmgandhi	18:6a4db94011d3	3142	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3143	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3144	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	3145	}
sahilmgandhi	18:6a4db94011d3	3146	else
sahilmgandhi	18:6a4db94011d3	3147	{
sahilmgandhi	18:6a4db94011d3	3148	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3149	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3150	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	3151	}
sahilmgandhi	18:6a4db94011d3	3152	}
sahilmgandhi	18:6a4db94011d3	3153
sahilmgandhi	18:6a4db94011d3	3154	if(Size == 1U)
sahilmgandhi	18:6a4db94011d3	3155	{
sahilmgandhi	18:6a4db94011d3	3156	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	3157	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	3158	}
sahilmgandhi	18:6a4db94011d3	3159	else
sahilmgandhi	18:6a4db94011d3	3160	{
sahilmgandhi	18:6a4db94011d3	3161	/* Enable Last DMA bit */
sahilmgandhi	18:6a4db94011d3	3162	hi2c->Instance->CR2 \|= I2C_CR2_LAST;
sahilmgandhi	18:6a4db94011d3	3163	}
sahilmgandhi	18:6a4db94011d3	3164
sahilmgandhi	18:6a4db94011d3	3165	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	3166	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	3167
sahilmgandhi	18:6a4db94011d3	3168	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3169	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3170
sahilmgandhi	18:6a4db94011d3	3171	/* Note : The I2C interrupts must be enabled after unlocking current process
sahilmgandhi	18:6a4db94011d3	3172	to avoid the risk of I2C interrupt handle execution before current
sahilmgandhi	18:6a4db94011d3	3173	process unlock */
sahilmgandhi	18:6a4db94011d3	3174	/* Enable ERR interrupt */
sahilmgandhi	18:6a4db94011d3	3175	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	3176
sahilmgandhi	18:6a4db94011d3	3177	/* Enable DMA Request */
sahilmgandhi	18:6a4db94011d3	3178	hi2c->Instance->CR2 \|= I2C_CR2_DMAEN;
sahilmgandhi	18:6a4db94011d3	3179	}
sahilmgandhi	18:6a4db94011d3	3180	else
sahilmgandhi	18:6a4db94011d3	3181	{
sahilmgandhi	18:6a4db94011d3	3182	/* Send Slave Address and Memory Address */
sahilmgandhi	18:6a4db94011d3	3183	if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	3184	{
sahilmgandhi	18:6a4db94011d3	3185	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	3186	{
sahilmgandhi	18:6a4db94011d3	3187	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3188	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3189	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	3190	}
sahilmgandhi	18:6a4db94011d3	3191	else
sahilmgandhi	18:6a4db94011d3	3192	{
sahilmgandhi	18:6a4db94011d3	3193	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3194	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3195	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	3196	}
sahilmgandhi	18:6a4db94011d3	3197	}
sahilmgandhi	18:6a4db94011d3	3198
sahilmgandhi	18:6a4db94011d3	3199	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	3200	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	3201
sahilmgandhi	18:6a4db94011d3	3202	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	3203	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	3204
sahilmgandhi	18:6a4db94011d3	3205	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3206
sahilmgandhi	18:6a4db94011d3	3207	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3208	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3209	}
sahilmgandhi	18:6a4db94011d3	3210
sahilmgandhi	18:6a4db94011d3	3211	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	3212	}
sahilmgandhi	18:6a4db94011d3	3213	else
sahilmgandhi	18:6a4db94011d3	3214	{
sahilmgandhi	18:6a4db94011d3	3215	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	3216	}
sahilmgandhi	18:6a4db94011d3	3217	}
sahilmgandhi	18:6a4db94011d3	3218
sahilmgandhi	18:6a4db94011d3	3219	/**
sahilmgandhi	18:6a4db94011d3	3220	* @brief Checks if target device is ready for communication.
sahilmgandhi	18:6a4db94011d3	3221	* @note This function is used with Memory devices
sahilmgandhi	18:6a4db94011d3	3222	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3223	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	3224	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	3225	* @param Trials Number of trials
sahilmgandhi	18:6a4db94011d3	3226	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	3227	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	3228	*/
sahilmgandhi	18:6a4db94011d3	3229	HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
sahilmgandhi	18:6a4db94011d3	3230	{
sahilmgandhi	18:6a4db94011d3	3231	uint32_t tickstart = 0U, tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, I2C_Trials = 1U;
sahilmgandhi	18:6a4db94011d3	3232
sahilmgandhi	18:6a4db94011d3	3233	/* Get tick */
sahilmgandhi	18:6a4db94011d3	3234	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	3235
sahilmgandhi	18:6a4db94011d3	3236	if(hi2c->State == HAL_I2C_STATE_READY)
sahilmgandhi	18:6a4db94011d3	3237	{
sahilmgandhi	18:6a4db94011d3	3238	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	3239	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	3240	{
sahilmgandhi	18:6a4db94011d3	3241	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	3242	}
sahilmgandhi	18:6a4db94011d3	3243
sahilmgandhi	18:6a4db94011d3	3244	/* Process Locked */
sahilmgandhi	18:6a4db94011d3	3245	__HAL_LOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3246
sahilmgandhi	18:6a4db94011d3	3247	/* Check if the I2C is already enabled */
sahilmgandhi	18:6a4db94011d3	3248	if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
sahilmgandhi	18:6a4db94011d3	3249	{
sahilmgandhi	18:6a4db94011d3	3250	/* Enable I2C peripheral */
sahilmgandhi	18:6a4db94011d3	3251	__HAL_I2C_ENABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	3252	}
sahilmgandhi	18:6a4db94011d3	3253
sahilmgandhi	18:6a4db94011d3	3254	/* Disable Pos */
sahilmgandhi	18:6a4db94011d3	3255	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	3256
sahilmgandhi	18:6a4db94011d3	3257	hi2c->State = HAL_I2C_STATE_BUSY;
sahilmgandhi	18:6a4db94011d3	3258	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	3259	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	3260
sahilmgandhi	18:6a4db94011d3	3261	do
sahilmgandhi	18:6a4db94011d3	3262	{
sahilmgandhi	18:6a4db94011d3	3263	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	3264	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	3265
sahilmgandhi	18:6a4db94011d3	3266	/* Wait until SB flag is set */
sahilmgandhi	18:6a4db94011d3	3267	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	3268	{
sahilmgandhi	18:6a4db94011d3	3269	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	3270	}
sahilmgandhi	18:6a4db94011d3	3271
sahilmgandhi	18:6a4db94011d3	3272	/* Send slave address */
sahilmgandhi	18:6a4db94011d3	3273	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
sahilmgandhi	18:6a4db94011d3	3274
sahilmgandhi	18:6a4db94011d3	3275	/* Wait until ADDR or AF flag are set */
sahilmgandhi	18:6a4db94011d3	3276	/* Get tick */
sahilmgandhi	18:6a4db94011d3	3277	tickstart = HAL_GetTick();
sahilmgandhi	18:6a4db94011d3	3278
sahilmgandhi	18:6a4db94011d3	3279	tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
sahilmgandhi	18:6a4db94011d3	3280	tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	3281	tmp3 = hi2c->State;
sahilmgandhi	18:6a4db94011d3	3282	while((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_I2C_STATE_TIMEOUT))
sahilmgandhi	18:6a4db94011d3	3283	{
sahilmgandhi	18:6a4db94011d3	3284	if((Timeout == 0U)\|\|((HAL_GetTick() - tickstart ) > Timeout))
sahilmgandhi	18:6a4db94011d3	3285	{
sahilmgandhi	18:6a4db94011d3	3286	hi2c->State = HAL_I2C_STATE_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	3287	}
sahilmgandhi	18:6a4db94011d3	3288	tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
sahilmgandhi	18:6a4db94011d3	3289	tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	3290	tmp3 = hi2c->State;
sahilmgandhi	18:6a4db94011d3	3291	}
sahilmgandhi	18:6a4db94011d3	3292
sahilmgandhi	18:6a4db94011d3	3293	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3294
sahilmgandhi	18:6a4db94011d3	3295	/* Check if the ADDR flag has been set */
sahilmgandhi	18:6a4db94011d3	3296	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
sahilmgandhi	18:6a4db94011d3	3297	{
sahilmgandhi	18:6a4db94011d3	3298	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	3299	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	3300
sahilmgandhi	18:6a4db94011d3	3301	/* Clear ADDR Flag */
sahilmgandhi	18:6a4db94011d3	3302	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	3303
sahilmgandhi	18:6a4db94011d3	3304	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	3305	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	3306	{
sahilmgandhi	18:6a4db94011d3	3307	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	3308	}
sahilmgandhi	18:6a4db94011d3	3309
sahilmgandhi	18:6a4db94011d3	3310	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3311
sahilmgandhi	18:6a4db94011d3	3312	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3313	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3314
sahilmgandhi	18:6a4db94011d3	3315	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	3316	}
sahilmgandhi	18:6a4db94011d3	3317	else
sahilmgandhi	18:6a4db94011d3	3318	{
sahilmgandhi	18:6a4db94011d3	3319	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	3320	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	3321
sahilmgandhi	18:6a4db94011d3	3322	/* Clear AF Flag */
sahilmgandhi	18:6a4db94011d3	3323	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	3324
sahilmgandhi	18:6a4db94011d3	3325	/* Wait until BUSY flag is reset */
sahilmgandhi	18:6a4db94011d3	3326	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	3327	{
sahilmgandhi	18:6a4db94011d3	3328	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	3329	}
sahilmgandhi	18:6a4db94011d3	3330	}
sahilmgandhi	18:6a4db94011d3	3331	}while(I2C_Trials++ < Trials);
sahilmgandhi	18:6a4db94011d3	3332
sahilmgandhi	18:6a4db94011d3	3333	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3334
sahilmgandhi	18:6a4db94011d3	3335	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	3336	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	3337
sahilmgandhi	18:6a4db94011d3	3338	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	3339	}
sahilmgandhi	18:6a4db94011d3	3340	else
sahilmgandhi	18:6a4db94011d3	3341	{
sahilmgandhi	18:6a4db94011d3	3342	return HAL_BUSY;
sahilmgandhi	18:6a4db94011d3	3343	}
sahilmgandhi	18:6a4db94011d3	3344	}
sahilmgandhi	18:6a4db94011d3	3345
sahilmgandhi	18:6a4db94011d3	3346	/**
sahilmgandhi	18:6a4db94011d3	3347	* @brief This function handles I2C event interrupt request.
sahilmgandhi	18:6a4db94011d3	3348	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3349	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	3350	* @retval None
sahilmgandhi	18:6a4db94011d3	3351	*/
sahilmgandhi	18:6a4db94011d3	3352	void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3353	{
sahilmgandhi	18:6a4db94011d3	3354	uint32_t sr2itflags = READ_REG(hi2c->Instance->SR2);
sahilmgandhi	18:6a4db94011d3	3355	uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
sahilmgandhi	18:6a4db94011d3	3356	uint32_t itsources = READ_REG(hi2c->Instance->CR2);
sahilmgandhi	18:6a4db94011d3	3357
sahilmgandhi	18:6a4db94011d3	3358	uint32_t CurrentMode = hi2c->Mode;
sahilmgandhi	18:6a4db94011d3	3359
sahilmgandhi	18:6a4db94011d3	3360	/* Master or Memory mode selected */
sahilmgandhi	18:6a4db94011d3	3361	if((CurrentMode == HAL_I2C_MODE_MASTER) \|\| (CurrentMode == HAL_I2C_MODE_MEM))
sahilmgandhi	18:6a4db94011d3	3362	{
sahilmgandhi	18:6a4db94011d3	3363	/* SB Set ----------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3364	if(((sr1itflags & I2C_FLAG_SB) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
sahilmgandhi	18:6a4db94011d3	3365	{
sahilmgandhi	18:6a4db94011d3	3366	I2C_Master_SB(hi2c);
sahilmgandhi	18:6a4db94011d3	3367	}
sahilmgandhi	18:6a4db94011d3	3368	/* ADD10 Set -------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3369	else if(((sr1itflags & I2C_FLAG_ADD10) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
sahilmgandhi	18:6a4db94011d3	3370	{
sahilmgandhi	18:6a4db94011d3	3371	I2C_Master_ADD10(hi2c);
sahilmgandhi	18:6a4db94011d3	3372	}
sahilmgandhi	18:6a4db94011d3	3373	/* ADDR Set --------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3374	else if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
sahilmgandhi	18:6a4db94011d3	3375	{
sahilmgandhi	18:6a4db94011d3	3376	I2C_Master_ADDR(hi2c);
sahilmgandhi	18:6a4db94011d3	3377	}
sahilmgandhi	18:6a4db94011d3	3378
sahilmgandhi	18:6a4db94011d3	3379	/* I2C in mode Transmitter -----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3380	if((sr2itflags & I2C_FLAG_TRA) != RESET)
sahilmgandhi	18:6a4db94011d3	3381	{
sahilmgandhi	18:6a4db94011d3	3382	/* TXE set and BTF reset -----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3383	if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
sahilmgandhi	18:6a4db94011d3	3384	{
sahilmgandhi	18:6a4db94011d3	3385	I2C_MasterTransmit_TXE(hi2c);
sahilmgandhi	18:6a4db94011d3	3386	}
sahilmgandhi	18:6a4db94011d3	3387	/* BTF set -------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3388	else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
sahilmgandhi	18:6a4db94011d3	3389	{
sahilmgandhi	18:6a4db94011d3	3390	I2C_MasterTransmit_BTF(hi2c);
sahilmgandhi	18:6a4db94011d3	3391	}
sahilmgandhi	18:6a4db94011d3	3392	}
sahilmgandhi	18:6a4db94011d3	3393	/* I2C in mode Receiver --------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3394	else
sahilmgandhi	18:6a4db94011d3	3395	{
sahilmgandhi	18:6a4db94011d3	3396	/* RXNE set and BTF reset -----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3397	if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
sahilmgandhi	18:6a4db94011d3	3398	{
sahilmgandhi	18:6a4db94011d3	3399	I2C_MasterReceive_RXNE(hi2c);
sahilmgandhi	18:6a4db94011d3	3400	}
sahilmgandhi	18:6a4db94011d3	3401	/* BTF set -------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3402	else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
sahilmgandhi	18:6a4db94011d3	3403	{
sahilmgandhi	18:6a4db94011d3	3404	I2C_MasterReceive_BTF(hi2c);
sahilmgandhi	18:6a4db94011d3	3405	}
sahilmgandhi	18:6a4db94011d3	3406	}
sahilmgandhi	18:6a4db94011d3	3407	}
sahilmgandhi	18:6a4db94011d3	3408	/* Slave mode selected */
sahilmgandhi	18:6a4db94011d3	3409	else
sahilmgandhi	18:6a4db94011d3	3410	{
sahilmgandhi	18:6a4db94011d3	3411	/* ADDR set --------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3412	if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
sahilmgandhi	18:6a4db94011d3	3413	{
sahilmgandhi	18:6a4db94011d3	3414	I2C_Slave_ADDR(hi2c);
sahilmgandhi	18:6a4db94011d3	3415	}
sahilmgandhi	18:6a4db94011d3	3416	/* STOPF set --------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3417	else if(((sr1itflags & I2C_FLAG_STOPF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
sahilmgandhi	18:6a4db94011d3	3418	{
sahilmgandhi	18:6a4db94011d3	3419	I2C_Slave_STOPF(hi2c);
sahilmgandhi	18:6a4db94011d3	3420	}
sahilmgandhi	18:6a4db94011d3	3421	/* I2C in mode Transmitter -----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3422	else if((sr2itflags & I2C_FLAG_TRA) != RESET)
sahilmgandhi	18:6a4db94011d3	3423	{
sahilmgandhi	18:6a4db94011d3	3424	/* TXE set and BTF reset -----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3425	if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
sahilmgandhi	18:6a4db94011d3	3426	{
sahilmgandhi	18:6a4db94011d3	3427	I2C_SlaveTransmit_TXE(hi2c);
sahilmgandhi	18:6a4db94011d3	3428	}
sahilmgandhi	18:6a4db94011d3	3429	/* BTF set -------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3430	else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
sahilmgandhi	18:6a4db94011d3	3431	{
sahilmgandhi	18:6a4db94011d3	3432	I2C_SlaveTransmit_BTF(hi2c);
sahilmgandhi	18:6a4db94011d3	3433	}
sahilmgandhi	18:6a4db94011d3	3434	}
sahilmgandhi	18:6a4db94011d3	3435	/* I2C in mode Receiver --------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3436	else
sahilmgandhi	18:6a4db94011d3	3437	{
sahilmgandhi	18:6a4db94011d3	3438	/* RXNE set and BTF reset ----------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3439	if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
sahilmgandhi	18:6a4db94011d3	3440	{
sahilmgandhi	18:6a4db94011d3	3441	I2C_SlaveReceive_RXNE(hi2c);
sahilmgandhi	18:6a4db94011d3	3442	}
sahilmgandhi	18:6a4db94011d3	3443	/* BTF set -------------------------------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3444	else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
sahilmgandhi	18:6a4db94011d3	3445	{
sahilmgandhi	18:6a4db94011d3	3446	I2C_SlaveReceive_BTF(hi2c);
sahilmgandhi	18:6a4db94011d3	3447	}
sahilmgandhi	18:6a4db94011d3	3448	}
sahilmgandhi	18:6a4db94011d3	3449	}
sahilmgandhi	18:6a4db94011d3	3450	}
sahilmgandhi	18:6a4db94011d3	3451
sahilmgandhi	18:6a4db94011d3	3452	/**
sahilmgandhi	18:6a4db94011d3	3453	* @brief This function handles I2C error interrupt request.
sahilmgandhi	18:6a4db94011d3	3454	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3455	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	3456	* @retval None
sahilmgandhi	18:6a4db94011d3	3457	*/
sahilmgandhi	18:6a4db94011d3	3458	void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3459	{
sahilmgandhi	18:6a4db94011d3	3460	uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, tmp4 = 0U;
sahilmgandhi	18:6a4db94011d3	3461	uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
sahilmgandhi	18:6a4db94011d3	3462	uint32_t itsources = READ_REG(hi2c->Instance->CR2);
sahilmgandhi	18:6a4db94011d3	3463
sahilmgandhi	18:6a4db94011d3	3464	/* I2C Bus error interrupt occurred ----------------------------------------*/
sahilmgandhi	18:6a4db94011d3	3465	if(((sr1itflags & I2C_FLAG_BERR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
sahilmgandhi	18:6a4db94011d3	3466	{
sahilmgandhi	18:6a4db94011d3	3467	hi2c->ErrorCode \|= HAL_I2C_ERROR_BERR;
sahilmgandhi	18:6a4db94011d3	3468
sahilmgandhi	18:6a4db94011d3	3469	/* Clear BERR flag */
sahilmgandhi	18:6a4db94011d3	3470	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
sahilmgandhi	18:6a4db94011d3	3471	}
sahilmgandhi	18:6a4db94011d3	3472
sahilmgandhi	18:6a4db94011d3	3473	/* I2C Arbitration Loss error interrupt occurred ---------------------------*/
sahilmgandhi	18:6a4db94011d3	3474	if(((sr1itflags & I2C_FLAG_ARLO) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
sahilmgandhi	18:6a4db94011d3	3475	{
sahilmgandhi	18:6a4db94011d3	3476	hi2c->ErrorCode \|= HAL_I2C_ERROR_ARLO;
sahilmgandhi	18:6a4db94011d3	3477
sahilmgandhi	18:6a4db94011d3	3478	/* Clear ARLO flag */
sahilmgandhi	18:6a4db94011d3	3479	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
sahilmgandhi	18:6a4db94011d3	3480	}
sahilmgandhi	18:6a4db94011d3	3481
sahilmgandhi	18:6a4db94011d3	3482	/* I2C Acknowledge failure error interrupt occurred ------------------------*/
sahilmgandhi	18:6a4db94011d3	3483	if(((sr1itflags & I2C_FLAG_AF) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
sahilmgandhi	18:6a4db94011d3	3484	{
sahilmgandhi	18:6a4db94011d3	3485	tmp1 = hi2c->Mode;
sahilmgandhi	18:6a4db94011d3	3486	tmp2 = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	3487	tmp3 = hi2c->State;
sahilmgandhi	18:6a4db94011d3	3488	tmp4 = hi2c->PreviousState;
sahilmgandhi	18:6a4db94011d3	3489	if((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0U) && \
sahilmgandhi	18:6a4db94011d3	3490	((tmp3 == HAL_I2C_STATE_BUSY_TX) \|\| (tmp3 == HAL_I2C_STATE_BUSY_TX_LISTEN) \|\| \
sahilmgandhi	18:6a4db94011d3	3491	((tmp3 == HAL_I2C_STATE_LISTEN) && (tmp4 == I2C_STATE_SLAVE_BUSY_TX))))
sahilmgandhi	18:6a4db94011d3	3492	{
sahilmgandhi	18:6a4db94011d3	3493	I2C_Slave_AF(hi2c);
sahilmgandhi	18:6a4db94011d3	3494	}
sahilmgandhi	18:6a4db94011d3	3495	else
sahilmgandhi	18:6a4db94011d3	3496	{
sahilmgandhi	18:6a4db94011d3	3497	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
sahilmgandhi	18:6a4db94011d3	3498
sahilmgandhi	18:6a4db94011d3	3499	/* Do not generate a STOP in case of Slave receive non acknowledge during transfer (mean not at the end of transfer) */
sahilmgandhi	18:6a4db94011d3	3500	if(hi2c->Mode == HAL_I2C_MODE_MASTER)
sahilmgandhi	18:6a4db94011d3	3501	{
sahilmgandhi	18:6a4db94011d3	3502	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	3503	SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
sahilmgandhi	18:6a4db94011d3	3504	}
sahilmgandhi	18:6a4db94011d3	3505
sahilmgandhi	18:6a4db94011d3	3506	/* Clear AF flag */
sahilmgandhi	18:6a4db94011d3	3507	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	3508	}
sahilmgandhi	18:6a4db94011d3	3509	}
sahilmgandhi	18:6a4db94011d3	3510
sahilmgandhi	18:6a4db94011d3	3511	/* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
sahilmgandhi	18:6a4db94011d3	3512	if(((sr1itflags & I2C_FLAG_OVR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
sahilmgandhi	18:6a4db94011d3	3513	{
sahilmgandhi	18:6a4db94011d3	3514	hi2c->ErrorCode \|= HAL_I2C_ERROR_OVR;
sahilmgandhi	18:6a4db94011d3	3515	/* Clear OVR flag */
sahilmgandhi	18:6a4db94011d3	3516	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
sahilmgandhi	18:6a4db94011d3	3517	}
sahilmgandhi	18:6a4db94011d3	3518
sahilmgandhi	18:6a4db94011d3	3519	/* Call the Error Callback in case of Error detected -----------------------*/
sahilmgandhi	18:6a4db94011d3	3520	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
sahilmgandhi	18:6a4db94011d3	3521	{
sahilmgandhi	18:6a4db94011d3	3522	I2C_ITError(hi2c);
sahilmgandhi	18:6a4db94011d3	3523	}
sahilmgandhi	18:6a4db94011d3	3524	}
sahilmgandhi	18:6a4db94011d3	3525
sahilmgandhi	18:6a4db94011d3	3526	/**
sahilmgandhi	18:6a4db94011d3	3527	* @brief Master Tx Transfer completed callback.
sahilmgandhi	18:6a4db94011d3	3528	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3529	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	3530	* @retval None
sahilmgandhi	18:6a4db94011d3	3531	*/
sahilmgandhi	18:6a4db94011d3	3532	__weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3533	{
sahilmgandhi	18:6a4db94011d3	3534	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3535	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	3536
sahilmgandhi	18:6a4db94011d3	3537	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3538	the HAL_I2C_MasterTxCpltCallback can be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3539	*/
sahilmgandhi	18:6a4db94011d3	3540	}
sahilmgandhi	18:6a4db94011d3	3541
sahilmgandhi	18:6a4db94011d3	3542	/**
sahilmgandhi	18:6a4db94011d3	3543	* @brief Master Rx Transfer completed callback.
sahilmgandhi	18:6a4db94011d3	3544	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3545	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	3546	* @retval None
sahilmgandhi	18:6a4db94011d3	3547	*/
sahilmgandhi	18:6a4db94011d3	3548	__weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3549	{
sahilmgandhi	18:6a4db94011d3	3550	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3551	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	3552
sahilmgandhi	18:6a4db94011d3	3553	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3554	the HAL_I2C_MasterRxCpltCallback can be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3555	*/
sahilmgandhi	18:6a4db94011d3	3556	}
sahilmgandhi	18:6a4db94011d3	3557
sahilmgandhi	18:6a4db94011d3	3558	/** @brief Slave Tx Transfer completed callback.
sahilmgandhi	18:6a4db94011d3	3559	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3560	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	3561	* @retval None
sahilmgandhi	18:6a4db94011d3	3562	*/
sahilmgandhi	18:6a4db94011d3	3563	__weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3564	{
sahilmgandhi	18:6a4db94011d3	3565	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3566	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	3567
sahilmgandhi	18:6a4db94011d3	3568	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3569	the HAL_I2C_SlaveTxCpltCallback can be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3570	*/
sahilmgandhi	18:6a4db94011d3	3571	}
sahilmgandhi	18:6a4db94011d3	3572
sahilmgandhi	18:6a4db94011d3	3573	/**
sahilmgandhi	18:6a4db94011d3	3574	* @brief Slave Rx Transfer completed callback.
sahilmgandhi	18:6a4db94011d3	3575	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3576	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	3577	* @retval None
sahilmgandhi	18:6a4db94011d3	3578	*/
sahilmgandhi	18:6a4db94011d3	3579	__weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3580	{
sahilmgandhi	18:6a4db94011d3	3581	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3582	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	3583
sahilmgandhi	18:6a4db94011d3	3584	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3585	the HAL_I2C_SlaveRxCpltCallback can be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3586	*/
sahilmgandhi	18:6a4db94011d3	3587	}
sahilmgandhi	18:6a4db94011d3	3588
sahilmgandhi	18:6a4db94011d3	3589	/**
sahilmgandhi	18:6a4db94011d3	3590	* @brief Slave Address Match callback.
sahilmgandhi	18:6a4db94011d3	3591	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3592	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	3593	* @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XferOptions_definition
sahilmgandhi	18:6a4db94011d3	3594	* @param AddrMatchCode Address Match Code
sahilmgandhi	18:6a4db94011d3	3595	* @retval None
sahilmgandhi	18:6a4db94011d3	3596	*/
sahilmgandhi	18:6a4db94011d3	3597	__weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
sahilmgandhi	18:6a4db94011d3	3598	{
sahilmgandhi	18:6a4db94011d3	3599	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3600	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	3601	UNUSED(TransferDirection);
sahilmgandhi	18:6a4db94011d3	3602	UNUSED(AddrMatchCode);
sahilmgandhi	18:6a4db94011d3	3603
sahilmgandhi	18:6a4db94011d3	3604	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3605	the HAL_I2C_AddrCallback can be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3606	*/
sahilmgandhi	18:6a4db94011d3	3607	}
sahilmgandhi	18:6a4db94011d3	3608
sahilmgandhi	18:6a4db94011d3	3609	/**
sahilmgandhi	18:6a4db94011d3	3610	* @brief Listen Complete callback.
sahilmgandhi	18:6a4db94011d3	3611	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3612	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	3613	* @retval None
sahilmgandhi	18:6a4db94011d3	3614	*/
sahilmgandhi	18:6a4db94011d3	3615	__weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3616	{
sahilmgandhi	18:6a4db94011d3	3617	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3618	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	3619
sahilmgandhi	18:6a4db94011d3	3620	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3621	the HAL_I2C_ListenCpltCallback can be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3622	*/
sahilmgandhi	18:6a4db94011d3	3623	}
sahilmgandhi	18:6a4db94011d3	3624
sahilmgandhi	18:6a4db94011d3	3625	/**
sahilmgandhi	18:6a4db94011d3	3626	* @brief Memory Tx Transfer completed callback.
sahilmgandhi	18:6a4db94011d3	3627	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3628	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	3629	* @retval None
sahilmgandhi	18:6a4db94011d3	3630	*/
sahilmgandhi	18:6a4db94011d3	3631	__weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3632	{
sahilmgandhi	18:6a4db94011d3	3633	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3634	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	3635
sahilmgandhi	18:6a4db94011d3	3636	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3637	the HAL_I2C_MemTxCpltCallback can be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3638	*/
sahilmgandhi	18:6a4db94011d3	3639	}
sahilmgandhi	18:6a4db94011d3	3640
sahilmgandhi	18:6a4db94011d3	3641	/**
sahilmgandhi	18:6a4db94011d3	3642	* @brief Memory Rx Transfer completed callback.
sahilmgandhi	18:6a4db94011d3	3643	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3644	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	3645	* @retval None
sahilmgandhi	18:6a4db94011d3	3646	*/
sahilmgandhi	18:6a4db94011d3	3647	__weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3648	{
sahilmgandhi	18:6a4db94011d3	3649	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3650	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	3651
sahilmgandhi	18:6a4db94011d3	3652	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3653	the HAL_I2C_MemRxCpltCallback can be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3654	*/
sahilmgandhi	18:6a4db94011d3	3655	}
sahilmgandhi	18:6a4db94011d3	3656
sahilmgandhi	18:6a4db94011d3	3657	/**
sahilmgandhi	18:6a4db94011d3	3658	* @brief I2C error callback.
sahilmgandhi	18:6a4db94011d3	3659	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3660	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	3661	* @retval None
sahilmgandhi	18:6a4db94011d3	3662	*/
sahilmgandhi	18:6a4db94011d3	3663	__weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3664	{
sahilmgandhi	18:6a4db94011d3	3665	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3666	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	3667
sahilmgandhi	18:6a4db94011d3	3668	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3669	the HAL_I2C_ErrorCallback can be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3670	*/
sahilmgandhi	18:6a4db94011d3	3671	}
sahilmgandhi	18:6a4db94011d3	3672
sahilmgandhi	18:6a4db94011d3	3673	/**
sahilmgandhi	18:6a4db94011d3	3674	* @brief I2C abort callback.
sahilmgandhi	18:6a4db94011d3	3675	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3676	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	3677	* @retval None
sahilmgandhi	18:6a4db94011d3	3678	*/
sahilmgandhi	18:6a4db94011d3	3679	__weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3680	{
sahilmgandhi	18:6a4db94011d3	3681	/* Prevent unused argument(s) compilation warning */
sahilmgandhi	18:6a4db94011d3	3682	UNUSED(hi2c);
sahilmgandhi	18:6a4db94011d3	3683
sahilmgandhi	18:6a4db94011d3	3684	/* NOTE : This function should not be modified, when the callback is needed,
sahilmgandhi	18:6a4db94011d3	3685	the HAL_I2C_AbortCpltCallback could be implemented in the user file
sahilmgandhi	18:6a4db94011d3	3686	*/
sahilmgandhi	18:6a4db94011d3	3687	}
sahilmgandhi	18:6a4db94011d3	3688
sahilmgandhi	18:6a4db94011d3	3689	/**
sahilmgandhi	18:6a4db94011d3	3690	* @}
sahilmgandhi	18:6a4db94011d3	3691	*/
sahilmgandhi	18:6a4db94011d3	3692
sahilmgandhi	18:6a4db94011d3	3693	/** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
sahilmgandhi	18:6a4db94011d3	3694	* @brief Peripheral State and Errors functions
sahilmgandhi	18:6a4db94011d3	3695	*
sahilmgandhi	18:6a4db94011d3	3696	@verbatim
sahilmgandhi	18:6a4db94011d3	3697	===============================================================================
sahilmgandhi	18:6a4db94011d3	3698	##### Peripheral State, Mode and Error functions #####
sahilmgandhi	18:6a4db94011d3	3699	===============================================================================
sahilmgandhi	18:6a4db94011d3	3700	[..]
sahilmgandhi	18:6a4db94011d3	3701	This subsection permits to get in run-time the status of the peripheral
sahilmgandhi	18:6a4db94011d3	3702	and the data flow.
sahilmgandhi	18:6a4db94011d3	3703
sahilmgandhi	18:6a4db94011d3	3704	@endverbatim
sahilmgandhi	18:6a4db94011d3	3705	* @{
sahilmgandhi	18:6a4db94011d3	3706	*/
sahilmgandhi	18:6a4db94011d3	3707
sahilmgandhi	18:6a4db94011d3	3708	/**
sahilmgandhi	18:6a4db94011d3	3709	* @brief Return the I2C handle state.
sahilmgandhi	18:6a4db94011d3	3710	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3711	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	3712	* @retval HAL state
sahilmgandhi	18:6a4db94011d3	3713	*/
sahilmgandhi	18:6a4db94011d3	3714	HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3715	{
sahilmgandhi	18:6a4db94011d3	3716	/* Return I2C handle state */
sahilmgandhi	18:6a4db94011d3	3717	return hi2c->State;
sahilmgandhi	18:6a4db94011d3	3718	}
sahilmgandhi	18:6a4db94011d3	3719
sahilmgandhi	18:6a4db94011d3	3720	/**
sahilmgandhi	18:6a4db94011d3	3721	* @brief Return the I2C Master, Slave, Memory or no mode.
sahilmgandhi	18:6a4db94011d3	3722	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3723	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3724	* @retval HAL mode
sahilmgandhi	18:6a4db94011d3	3725	*/
sahilmgandhi	18:6a4db94011d3	3726	HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3727	{
sahilmgandhi	18:6a4db94011d3	3728	return hi2c->Mode;
sahilmgandhi	18:6a4db94011d3	3729	}
sahilmgandhi	18:6a4db94011d3	3730
sahilmgandhi	18:6a4db94011d3	3731	/**
sahilmgandhi	18:6a4db94011d3	3732	* @brief Return the I2C error code
sahilmgandhi	18:6a4db94011d3	3733	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3734	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	3735	* @retval I2C Error Code
sahilmgandhi	18:6a4db94011d3	3736	*/
sahilmgandhi	18:6a4db94011d3	3737	uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3738	{
sahilmgandhi	18:6a4db94011d3	3739	return hi2c->ErrorCode;
sahilmgandhi	18:6a4db94011d3	3740	}
sahilmgandhi	18:6a4db94011d3	3741
sahilmgandhi	18:6a4db94011d3	3742	/**
sahilmgandhi	18:6a4db94011d3	3743	* @}
sahilmgandhi	18:6a4db94011d3	3744	*/
sahilmgandhi	18:6a4db94011d3	3745
sahilmgandhi	18:6a4db94011d3	3746	/**
sahilmgandhi	18:6a4db94011d3	3747	* @brief Handle TXE flag for Master
sahilmgandhi	18:6a4db94011d3	3748	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3749	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3750	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	3751	*/
sahilmgandhi	18:6a4db94011d3	3752	static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3753	{
sahilmgandhi	18:6a4db94011d3	3754	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	3755	uint32_t CurrentState = hi2c->State;
sahilmgandhi	18:6a4db94011d3	3756	uint32_t CurrentMode = hi2c->Mode;
sahilmgandhi	18:6a4db94011d3	3757	uint32_t CurrentXferOptions = hi2c->XferOptions;
sahilmgandhi	18:6a4db94011d3	3758
sahilmgandhi	18:6a4db94011d3	3759	if((hi2c->XferSize == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
sahilmgandhi	18:6a4db94011d3	3760	{
sahilmgandhi	18:6a4db94011d3	3761	/* Call TxCpltCallback() directly if no stop mode is set */
sahilmgandhi	18:6a4db94011d3	3762	if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
sahilmgandhi	18:6a4db94011d3	3763	{
sahilmgandhi	18:6a4db94011d3	3764	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	3765
sahilmgandhi	18:6a4db94011d3	3766	hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	3767	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3768	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3769
sahilmgandhi	18:6a4db94011d3	3770	HAL_I2C_MasterTxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	3771	}
sahilmgandhi	18:6a4db94011d3	3772	else /* Generate Stop condition then Call TxCpltCallback() */
sahilmgandhi	18:6a4db94011d3	3773	{
sahilmgandhi	18:6a4db94011d3	3774	/* Disable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	3775	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	3776
sahilmgandhi	18:6a4db94011d3	3777	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	3778	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	3779
sahilmgandhi	18:6a4db94011d3	3780	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	3781	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3782
sahilmgandhi	18:6a4db94011d3	3783	if(hi2c->Mode == HAL_I2C_MODE_MEM)
sahilmgandhi	18:6a4db94011d3	3784	{
sahilmgandhi	18:6a4db94011d3	3785	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3786	HAL_I2C_MemTxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	3787	}
sahilmgandhi	18:6a4db94011d3	3788	else
sahilmgandhi	18:6a4db94011d3	3789	{
sahilmgandhi	18:6a4db94011d3	3790	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3791	HAL_I2C_MasterTxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	3792	}
sahilmgandhi	18:6a4db94011d3	3793	}
sahilmgandhi	18:6a4db94011d3	3794	}
sahilmgandhi	18:6a4db94011d3	3795	else if((CurrentState == HAL_I2C_STATE_BUSY_TX) \|\| \
sahilmgandhi	18:6a4db94011d3	3796	((CurrentMode == HAL_I2C_MODE_MEM) && (CurrentState == HAL_I2C_STATE_BUSY_RX)))
sahilmgandhi	18:6a4db94011d3	3797	{
sahilmgandhi	18:6a4db94011d3	3798	if(hi2c->XferCount == 0U)
sahilmgandhi	18:6a4db94011d3	3799	{
sahilmgandhi	18:6a4db94011d3	3800	/* Disable BUF interrupt */
sahilmgandhi	18:6a4db94011d3	3801	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
sahilmgandhi	18:6a4db94011d3	3802	}
sahilmgandhi	18:6a4db94011d3	3803	else
sahilmgandhi	18:6a4db94011d3	3804	{
sahilmgandhi	18:6a4db94011d3	3805	if(hi2c->Mode == HAL_I2C_MODE_MEM)
sahilmgandhi	18:6a4db94011d3	3806	{
sahilmgandhi	18:6a4db94011d3	3807	if(hi2c->EventCount == 0)
sahilmgandhi	18:6a4db94011d3	3808	{
sahilmgandhi	18:6a4db94011d3	3809	/* If Memory address size is 8Bit */
sahilmgandhi	18:6a4db94011d3	3810	if(hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT)
sahilmgandhi	18:6a4db94011d3	3811	{
sahilmgandhi	18:6a4db94011d3	3812	/* Send Memory Address */
sahilmgandhi	18:6a4db94011d3	3813	hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
sahilmgandhi	18:6a4db94011d3	3814
sahilmgandhi	18:6a4db94011d3	3815	hi2c->EventCount += 2;
sahilmgandhi	18:6a4db94011d3	3816	}
sahilmgandhi	18:6a4db94011d3	3817	/* If Memory address size is 16Bit */
sahilmgandhi	18:6a4db94011d3	3818	else
sahilmgandhi	18:6a4db94011d3	3819	{
sahilmgandhi	18:6a4db94011d3	3820	/* Send MSB of Memory Address */
sahilmgandhi	18:6a4db94011d3	3821	hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress);
sahilmgandhi	18:6a4db94011d3	3822
sahilmgandhi	18:6a4db94011d3	3823	hi2c->EventCount++;
sahilmgandhi	18:6a4db94011d3	3824	}
sahilmgandhi	18:6a4db94011d3	3825	}
sahilmgandhi	18:6a4db94011d3	3826	else if(hi2c->EventCount == 1)
sahilmgandhi	18:6a4db94011d3	3827	{
sahilmgandhi	18:6a4db94011d3	3828	/* Send LSB of Memory Address */
sahilmgandhi	18:6a4db94011d3	3829	hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
sahilmgandhi	18:6a4db94011d3	3830
sahilmgandhi	18:6a4db94011d3	3831	hi2c->EventCount++;
sahilmgandhi	18:6a4db94011d3	3832	}
sahilmgandhi	18:6a4db94011d3	3833	else if(hi2c->EventCount == 2)
sahilmgandhi	18:6a4db94011d3	3834	{
sahilmgandhi	18:6a4db94011d3	3835	if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
sahilmgandhi	18:6a4db94011d3	3836	{
sahilmgandhi	18:6a4db94011d3	3837	/* Generate Restart */
sahilmgandhi	18:6a4db94011d3	3838	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	3839	}
sahilmgandhi	18:6a4db94011d3	3840	else if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
sahilmgandhi	18:6a4db94011d3	3841	{
sahilmgandhi	18:6a4db94011d3	3842	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	3843	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
sahilmgandhi	18:6a4db94011d3	3844	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	3845	}
sahilmgandhi	18:6a4db94011d3	3846	}
sahilmgandhi	18:6a4db94011d3	3847	}
sahilmgandhi	18:6a4db94011d3	3848	else
sahilmgandhi	18:6a4db94011d3	3849	{
sahilmgandhi	18:6a4db94011d3	3850	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	3851	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
sahilmgandhi	18:6a4db94011d3	3852	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	3853	}
sahilmgandhi	18:6a4db94011d3	3854	}
sahilmgandhi	18:6a4db94011d3	3855	}
sahilmgandhi	18:6a4db94011d3	3856	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	3857	}
sahilmgandhi	18:6a4db94011d3	3858
sahilmgandhi	18:6a4db94011d3	3859	/**
sahilmgandhi	18:6a4db94011d3	3860	* @brief Handle BTF flag for Master transmitter
sahilmgandhi	18:6a4db94011d3	3861	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3862	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3863	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	3864	*/
sahilmgandhi	18:6a4db94011d3	3865	static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3866	{
sahilmgandhi	18:6a4db94011d3	3867	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	3868	uint32_t CurrentXferOptions = hi2c->XferOptions;
sahilmgandhi	18:6a4db94011d3	3869
sahilmgandhi	18:6a4db94011d3	3870	if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
sahilmgandhi	18:6a4db94011d3	3871	{
sahilmgandhi	18:6a4db94011d3	3872	if(hi2c->XferCount != 0U)
sahilmgandhi	18:6a4db94011d3	3873	{
sahilmgandhi	18:6a4db94011d3	3874	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	3875	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
sahilmgandhi	18:6a4db94011d3	3876	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	3877	}
sahilmgandhi	18:6a4db94011d3	3878	else
sahilmgandhi	18:6a4db94011d3	3879	{
sahilmgandhi	18:6a4db94011d3	3880	/* Call TxCpltCallback() directly if no stop mode is set */
sahilmgandhi	18:6a4db94011d3	3881	if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
sahilmgandhi	18:6a4db94011d3	3882	{
sahilmgandhi	18:6a4db94011d3	3883	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	3884
sahilmgandhi	18:6a4db94011d3	3885	hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	3886	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3887	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3888
sahilmgandhi	18:6a4db94011d3	3889	HAL_I2C_MasterTxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	3890	}
sahilmgandhi	18:6a4db94011d3	3891	else /* Generate Stop condition then Call TxCpltCallback() */
sahilmgandhi	18:6a4db94011d3	3892	{
sahilmgandhi	18:6a4db94011d3	3893	/* Disable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	3894	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	3895
sahilmgandhi	18:6a4db94011d3	3896	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	3897	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	3898
sahilmgandhi	18:6a4db94011d3	3899	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	3900	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3901
sahilmgandhi	18:6a4db94011d3	3902	if(hi2c->Mode == HAL_I2C_MODE_MEM)
sahilmgandhi	18:6a4db94011d3	3903	{
sahilmgandhi	18:6a4db94011d3	3904	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3905
sahilmgandhi	18:6a4db94011d3	3906	HAL_I2C_MemTxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	3907	}
sahilmgandhi	18:6a4db94011d3	3908	else
sahilmgandhi	18:6a4db94011d3	3909	{
sahilmgandhi	18:6a4db94011d3	3910	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3911
sahilmgandhi	18:6a4db94011d3	3912	HAL_I2C_MasterTxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	3913	}
sahilmgandhi	18:6a4db94011d3	3914	}
sahilmgandhi	18:6a4db94011d3	3915	}
sahilmgandhi	18:6a4db94011d3	3916	}
sahilmgandhi	18:6a4db94011d3	3917	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	3918	}
sahilmgandhi	18:6a4db94011d3	3919
sahilmgandhi	18:6a4db94011d3	3920	/**
sahilmgandhi	18:6a4db94011d3	3921	* @brief Handle RXNE flag for Master
sahilmgandhi	18:6a4db94011d3	3922	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3923	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3924	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	3925	*/
sahilmgandhi	18:6a4db94011d3	3926	static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3927	{
sahilmgandhi	18:6a4db94011d3	3928
sahilmgandhi	18:6a4db94011d3	3929	if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
sahilmgandhi	18:6a4db94011d3	3930	{
sahilmgandhi	18:6a4db94011d3	3931	uint32_t tmp = 0U;
sahilmgandhi	18:6a4db94011d3	3932
sahilmgandhi	18:6a4db94011d3	3933	tmp = hi2c->XferCount;
sahilmgandhi	18:6a4db94011d3	3934	if(tmp > 3U)
sahilmgandhi	18:6a4db94011d3	3935	{
sahilmgandhi	18:6a4db94011d3	3936	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	3937	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	3938	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	3939	}
sahilmgandhi	18:6a4db94011d3	3940	else if((tmp == 2U) \|\| (tmp == 3U))
sahilmgandhi	18:6a4db94011d3	3941	{
sahilmgandhi	18:6a4db94011d3	3942	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	3943	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	3944
sahilmgandhi	18:6a4db94011d3	3945	/* Enable Pos */
sahilmgandhi	18:6a4db94011d3	3946	hi2c->Instance->CR1 \|= I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	3947
sahilmgandhi	18:6a4db94011d3	3948	/* Disable BUF interrupt */
sahilmgandhi	18:6a4db94011d3	3949	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
sahilmgandhi	18:6a4db94011d3	3950	}
sahilmgandhi	18:6a4db94011d3	3951	else
sahilmgandhi	18:6a4db94011d3	3952	{
sahilmgandhi	18:6a4db94011d3	3953	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	3954	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	3955
sahilmgandhi	18:6a4db94011d3	3956	if(hi2c->XferOptions == I2C_NEXT_FRAME)
sahilmgandhi	18:6a4db94011d3	3957	{
sahilmgandhi	18:6a4db94011d3	3958	/* Enable Pos */
sahilmgandhi	18:6a4db94011d3	3959	hi2c->Instance->CR1 \|= I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	3960	}
sahilmgandhi	18:6a4db94011d3	3961
sahilmgandhi	18:6a4db94011d3	3962	/* Disable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	3963	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	3964
sahilmgandhi	18:6a4db94011d3	3965	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	3966	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	3967	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	3968
sahilmgandhi	18:6a4db94011d3	3969	tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
sahilmgandhi	18:6a4db94011d3	3970	hi2c->PreviousState = tmp \| (uint32_t)(hi2c->Mode);
sahilmgandhi	18:6a4db94011d3	3971	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	3972
sahilmgandhi	18:6a4db94011d3	3973	if(hi2c->Mode == HAL_I2C_MODE_MEM)
sahilmgandhi	18:6a4db94011d3	3974	{
sahilmgandhi	18:6a4db94011d3	3975	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3976	HAL_I2C_MemRxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	3977	}
sahilmgandhi	18:6a4db94011d3	3978	else
sahilmgandhi	18:6a4db94011d3	3979	{
sahilmgandhi	18:6a4db94011d3	3980	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	3981	HAL_I2C_MasterRxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	3982	}
sahilmgandhi	18:6a4db94011d3	3983	}
sahilmgandhi	18:6a4db94011d3	3984	}
sahilmgandhi	18:6a4db94011d3	3985	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	3986	}
sahilmgandhi	18:6a4db94011d3	3987
sahilmgandhi	18:6a4db94011d3	3988	/**
sahilmgandhi	18:6a4db94011d3	3989	* @brief Handle BTF flag for Master receiver
sahilmgandhi	18:6a4db94011d3	3990	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	3991	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	3992	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	3993	*/
sahilmgandhi	18:6a4db94011d3	3994	static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	3995	{
sahilmgandhi	18:6a4db94011d3	3996	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	3997	uint32_t tmp;
sahilmgandhi	18:6a4db94011d3	3998	uint32_t CurrentXferOptions = hi2c->XferOptions;
sahilmgandhi	18:6a4db94011d3	3999
sahilmgandhi	18:6a4db94011d3	4000	if(hi2c->XferCount == 3U)
sahilmgandhi	18:6a4db94011d3	4001	{
sahilmgandhi	18:6a4db94011d3	4002	if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (CurrentXferOptions == I2C_LAST_FRAME) \|\| (CurrentXferOptions == I2C_NO_OPTION_FRAME))
sahilmgandhi	18:6a4db94011d3	4003	{
sahilmgandhi	18:6a4db94011d3	4004	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4005	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4006	}
sahilmgandhi	18:6a4db94011d3	4007
sahilmgandhi	18:6a4db94011d3	4008	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	4009	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	4010	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	4011	}
sahilmgandhi	18:6a4db94011d3	4012	else if(hi2c->XferCount == 2U)
sahilmgandhi	18:6a4db94011d3	4013	{
sahilmgandhi	18:6a4db94011d3	4014	/* Prepare next transfer or stop current transfer */
sahilmgandhi	18:6a4db94011d3	4015	if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
sahilmgandhi	18:6a4db94011d3	4016	{
sahilmgandhi	18:6a4db94011d3	4017	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4018	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4019
sahilmgandhi	18:6a4db94011d3	4020	if((CurrentXferOptions == I2C_NEXT_FRAME) \|\| (CurrentXferOptions == I2C_FIRST_FRAME))
sahilmgandhi	18:6a4db94011d3	4021	{
sahilmgandhi	18:6a4db94011d3	4022	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	4023	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	4024	}
sahilmgandhi	18:6a4db94011d3	4025	tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
sahilmgandhi	18:6a4db94011d3	4026	hi2c->PreviousState = tmp \| (uint32_t)(hi2c->Mode);
sahilmgandhi	18:6a4db94011d3	4027	}
sahilmgandhi	18:6a4db94011d3	4028	else
sahilmgandhi	18:6a4db94011d3	4029	{
sahilmgandhi	18:6a4db94011d3	4030	hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	4031
sahilmgandhi	18:6a4db94011d3	4032	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	4033	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	4034	}
sahilmgandhi	18:6a4db94011d3	4035
sahilmgandhi	18:6a4db94011d3	4036	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	4037	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	4038	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	4039
sahilmgandhi	18:6a4db94011d3	4040	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	4041	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	4042	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	4043
sahilmgandhi	18:6a4db94011d3	4044	/* Disable EVT and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	4045	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	4046
sahilmgandhi	18:6a4db94011d3	4047	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4048	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	4049
sahilmgandhi	18:6a4db94011d3	4050	if(hi2c->Mode == HAL_I2C_MODE_MEM)
sahilmgandhi	18:6a4db94011d3	4051	{
sahilmgandhi	18:6a4db94011d3	4052	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4053
sahilmgandhi	18:6a4db94011d3	4054	HAL_I2C_MemRxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4055	}
sahilmgandhi	18:6a4db94011d3	4056	else
sahilmgandhi	18:6a4db94011d3	4057	{
sahilmgandhi	18:6a4db94011d3	4058	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4059
sahilmgandhi	18:6a4db94011d3	4060	HAL_I2C_MasterRxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4061	}
sahilmgandhi	18:6a4db94011d3	4062	}
sahilmgandhi	18:6a4db94011d3	4063	else
sahilmgandhi	18:6a4db94011d3	4064	{
sahilmgandhi	18:6a4db94011d3	4065	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	4066	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	4067	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	4068	}
sahilmgandhi	18:6a4db94011d3	4069	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4070	}
sahilmgandhi	18:6a4db94011d3	4071
sahilmgandhi	18:6a4db94011d3	4072
sahilmgandhi	18:6a4db94011d3	4073	/**
sahilmgandhi	18:6a4db94011d3	4074	* @brief Handle SB flag for Master
sahilmgandhi	18:6a4db94011d3	4075	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4076	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4077	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4078	*/
sahilmgandhi	18:6a4db94011d3	4079	static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	4080	{
sahilmgandhi	18:6a4db94011d3	4081	if(hi2c->Mode == HAL_I2C_MODE_MEM)
sahilmgandhi	18:6a4db94011d3	4082	{
sahilmgandhi	18:6a4db94011d3	4083	if(hi2c->EventCount == 0U)
sahilmgandhi	18:6a4db94011d3	4084	{
sahilmgandhi	18:6a4db94011d3	4085	/* Send slave address */
sahilmgandhi	18:6a4db94011d3	4086	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
sahilmgandhi	18:6a4db94011d3	4087	}
sahilmgandhi	18:6a4db94011d3	4088	else
sahilmgandhi	18:6a4db94011d3	4089	{
sahilmgandhi	18:6a4db94011d3	4090	hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
sahilmgandhi	18:6a4db94011d3	4091	}
sahilmgandhi	18:6a4db94011d3	4092	}
sahilmgandhi	18:6a4db94011d3	4093	else
sahilmgandhi	18:6a4db94011d3	4094	{
sahilmgandhi	18:6a4db94011d3	4095	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
sahilmgandhi	18:6a4db94011d3	4096	{
sahilmgandhi	18:6a4db94011d3	4097	/* Send slave 7 Bits address */
sahilmgandhi	18:6a4db94011d3	4098	if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
sahilmgandhi	18:6a4db94011d3	4099	{
sahilmgandhi	18:6a4db94011d3	4100	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
sahilmgandhi	18:6a4db94011d3	4101	}
sahilmgandhi	18:6a4db94011d3	4102	else
sahilmgandhi	18:6a4db94011d3	4103	{
sahilmgandhi	18:6a4db94011d3	4104	hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
sahilmgandhi	18:6a4db94011d3	4105	}
sahilmgandhi	18:6a4db94011d3	4106	}
sahilmgandhi	18:6a4db94011d3	4107	else
sahilmgandhi	18:6a4db94011d3	4108	{
sahilmgandhi	18:6a4db94011d3	4109	if(hi2c->EventCount == 0U)
sahilmgandhi	18:6a4db94011d3	4110	{
sahilmgandhi	18:6a4db94011d3	4111	/* Send header of slave address */
sahilmgandhi	18:6a4db94011d3	4112	hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(hi2c->Devaddress);
sahilmgandhi	18:6a4db94011d3	4113	}
sahilmgandhi	18:6a4db94011d3	4114	else if(hi2c->EventCount == 1U)
sahilmgandhi	18:6a4db94011d3	4115	{
sahilmgandhi	18:6a4db94011d3	4116	/* Send header of slave address */
sahilmgandhi	18:6a4db94011d3	4117	hi2c->Instance->DR = I2C_10BIT_HEADER_READ(hi2c->Devaddress);
sahilmgandhi	18:6a4db94011d3	4118	}
sahilmgandhi	18:6a4db94011d3	4119	}
sahilmgandhi	18:6a4db94011d3	4120	}
sahilmgandhi	18:6a4db94011d3	4121
sahilmgandhi	18:6a4db94011d3	4122	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4123	}
sahilmgandhi	18:6a4db94011d3	4124
sahilmgandhi	18:6a4db94011d3	4125	/**
sahilmgandhi	18:6a4db94011d3	4126	* @brief Handle ADD10 flag for Master
sahilmgandhi	18:6a4db94011d3	4127	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4128	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4129	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4130	*/
sahilmgandhi	18:6a4db94011d3	4131	static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	4132	{
sahilmgandhi	18:6a4db94011d3	4133	/* Send slave address */
sahilmgandhi	18:6a4db94011d3	4134	hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress);
sahilmgandhi	18:6a4db94011d3	4135
sahilmgandhi	18:6a4db94011d3	4136	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4137	}
sahilmgandhi	18:6a4db94011d3	4138
sahilmgandhi	18:6a4db94011d3	4139	/**
sahilmgandhi	18:6a4db94011d3	4140	* @brief Handle ADDR flag for Master
sahilmgandhi	18:6a4db94011d3	4141	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4142	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4143	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4144	*/
sahilmgandhi	18:6a4db94011d3	4145	static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	4146	{
sahilmgandhi	18:6a4db94011d3	4147	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	4148	uint32_t CurrentMode = hi2c->Mode;
sahilmgandhi	18:6a4db94011d3	4149	uint32_t CurrentXferOptions = hi2c->XferOptions;
sahilmgandhi	18:6a4db94011d3	4150	uint32_t Prev_State = hi2c->PreviousState;
sahilmgandhi	18:6a4db94011d3	4151
sahilmgandhi	18:6a4db94011d3	4152	if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
sahilmgandhi	18:6a4db94011d3	4153	{
sahilmgandhi	18:6a4db94011d3	4154	if((hi2c->EventCount == 0U) && (CurrentMode == HAL_I2C_MODE_MEM))
sahilmgandhi	18:6a4db94011d3	4155	{
sahilmgandhi	18:6a4db94011d3	4156	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4157	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4158	}
sahilmgandhi	18:6a4db94011d3	4159	else if((hi2c->EventCount == 0U) && (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT))
sahilmgandhi	18:6a4db94011d3	4160	{
sahilmgandhi	18:6a4db94011d3	4161	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4162	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4163
sahilmgandhi	18:6a4db94011d3	4164	/* Generate Restart */
sahilmgandhi	18:6a4db94011d3	4165	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	4166
sahilmgandhi	18:6a4db94011d3	4167	hi2c->EventCount++;
sahilmgandhi	18:6a4db94011d3	4168	}
sahilmgandhi	18:6a4db94011d3	4169	else
sahilmgandhi	18:6a4db94011d3	4170	{
sahilmgandhi	18:6a4db94011d3	4171	if(hi2c->XferCount == 0U)
sahilmgandhi	18:6a4db94011d3	4172	{
sahilmgandhi	18:6a4db94011d3	4173	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4174	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4175
sahilmgandhi	18:6a4db94011d3	4176	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	4177	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	4178	}
sahilmgandhi	18:6a4db94011d3	4179	else if(hi2c->XferCount == 1U)
sahilmgandhi	18:6a4db94011d3	4180	{
sahilmgandhi	18:6a4db94011d3	4181	if(CurrentXferOptions == I2C_NO_OPTION_FRAME)
sahilmgandhi	18:6a4db94011d3	4182	{
sahilmgandhi	18:6a4db94011d3	4183	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4184	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4185
sahilmgandhi	18:6a4db94011d3	4186	if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
sahilmgandhi	18:6a4db94011d3	4187	{
sahilmgandhi	18:6a4db94011d3	4188	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4189	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4190
sahilmgandhi	18:6a4db94011d3	4191	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4192	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4193	}
sahilmgandhi	18:6a4db94011d3	4194	else
sahilmgandhi	18:6a4db94011d3	4195	{
sahilmgandhi	18:6a4db94011d3	4196	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4197	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4198
sahilmgandhi	18:6a4db94011d3	4199	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	4200	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	4201	}
sahilmgandhi	18:6a4db94011d3	4202	}
sahilmgandhi	18:6a4db94011d3	4203	/* Prepare next transfer or stop current transfer */
sahilmgandhi	18:6a4db94011d3	4204	else if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) \
sahilmgandhi	18:6a4db94011d3	4205	&& (Prev_State != I2C_STATE_MASTER_BUSY_RX))
sahilmgandhi	18:6a4db94011d3	4206	{
sahilmgandhi	18:6a4db94011d3	4207	if(hi2c->XferOptions != I2C_NEXT_FRAME)
sahilmgandhi	18:6a4db94011d3	4208	{
sahilmgandhi	18:6a4db94011d3	4209	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4210	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4211	}
sahilmgandhi	18:6a4db94011d3	4212	else
sahilmgandhi	18:6a4db94011d3	4213	{
sahilmgandhi	18:6a4db94011d3	4214	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4215	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4216	}
sahilmgandhi	18:6a4db94011d3	4217
sahilmgandhi	18:6a4db94011d3	4218	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4219	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4220	}
sahilmgandhi	18:6a4db94011d3	4221	else
sahilmgandhi	18:6a4db94011d3	4222	{
sahilmgandhi	18:6a4db94011d3	4223	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4224	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4225
sahilmgandhi	18:6a4db94011d3	4226	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4227	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4228
sahilmgandhi	18:6a4db94011d3	4229	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	4230	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	4231	}
sahilmgandhi	18:6a4db94011d3	4232	}
sahilmgandhi	18:6a4db94011d3	4233	else if(hi2c->XferCount == 2U)
sahilmgandhi	18:6a4db94011d3	4234	{
sahilmgandhi	18:6a4db94011d3	4235	if(hi2c->XferOptions != I2C_NEXT_FRAME)
sahilmgandhi	18:6a4db94011d3	4236	{
sahilmgandhi	18:6a4db94011d3	4237	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4238	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4239
sahilmgandhi	18:6a4db94011d3	4240	/* Enable Pos */
sahilmgandhi	18:6a4db94011d3	4241	hi2c->Instance->CR1 \|= I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	4242	}
sahilmgandhi	18:6a4db94011d3	4243	else
sahilmgandhi	18:6a4db94011d3	4244	{
sahilmgandhi	18:6a4db94011d3	4245	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4246	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4247	}
sahilmgandhi	18:6a4db94011d3	4248
sahilmgandhi	18:6a4db94011d3	4249	if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
sahilmgandhi	18:6a4db94011d3	4250	{
sahilmgandhi	18:6a4db94011d3	4251	/* Enable Last DMA bit */
sahilmgandhi	18:6a4db94011d3	4252	hi2c->Instance->CR2 \|= I2C_CR2_LAST;
sahilmgandhi	18:6a4db94011d3	4253	}
sahilmgandhi	18:6a4db94011d3	4254
sahilmgandhi	18:6a4db94011d3	4255	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4256	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4257	}
sahilmgandhi	18:6a4db94011d3	4258	else
sahilmgandhi	18:6a4db94011d3	4259	{
sahilmgandhi	18:6a4db94011d3	4260	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4261	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4262
sahilmgandhi	18:6a4db94011d3	4263	if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
sahilmgandhi	18:6a4db94011d3	4264	{
sahilmgandhi	18:6a4db94011d3	4265	/* Enable Last DMA bit */
sahilmgandhi	18:6a4db94011d3	4266	hi2c->Instance->CR2 \|= I2C_CR2_LAST;
sahilmgandhi	18:6a4db94011d3	4267	}
sahilmgandhi	18:6a4db94011d3	4268
sahilmgandhi	18:6a4db94011d3	4269	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4270	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4271	}
sahilmgandhi	18:6a4db94011d3	4272
sahilmgandhi	18:6a4db94011d3	4273	/* Reset Event counter */
sahilmgandhi	18:6a4db94011d3	4274	hi2c->EventCount = 0U;
sahilmgandhi	18:6a4db94011d3	4275	}
sahilmgandhi	18:6a4db94011d3	4276	}
sahilmgandhi	18:6a4db94011d3	4277	else
sahilmgandhi	18:6a4db94011d3	4278	{
sahilmgandhi	18:6a4db94011d3	4279	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4280	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4281	}
sahilmgandhi	18:6a4db94011d3	4282
sahilmgandhi	18:6a4db94011d3	4283	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4284	}
sahilmgandhi	18:6a4db94011d3	4285
sahilmgandhi	18:6a4db94011d3	4286	/**
sahilmgandhi	18:6a4db94011d3	4287	* @brief Handle TXE flag for Slave
sahilmgandhi	18:6a4db94011d3	4288	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4289	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4290	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4291	*/
sahilmgandhi	18:6a4db94011d3	4292	static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	4293	{
sahilmgandhi	18:6a4db94011d3	4294	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	4295	uint32_t CurrentState = hi2c->State;
sahilmgandhi	18:6a4db94011d3	4296
sahilmgandhi	18:6a4db94011d3	4297	if(hi2c->XferCount != 0U)
sahilmgandhi	18:6a4db94011d3	4298	{
sahilmgandhi	18:6a4db94011d3	4299	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	4300	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
sahilmgandhi	18:6a4db94011d3	4301	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	4302
sahilmgandhi	18:6a4db94011d3	4303	if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
sahilmgandhi	18:6a4db94011d3	4304	{
sahilmgandhi	18:6a4db94011d3	4305	/* Last Byte is received, disable Interrupt */
sahilmgandhi	18:6a4db94011d3	4306	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
sahilmgandhi	18:6a4db94011d3	4307
sahilmgandhi	18:6a4db94011d3	4308	/* Set state at HAL_I2C_STATE_LISTEN */
sahilmgandhi	18:6a4db94011d3	4309	hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	4310	hi2c->State = HAL_I2C_STATE_LISTEN;
sahilmgandhi	18:6a4db94011d3	4311
sahilmgandhi	18:6a4db94011d3	4312	/* Call the Tx complete callback to inform upper layer of the end of receive process */
sahilmgandhi	18:6a4db94011d3	4313	HAL_I2C_SlaveTxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4314	}
sahilmgandhi	18:6a4db94011d3	4315	}
sahilmgandhi	18:6a4db94011d3	4316	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4317	}
sahilmgandhi	18:6a4db94011d3	4318
sahilmgandhi	18:6a4db94011d3	4319	/**
sahilmgandhi	18:6a4db94011d3	4320	* @brief Handle BTF flag for Slave transmitter
sahilmgandhi	18:6a4db94011d3	4321	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4322	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4323	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4324	*/
sahilmgandhi	18:6a4db94011d3	4325	static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	4326	{
sahilmgandhi	18:6a4db94011d3	4327	if(hi2c->XferCount != 0U)
sahilmgandhi	18:6a4db94011d3	4328	{
sahilmgandhi	18:6a4db94011d3	4329	/* Write data to DR */
sahilmgandhi	18:6a4db94011d3	4330	hi2c->Instance->DR = (*hi2c->pBuffPtr++);
sahilmgandhi	18:6a4db94011d3	4331	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	4332	}
sahilmgandhi	18:6a4db94011d3	4333	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4334	}
sahilmgandhi	18:6a4db94011d3	4335
sahilmgandhi	18:6a4db94011d3	4336	/**
sahilmgandhi	18:6a4db94011d3	4337	* @brief Handle RXNE flag for Slave
sahilmgandhi	18:6a4db94011d3	4338	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4339	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4340	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4341	*/
sahilmgandhi	18:6a4db94011d3	4342	static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	4343	{
sahilmgandhi	18:6a4db94011d3	4344	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	4345	uint32_t CurrentState = hi2c->State;
sahilmgandhi	18:6a4db94011d3	4346
sahilmgandhi	18:6a4db94011d3	4347	if(hi2c->XferCount != 0U)
sahilmgandhi	18:6a4db94011d3	4348	{
sahilmgandhi	18:6a4db94011d3	4349	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	4350	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	4351	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	4352
sahilmgandhi	18:6a4db94011d3	4353	if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
sahilmgandhi	18:6a4db94011d3	4354	{
sahilmgandhi	18:6a4db94011d3	4355	/* Last Byte is received, disable Interrupt */
sahilmgandhi	18:6a4db94011d3	4356	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
sahilmgandhi	18:6a4db94011d3	4357
sahilmgandhi	18:6a4db94011d3	4358	/* Set state at HAL_I2C_STATE_LISTEN */
sahilmgandhi	18:6a4db94011d3	4359	hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
sahilmgandhi	18:6a4db94011d3	4360	hi2c->State = HAL_I2C_STATE_LISTEN;
sahilmgandhi	18:6a4db94011d3	4361
sahilmgandhi	18:6a4db94011d3	4362	/* Call the Rx complete callback to inform upper layer of the end of receive process */
sahilmgandhi	18:6a4db94011d3	4363	HAL_I2C_SlaveRxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4364	}
sahilmgandhi	18:6a4db94011d3	4365	}
sahilmgandhi	18:6a4db94011d3	4366	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4367	}
sahilmgandhi	18:6a4db94011d3	4368
sahilmgandhi	18:6a4db94011d3	4369	/**
sahilmgandhi	18:6a4db94011d3	4370	* @brief Handle BTF flag for Slave receiver
sahilmgandhi	18:6a4db94011d3	4371	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4372	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4373	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4374	*/
sahilmgandhi	18:6a4db94011d3	4375	static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	4376	{
sahilmgandhi	18:6a4db94011d3	4377	if(hi2c->XferCount != 0U)
sahilmgandhi	18:6a4db94011d3	4378	{
sahilmgandhi	18:6a4db94011d3	4379	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	4380	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	4381	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	4382	}
sahilmgandhi	18:6a4db94011d3	4383	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4384	}
sahilmgandhi	18:6a4db94011d3	4385
sahilmgandhi	18:6a4db94011d3	4386	/**
sahilmgandhi	18:6a4db94011d3	4387	* @brief Handle ADD flag for Slave
sahilmgandhi	18:6a4db94011d3	4388	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4389	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4390	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4391	*/
sahilmgandhi	18:6a4db94011d3	4392	static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	4393	{
sahilmgandhi	18:6a4db94011d3	4394	uint8_t TransferDirection = I2C_DIRECTION_RECEIVE;
sahilmgandhi	18:6a4db94011d3	4395	uint16_t SlaveAddrCode = 0U;
sahilmgandhi	18:6a4db94011d3	4396
sahilmgandhi	18:6a4db94011d3	4397	/* Transfer Direction requested by Master */
sahilmgandhi	18:6a4db94011d3	4398	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == RESET)
sahilmgandhi	18:6a4db94011d3	4399	{
sahilmgandhi	18:6a4db94011d3	4400	TransferDirection = I2C_DIRECTION_TRANSMIT;
sahilmgandhi	18:6a4db94011d3	4401	}
sahilmgandhi	18:6a4db94011d3	4402
sahilmgandhi	18:6a4db94011d3	4403	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_DUALF) == RESET)
sahilmgandhi	18:6a4db94011d3	4404	{
sahilmgandhi	18:6a4db94011d3	4405	SlaveAddrCode = hi2c->Init.OwnAddress1;
sahilmgandhi	18:6a4db94011d3	4406	}
sahilmgandhi	18:6a4db94011d3	4407	else
sahilmgandhi	18:6a4db94011d3	4408	{
sahilmgandhi	18:6a4db94011d3	4409	SlaveAddrCode = hi2c->Init.OwnAddress2;
sahilmgandhi	18:6a4db94011d3	4410	}
sahilmgandhi	18:6a4db94011d3	4411
sahilmgandhi	18:6a4db94011d3	4412	/* Call Slave Addr callback */
sahilmgandhi	18:6a4db94011d3	4413	HAL_I2C_AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
sahilmgandhi	18:6a4db94011d3	4414
sahilmgandhi	18:6a4db94011d3	4415	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4416	}
sahilmgandhi	18:6a4db94011d3	4417
sahilmgandhi	18:6a4db94011d3	4418	/**
sahilmgandhi	18:6a4db94011d3	4419	* @brief Handle STOPF flag for Slave
sahilmgandhi	18:6a4db94011d3	4420	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4421	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4422	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4423	*/
sahilmgandhi	18:6a4db94011d3	4424	static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	4425	{
sahilmgandhi	18:6a4db94011d3	4426	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	4427	uint32_t CurrentState = hi2c->State;
sahilmgandhi	18:6a4db94011d3	4428
sahilmgandhi	18:6a4db94011d3	4429	/* Disable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	4430	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	4431
sahilmgandhi	18:6a4db94011d3	4432	/* Clear STOPF flag */
sahilmgandhi	18:6a4db94011d3	4433	__HAL_I2C_CLEAR_STOPFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4434
sahilmgandhi	18:6a4db94011d3	4435	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4436	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4437
sahilmgandhi	18:6a4db94011d3	4438	/* If a DMA is ongoing, Update handle size context */
sahilmgandhi	18:6a4db94011d3	4439	if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
sahilmgandhi	18:6a4db94011d3	4440	{
sahilmgandhi	18:6a4db94011d3	4441	if((hi2c->State == HAL_I2C_STATE_BUSY_RX) \|\| (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN))
sahilmgandhi	18:6a4db94011d3	4442	{
sahilmgandhi	18:6a4db94011d3	4443	hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmarx);
sahilmgandhi	18:6a4db94011d3	4444	}
sahilmgandhi	18:6a4db94011d3	4445	else
sahilmgandhi	18:6a4db94011d3	4446	{
sahilmgandhi	18:6a4db94011d3	4447	hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmatx);
sahilmgandhi	18:6a4db94011d3	4448	}
sahilmgandhi	18:6a4db94011d3	4449	}
sahilmgandhi	18:6a4db94011d3	4450
sahilmgandhi	18:6a4db94011d3	4451	/* All data are not transferred, so set error code accordingly */
sahilmgandhi	18:6a4db94011d3	4452	if(hi2c->XferCount != 0U)
sahilmgandhi	18:6a4db94011d3	4453	{
sahilmgandhi	18:6a4db94011d3	4454	/* Store Last receive data if any */
sahilmgandhi	18:6a4db94011d3	4455	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
sahilmgandhi	18:6a4db94011d3	4456	{
sahilmgandhi	18:6a4db94011d3	4457	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	4458	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	4459	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	4460	}
sahilmgandhi	18:6a4db94011d3	4461
sahilmgandhi	18:6a4db94011d3	4462	/* Store Last receive data if any */
sahilmgandhi	18:6a4db94011d3	4463	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
sahilmgandhi	18:6a4db94011d3	4464	{
sahilmgandhi	18:6a4db94011d3	4465	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	4466	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	4467	hi2c->XferCount--;
sahilmgandhi	18:6a4db94011d3	4468	}
sahilmgandhi	18:6a4db94011d3	4469
sahilmgandhi	18:6a4db94011d3	4470	/* Set ErrorCode corresponding to a Non-Acknowledge */
sahilmgandhi	18:6a4db94011d3	4471	hi2c->ErrorCode \|= HAL_I2C_ERROR_AF;
sahilmgandhi	18:6a4db94011d3	4472	}
sahilmgandhi	18:6a4db94011d3	4473
sahilmgandhi	18:6a4db94011d3	4474	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
sahilmgandhi	18:6a4db94011d3	4475	{
sahilmgandhi	18:6a4db94011d3	4476	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	4477	I2C_ITError(hi2c);
sahilmgandhi	18:6a4db94011d3	4478	}
sahilmgandhi	18:6a4db94011d3	4479	else
sahilmgandhi	18:6a4db94011d3	4480	{
sahilmgandhi	18:6a4db94011d3	4481	if((CurrentState == HAL_I2C_STATE_LISTEN ) \|\| (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN) \|\| \
sahilmgandhi	18:6a4db94011d3	4482	(CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
sahilmgandhi	18:6a4db94011d3	4483	{
sahilmgandhi	18:6a4db94011d3	4484	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	4485	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	4486	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4487	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4488
sahilmgandhi	18:6a4db94011d3	4489	/* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
sahilmgandhi	18:6a4db94011d3	4490	HAL_I2C_ListenCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4491	}
sahilmgandhi	18:6a4db94011d3	4492	else
sahilmgandhi	18:6a4db94011d3	4493	{
sahilmgandhi	18:6a4db94011d3	4494	if((hi2c->PreviousState == I2C_STATE_SLAVE_BUSY_RX) \|\| (CurrentState == HAL_I2C_STATE_BUSY_RX))
sahilmgandhi	18:6a4db94011d3	4495	{
sahilmgandhi	18:6a4db94011d3	4496	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	4497	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4498	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4499
sahilmgandhi	18:6a4db94011d3	4500	HAL_I2C_SlaveRxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4501	}
sahilmgandhi	18:6a4db94011d3	4502	}
sahilmgandhi	18:6a4db94011d3	4503	}
sahilmgandhi	18:6a4db94011d3	4504	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4505	}
sahilmgandhi	18:6a4db94011d3	4506
sahilmgandhi	18:6a4db94011d3	4507	/**
sahilmgandhi	18:6a4db94011d3	4508	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4509	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4510	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4511	*/
sahilmgandhi	18:6a4db94011d3	4512	static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	4513	{
sahilmgandhi	18:6a4db94011d3	4514	/* Declaration of temporary variables to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	4515	uint32_t CurrentState = hi2c->State;
sahilmgandhi	18:6a4db94011d3	4516	uint32_t CurrentXferOptions = hi2c->XferOptions;
sahilmgandhi	18:6a4db94011d3	4517
sahilmgandhi	18:6a4db94011d3	4518	if(((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (CurrentXferOptions == I2C_LAST_FRAME)) && \
sahilmgandhi	18:6a4db94011d3	4519	(CurrentState == HAL_I2C_STATE_LISTEN))
sahilmgandhi	18:6a4db94011d3	4520	{
sahilmgandhi	18:6a4db94011d3	4521	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	4522
sahilmgandhi	18:6a4db94011d3	4523	/* Disable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	4524	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	4525
sahilmgandhi	18:6a4db94011d3	4526	/* Clear AF flag */
sahilmgandhi	18:6a4db94011d3	4527	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	4528
sahilmgandhi	18:6a4db94011d3	4529	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4530	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4531
sahilmgandhi	18:6a4db94011d3	4532	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	4533	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4534	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4535
sahilmgandhi	18:6a4db94011d3	4536	/* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
sahilmgandhi	18:6a4db94011d3	4537	HAL_I2C_ListenCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4538	}
sahilmgandhi	18:6a4db94011d3	4539	else if(CurrentState == HAL_I2C_STATE_BUSY_TX)
sahilmgandhi	18:6a4db94011d3	4540	{
sahilmgandhi	18:6a4db94011d3	4541	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	4542	hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
sahilmgandhi	18:6a4db94011d3	4543	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4544	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4545
sahilmgandhi	18:6a4db94011d3	4546	/* Disable EVT, BUF and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	4547	__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_BUF \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	4548
sahilmgandhi	18:6a4db94011d3	4549	/* Clear AF flag */
sahilmgandhi	18:6a4db94011d3	4550	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	4551
sahilmgandhi	18:6a4db94011d3	4552	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4553	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4554
sahilmgandhi	18:6a4db94011d3	4555	HAL_I2C_SlaveTxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4556	}
sahilmgandhi	18:6a4db94011d3	4557	else
sahilmgandhi	18:6a4db94011d3	4558	{
sahilmgandhi	18:6a4db94011d3	4559	/* Clear AF flag only */
sahilmgandhi	18:6a4db94011d3	4560	/* State Listen, but XferOptions == FIRST or NEXT */
sahilmgandhi	18:6a4db94011d3	4561	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	4562	}
sahilmgandhi	18:6a4db94011d3	4563
sahilmgandhi	18:6a4db94011d3	4564	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4565	}
sahilmgandhi	18:6a4db94011d3	4566
sahilmgandhi	18:6a4db94011d3	4567	/**
sahilmgandhi	18:6a4db94011d3	4568	* @brief I2C interrupts error process
sahilmgandhi	18:6a4db94011d3	4569	* @param hi2c I2C handle.
sahilmgandhi	18:6a4db94011d3	4570	* @retval None
sahilmgandhi	18:6a4db94011d3	4571	*/
sahilmgandhi	18:6a4db94011d3	4572	static void I2C_ITError(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	4573	{
sahilmgandhi	18:6a4db94011d3	4574	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	4575	uint32_t CurrentState = hi2c->State;
sahilmgandhi	18:6a4db94011d3	4576
sahilmgandhi	18:6a4db94011d3	4577	if((CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN) \|\| (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
sahilmgandhi	18:6a4db94011d3	4578	{
sahilmgandhi	18:6a4db94011d3	4579	/* keep HAL_I2C_STATE_LISTEN */
sahilmgandhi	18:6a4db94011d3	4580	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	4581	hi2c->State = HAL_I2C_STATE_LISTEN;
sahilmgandhi	18:6a4db94011d3	4582	}
sahilmgandhi	18:6a4db94011d3	4583	else
sahilmgandhi	18:6a4db94011d3	4584	{
sahilmgandhi	18:6a4db94011d3	4585	/* If state is an abort treatment on going, don't change state */
sahilmgandhi	18:6a4db94011d3	4586	/* This change will be do later */
sahilmgandhi	18:6a4db94011d3	4587	if((hi2c->State != HAL_I2C_STATE_ABORT) && ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) != I2C_CR2_DMAEN))
sahilmgandhi	18:6a4db94011d3	4588	{
sahilmgandhi	18:6a4db94011d3	4589	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4590	}
sahilmgandhi	18:6a4db94011d3	4591	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	4592	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4593	}
sahilmgandhi	18:6a4db94011d3	4594
sahilmgandhi	18:6a4db94011d3	4595	/* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */
sahilmgandhi	18:6a4db94011d3	4596	hi2c->Instance->CR1 &= ~I2C_CR1_POS;
sahilmgandhi	18:6a4db94011d3	4597
sahilmgandhi	18:6a4db94011d3	4598	/* Abort DMA transfer */
sahilmgandhi	18:6a4db94011d3	4599	if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
sahilmgandhi	18:6a4db94011d3	4600	{
sahilmgandhi	18:6a4db94011d3	4601	hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
sahilmgandhi	18:6a4db94011d3	4602
sahilmgandhi	18:6a4db94011d3	4603	if(hi2c->hdmatx->State != HAL_DMA_STATE_READY)
sahilmgandhi	18:6a4db94011d3	4604	{
sahilmgandhi	18:6a4db94011d3	4605	/* Set the DMA Abort callback :
sahilmgandhi	18:6a4db94011d3	4606	will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
sahilmgandhi	18:6a4db94011d3	4607	hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
sahilmgandhi	18:6a4db94011d3	4608
sahilmgandhi	18:6a4db94011d3	4609	if(HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4610	{
sahilmgandhi	18:6a4db94011d3	4611	/* Disable I2C peripheral to prevent dummy data in buffer */
sahilmgandhi	18:6a4db94011d3	4612	__HAL_I2C_DISABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	4613
sahilmgandhi	18:6a4db94011d3	4614	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4615
sahilmgandhi	18:6a4db94011d3	4616	/* Call Directly XferAbortCallback function in case of error */
sahilmgandhi	18:6a4db94011d3	4617	hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
sahilmgandhi	18:6a4db94011d3	4618	}
sahilmgandhi	18:6a4db94011d3	4619	}
sahilmgandhi	18:6a4db94011d3	4620	else
sahilmgandhi	18:6a4db94011d3	4621	{
sahilmgandhi	18:6a4db94011d3	4622	/* Set the DMA Abort callback :
sahilmgandhi	18:6a4db94011d3	4623	will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
sahilmgandhi	18:6a4db94011d3	4624	hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
sahilmgandhi	18:6a4db94011d3	4625
sahilmgandhi	18:6a4db94011d3	4626	if(HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4627	{
sahilmgandhi	18:6a4db94011d3	4628	/* Store Last receive data if any */
sahilmgandhi	18:6a4db94011d3	4629	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
sahilmgandhi	18:6a4db94011d3	4630	{
sahilmgandhi	18:6a4db94011d3	4631	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	4632	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	4633	}
sahilmgandhi	18:6a4db94011d3	4634
sahilmgandhi	18:6a4db94011d3	4635	/* Disable I2C peripheral to prevent dummy data in buffer */
sahilmgandhi	18:6a4db94011d3	4636	__HAL_I2C_DISABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	4637
sahilmgandhi	18:6a4db94011d3	4638	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4639
sahilmgandhi	18:6a4db94011d3	4640	/* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
sahilmgandhi	18:6a4db94011d3	4641	hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
sahilmgandhi	18:6a4db94011d3	4642	}
sahilmgandhi	18:6a4db94011d3	4643	}
sahilmgandhi	18:6a4db94011d3	4644	}
sahilmgandhi	18:6a4db94011d3	4645	else if(hi2c->State == HAL_I2C_STATE_ABORT)
sahilmgandhi	18:6a4db94011d3	4646	{
sahilmgandhi	18:6a4db94011d3	4647	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4648	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	4649
sahilmgandhi	18:6a4db94011d3	4650	/* Store Last receive data if any */
sahilmgandhi	18:6a4db94011d3	4651	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
sahilmgandhi	18:6a4db94011d3	4652	{
sahilmgandhi	18:6a4db94011d3	4653	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	4654	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	4655	}
sahilmgandhi	18:6a4db94011d3	4656
sahilmgandhi	18:6a4db94011d3	4657	/* Disable I2C peripheral to prevent dummy data in buffer */
sahilmgandhi	18:6a4db94011d3	4658	__HAL_I2C_DISABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	4659
sahilmgandhi	18:6a4db94011d3	4660	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	4661	HAL_I2C_AbortCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4662	}
sahilmgandhi	18:6a4db94011d3	4663	else
sahilmgandhi	18:6a4db94011d3	4664	{
sahilmgandhi	18:6a4db94011d3	4665	/* Store Last receive data if any */
sahilmgandhi	18:6a4db94011d3	4666	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
sahilmgandhi	18:6a4db94011d3	4667	{
sahilmgandhi	18:6a4db94011d3	4668	/* Read data from DR */
sahilmgandhi	18:6a4db94011d3	4669	(*hi2c->pBuffPtr++) = hi2c->Instance->DR;
sahilmgandhi	18:6a4db94011d3	4670	}
sahilmgandhi	18:6a4db94011d3	4671
sahilmgandhi	18:6a4db94011d3	4672	/* Call user error callback */
sahilmgandhi	18:6a4db94011d3	4673	HAL_I2C_ErrorCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4674	}
sahilmgandhi	18:6a4db94011d3	4675	/* STOP Flag is not set after a NACK reception */
sahilmgandhi	18:6a4db94011d3	4676	/* So may inform upper layer that listen phase is stopped */
sahilmgandhi	18:6a4db94011d3	4677	/* during NACK error treatment */
sahilmgandhi	18:6a4db94011d3	4678	if((hi2c->State == HAL_I2C_STATE_LISTEN) && ((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF))
sahilmgandhi	18:6a4db94011d3	4679	{
sahilmgandhi	18:6a4db94011d3	4680	hi2c->XferOptions = I2C_NO_OPTION_FRAME;
sahilmgandhi	18:6a4db94011d3	4681	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	4682	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	4683	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	4684
sahilmgandhi	18:6a4db94011d3	4685	/* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
sahilmgandhi	18:6a4db94011d3	4686	HAL_I2C_ListenCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	4687	}
sahilmgandhi	18:6a4db94011d3	4688	}
sahilmgandhi	18:6a4db94011d3	4689
sahilmgandhi	18:6a4db94011d3	4690	/**
sahilmgandhi	18:6a4db94011d3	4691	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4692	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4693	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	4694	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	4695	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	4696	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	4697	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4698	*/
sahilmgandhi	18:6a4db94011d3	4699	static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	4700	{
sahilmgandhi	18:6a4db94011d3	4701	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	4702	uint32_t CurrentXferOptions = hi2c->XferOptions;
sahilmgandhi	18:6a4db94011d3	4703
sahilmgandhi	18:6a4db94011d3	4704	/* Generate Start condition if first transfer */
sahilmgandhi	18:6a4db94011d3	4705	if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (CurrentXferOptions == I2C_FIRST_FRAME) \|\| (CurrentXferOptions == I2C_NO_OPTION_FRAME))
sahilmgandhi	18:6a4db94011d3	4706	{
sahilmgandhi	18:6a4db94011d3	4707	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	4708	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	4709	}
sahilmgandhi	18:6a4db94011d3	4710	else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
sahilmgandhi	18:6a4db94011d3	4711	{
sahilmgandhi	18:6a4db94011d3	4712	/* Generate ReStart */
sahilmgandhi	18:6a4db94011d3	4713	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	4714	}
sahilmgandhi	18:6a4db94011d3	4715
sahilmgandhi	18:6a4db94011d3	4716	/* Wait until SB flag is set */
sahilmgandhi	18:6a4db94011d3	4717	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4718	{
sahilmgandhi	18:6a4db94011d3	4719	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4720	}
sahilmgandhi	18:6a4db94011d3	4721
sahilmgandhi	18:6a4db94011d3	4722	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
sahilmgandhi	18:6a4db94011d3	4723	{
sahilmgandhi	18:6a4db94011d3	4724	/* Send slave address */
sahilmgandhi	18:6a4db94011d3	4725	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
sahilmgandhi	18:6a4db94011d3	4726	}
sahilmgandhi	18:6a4db94011d3	4727	else
sahilmgandhi	18:6a4db94011d3	4728	{
sahilmgandhi	18:6a4db94011d3	4729	/* Send header of slave address */
sahilmgandhi	18:6a4db94011d3	4730	hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
sahilmgandhi	18:6a4db94011d3	4731
sahilmgandhi	18:6a4db94011d3	4732	/* Wait until ADD10 flag is set */
sahilmgandhi	18:6a4db94011d3	4733	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4734	{
sahilmgandhi	18:6a4db94011d3	4735	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4736	{
sahilmgandhi	18:6a4db94011d3	4737	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4738	}
sahilmgandhi	18:6a4db94011d3	4739	else
sahilmgandhi	18:6a4db94011d3	4740	{
sahilmgandhi	18:6a4db94011d3	4741	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4742	}
sahilmgandhi	18:6a4db94011d3	4743	}
sahilmgandhi	18:6a4db94011d3	4744
sahilmgandhi	18:6a4db94011d3	4745	/* Send slave address */
sahilmgandhi	18:6a4db94011d3	4746	hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
sahilmgandhi	18:6a4db94011d3	4747	}
sahilmgandhi	18:6a4db94011d3	4748
sahilmgandhi	18:6a4db94011d3	4749	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	4750	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4751	{
sahilmgandhi	18:6a4db94011d3	4752	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4753	{
sahilmgandhi	18:6a4db94011d3	4754	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4755	}
sahilmgandhi	18:6a4db94011d3	4756	else
sahilmgandhi	18:6a4db94011d3	4757	{
sahilmgandhi	18:6a4db94011d3	4758	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4759	}
sahilmgandhi	18:6a4db94011d3	4760	}
sahilmgandhi	18:6a4db94011d3	4761
sahilmgandhi	18:6a4db94011d3	4762	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4763	}
sahilmgandhi	18:6a4db94011d3	4764
sahilmgandhi	18:6a4db94011d3	4765	/**
sahilmgandhi	18:6a4db94011d3	4766	* @brief Master sends target device address for read request.
sahilmgandhi	18:6a4db94011d3	4767	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4768	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4769	* @param DevAddress Target device address: The device 7 bits address value
sahilmgandhi	18:6a4db94011d3	4770	* in datasheet must be shift at right before call interface
sahilmgandhi	18:6a4db94011d3	4771	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	4772	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	4773	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4774	*/
sahilmgandhi	18:6a4db94011d3	4775	static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	4776	{
sahilmgandhi	18:6a4db94011d3	4777	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	4778	uint32_t CurrentXferOptions = hi2c->XferOptions;
sahilmgandhi	18:6a4db94011d3	4779
sahilmgandhi	18:6a4db94011d3	4780	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4781	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4782
sahilmgandhi	18:6a4db94011d3	4783	/* Generate Start condition if first transfer */
sahilmgandhi	18:6a4db94011d3	4784	if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) \|\| (CurrentXferOptions == I2C_FIRST_FRAME) \|\| (CurrentXferOptions == I2C_NO_OPTION_FRAME))
sahilmgandhi	18:6a4db94011d3	4785	{
sahilmgandhi	18:6a4db94011d3	4786	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	4787	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	4788	}
sahilmgandhi	18:6a4db94011d3	4789	else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
sahilmgandhi	18:6a4db94011d3	4790	{
sahilmgandhi	18:6a4db94011d3	4791	/* Generate ReStart */
sahilmgandhi	18:6a4db94011d3	4792	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	4793	}
sahilmgandhi	18:6a4db94011d3	4794
sahilmgandhi	18:6a4db94011d3	4795	/* Wait until SB flag is set */
sahilmgandhi	18:6a4db94011d3	4796	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4797	{
sahilmgandhi	18:6a4db94011d3	4798	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4799	}
sahilmgandhi	18:6a4db94011d3	4800
sahilmgandhi	18:6a4db94011d3	4801	if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
sahilmgandhi	18:6a4db94011d3	4802	{
sahilmgandhi	18:6a4db94011d3	4803	/* Send slave address */
sahilmgandhi	18:6a4db94011d3	4804	hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
sahilmgandhi	18:6a4db94011d3	4805	}
sahilmgandhi	18:6a4db94011d3	4806	else
sahilmgandhi	18:6a4db94011d3	4807	{
sahilmgandhi	18:6a4db94011d3	4808	/* Send header of slave address */
sahilmgandhi	18:6a4db94011d3	4809	hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
sahilmgandhi	18:6a4db94011d3	4810
sahilmgandhi	18:6a4db94011d3	4811	/* Wait until ADD10 flag is set */
sahilmgandhi	18:6a4db94011d3	4812	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4813	{
sahilmgandhi	18:6a4db94011d3	4814	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4815	{
sahilmgandhi	18:6a4db94011d3	4816	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4817	}
sahilmgandhi	18:6a4db94011d3	4818	else
sahilmgandhi	18:6a4db94011d3	4819	{
sahilmgandhi	18:6a4db94011d3	4820	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4821	}
sahilmgandhi	18:6a4db94011d3	4822	}
sahilmgandhi	18:6a4db94011d3	4823
sahilmgandhi	18:6a4db94011d3	4824	/* Send slave address */
sahilmgandhi	18:6a4db94011d3	4825	hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
sahilmgandhi	18:6a4db94011d3	4826
sahilmgandhi	18:6a4db94011d3	4827	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	4828	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4829	{
sahilmgandhi	18:6a4db94011d3	4830	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4831	{
sahilmgandhi	18:6a4db94011d3	4832	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4833	}
sahilmgandhi	18:6a4db94011d3	4834	else
sahilmgandhi	18:6a4db94011d3	4835	{
sahilmgandhi	18:6a4db94011d3	4836	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4837	}
sahilmgandhi	18:6a4db94011d3	4838	}
sahilmgandhi	18:6a4db94011d3	4839
sahilmgandhi	18:6a4db94011d3	4840	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4841	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4842
sahilmgandhi	18:6a4db94011d3	4843	/* Generate Restart */
sahilmgandhi	18:6a4db94011d3	4844	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	4845
sahilmgandhi	18:6a4db94011d3	4846	/* Wait until SB flag is set */
sahilmgandhi	18:6a4db94011d3	4847	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4848	{
sahilmgandhi	18:6a4db94011d3	4849	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4850	}
sahilmgandhi	18:6a4db94011d3	4851
sahilmgandhi	18:6a4db94011d3	4852	/* Send header of slave address */
sahilmgandhi	18:6a4db94011d3	4853	hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
sahilmgandhi	18:6a4db94011d3	4854	}
sahilmgandhi	18:6a4db94011d3	4855
sahilmgandhi	18:6a4db94011d3	4856	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	4857	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4858	{
sahilmgandhi	18:6a4db94011d3	4859	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4860	{
sahilmgandhi	18:6a4db94011d3	4861	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4862	}
sahilmgandhi	18:6a4db94011d3	4863	else
sahilmgandhi	18:6a4db94011d3	4864	{
sahilmgandhi	18:6a4db94011d3	4865	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4866	}
sahilmgandhi	18:6a4db94011d3	4867	}
sahilmgandhi	18:6a4db94011d3	4868
sahilmgandhi	18:6a4db94011d3	4869	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4870	}
sahilmgandhi	18:6a4db94011d3	4871
sahilmgandhi	18:6a4db94011d3	4872	/**
sahilmgandhi	18:6a4db94011d3	4873	* @brief Master sends target device address followed by internal memory address for write request.
sahilmgandhi	18:6a4db94011d3	4874	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4875	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4876	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	4877	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	4878	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	4879	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	4880	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	4881	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4882	*/
sahilmgandhi	18:6a4db94011d3	4883	static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	4884	{
sahilmgandhi	18:6a4db94011d3	4885	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	4886	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	4887
sahilmgandhi	18:6a4db94011d3	4888	/* Wait until SB flag is set */
sahilmgandhi	18:6a4db94011d3	4889	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4890	{
sahilmgandhi	18:6a4db94011d3	4891	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4892	}
sahilmgandhi	18:6a4db94011d3	4893
sahilmgandhi	18:6a4db94011d3	4894	/* Send slave address */
sahilmgandhi	18:6a4db94011d3	4895	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
sahilmgandhi	18:6a4db94011d3	4896
sahilmgandhi	18:6a4db94011d3	4897	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	4898	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4899	{
sahilmgandhi	18:6a4db94011d3	4900	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4901	{
sahilmgandhi	18:6a4db94011d3	4902	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4903	}
sahilmgandhi	18:6a4db94011d3	4904	else
sahilmgandhi	18:6a4db94011d3	4905	{
sahilmgandhi	18:6a4db94011d3	4906	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4907	}
sahilmgandhi	18:6a4db94011d3	4908	}
sahilmgandhi	18:6a4db94011d3	4909
sahilmgandhi	18:6a4db94011d3	4910	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	4911	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	4912
sahilmgandhi	18:6a4db94011d3	4913	/* Wait until TXE flag is set */
sahilmgandhi	18:6a4db94011d3	4914	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4915	{
sahilmgandhi	18:6a4db94011d3	4916	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4917	{
sahilmgandhi	18:6a4db94011d3	4918	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	4919	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	4920	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4921	}
sahilmgandhi	18:6a4db94011d3	4922	else
sahilmgandhi	18:6a4db94011d3	4923	{
sahilmgandhi	18:6a4db94011d3	4924	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4925	}
sahilmgandhi	18:6a4db94011d3	4926	}
sahilmgandhi	18:6a4db94011d3	4927
sahilmgandhi	18:6a4db94011d3	4928	/* If Memory address size is 8Bit */
sahilmgandhi	18:6a4db94011d3	4929	if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
sahilmgandhi	18:6a4db94011d3	4930	{
sahilmgandhi	18:6a4db94011d3	4931	/* Send Memory Address */
sahilmgandhi	18:6a4db94011d3	4932	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
sahilmgandhi	18:6a4db94011d3	4933	}
sahilmgandhi	18:6a4db94011d3	4934	/* If Memory address size is 16Bit */
sahilmgandhi	18:6a4db94011d3	4935	else
sahilmgandhi	18:6a4db94011d3	4936	{
sahilmgandhi	18:6a4db94011d3	4937	/* Send MSB of Memory Address */
sahilmgandhi	18:6a4db94011d3	4938	hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
sahilmgandhi	18:6a4db94011d3	4939
sahilmgandhi	18:6a4db94011d3	4940	/* Wait until TXE flag is set */
sahilmgandhi	18:6a4db94011d3	4941	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4942	{
sahilmgandhi	18:6a4db94011d3	4943	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4944	{
sahilmgandhi	18:6a4db94011d3	4945	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	4946	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	4947	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4948	}
sahilmgandhi	18:6a4db94011d3	4949	else
sahilmgandhi	18:6a4db94011d3	4950	{
sahilmgandhi	18:6a4db94011d3	4951	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4952	}
sahilmgandhi	18:6a4db94011d3	4953	}
sahilmgandhi	18:6a4db94011d3	4954
sahilmgandhi	18:6a4db94011d3	4955	/* Send LSB of Memory Address */
sahilmgandhi	18:6a4db94011d3	4956	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
sahilmgandhi	18:6a4db94011d3	4957	}
sahilmgandhi	18:6a4db94011d3	4958
sahilmgandhi	18:6a4db94011d3	4959	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	4960	}
sahilmgandhi	18:6a4db94011d3	4961
sahilmgandhi	18:6a4db94011d3	4962	/**
sahilmgandhi	18:6a4db94011d3	4963	* @brief Master sends target device address followed by internal memory address for read request.
sahilmgandhi	18:6a4db94011d3	4964	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	4965	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	4966	* @param DevAddress Target device address
sahilmgandhi	18:6a4db94011d3	4967	* @param MemAddress Internal memory address
sahilmgandhi	18:6a4db94011d3	4968	* @param MemAddSize Size of internal memory address
sahilmgandhi	18:6a4db94011d3	4969	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	4970	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	4971	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	4972	*/
sahilmgandhi	18:6a4db94011d3	4973	static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	4974	{
sahilmgandhi	18:6a4db94011d3	4975	/* Enable Acknowledge */
sahilmgandhi	18:6a4db94011d3	4976	hi2c->Instance->CR1 \|= I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	4977
sahilmgandhi	18:6a4db94011d3	4978	/* Generate Start */
sahilmgandhi	18:6a4db94011d3	4979	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	4980
sahilmgandhi	18:6a4db94011d3	4981	/* Wait until SB flag is set */
sahilmgandhi	18:6a4db94011d3	4982	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4983	{
sahilmgandhi	18:6a4db94011d3	4984	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	4985	}
sahilmgandhi	18:6a4db94011d3	4986
sahilmgandhi	18:6a4db94011d3	4987	/* Send slave address */
sahilmgandhi	18:6a4db94011d3	4988	hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
sahilmgandhi	18:6a4db94011d3	4989
sahilmgandhi	18:6a4db94011d3	4990	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	4991	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	4992	{
sahilmgandhi	18:6a4db94011d3	4993	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	4994	{
sahilmgandhi	18:6a4db94011d3	4995	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	4996	}
sahilmgandhi	18:6a4db94011d3	4997	else
sahilmgandhi	18:6a4db94011d3	4998	{
sahilmgandhi	18:6a4db94011d3	4999	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5000	}
sahilmgandhi	18:6a4db94011d3	5001	}
sahilmgandhi	18:6a4db94011d3	5002
sahilmgandhi	18:6a4db94011d3	5003	/* Clear ADDR flag */
sahilmgandhi	18:6a4db94011d3	5004	__HAL_I2C_CLEAR_ADDRFLAG(hi2c);
sahilmgandhi	18:6a4db94011d3	5005
sahilmgandhi	18:6a4db94011d3	5006	/* Wait until TXE flag is set */
sahilmgandhi	18:6a4db94011d3	5007	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	5008	{
sahilmgandhi	18:6a4db94011d3	5009	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	5010	{
sahilmgandhi	18:6a4db94011d3	5011	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	5012	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	5013	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	5014	}
sahilmgandhi	18:6a4db94011d3	5015	else
sahilmgandhi	18:6a4db94011d3	5016	{
sahilmgandhi	18:6a4db94011d3	5017	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5018	}
sahilmgandhi	18:6a4db94011d3	5019	}
sahilmgandhi	18:6a4db94011d3	5020
sahilmgandhi	18:6a4db94011d3	5021	/* If Memory address size is 8Bit */
sahilmgandhi	18:6a4db94011d3	5022	if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
sahilmgandhi	18:6a4db94011d3	5023	{
sahilmgandhi	18:6a4db94011d3	5024	/* Send Memory Address */
sahilmgandhi	18:6a4db94011d3	5025	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
sahilmgandhi	18:6a4db94011d3	5026	}
sahilmgandhi	18:6a4db94011d3	5027	/* If Memory address size is 16Bit */
sahilmgandhi	18:6a4db94011d3	5028	else
sahilmgandhi	18:6a4db94011d3	5029	{
sahilmgandhi	18:6a4db94011d3	5030	/* Send MSB of Memory Address */
sahilmgandhi	18:6a4db94011d3	5031	hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
sahilmgandhi	18:6a4db94011d3	5032
sahilmgandhi	18:6a4db94011d3	5033	/* Wait until TXE flag is set */
sahilmgandhi	18:6a4db94011d3	5034	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	5035	{
sahilmgandhi	18:6a4db94011d3	5036	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	5037	{
sahilmgandhi	18:6a4db94011d3	5038	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	5039	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	5040	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	5041	}
sahilmgandhi	18:6a4db94011d3	5042	else
sahilmgandhi	18:6a4db94011d3	5043	{
sahilmgandhi	18:6a4db94011d3	5044	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5045	}
sahilmgandhi	18:6a4db94011d3	5046	}
sahilmgandhi	18:6a4db94011d3	5047
sahilmgandhi	18:6a4db94011d3	5048	/* Send LSB of Memory Address */
sahilmgandhi	18:6a4db94011d3	5049	hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
sahilmgandhi	18:6a4db94011d3	5050	}
sahilmgandhi	18:6a4db94011d3	5051
sahilmgandhi	18:6a4db94011d3	5052	/* Wait until TXE flag is set */
sahilmgandhi	18:6a4db94011d3	5053	if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	5054	{
sahilmgandhi	18:6a4db94011d3	5055	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	5056	{
sahilmgandhi	18:6a4db94011d3	5057	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	5058	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	5059	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	5060	}
sahilmgandhi	18:6a4db94011d3	5061	else
sahilmgandhi	18:6a4db94011d3	5062	{
sahilmgandhi	18:6a4db94011d3	5063	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5064	}
sahilmgandhi	18:6a4db94011d3	5065	}
sahilmgandhi	18:6a4db94011d3	5066
sahilmgandhi	18:6a4db94011d3	5067	/* Generate Restart */
sahilmgandhi	18:6a4db94011d3	5068	hi2c->Instance->CR1 \|= I2C_CR1_START;
sahilmgandhi	18:6a4db94011d3	5069
sahilmgandhi	18:6a4db94011d3	5070	/* Wait until SB flag is set */
sahilmgandhi	18:6a4db94011d3	5071	if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	5072	{
sahilmgandhi	18:6a4db94011d3	5073	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5074	}
sahilmgandhi	18:6a4db94011d3	5075
sahilmgandhi	18:6a4db94011d3	5076	/* Send slave address */
sahilmgandhi	18:6a4db94011d3	5077	hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
sahilmgandhi	18:6a4db94011d3	5078
sahilmgandhi	18:6a4db94011d3	5079	/* Wait until ADDR flag is set */
sahilmgandhi	18:6a4db94011d3	5080	if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	5081	{
sahilmgandhi	18:6a4db94011d3	5082	if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
sahilmgandhi	18:6a4db94011d3	5083	{
sahilmgandhi	18:6a4db94011d3	5084	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	5085	}
sahilmgandhi	18:6a4db94011d3	5086	else
sahilmgandhi	18:6a4db94011d3	5087	{
sahilmgandhi	18:6a4db94011d3	5088	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5089	}
sahilmgandhi	18:6a4db94011d3	5090	}
sahilmgandhi	18:6a4db94011d3	5091
sahilmgandhi	18:6a4db94011d3	5092	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	5093	}
sahilmgandhi	18:6a4db94011d3	5094
sahilmgandhi	18:6a4db94011d3	5095	/**
sahilmgandhi	18:6a4db94011d3	5096	* @brief DMA I2C process complete callback.
sahilmgandhi	18:6a4db94011d3	5097	* @param hdma DMA handle
sahilmgandhi	18:6a4db94011d3	5098	* @retval None
sahilmgandhi	18:6a4db94011d3	5099	*/
sahilmgandhi	18:6a4db94011d3	5100	static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	5101	{
sahilmgandhi	18:6a4db94011d3	5102	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	5103
sahilmgandhi	18:6a4db94011d3	5104	/* Declaration of temporary variable to prevent undefined behavior of volatile usage */
sahilmgandhi	18:6a4db94011d3	5105	uint32_t CurrentState = hi2c->State;
sahilmgandhi	18:6a4db94011d3	5106	uint32_t CurrentMode = hi2c->Mode;
sahilmgandhi	18:6a4db94011d3	5107
sahilmgandhi	18:6a4db94011d3	5108	if((CurrentState == HAL_I2C_STATE_BUSY_TX) \|\| ((CurrentState == HAL_I2C_STATE_BUSY_RX) && (CurrentMode == HAL_I2C_MODE_SLAVE)))
sahilmgandhi	18:6a4db94011d3	5109	{
sahilmgandhi	18:6a4db94011d3	5110	/* Disable DMA Request */
sahilmgandhi	18:6a4db94011d3	5111	hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
sahilmgandhi	18:6a4db94011d3	5112
sahilmgandhi	18:6a4db94011d3	5113	hi2c->XferCount = 0U;
sahilmgandhi	18:6a4db94011d3	5114
sahilmgandhi	18:6a4db94011d3	5115	/* Enable EVT and ERR interrupt */
sahilmgandhi	18:6a4db94011d3	5116	__HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT \| I2C_IT_ERR);
sahilmgandhi	18:6a4db94011d3	5117	}
sahilmgandhi	18:6a4db94011d3	5118	else
sahilmgandhi	18:6a4db94011d3	5119	{
sahilmgandhi	18:6a4db94011d3	5120	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	5121	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	5122
sahilmgandhi	18:6a4db94011d3	5123	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	5124	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	5125
sahilmgandhi	18:6a4db94011d3	5126	/* Disable Last DMA */
sahilmgandhi	18:6a4db94011d3	5127	hi2c->Instance->CR2 &= ~I2C_CR2_LAST;
sahilmgandhi	18:6a4db94011d3	5128
sahilmgandhi	18:6a4db94011d3	5129	/* Disable DMA Request */
sahilmgandhi	18:6a4db94011d3	5130	hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
sahilmgandhi	18:6a4db94011d3	5131
sahilmgandhi	18:6a4db94011d3	5132	hi2c->XferCount = 0U;
sahilmgandhi	18:6a4db94011d3	5133
sahilmgandhi	18:6a4db94011d3	5134	/* Check if Errors has been detected during transfer */
sahilmgandhi	18:6a4db94011d3	5135	if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
sahilmgandhi	18:6a4db94011d3	5136	{
sahilmgandhi	18:6a4db94011d3	5137	HAL_I2C_ErrorCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	5138	}
sahilmgandhi	18:6a4db94011d3	5139	else
sahilmgandhi	18:6a4db94011d3	5140	{
sahilmgandhi	18:6a4db94011d3	5141	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5142
sahilmgandhi	18:6a4db94011d3	5143	if(hi2c->Mode == HAL_I2C_MODE_MEM)
sahilmgandhi	18:6a4db94011d3	5144	{
sahilmgandhi	18:6a4db94011d3	5145	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	5146
sahilmgandhi	18:6a4db94011d3	5147	HAL_I2C_MemRxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	5148	}
sahilmgandhi	18:6a4db94011d3	5149	else
sahilmgandhi	18:6a4db94011d3	5150	{
sahilmgandhi	18:6a4db94011d3	5151	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	5152
sahilmgandhi	18:6a4db94011d3	5153	HAL_I2C_MasterRxCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	5154	}
sahilmgandhi	18:6a4db94011d3	5155	}
sahilmgandhi	18:6a4db94011d3	5156	}
sahilmgandhi	18:6a4db94011d3	5157	}
sahilmgandhi	18:6a4db94011d3	5158
sahilmgandhi	18:6a4db94011d3	5159	/**
sahilmgandhi	18:6a4db94011d3	5160	* @brief DMA I2C communication error callback.
sahilmgandhi	18:6a4db94011d3	5161	* @param hdma DMA handle
sahilmgandhi	18:6a4db94011d3	5162	* @retval None
sahilmgandhi	18:6a4db94011d3	5163	*/
sahilmgandhi	18:6a4db94011d3	5164	static void I2C_DMAError(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	5165	{
sahilmgandhi	18:6a4db94011d3	5166	I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef)((DMA_HandleTypeDef)hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	5167
sahilmgandhi	18:6a4db94011d3	5168	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	5169	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	5170
sahilmgandhi	18:6a4db94011d3	5171	hi2c->XferCount = 0U;
sahilmgandhi	18:6a4db94011d3	5172
sahilmgandhi	18:6a4db94011d3	5173	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5174	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	5175
sahilmgandhi	18:6a4db94011d3	5176	hi2c->ErrorCode \|= HAL_I2C_ERROR_DMA;
sahilmgandhi	18:6a4db94011d3	5177
sahilmgandhi	18:6a4db94011d3	5178	HAL_I2C_ErrorCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	5179	}
sahilmgandhi	18:6a4db94011d3	5180
sahilmgandhi	18:6a4db94011d3	5181	/**
sahilmgandhi	18:6a4db94011d3	5182	* @brief DMA I2C communication abort callback
sahilmgandhi	18:6a4db94011d3	5183	* (To be called at end of DMA Abort procedure).
sahilmgandhi	18:6a4db94011d3	5184	* @param hdma: DMA handle.
sahilmgandhi	18:6a4db94011d3	5185	* @retval None
sahilmgandhi	18:6a4db94011d3	5186	*/
sahilmgandhi	18:6a4db94011d3	5187	static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
sahilmgandhi	18:6a4db94011d3	5188	{
sahilmgandhi	18:6a4db94011d3	5189	I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
sahilmgandhi	18:6a4db94011d3	5190
sahilmgandhi	18:6a4db94011d3	5191	/* Disable Acknowledge */
sahilmgandhi	18:6a4db94011d3	5192	hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
sahilmgandhi	18:6a4db94011d3	5193
sahilmgandhi	18:6a4db94011d3	5194	hi2c->XferCount = 0U;
sahilmgandhi	18:6a4db94011d3	5195
sahilmgandhi	18:6a4db94011d3	5196	/* Reset XferAbortCallback */
sahilmgandhi	18:6a4db94011d3	5197	hi2c->hdmatx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	5198	hi2c->hdmarx->XferAbortCallback = NULL;
sahilmgandhi	18:6a4db94011d3	5199
sahilmgandhi	18:6a4db94011d3	5200	/* Check if come from abort from user */
sahilmgandhi	18:6a4db94011d3	5201	if(hi2c->State == HAL_I2C_STATE_ABORT)
sahilmgandhi	18:6a4db94011d3	5202	{
sahilmgandhi	18:6a4db94011d3	5203	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5204	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	5205	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	5206
sahilmgandhi	18:6a4db94011d3	5207	/* Disable I2C peripheral to prevent dummy data in buffer */
sahilmgandhi	18:6a4db94011d3	5208	__HAL_I2C_DISABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	5209
sahilmgandhi	18:6a4db94011d3	5210	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	5211	HAL_I2C_AbortCpltCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	5212	}
sahilmgandhi	18:6a4db94011d3	5213	else
sahilmgandhi	18:6a4db94011d3	5214	{
sahilmgandhi	18:6a4db94011d3	5215	hi2c->State = HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5216	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	5217
sahilmgandhi	18:6a4db94011d3	5218	/* Disable I2C peripheral to prevent dummy data in buffer */
sahilmgandhi	18:6a4db94011d3	5219	__HAL_I2C_DISABLE(hi2c);
sahilmgandhi	18:6a4db94011d3	5220
sahilmgandhi	18:6a4db94011d3	5221	/* Call the corresponding callback to inform upper layer of End of Transfer */
sahilmgandhi	18:6a4db94011d3	5222	HAL_I2C_ErrorCallback(hi2c);
sahilmgandhi	18:6a4db94011d3	5223	}
sahilmgandhi	18:6a4db94011d3	5224	}
sahilmgandhi	18:6a4db94011d3	5225
sahilmgandhi	18:6a4db94011d3	5226	/**
sahilmgandhi	18:6a4db94011d3	5227	* @brief This function handles I2C Communication Timeout.
sahilmgandhi	18:6a4db94011d3	5228	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	5229	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	5230	* @param Flag specifies the I2C flag to check.
sahilmgandhi	18:6a4db94011d3	5231	* @param Status The new Flag status (SET or RESET).
sahilmgandhi	18:6a4db94011d3	5232	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	5233	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	5234	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	5235	*/
sahilmgandhi	18:6a4db94011d3	5236	static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	5237	{
sahilmgandhi	18:6a4db94011d3	5238	/* Wait until flag is set */
sahilmgandhi	18:6a4db94011d3	5239	while((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status)
sahilmgandhi	18:6a4db94011d3	5240	{
sahilmgandhi	18:6a4db94011d3	5241	/* Check for the Timeout */
sahilmgandhi	18:6a4db94011d3	5242	if(Timeout != HAL_MAX_DELAY)
sahilmgandhi	18:6a4db94011d3	5243	{
sahilmgandhi	18:6a4db94011d3	5244	if((Timeout == 0U)\|\|((HAL_GetTick() - Tickstart ) > Timeout))
sahilmgandhi	18:6a4db94011d3	5245	{
sahilmgandhi	18:6a4db94011d3	5246	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	5247	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5248	hi2c->Mode = HAL_I2C_MODE_NONE;
sahilmgandhi	18:6a4db94011d3	5249
sahilmgandhi	18:6a4db94011d3	5250	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	5251	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	5252
sahilmgandhi	18:6a4db94011d3	5253	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5254	}
sahilmgandhi	18:6a4db94011d3	5255	}
sahilmgandhi	18:6a4db94011d3	5256	}
sahilmgandhi	18:6a4db94011d3	5257
sahilmgandhi	18:6a4db94011d3	5258	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	5259	}
sahilmgandhi	18:6a4db94011d3	5260
sahilmgandhi	18:6a4db94011d3	5261	/**
sahilmgandhi	18:6a4db94011d3	5262	* @brief This function handles I2C Communication Timeout for Master addressing phase.
sahilmgandhi	18:6a4db94011d3	5263	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	5264	* the configuration information for I2C module
sahilmgandhi	18:6a4db94011d3	5265	* @param Flag specifies the I2C flag to check.
sahilmgandhi	18:6a4db94011d3	5266	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	5267	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	5268	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	5269	*/
sahilmgandhi	18:6a4db94011d3	5270	static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	5271	{
sahilmgandhi	18:6a4db94011d3	5272	while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
sahilmgandhi	18:6a4db94011d3	5273	{
sahilmgandhi	18:6a4db94011d3	5274	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
sahilmgandhi	18:6a4db94011d3	5275	{
sahilmgandhi	18:6a4db94011d3	5276	/* Generate Stop */
sahilmgandhi	18:6a4db94011d3	5277	hi2c->Instance->CR1 \|= I2C_CR1_STOP;
sahilmgandhi	18:6a4db94011d3	5278
sahilmgandhi	18:6a4db94011d3	5279	/* Clear AF Flag */
sahilmgandhi	18:6a4db94011d3	5280	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	5281
sahilmgandhi	18:6a4db94011d3	5282	hi2c->ErrorCode = HAL_I2C_ERROR_AF;
sahilmgandhi	18:6a4db94011d3	5283	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	5284	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5285
sahilmgandhi	18:6a4db94011d3	5286	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	5287	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	5288
sahilmgandhi	18:6a4db94011d3	5289	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	5290	}
sahilmgandhi	18:6a4db94011d3	5291
sahilmgandhi	18:6a4db94011d3	5292	/* Check for the Timeout */
sahilmgandhi	18:6a4db94011d3	5293	if(Timeout != HAL_MAX_DELAY)
sahilmgandhi	18:6a4db94011d3	5294	{
sahilmgandhi	18:6a4db94011d3	5295	if((Timeout == 0U)\|\|((HAL_GetTick() - Tickstart ) > Timeout))
sahilmgandhi	18:6a4db94011d3	5296	{
sahilmgandhi	18:6a4db94011d3	5297	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	5298	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5299
sahilmgandhi	18:6a4db94011d3	5300	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	5301	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	5302
sahilmgandhi	18:6a4db94011d3	5303	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5304	}
sahilmgandhi	18:6a4db94011d3	5305	}
sahilmgandhi	18:6a4db94011d3	5306	}
sahilmgandhi	18:6a4db94011d3	5307	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	5308	}
sahilmgandhi	18:6a4db94011d3	5309
sahilmgandhi	18:6a4db94011d3	5310	/**
sahilmgandhi	18:6a4db94011d3	5311	* @brief This function handles I2C Communication Timeout for specific usage of TXE flag.
sahilmgandhi	18:6a4db94011d3	5312	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	5313	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	5314	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	5315	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	5316	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	5317	*/
sahilmgandhi	18:6a4db94011d3	5318	static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	5319	{
sahilmgandhi	18:6a4db94011d3	5320	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
sahilmgandhi	18:6a4db94011d3	5321	{
sahilmgandhi	18:6a4db94011d3	5322	/* Check if a NACK is detected */
sahilmgandhi	18:6a4db94011d3	5323	if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	5324	{
sahilmgandhi	18:6a4db94011d3	5325	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	5326	}
sahilmgandhi	18:6a4db94011d3	5327
sahilmgandhi	18:6a4db94011d3	5328	/* Check for the Timeout */
sahilmgandhi	18:6a4db94011d3	5329	if(Timeout != HAL_MAX_DELAY)
sahilmgandhi	18:6a4db94011d3	5330	{
sahilmgandhi	18:6a4db94011d3	5331	if((Timeout == 0U) \|\| ((HAL_GetTick()-Tickstart) > Timeout))
sahilmgandhi	18:6a4db94011d3	5332	{
sahilmgandhi	18:6a4db94011d3	5333	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5334	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	5335	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5336
sahilmgandhi	18:6a4db94011d3	5337	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	5338	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	5339
sahilmgandhi	18:6a4db94011d3	5340	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5341	}
sahilmgandhi	18:6a4db94011d3	5342	}
sahilmgandhi	18:6a4db94011d3	5343	}
sahilmgandhi	18:6a4db94011d3	5344	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	5345	}
sahilmgandhi	18:6a4db94011d3	5346
sahilmgandhi	18:6a4db94011d3	5347	/**
sahilmgandhi	18:6a4db94011d3	5348	* @brief This function handles I2C Communication Timeout for specific usage of BTF flag.
sahilmgandhi	18:6a4db94011d3	5349	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	5350	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	5351	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	5352	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	5353	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	5354	*/
sahilmgandhi	18:6a4db94011d3	5355	static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	5356	{
sahilmgandhi	18:6a4db94011d3	5357	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
sahilmgandhi	18:6a4db94011d3	5358	{
sahilmgandhi	18:6a4db94011d3	5359	/* Check if a NACK is detected */
sahilmgandhi	18:6a4db94011d3	5360	if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	5361	{
sahilmgandhi	18:6a4db94011d3	5362	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	5363	}
sahilmgandhi	18:6a4db94011d3	5364
sahilmgandhi	18:6a4db94011d3	5365	/* Check for the Timeout */
sahilmgandhi	18:6a4db94011d3	5366	if(Timeout != HAL_MAX_DELAY)
sahilmgandhi	18:6a4db94011d3	5367	{
sahilmgandhi	18:6a4db94011d3	5368	if((Timeout == 0U) \|\| ((HAL_GetTick()-Tickstart) > Timeout))
sahilmgandhi	18:6a4db94011d3	5369	{
sahilmgandhi	18:6a4db94011d3	5370	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5371	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	5372	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5373
sahilmgandhi	18:6a4db94011d3	5374	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	5375	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	5376
sahilmgandhi	18:6a4db94011d3	5377	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5378	}
sahilmgandhi	18:6a4db94011d3	5379	}
sahilmgandhi	18:6a4db94011d3	5380	}
sahilmgandhi	18:6a4db94011d3	5381	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	5382	}
sahilmgandhi	18:6a4db94011d3	5383
sahilmgandhi	18:6a4db94011d3	5384	/**
sahilmgandhi	18:6a4db94011d3	5385	* @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
sahilmgandhi	18:6a4db94011d3	5386	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	5387	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	5388	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	5389	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	5390	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	5391	*/
sahilmgandhi	18:6a4db94011d3	5392	static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	5393	{
sahilmgandhi	18:6a4db94011d3	5394	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
sahilmgandhi	18:6a4db94011d3	5395	{
sahilmgandhi	18:6a4db94011d3	5396	/* Check if a NACK is detected */
sahilmgandhi	18:6a4db94011d3	5397	if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
sahilmgandhi	18:6a4db94011d3	5398	{
sahilmgandhi	18:6a4db94011d3	5399	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	5400	}
sahilmgandhi	18:6a4db94011d3	5401
sahilmgandhi	18:6a4db94011d3	5402	/* Check for the Timeout */
sahilmgandhi	18:6a4db94011d3	5403	if((Timeout == 0U) \|\| ((HAL_GetTick()-Tickstart) > Timeout))
sahilmgandhi	18:6a4db94011d3	5404	{
sahilmgandhi	18:6a4db94011d3	5405	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5406	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	5407	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5408
sahilmgandhi	18:6a4db94011d3	5409	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	5410	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	5411
sahilmgandhi	18:6a4db94011d3	5412	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5413	}
sahilmgandhi	18:6a4db94011d3	5414	}
sahilmgandhi	18:6a4db94011d3	5415	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	5416	}
sahilmgandhi	18:6a4db94011d3	5417
sahilmgandhi	18:6a4db94011d3	5418	/**
sahilmgandhi	18:6a4db94011d3	5419	* @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
sahilmgandhi	18:6a4db94011d3	5420	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	5421	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	5422	* @param Timeout Timeout duration
sahilmgandhi	18:6a4db94011d3	5423	* @param Tickstart Tick start value
sahilmgandhi	18:6a4db94011d3	5424	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	5425	*/
sahilmgandhi	18:6a4db94011d3	5426	static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
sahilmgandhi	18:6a4db94011d3	5427	{
sahilmgandhi	18:6a4db94011d3	5428
sahilmgandhi	18:6a4db94011d3	5429	while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
sahilmgandhi	18:6a4db94011d3	5430	{
sahilmgandhi	18:6a4db94011d3	5431	/* Check if a STOPF is detected */
sahilmgandhi	18:6a4db94011d3	5432	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
sahilmgandhi	18:6a4db94011d3	5433	{
sahilmgandhi	18:6a4db94011d3	5434	/* Clear STOP Flag */
sahilmgandhi	18:6a4db94011d3	5435	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
sahilmgandhi	18:6a4db94011d3	5436
sahilmgandhi	18:6a4db94011d3	5437	hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
sahilmgandhi	18:6a4db94011d3	5438	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	5439	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5440
sahilmgandhi	18:6a4db94011d3	5441	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	5442	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	5443
sahilmgandhi	18:6a4db94011d3	5444	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	5445	}
sahilmgandhi	18:6a4db94011d3	5446
sahilmgandhi	18:6a4db94011d3	5447	/* Check for the Timeout */
sahilmgandhi	18:6a4db94011d3	5448	if((Timeout == 0U) \|\| ((HAL_GetTick()-Tickstart) > Timeout))
sahilmgandhi	18:6a4db94011d3	5449	{
sahilmgandhi	18:6a4db94011d3	5450	hi2c->ErrorCode \|= HAL_I2C_ERROR_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5451	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5452
sahilmgandhi	18:6a4db94011d3	5453	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	5454	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	5455
sahilmgandhi	18:6a4db94011d3	5456	return HAL_TIMEOUT;
sahilmgandhi	18:6a4db94011d3	5457	}
sahilmgandhi	18:6a4db94011d3	5458	}
sahilmgandhi	18:6a4db94011d3	5459	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	5460	}
sahilmgandhi	18:6a4db94011d3	5461
sahilmgandhi	18:6a4db94011d3	5462	/**
sahilmgandhi	18:6a4db94011d3	5463	* @brief This function handles Acknowledge failed detection during an I2C Communication.
sahilmgandhi	18:6a4db94011d3	5464	* @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
sahilmgandhi	18:6a4db94011d3	5465	* the configuration information for the specified I2C.
sahilmgandhi	18:6a4db94011d3	5466	* @retval HAL status
sahilmgandhi	18:6a4db94011d3	5467	*/
sahilmgandhi	18:6a4db94011d3	5468	static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
sahilmgandhi	18:6a4db94011d3	5469	{
sahilmgandhi	18:6a4db94011d3	5470	if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
sahilmgandhi	18:6a4db94011d3	5471	{
sahilmgandhi	18:6a4db94011d3	5472	/* Clear NACKF Flag */
sahilmgandhi	18:6a4db94011d3	5473	__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
sahilmgandhi	18:6a4db94011d3	5474
sahilmgandhi	18:6a4db94011d3	5475	hi2c->ErrorCode = HAL_I2C_ERROR_AF;
sahilmgandhi	18:6a4db94011d3	5476	hi2c->PreviousState = I2C_STATE_NONE;
sahilmgandhi	18:6a4db94011d3	5477	hi2c->State= HAL_I2C_STATE_READY;
sahilmgandhi	18:6a4db94011d3	5478
sahilmgandhi	18:6a4db94011d3	5479	/* Process Unlocked */
sahilmgandhi	18:6a4db94011d3	5480	__HAL_UNLOCK(hi2c);
sahilmgandhi	18:6a4db94011d3	5481
sahilmgandhi	18:6a4db94011d3	5482	return HAL_ERROR;
sahilmgandhi	18:6a4db94011d3	5483	}
sahilmgandhi	18:6a4db94011d3	5484	return HAL_OK;
sahilmgandhi	18:6a4db94011d3	5485	}
sahilmgandhi	18:6a4db94011d3	5486	/**
sahilmgandhi	18:6a4db94011d3	5487	* @}
sahilmgandhi	18:6a4db94011d3	5488	*/
sahilmgandhi	18:6a4db94011d3	5489
sahilmgandhi	18:6a4db94011d3	5490	#endif /* HAL_I2C_MODULE_ENABLED */
sahilmgandhi	18:6a4db94011d3	5491
sahilmgandhi	18:6a4db94011d3	5492	/**
sahilmgandhi	18:6a4db94011d3	5493	* @}
sahilmgandhi	18:6a4db94011d3	5494	*/
sahilmgandhi	18:6a4db94011d3	5495
sahilmgandhi	18:6a4db94011d3	5496	/**
sahilmgandhi	18:6a4db94011d3	5497	* @}
sahilmgandhi	18:6a4db94011d3	5498	*/
sahilmgandhi	18:6a4db94011d3	5499
sahilmgandhi	18:6a4db94011d3	5500	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Program
Created:	25 Apr 2017
Imports:	29
Forks:	0
Commits:	47
Dependents:	0
Dependencies:	2
Followers:	5

The code in this repository is Apache licensed.

mbed-dev/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_i2c.c@46:b156ef445742, 2017-06-03 (annotated)

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