MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_flash_ex.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f2xx_hal_flash_ex.h
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.1.3
sahilmgandhi 18:6a4db94011d3 6 * @date 29-June-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief Header file of FLASH HAL Extension module.
sahilmgandhi 18:6a4db94011d3 8 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 9 * @attention
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 12 *
sahilmgandhi 18:6a4db94011d3 13 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 14 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 15 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 16 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 18 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 19 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 21 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 22 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 23 *
sahilmgandhi 18:6a4db94011d3 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 34 *
sahilmgandhi 18:6a4db94011d3 35 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 36 */
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 /* Define to prevent recursive inclusion -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 39 #ifndef __STM32F2xx_HAL_FLASH_EX_H
sahilmgandhi 18:6a4db94011d3 40 #define __STM32F2xx_HAL_FLASH_EX_H
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 43 extern "C" {
sahilmgandhi 18:6a4db94011d3 44 #endif
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 47 #include "stm32f2xx_hal_def.h"
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 /** @addtogroup STM32F2xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 50 * @{
sahilmgandhi 18:6a4db94011d3 51 */
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 /** @addtogroup FLASHEx
sahilmgandhi 18:6a4db94011d3 54 * @{
sahilmgandhi 18:6a4db94011d3 55 */
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 /* Exported types ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 58 /** @defgroup FLASHEx_Exported_Types FLASH Exported Types
sahilmgandhi 18:6a4db94011d3 59 * @{
sahilmgandhi 18:6a4db94011d3 60 */
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 /**
sahilmgandhi 18:6a4db94011d3 63 * @brief FLASH Erase structure definition
sahilmgandhi 18:6a4db94011d3 64 */
sahilmgandhi 18:6a4db94011d3 65 typedef struct
sahilmgandhi 18:6a4db94011d3 66 {
sahilmgandhi 18:6a4db94011d3 67 uint32_t TypeErase; /*!< Mass erase or sector Erase.
sahilmgandhi 18:6a4db94011d3 68 This parameter can be a value of @ref FLASHEx_Type_Erase */
sahilmgandhi 18:6a4db94011d3 69
sahilmgandhi 18:6a4db94011d3 70 uint32_t Banks; /*!< Select banks to erase when Mass erase is enabled.
sahilmgandhi 18:6a4db94011d3 71 This parameter must be a value of @ref FLASHEx_Banks */
sahilmgandhi 18:6a4db94011d3 72
sahilmgandhi 18:6a4db94011d3 73 uint32_t Sector; /*!< Initial FLASH sector to erase when Mass erase is disabled
sahilmgandhi 18:6a4db94011d3 74 This parameter must be a value of @ref FLASHEx_Sectors */
sahilmgandhi 18:6a4db94011d3 75
sahilmgandhi 18:6a4db94011d3 76 uint32_t NbSectors; /*!< Number of sectors to be erased.
sahilmgandhi 18:6a4db94011d3 77 This parameter must be a value between 1 and (max number of sectors - value of Initial sector)*/
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 uint32_t VoltageRange;/*!< The device voltage range which defines the erase parallelism
sahilmgandhi 18:6a4db94011d3 80 This parameter must be a value of @ref FLASHEx_Voltage_Range */
sahilmgandhi 18:6a4db94011d3 81
sahilmgandhi 18:6a4db94011d3 82 } FLASH_EraseInitTypeDef;
sahilmgandhi 18:6a4db94011d3 83
sahilmgandhi 18:6a4db94011d3 84 /**
sahilmgandhi 18:6a4db94011d3 85 * @brief FLASH Option Bytes Program structure definition
sahilmgandhi 18:6a4db94011d3 86 */
sahilmgandhi 18:6a4db94011d3 87 typedef struct
sahilmgandhi 18:6a4db94011d3 88 {
sahilmgandhi 18:6a4db94011d3 89 uint32_t OptionType; /*!< Option byte to be configured.
sahilmgandhi 18:6a4db94011d3 90 This parameter can be a value of @ref FLASHEx_Option_Type */
sahilmgandhi 18:6a4db94011d3 91
sahilmgandhi 18:6a4db94011d3 92 uint32_t WRPState; /*!< Write protection activation or deactivation.
sahilmgandhi 18:6a4db94011d3 93 This parameter can be a value of @ref FLASHEx_WRP_State */
sahilmgandhi 18:6a4db94011d3 94
sahilmgandhi 18:6a4db94011d3 95 uint32_t WRPSector; /*!< Specifies the sector(s) to be write protected.
sahilmgandhi 18:6a4db94011d3 96 The value of this parameter depend on device used within the same series */
sahilmgandhi 18:6a4db94011d3 97
sahilmgandhi 18:6a4db94011d3 98 uint32_t Banks; /*!< Select banks for WRP activation/deactivation of all sectors.
sahilmgandhi 18:6a4db94011d3 99 This parameter must be a value of @ref FLASHEx_Banks */
sahilmgandhi 18:6a4db94011d3 100
sahilmgandhi 18:6a4db94011d3 101 uint32_t RDPLevel; /*!< Set the read protection level.
sahilmgandhi 18:6a4db94011d3 102 This parameter can be a value of @ref FLASHEx_Option_Bytes_Read_Protection */
sahilmgandhi 18:6a4db94011d3 103
sahilmgandhi 18:6a4db94011d3 104 uint32_t BORLevel; /*!< Set the BOR Level.
sahilmgandhi 18:6a4db94011d3 105 This parameter can be a value of @ref FLASHEx_BOR_Reset_Level */
sahilmgandhi 18:6a4db94011d3 106
sahilmgandhi 18:6a4db94011d3 107 uint8_t USERConfig; /*!< Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY. */
sahilmgandhi 18:6a4db94011d3 108
sahilmgandhi 18:6a4db94011d3 109 } FLASH_OBProgramInitTypeDef;
sahilmgandhi 18:6a4db94011d3 110
sahilmgandhi 18:6a4db94011d3 111 /* Exported constants --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 112
sahilmgandhi 18:6a4db94011d3 113 /** @defgroup FLASHEx_Exported_Constants FLASH Exported Constants
sahilmgandhi 18:6a4db94011d3 114 * @{
sahilmgandhi 18:6a4db94011d3 115 */
sahilmgandhi 18:6a4db94011d3 116
sahilmgandhi 18:6a4db94011d3 117 /** @defgroup FLASHEx_Type_Erase FLASH Type Erase
sahilmgandhi 18:6a4db94011d3 118 * @{
sahilmgandhi 18:6a4db94011d3 119 */
sahilmgandhi 18:6a4db94011d3 120 #define FLASH_TYPEERASE_SECTORS ((uint32_t)0x00U) /*!< Sectors erase only */
sahilmgandhi 18:6a4db94011d3 121 #define FLASH_TYPEERASE_MASSERASE ((uint32_t)0x01U) /*!< Flash Mass erase activation */
sahilmgandhi 18:6a4db94011d3 122 /**
sahilmgandhi 18:6a4db94011d3 123 * @}
sahilmgandhi 18:6a4db94011d3 124 */
sahilmgandhi 18:6a4db94011d3 125
sahilmgandhi 18:6a4db94011d3 126 /** @defgroup FLASHEx_Voltage_Range FLASH Voltage Range
sahilmgandhi 18:6a4db94011d3 127 * @{
sahilmgandhi 18:6a4db94011d3 128 */
sahilmgandhi 18:6a4db94011d3 129 #define FLASH_VOLTAGE_RANGE_1 ((uint32_t)0x00U) /*!< Device operating range: 1.8V to 2.1V */
sahilmgandhi 18:6a4db94011d3 130 #define FLASH_VOLTAGE_RANGE_2 ((uint32_t)0x01U) /*!< Device operating range: 2.1V to 2.7V */
sahilmgandhi 18:6a4db94011d3 131 #define FLASH_VOLTAGE_RANGE_3 ((uint32_t)0x02U) /*!< Device operating range: 2.7V to 3.6V */
sahilmgandhi 18:6a4db94011d3 132 #define FLASH_VOLTAGE_RANGE_4 ((uint32_t)0x03U) /*!< Device operating range: 2.7V to 3.6V + External Vpp */
sahilmgandhi 18:6a4db94011d3 133 /**
sahilmgandhi 18:6a4db94011d3 134 * @}
sahilmgandhi 18:6a4db94011d3 135 */
sahilmgandhi 18:6a4db94011d3 136
sahilmgandhi 18:6a4db94011d3 137 /** @defgroup FLASHEx_WRP_State FLASH WRP State
sahilmgandhi 18:6a4db94011d3 138 * @{
sahilmgandhi 18:6a4db94011d3 139 */
sahilmgandhi 18:6a4db94011d3 140 #define OB_WRPSTATE_DISABLE ((uint32_t)0x00U) /*!< Disable the write protection of the desired bank 1 sectors */
sahilmgandhi 18:6a4db94011d3 141 #define OB_WRPSTATE_ENABLE ((uint32_t)0x01U) /*!< Enable the write protection of the desired bank 1 sectors */
sahilmgandhi 18:6a4db94011d3 142 /**
sahilmgandhi 18:6a4db94011d3 143 * @}
sahilmgandhi 18:6a4db94011d3 144 */
sahilmgandhi 18:6a4db94011d3 145
sahilmgandhi 18:6a4db94011d3 146 /** @defgroup FLASHEx_Option_Type FLASH Option Type
sahilmgandhi 18:6a4db94011d3 147 * @{
sahilmgandhi 18:6a4db94011d3 148 */
sahilmgandhi 18:6a4db94011d3 149 #define OPTIONBYTE_WRP ((uint32_t)0x01U) /*!< WRP option byte configuration */
sahilmgandhi 18:6a4db94011d3 150 #define OPTIONBYTE_RDP ((uint32_t)0x02U) /*!< RDP option byte configuration */
sahilmgandhi 18:6a4db94011d3 151 #define OPTIONBYTE_USER ((uint32_t)0x04U) /*!< USER option byte configuration */
sahilmgandhi 18:6a4db94011d3 152 #define OPTIONBYTE_BOR ((uint32_t)0x08U) /*!< BOR option byte configuration */
sahilmgandhi 18:6a4db94011d3 153 /**
sahilmgandhi 18:6a4db94011d3 154 * @}
sahilmgandhi 18:6a4db94011d3 155 */
sahilmgandhi 18:6a4db94011d3 156
sahilmgandhi 18:6a4db94011d3 157 /** @defgroup FLASHEx_Option_Bytes_Read_Protection FLASH Option Bytes Read Protection
sahilmgandhi 18:6a4db94011d3 158 * @{
sahilmgandhi 18:6a4db94011d3 159 */
sahilmgandhi 18:6a4db94011d3 160 #define OB_RDP_LEVEL_0 ((uint8_t)0xAAU)
sahilmgandhi 18:6a4db94011d3 161 #define OB_RDP_LEVEL_1 ((uint8_t)0x55U)
sahilmgandhi 18:6a4db94011d3 162 #define OB_RDP_LEVEL_2 ((uint8_t)0xCCU) /*!< Warning: When enabling read protection level 2
sahilmgandhi 18:6a4db94011d3 163 it s no more possible to go back to level 1 or 0 */
sahilmgandhi 18:6a4db94011d3 164 /**
sahilmgandhi 18:6a4db94011d3 165 * @}
sahilmgandhi 18:6a4db94011d3 166 */
sahilmgandhi 18:6a4db94011d3 167
sahilmgandhi 18:6a4db94011d3 168 /** @defgroup FLASHEx_Option_Bytes_IWatchdog FLASH Option Bytes IWatchdog
sahilmgandhi 18:6a4db94011d3 169 * @{
sahilmgandhi 18:6a4db94011d3 170 */
sahilmgandhi 18:6a4db94011d3 171 #define OB_IWDG_SW ((uint8_t)0x20U) /*!< Software IWDG selected */
sahilmgandhi 18:6a4db94011d3 172 #define OB_IWDG_HW ((uint8_t)0x00U) /*!< Hardware IWDG selected */
sahilmgandhi 18:6a4db94011d3 173 /**
sahilmgandhi 18:6a4db94011d3 174 * @}
sahilmgandhi 18:6a4db94011d3 175 */
sahilmgandhi 18:6a4db94011d3 176
sahilmgandhi 18:6a4db94011d3 177 /** @defgroup FLASHEx_Option_Bytes_nRST_STOP FLASH Option Bytes nRST_STOP
sahilmgandhi 18:6a4db94011d3 178 * @{
sahilmgandhi 18:6a4db94011d3 179 */
sahilmgandhi 18:6a4db94011d3 180 #define OB_STOP_NO_RST ((uint8_t)0x40U) /*!< No reset generated when entering in STOP */
sahilmgandhi 18:6a4db94011d3 181 #define OB_STOP_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STOP */
sahilmgandhi 18:6a4db94011d3 182 /**
sahilmgandhi 18:6a4db94011d3 183 * @}
sahilmgandhi 18:6a4db94011d3 184 */
sahilmgandhi 18:6a4db94011d3 185
sahilmgandhi 18:6a4db94011d3 186
sahilmgandhi 18:6a4db94011d3 187 /** @defgroup FLASHEx_Option_Bytes_nRST_STDBY FLASH Option Bytes nRST_STDBY
sahilmgandhi 18:6a4db94011d3 188 * @{
sahilmgandhi 18:6a4db94011d3 189 */
sahilmgandhi 18:6a4db94011d3 190 #define OB_STDBY_NO_RST ((uint8_t)0x80U) /*!< No reset generated when entering in STANDBY */
sahilmgandhi 18:6a4db94011d3 191 #define OB_STDBY_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STANDBY */
sahilmgandhi 18:6a4db94011d3 192 /**
sahilmgandhi 18:6a4db94011d3 193 * @}
sahilmgandhi 18:6a4db94011d3 194 */
sahilmgandhi 18:6a4db94011d3 195
sahilmgandhi 18:6a4db94011d3 196 /** @defgroup FLASHEx_BOR_Reset_Level FLASH BOR Reset Level
sahilmgandhi 18:6a4db94011d3 197 * @{
sahilmgandhi 18:6a4db94011d3 198 */
sahilmgandhi 18:6a4db94011d3 199 #define OB_BOR_LEVEL3 ((uint8_t)0x00U) /*!< Supply voltage ranges from 2.70 to 3.60 V */
sahilmgandhi 18:6a4db94011d3 200 #define OB_BOR_LEVEL2 ((uint8_t)0x04U) /*!< Supply voltage ranges from 2.40 to 2.70 V */
sahilmgandhi 18:6a4db94011d3 201 #define OB_BOR_LEVEL1 ((uint8_t)0x08U) /*!< Supply voltage ranges from 2.10 to 2.40 V */
sahilmgandhi 18:6a4db94011d3 202 #define OB_BOR_OFF ((uint8_t)0x0CU) /*!< Supply voltage ranges from 1.62 to 2.10 V */
sahilmgandhi 18:6a4db94011d3 203 /**
sahilmgandhi 18:6a4db94011d3 204 * @}
sahilmgandhi 18:6a4db94011d3 205 */
sahilmgandhi 18:6a4db94011d3 206
sahilmgandhi 18:6a4db94011d3 207
sahilmgandhi 18:6a4db94011d3 208 /**
sahilmgandhi 18:6a4db94011d3 209 * @}
sahilmgandhi 18:6a4db94011d3 210 */
sahilmgandhi 18:6a4db94011d3 211
sahilmgandhi 18:6a4db94011d3 212 /** @defgroup FLASH_Latency FLASH Latency
sahilmgandhi 18:6a4db94011d3 213 * @{
sahilmgandhi 18:6a4db94011d3 214 */
sahilmgandhi 18:6a4db94011d3 215 #define FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero Latency cycle */
sahilmgandhi 18:6a4db94011d3 216 #define FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One Latency cycle */
sahilmgandhi 18:6a4db94011d3 217 #define FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two Latency cycles */
sahilmgandhi 18:6a4db94011d3 218 #define FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three Latency cycles */
sahilmgandhi 18:6a4db94011d3 219 #define FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four Latency cycles */
sahilmgandhi 18:6a4db94011d3 220 #define FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH Five Latency cycles */
sahilmgandhi 18:6a4db94011d3 221 #define FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH Six Latency cycles */
sahilmgandhi 18:6a4db94011d3 222 #define FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH Seven Latency cycles */
sahilmgandhi 18:6a4db94011d3 223
sahilmgandhi 18:6a4db94011d3 224 /**
sahilmgandhi 18:6a4db94011d3 225 * @}
sahilmgandhi 18:6a4db94011d3 226 */
sahilmgandhi 18:6a4db94011d3 227
sahilmgandhi 18:6a4db94011d3 228
sahilmgandhi 18:6a4db94011d3 229 /** @defgroup FLASHEx_Banks FLASH Banks
sahilmgandhi 18:6a4db94011d3 230 * @{
sahilmgandhi 18:6a4db94011d3 231 */
sahilmgandhi 18:6a4db94011d3 232 #define FLASH_BANK_1 ((uint32_t)1U) /*!< Bank 1 */
sahilmgandhi 18:6a4db94011d3 233 /**
sahilmgandhi 18:6a4db94011d3 234 * @}
sahilmgandhi 18:6a4db94011d3 235 */
sahilmgandhi 18:6a4db94011d3 236
sahilmgandhi 18:6a4db94011d3 237 /** @defgroup FLASHEx_MassErase_bit FLASH Mass Erase bit
sahilmgandhi 18:6a4db94011d3 238 * @{
sahilmgandhi 18:6a4db94011d3 239 */
sahilmgandhi 18:6a4db94011d3 240 #define FLASH_MER_BIT (FLASH_CR_MER) /*!< only 1 MER Bit */
sahilmgandhi 18:6a4db94011d3 241 /**
sahilmgandhi 18:6a4db94011d3 242 * @}
sahilmgandhi 18:6a4db94011d3 243 */
sahilmgandhi 18:6a4db94011d3 244
sahilmgandhi 18:6a4db94011d3 245 /** @defgroup FLASHEx_Sectors FLASH Sectors
sahilmgandhi 18:6a4db94011d3 246 * @{
sahilmgandhi 18:6a4db94011d3 247 */
sahilmgandhi 18:6a4db94011d3 248 #define FLASH_SECTOR_0 ((uint32_t)0U) /*!< Sector Number 0 */
sahilmgandhi 18:6a4db94011d3 249 #define FLASH_SECTOR_1 ((uint32_t)1U) /*!< Sector Number 1 */
sahilmgandhi 18:6a4db94011d3 250 #define FLASH_SECTOR_2 ((uint32_t)2U) /*!< Sector Number 2 */
sahilmgandhi 18:6a4db94011d3 251 #define FLASH_SECTOR_3 ((uint32_t)3U) /*!< Sector Number 3 */
sahilmgandhi 18:6a4db94011d3 252 #define FLASH_SECTOR_4 ((uint32_t)4U) /*!< Sector Number 4 */
sahilmgandhi 18:6a4db94011d3 253 #define FLASH_SECTOR_5 ((uint32_t)5U) /*!< Sector Number 5 */
sahilmgandhi 18:6a4db94011d3 254 #define FLASH_SECTOR_6 ((uint32_t)6U) /*!< Sector Number 6 */
sahilmgandhi 18:6a4db94011d3 255 #define FLASH_SECTOR_7 ((uint32_t)7U) /*!< Sector Number 7 */
sahilmgandhi 18:6a4db94011d3 256 #define FLASH_SECTOR_8 ((uint32_t)8U) /*!< Sector Number 8 */
sahilmgandhi 18:6a4db94011d3 257 #define FLASH_SECTOR_9 ((uint32_t)9U) /*!< Sector Number 9 */
sahilmgandhi 18:6a4db94011d3 258 #define FLASH_SECTOR_10 ((uint32_t)10U) /*!< Sector Number 10 */
sahilmgandhi 18:6a4db94011d3 259 #define FLASH_SECTOR_11 ((uint32_t)11U) /*!< Sector Number 11 */
sahilmgandhi 18:6a4db94011d3 260
sahilmgandhi 18:6a4db94011d3 261
sahilmgandhi 18:6a4db94011d3 262
sahilmgandhi 18:6a4db94011d3 263 /**
sahilmgandhi 18:6a4db94011d3 264 * @}
sahilmgandhi 18:6a4db94011d3 265 */
sahilmgandhi 18:6a4db94011d3 266
sahilmgandhi 18:6a4db94011d3 267 /** @defgroup FLASHEx_Option_Bytes_Write_Protection FLASH Option Bytes Write Protection
sahilmgandhi 18:6a4db94011d3 268 * @{
sahilmgandhi 18:6a4db94011d3 269 */
sahilmgandhi 18:6a4db94011d3 270 #define OB_WRP_SECTOR_0 ((uint32_t)0x00000001U) /*!< Write protection of Sector0 */
sahilmgandhi 18:6a4db94011d3 271 #define OB_WRP_SECTOR_1 ((uint32_t)0x00000002U) /*!< Write protection of Sector1 */
sahilmgandhi 18:6a4db94011d3 272 #define OB_WRP_SECTOR_2 ((uint32_t)0x00000004U) /*!< Write protection of Sector2 */
sahilmgandhi 18:6a4db94011d3 273 #define OB_WRP_SECTOR_3 ((uint32_t)0x00000008U) /*!< Write protection of Sector3 */
sahilmgandhi 18:6a4db94011d3 274 #define OB_WRP_SECTOR_4 ((uint32_t)0x00000010U) /*!< Write protection of Sector4 */
sahilmgandhi 18:6a4db94011d3 275 #define OB_WRP_SECTOR_5 ((uint32_t)0x00000020U) /*!< Write protection of Sector5 */
sahilmgandhi 18:6a4db94011d3 276 #define OB_WRP_SECTOR_6 ((uint32_t)0x00000040U) /*!< Write protection of Sector6 */
sahilmgandhi 18:6a4db94011d3 277 #define OB_WRP_SECTOR_7 ((uint32_t)0x00000080U) /*!< Write protection of Sector7 */
sahilmgandhi 18:6a4db94011d3 278 #define OB_WRP_SECTOR_8 ((uint32_t)0x00000100U) /*!< Write protection of Sector8 */
sahilmgandhi 18:6a4db94011d3 279 #define OB_WRP_SECTOR_9 ((uint32_t)0x00000200U) /*!< Write protection of Sector9 */
sahilmgandhi 18:6a4db94011d3 280 #define OB_WRP_SECTOR_10 ((uint32_t)0x00000400U) /*!< Write protection of Sector10 */
sahilmgandhi 18:6a4db94011d3 281 #define OB_WRP_SECTOR_11 ((uint32_t)0x00000800U) /*!< Write protection of Sector11 */
sahilmgandhi 18:6a4db94011d3 282 #define OB_WRP_SECTOR_All ((uint32_t)0x00000FFFU) /*!< Write protection of all Sectors */
sahilmgandhi 18:6a4db94011d3 283
sahilmgandhi 18:6a4db94011d3 284
sahilmgandhi 18:6a4db94011d3 285 /**
sahilmgandhi 18:6a4db94011d3 286 * @}
sahilmgandhi 18:6a4db94011d3 287 */
sahilmgandhi 18:6a4db94011d3 288
sahilmgandhi 18:6a4db94011d3 289 /**
sahilmgandhi 18:6a4db94011d3 290 * @}
sahilmgandhi 18:6a4db94011d3 291 */
sahilmgandhi 18:6a4db94011d3 292
sahilmgandhi 18:6a4db94011d3 293 /* Exported macro ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 294
sahilmgandhi 18:6a4db94011d3 295 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 296 /** @addtogroup FLASHEx_Exported_Functions
sahilmgandhi 18:6a4db94011d3 297 * @{
sahilmgandhi 18:6a4db94011d3 298 */
sahilmgandhi 18:6a4db94011d3 299
sahilmgandhi 18:6a4db94011d3 300 /** @addtogroup FLASHEx_Exported_Functions_Group1
sahilmgandhi 18:6a4db94011d3 301 * @{
sahilmgandhi 18:6a4db94011d3 302 */
sahilmgandhi 18:6a4db94011d3 303 /* Extension Program operation functions *************************************/
sahilmgandhi 18:6a4db94011d3 304 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError);
sahilmgandhi 18:6a4db94011d3 305 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
sahilmgandhi 18:6a4db94011d3 306 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
sahilmgandhi 18:6a4db94011d3 307 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
sahilmgandhi 18:6a4db94011d3 308
sahilmgandhi 18:6a4db94011d3 309 /**
sahilmgandhi 18:6a4db94011d3 310 * @}
sahilmgandhi 18:6a4db94011d3 311 */
sahilmgandhi 18:6a4db94011d3 312
sahilmgandhi 18:6a4db94011d3 313 /**
sahilmgandhi 18:6a4db94011d3 314 * @}
sahilmgandhi 18:6a4db94011d3 315 */
sahilmgandhi 18:6a4db94011d3 316 /* Private types -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 317 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 318 /** @defgroup FLASHEx_Private_Variables FLASH Private Variables
sahilmgandhi 18:6a4db94011d3 319 * @{
sahilmgandhi 18:6a4db94011d3 320 */
sahilmgandhi 18:6a4db94011d3 321
sahilmgandhi 18:6a4db94011d3 322 /**
sahilmgandhi 18:6a4db94011d3 323 * @}
sahilmgandhi 18:6a4db94011d3 324 */
sahilmgandhi 18:6a4db94011d3 325 /* Private constants ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 326 /** @defgroup FLASHEx_Private_Constants FLASH Private Constants
sahilmgandhi 18:6a4db94011d3 327 * @{
sahilmgandhi 18:6a4db94011d3 328 */
sahilmgandhi 18:6a4db94011d3 329
sahilmgandhi 18:6a4db94011d3 330 #define FLASH_SECTOR_TOTAL 12U
sahilmgandhi 18:6a4db94011d3 331
sahilmgandhi 18:6a4db94011d3 332 /**
sahilmgandhi 18:6a4db94011d3 333 * @}
sahilmgandhi 18:6a4db94011d3 334 */
sahilmgandhi 18:6a4db94011d3 335
sahilmgandhi 18:6a4db94011d3 336 /* Private macros ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 337 /** @defgroup FLASHEx_Private_Macros FLASH Private Macros
sahilmgandhi 18:6a4db94011d3 338 * @{
sahilmgandhi 18:6a4db94011d3 339 */
sahilmgandhi 18:6a4db94011d3 340
sahilmgandhi 18:6a4db94011d3 341 /** @defgroup FLASHEx_IS_FLASH_Definitions FLASH Private macros to check input parameters
sahilmgandhi 18:6a4db94011d3 342 * @{
sahilmgandhi 18:6a4db94011d3 343 */
sahilmgandhi 18:6a4db94011d3 344
sahilmgandhi 18:6a4db94011d3 345 #define IS_FLASH_TYPEERASE(VALUE)(((VALUE) == FLASH_TYPEERASE_SECTORS) || \
sahilmgandhi 18:6a4db94011d3 346 ((VALUE) == FLASH_TYPEERASE_MASSERASE))
sahilmgandhi 18:6a4db94011d3 347
sahilmgandhi 18:6a4db94011d3 348 #define IS_VOLTAGERANGE(RANGE)(((RANGE) == FLASH_VOLTAGE_RANGE_1) || \
sahilmgandhi 18:6a4db94011d3 349 ((RANGE) == FLASH_VOLTAGE_RANGE_2) || \
sahilmgandhi 18:6a4db94011d3 350 ((RANGE) == FLASH_VOLTAGE_RANGE_3) || \
sahilmgandhi 18:6a4db94011d3 351 ((RANGE) == FLASH_VOLTAGE_RANGE_4))
sahilmgandhi 18:6a4db94011d3 352
sahilmgandhi 18:6a4db94011d3 353 #define IS_WRPSTATE(VALUE)(((VALUE) == OB_WRPSTATE_DISABLE) || \
sahilmgandhi 18:6a4db94011d3 354 ((VALUE) == OB_WRPSTATE_ENABLE))
sahilmgandhi 18:6a4db94011d3 355
sahilmgandhi 18:6a4db94011d3 356 #define IS_OPTIONBYTE(VALUE)(((VALUE) <= (OPTIONBYTE_WRP|OPTIONBYTE_RDP|OPTIONBYTE_USER|OPTIONBYTE_BOR)))
sahilmgandhi 18:6a4db94011d3 357
sahilmgandhi 18:6a4db94011d3 358 #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\
sahilmgandhi 18:6a4db94011d3 359 ((LEVEL) == OB_RDP_LEVEL_1) ||\
sahilmgandhi 18:6a4db94011d3 360 ((LEVEL) == OB_RDP_LEVEL_2))
sahilmgandhi 18:6a4db94011d3 361
sahilmgandhi 18:6a4db94011d3 362 #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW))
sahilmgandhi 18:6a4db94011d3 363
sahilmgandhi 18:6a4db94011d3 364 #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST))
sahilmgandhi 18:6a4db94011d3 365
sahilmgandhi 18:6a4db94011d3 366 #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST))
sahilmgandhi 18:6a4db94011d3 367
sahilmgandhi 18:6a4db94011d3 368 #define IS_OB_BOR_LEVEL(LEVEL) (((LEVEL) == OB_BOR_LEVEL1) || ((LEVEL) == OB_BOR_LEVEL2) ||\
sahilmgandhi 18:6a4db94011d3 369 ((LEVEL) == OB_BOR_LEVEL3) || ((LEVEL) == OB_BOR_OFF))
sahilmgandhi 18:6a4db94011d3 370
sahilmgandhi 18:6a4db94011d3 371
sahilmgandhi 18:6a4db94011d3 372 #define IS_FLASH_LATENCY(LATENCY) (((LATENCY) == FLASH_LATENCY_0) || \
sahilmgandhi 18:6a4db94011d3 373 ((LATENCY) == FLASH_LATENCY_1) || \
sahilmgandhi 18:6a4db94011d3 374 ((LATENCY) == FLASH_LATENCY_2) || \
sahilmgandhi 18:6a4db94011d3 375 ((LATENCY) == FLASH_LATENCY_3) || \
sahilmgandhi 18:6a4db94011d3 376 ((LATENCY) == FLASH_LATENCY_4) || \
sahilmgandhi 18:6a4db94011d3 377 ((LATENCY) == FLASH_LATENCY_5) || \
sahilmgandhi 18:6a4db94011d3 378 ((LATENCY) == FLASH_LATENCY_6) || \
sahilmgandhi 18:6a4db94011d3 379 ((LATENCY) == FLASH_LATENCY_7))
sahilmgandhi 18:6a4db94011d3 380 #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1))
sahilmgandhi 18:6a4db94011d3 381 #define IS_FLASH_SECTOR(SECTOR) (((SECTOR) == FLASH_SECTOR_0) || ((SECTOR) == FLASH_SECTOR_1) ||\
sahilmgandhi 18:6a4db94011d3 382 ((SECTOR) == FLASH_SECTOR_2) || ((SECTOR) == FLASH_SECTOR_3) ||\
sahilmgandhi 18:6a4db94011d3 383 ((SECTOR) == FLASH_SECTOR_4) || ((SECTOR) == FLASH_SECTOR_5) ||\
sahilmgandhi 18:6a4db94011d3 384 ((SECTOR) == FLASH_SECTOR_6) || ((SECTOR) == FLASH_SECTOR_7) ||\
sahilmgandhi 18:6a4db94011d3 385 ((SECTOR) == FLASH_SECTOR_8) || ((SECTOR) == FLASH_SECTOR_9) ||\
sahilmgandhi 18:6a4db94011d3 386 ((SECTOR) == FLASH_SECTOR_10) || ((SECTOR) == FLASH_SECTOR_11))
sahilmgandhi 18:6a4db94011d3 387
sahilmgandhi 18:6a4db94011d3 388
sahilmgandhi 18:6a4db94011d3 389
sahilmgandhi 18:6a4db94011d3 390 #define IS_FLASH_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= FLASH_END))
sahilmgandhi 18:6a4db94011d3 391 #define IS_FLASH_NBSECTORS(NBSECTORS) (((NBSECTORS) != 0U) && ((NBSECTORS) <= FLASH_SECTOR_TOTAL))
sahilmgandhi 18:6a4db94011d3 392 #define IS_OB_WRP_SECTOR(SECTOR)((((SECTOR) & (uint32_t)0xFFFFF000U) == 0x00000000U) && ((SECTOR) != 0x00000000U))
sahilmgandhi 18:6a4db94011d3 393
sahilmgandhi 18:6a4db94011d3 394 /**
sahilmgandhi 18:6a4db94011d3 395 * @}
sahilmgandhi 18:6a4db94011d3 396 */
sahilmgandhi 18:6a4db94011d3 397
sahilmgandhi 18:6a4db94011d3 398 /**
sahilmgandhi 18:6a4db94011d3 399 * @}
sahilmgandhi 18:6a4db94011d3 400 */
sahilmgandhi 18:6a4db94011d3 401
sahilmgandhi 18:6a4db94011d3 402 /* Private functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 403 /** @defgroup FLASHEx_Private_Functions FLASH Private Functions
sahilmgandhi 18:6a4db94011d3 404 * @{
sahilmgandhi 18:6a4db94011d3 405 */
sahilmgandhi 18:6a4db94011d3 406 void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange);
sahilmgandhi 18:6a4db94011d3 407 void FLASH_FlushCaches(void);
sahilmgandhi 18:6a4db94011d3 408 /**
sahilmgandhi 18:6a4db94011d3 409 * @}
sahilmgandhi 18:6a4db94011d3 410 */
sahilmgandhi 18:6a4db94011d3 411
sahilmgandhi 18:6a4db94011d3 412 /**
sahilmgandhi 18:6a4db94011d3 413 * @}
sahilmgandhi 18:6a4db94011d3 414 */
sahilmgandhi 18:6a4db94011d3 415
sahilmgandhi 18:6a4db94011d3 416 /**
sahilmgandhi 18:6a4db94011d3 417 * @}
sahilmgandhi 18:6a4db94011d3 418 */
sahilmgandhi 18:6a4db94011d3 419
sahilmgandhi 18:6a4db94011d3 420 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 421 }
sahilmgandhi 18:6a4db94011d3 422 #endif
sahilmgandhi 18:6a4db94011d3 423
sahilmgandhi 18:6a4db94011d3 424 #endif /* __STM32F2xx_HAL_FLASH_EX_H */
sahilmgandhi 18:6a4db94011d3 425
sahilmgandhi 18:6a4db94011d3 426 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/