MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_dac.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file stm32f2xx_hal_dac.h
sahilmgandhi 18:6a4db94011d3 4 * @author MCD Application Team
sahilmgandhi 18:6a4db94011d3 5 * @version V1.1.3
sahilmgandhi 18:6a4db94011d3 6 * @date 29-June-2016
sahilmgandhi 18:6a4db94011d3 7 * @brief Header file of DAC HAL module.
sahilmgandhi 18:6a4db94011d3 8 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 9 * @attention
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
sahilmgandhi 18:6a4db94011d3 12 *
sahilmgandhi 18:6a4db94011d3 13 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 14 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 15 * 1. Redistributions of source code must retain the above copyright notice,
sahilmgandhi 18:6a4db94011d3 16 * this list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 18 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 19 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
sahilmgandhi 18:6a4db94011d3 21 * may be used to endorse or promote products derived from this software
sahilmgandhi 18:6a4db94011d3 22 * without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 23 *
sahilmgandhi 18:6a4db94011d3 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 34 *
sahilmgandhi 18:6a4db94011d3 35 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 36 */
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 /* Define to prevent recursive inclusion -------------------------------------*/
sahilmgandhi 18:6a4db94011d3 39 #ifndef __STM32F2xx_HAL_DAC_H
sahilmgandhi 18:6a4db94011d3 40 #define __STM32F2xx_HAL_DAC_H
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 43 extern "C" {
sahilmgandhi 18:6a4db94011d3 44 #endif
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 /* Includes ------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 47 #include "stm32f2xx_hal_def.h"
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 /** @addtogroup STM32F2xx_HAL_Driver
sahilmgandhi 18:6a4db94011d3 50 * @{
sahilmgandhi 18:6a4db94011d3 51 */
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 /** @addtogroup DAC
sahilmgandhi 18:6a4db94011d3 54 * @{
sahilmgandhi 18:6a4db94011d3 55 */
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 /* Exported types ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 58 /** @defgroup DAC_Exported_Types DAC Exported Types
sahilmgandhi 18:6a4db94011d3 59 * @{
sahilmgandhi 18:6a4db94011d3 60 */
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 /**
sahilmgandhi 18:6a4db94011d3 63 * @brief HAL State structures definition
sahilmgandhi 18:6a4db94011d3 64 */
sahilmgandhi 18:6a4db94011d3 65 typedef enum
sahilmgandhi 18:6a4db94011d3 66 {
sahilmgandhi 18:6a4db94011d3 67 HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */
sahilmgandhi 18:6a4db94011d3 68 HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */
sahilmgandhi 18:6a4db94011d3 69 HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */
sahilmgandhi 18:6a4db94011d3 70 HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */
sahilmgandhi 18:6a4db94011d3 71 HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */
sahilmgandhi 18:6a4db94011d3 72 }HAL_DAC_StateTypeDef;
sahilmgandhi 18:6a4db94011d3 73
sahilmgandhi 18:6a4db94011d3 74 /**
sahilmgandhi 18:6a4db94011d3 75 * @brief DAC handle Structure definition
sahilmgandhi 18:6a4db94011d3 76 */
sahilmgandhi 18:6a4db94011d3 77 typedef struct
sahilmgandhi 18:6a4db94011d3 78 {
sahilmgandhi 18:6a4db94011d3 79 DAC_TypeDef *Instance; /*!< Register base address */
sahilmgandhi 18:6a4db94011d3 80
sahilmgandhi 18:6a4db94011d3 81 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */
sahilmgandhi 18:6a4db94011d3 82
sahilmgandhi 18:6a4db94011d3 83 HAL_LockTypeDef Lock; /*!< DAC locking object */
sahilmgandhi 18:6a4db94011d3 84
sahilmgandhi 18:6a4db94011d3 85 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */
sahilmgandhi 18:6a4db94011d3 86
sahilmgandhi 18:6a4db94011d3 87 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */
sahilmgandhi 18:6a4db94011d3 88
sahilmgandhi 18:6a4db94011d3 89 __IO uint32_t ErrorCode; /*!< DAC Error code */
sahilmgandhi 18:6a4db94011d3 90
sahilmgandhi 18:6a4db94011d3 91 }DAC_HandleTypeDef;
sahilmgandhi 18:6a4db94011d3 92
sahilmgandhi 18:6a4db94011d3 93 /**
sahilmgandhi 18:6a4db94011d3 94 * @brief DAC Configuration regular Channel structure definition
sahilmgandhi 18:6a4db94011d3 95 */
sahilmgandhi 18:6a4db94011d3 96 typedef struct
sahilmgandhi 18:6a4db94011d3 97 {
sahilmgandhi 18:6a4db94011d3 98 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
sahilmgandhi 18:6a4db94011d3 99 This parameter can be a value of @ref DAC_trigger_selection */
sahilmgandhi 18:6a4db94011d3 100
sahilmgandhi 18:6a4db94011d3 101 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
sahilmgandhi 18:6a4db94011d3 102 This parameter can be a value of @ref DAC_output_buffer */
sahilmgandhi 18:6a4db94011d3 103 }DAC_ChannelConfTypeDef;
sahilmgandhi 18:6a4db94011d3 104 /**
sahilmgandhi 18:6a4db94011d3 105 * @}
sahilmgandhi 18:6a4db94011d3 106 */
sahilmgandhi 18:6a4db94011d3 107
sahilmgandhi 18:6a4db94011d3 108 /* Exported constants --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 109 /** @defgroup DAC_Exported_Constants DAC Exported Constants
sahilmgandhi 18:6a4db94011d3 110 * @{
sahilmgandhi 18:6a4db94011d3 111 */
sahilmgandhi 18:6a4db94011d3 112
sahilmgandhi 18:6a4db94011d3 113 /** @defgroup DAC_Error_Code DAC Error Code
sahilmgandhi 18:6a4db94011d3 114 * @{
sahilmgandhi 18:6a4db94011d3 115 */
sahilmgandhi 18:6a4db94011d3 116 #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */
sahilmgandhi 18:6a4db94011d3 117 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DAM underrun error */
sahilmgandhi 18:6a4db94011d3 118 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DAM underrun error */
sahilmgandhi 18:6a4db94011d3 119 #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */
sahilmgandhi 18:6a4db94011d3 120 /**
sahilmgandhi 18:6a4db94011d3 121 * @}
sahilmgandhi 18:6a4db94011d3 122 */
sahilmgandhi 18:6a4db94011d3 123
sahilmgandhi 18:6a4db94011d3 124 /** @defgroup DAC_trigger_selection DAC Trigger Selection
sahilmgandhi 18:6a4db94011d3 125 * @{
sahilmgandhi 18:6a4db94011d3 126 */
sahilmgandhi 18:6a4db94011d3 127
sahilmgandhi 18:6a4db94011d3 128 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000U) /*!< Conversion is automatic once the DAC1_DHRxxxx register
sahilmgandhi 18:6a4db94011d3 129 has been loaded, and not by external trigger */
sahilmgandhi 18:6a4db94011d3 130 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
sahilmgandhi 18:6a4db94011d3 131 #define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
sahilmgandhi 18:6a4db94011d3 132 #define DAC_TRIGGER_T5_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */
sahilmgandhi 18:6a4db94011d3 133 #define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
sahilmgandhi 18:6a4db94011d3 134 #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
sahilmgandhi 18:6a4db94011d3 135 #define DAC_TRIGGER_T8_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */
sahilmgandhi 18:6a4db94011d3 136
sahilmgandhi 18:6a4db94011d3 137 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
sahilmgandhi 18:6a4db94011d3 138 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */
sahilmgandhi 18:6a4db94011d3 139 /**
sahilmgandhi 18:6a4db94011d3 140 * @}
sahilmgandhi 18:6a4db94011d3 141 */
sahilmgandhi 18:6a4db94011d3 142
sahilmgandhi 18:6a4db94011d3 143 /** @defgroup DAC_output_buffer DAC Output Buffer
sahilmgandhi 18:6a4db94011d3 144 * @{
sahilmgandhi 18:6a4db94011d3 145 */
sahilmgandhi 18:6a4db94011d3 146 #define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 147 #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1)
sahilmgandhi 18:6a4db94011d3 148 /**
sahilmgandhi 18:6a4db94011d3 149 * @}
sahilmgandhi 18:6a4db94011d3 150 */
sahilmgandhi 18:6a4db94011d3 151
sahilmgandhi 18:6a4db94011d3 152 /** @defgroup DAC_Channel_selection DAC Channel Selection
sahilmgandhi 18:6a4db94011d3 153 * @{
sahilmgandhi 18:6a4db94011d3 154 */
sahilmgandhi 18:6a4db94011d3 155 #define DAC_CHANNEL_1 ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 156 #define DAC_CHANNEL_2 ((uint32_t)0x00000010U)
sahilmgandhi 18:6a4db94011d3 157 /**
sahilmgandhi 18:6a4db94011d3 158 * @}
sahilmgandhi 18:6a4db94011d3 159 */
sahilmgandhi 18:6a4db94011d3 160
sahilmgandhi 18:6a4db94011d3 161 /** @defgroup DAC_data_alignment DAC Data Alignment
sahilmgandhi 18:6a4db94011d3 162 * @{
sahilmgandhi 18:6a4db94011d3 163 */
sahilmgandhi 18:6a4db94011d3 164 #define DAC_ALIGN_12B_R ((uint32_t)0x00000000U)
sahilmgandhi 18:6a4db94011d3 165 #define DAC_ALIGN_12B_L ((uint32_t)0x00000004U)
sahilmgandhi 18:6a4db94011d3 166 #define DAC_ALIGN_8B_R ((uint32_t)0x00000008U)
sahilmgandhi 18:6a4db94011d3 167 /**
sahilmgandhi 18:6a4db94011d3 168 * @}
sahilmgandhi 18:6a4db94011d3 169 */
sahilmgandhi 18:6a4db94011d3 170
sahilmgandhi 18:6a4db94011d3 171 /** @defgroup DAC_flags_definition DAC Flags Definition
sahilmgandhi 18:6a4db94011d3 172 * @{
sahilmgandhi 18:6a4db94011d3 173 */
sahilmgandhi 18:6a4db94011d3 174 #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
sahilmgandhi 18:6a4db94011d3 175 #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
sahilmgandhi 18:6a4db94011d3 176 /**
sahilmgandhi 18:6a4db94011d3 177 * @}
sahilmgandhi 18:6a4db94011d3 178 */
sahilmgandhi 18:6a4db94011d3 179
sahilmgandhi 18:6a4db94011d3 180 /** @defgroup DAC_IT_definition DAC IT Definition
sahilmgandhi 18:6a4db94011d3 181 * @{
sahilmgandhi 18:6a4db94011d3 182 */
sahilmgandhi 18:6a4db94011d3 183 #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
sahilmgandhi 18:6a4db94011d3 184 #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
sahilmgandhi 18:6a4db94011d3 185 /**
sahilmgandhi 18:6a4db94011d3 186 * @}
sahilmgandhi 18:6a4db94011d3 187 */
sahilmgandhi 18:6a4db94011d3 188
sahilmgandhi 18:6a4db94011d3 189 /**
sahilmgandhi 18:6a4db94011d3 190 * @}
sahilmgandhi 18:6a4db94011d3 191 */
sahilmgandhi 18:6a4db94011d3 192
sahilmgandhi 18:6a4db94011d3 193 /* Exported macro ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 194 /** @defgroup DAC_Exported_Macros DAC Exported Macros
sahilmgandhi 18:6a4db94011d3 195 * @{
sahilmgandhi 18:6a4db94011d3 196 */
sahilmgandhi 18:6a4db94011d3 197
sahilmgandhi 18:6a4db94011d3 198 /** @brief Reset DAC handle state
sahilmgandhi 18:6a4db94011d3 199 * @param __HANDLE__: specifies the DAC handle.
sahilmgandhi 18:6a4db94011d3 200 * @retval None
sahilmgandhi 18:6a4db94011d3 201 */
sahilmgandhi 18:6a4db94011d3 202 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
sahilmgandhi 18:6a4db94011d3 203
sahilmgandhi 18:6a4db94011d3 204 /** @brief Enable the DAC channel
sahilmgandhi 18:6a4db94011d3 205 * @param __HANDLE__: specifies the DAC handle.
sahilmgandhi 18:6a4db94011d3 206 * @param __DAC_Channel__: specifies the DAC channel
sahilmgandhi 18:6a4db94011d3 207 * @retval None
sahilmgandhi 18:6a4db94011d3 208 */
sahilmgandhi 18:6a4db94011d3 209 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__)))
sahilmgandhi 18:6a4db94011d3 210
sahilmgandhi 18:6a4db94011d3 211 /** @brief Disable the DAC channel
sahilmgandhi 18:6a4db94011d3 212 * @param __HANDLE__: specifies the DAC handle
sahilmgandhi 18:6a4db94011d3 213 * @param __DAC_Channel__: specifies the DAC channel.
sahilmgandhi 18:6a4db94011d3 214 * @retval None
sahilmgandhi 18:6a4db94011d3 215 */
sahilmgandhi 18:6a4db94011d3 216 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__)))
sahilmgandhi 18:6a4db94011d3 217
sahilmgandhi 18:6a4db94011d3 218 /** @brief Enable the DAC interrupt
sahilmgandhi 18:6a4db94011d3 219 * @param __HANDLE__: specifies the DAC handle
sahilmgandhi 18:6a4db94011d3 220 * @param __INTERRUPT__: specifies the DAC interrupt.
sahilmgandhi 18:6a4db94011d3 221 * @retval None
sahilmgandhi 18:6a4db94011d3 222 */
sahilmgandhi 18:6a4db94011d3 223 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 224
sahilmgandhi 18:6a4db94011d3 225 /** @brief Disable the DAC interrupt
sahilmgandhi 18:6a4db94011d3 226 * @param __HANDLE__: specifies the DAC handle
sahilmgandhi 18:6a4db94011d3 227 * @param __INTERRUPT__: specifies the DAC interrupt.
sahilmgandhi 18:6a4db94011d3 228 * @retval None
sahilmgandhi 18:6a4db94011d3 229 */
sahilmgandhi 18:6a4db94011d3 230 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 231
sahilmgandhi 18:6a4db94011d3 232 /** @brief Checks if the specified DAC interrupt source is enabled or disabled.
sahilmgandhi 18:6a4db94011d3 233 * @param __HANDLE__: DAC handle
sahilmgandhi 18:6a4db94011d3 234 * @param __INTERRUPT__: DAC interrupt source to check
sahilmgandhi 18:6a4db94011d3 235 * This parameter can be any combination of the following values:
sahilmgandhi 18:6a4db94011d3 236 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
sahilmgandhi 18:6a4db94011d3 237 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
sahilmgandhi 18:6a4db94011d3 238 * @retval State of interruption (SET or RESET)
sahilmgandhi 18:6a4db94011d3 239 */
sahilmgandhi 18:6a4db94011d3 240 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__))
sahilmgandhi 18:6a4db94011d3 241
sahilmgandhi 18:6a4db94011d3 242 /** @brief Get the selected DAC's flag status.
sahilmgandhi 18:6a4db94011d3 243 * @param __HANDLE__: specifies the DAC handle.
sahilmgandhi 18:6a4db94011d3 244 * @param __FLAG__: specifies the flag to clear.
sahilmgandhi 18:6a4db94011d3 245 * This parameter can be any combination of the following values:
sahilmgandhi 18:6a4db94011d3 246 * @arg DAC_FLAG_DMAUDR1: DMA underrun 1 flag
sahilmgandhi 18:6a4db94011d3 247 * @arg DAC_FLAG_DMAUDR2: DMA underrun 2 flag
sahilmgandhi 18:6a4db94011d3 248 * @retval None
sahilmgandhi 18:6a4db94011d3 249 */
sahilmgandhi 18:6a4db94011d3 250 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
sahilmgandhi 18:6a4db94011d3 251
sahilmgandhi 18:6a4db94011d3 252 /** @brief Clear the DAC's flag.
sahilmgandhi 18:6a4db94011d3 253 * @param __HANDLE__: specifies the DAC handle.
sahilmgandhi 18:6a4db94011d3 254 * @param __FLAG__: specifies the flag to clear.
sahilmgandhi 18:6a4db94011d3 255 * This parameter can be any combination of the following values:
sahilmgandhi 18:6a4db94011d3 256 * @arg DAC_FLAG_DMAUDR1: DMA underrun 1 flag
sahilmgandhi 18:6a4db94011d3 257 * @arg DAC_FLAG_DMAUDR2: DMA underrun 2 flag
sahilmgandhi 18:6a4db94011d3 258 * @retval None
sahilmgandhi 18:6a4db94011d3 259 */
sahilmgandhi 18:6a4db94011d3 260 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
sahilmgandhi 18:6a4db94011d3 261 /**
sahilmgandhi 18:6a4db94011d3 262 * @}
sahilmgandhi 18:6a4db94011d3 263 */
sahilmgandhi 18:6a4db94011d3 264
sahilmgandhi 18:6a4db94011d3 265 /* Include DAC HAL Extension module */
sahilmgandhi 18:6a4db94011d3 266 #include "stm32f2xx_hal_dac_ex.h"
sahilmgandhi 18:6a4db94011d3 267
sahilmgandhi 18:6a4db94011d3 268 /* Exported functions --------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 269 /** @addtogroup DAC_Exported_Functions
sahilmgandhi 18:6a4db94011d3 270 * @{
sahilmgandhi 18:6a4db94011d3 271 */
sahilmgandhi 18:6a4db94011d3 272
sahilmgandhi 18:6a4db94011d3 273 /** @addtogroup DAC_Exported_Functions_Group1
sahilmgandhi 18:6a4db94011d3 274 * @{
sahilmgandhi 18:6a4db94011d3 275 */
sahilmgandhi 18:6a4db94011d3 276 /* Initialization/de-initialization functions *********************************/
sahilmgandhi 18:6a4db94011d3 277 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac);
sahilmgandhi 18:6a4db94011d3 278 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac);
sahilmgandhi 18:6a4db94011d3 279 void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac);
sahilmgandhi 18:6a4db94011d3 280 void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac);
sahilmgandhi 18:6a4db94011d3 281 /**
sahilmgandhi 18:6a4db94011d3 282 * @}
sahilmgandhi 18:6a4db94011d3 283 */
sahilmgandhi 18:6a4db94011d3 284
sahilmgandhi 18:6a4db94011d3 285 /** @addtogroup DAC_Exported_Functions_Group2
sahilmgandhi 18:6a4db94011d3 286 * @{
sahilmgandhi 18:6a4db94011d3 287 */
sahilmgandhi 18:6a4db94011d3 288 /* I/O operation functions ****************************************************/
sahilmgandhi 18:6a4db94011d3 289 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel);
sahilmgandhi 18:6a4db94011d3 290 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel);
sahilmgandhi 18:6a4db94011d3 291 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment);
sahilmgandhi 18:6a4db94011d3 292 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel);
sahilmgandhi 18:6a4db94011d3 293 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel);
sahilmgandhi 18:6a4db94011d3 294 /**
sahilmgandhi 18:6a4db94011d3 295 * @}
sahilmgandhi 18:6a4db94011d3 296 */
sahilmgandhi 18:6a4db94011d3 297
sahilmgandhi 18:6a4db94011d3 298 /** @addtogroup DAC_Exported_Functions_Group3
sahilmgandhi 18:6a4db94011d3 299 * @{
sahilmgandhi 18:6a4db94011d3 300 */
sahilmgandhi 18:6a4db94011d3 301 /* Peripheral Control functions ***********************************************/
sahilmgandhi 18:6a4db94011d3 302 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel);
sahilmgandhi 18:6a4db94011d3 303 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
sahilmgandhi 18:6a4db94011d3 304 /**
sahilmgandhi 18:6a4db94011d3 305 * @}
sahilmgandhi 18:6a4db94011d3 306 */
sahilmgandhi 18:6a4db94011d3 307
sahilmgandhi 18:6a4db94011d3 308 /** @addtogroup DAC_Exported_Functions_Group4
sahilmgandhi 18:6a4db94011d3 309 * @{
sahilmgandhi 18:6a4db94011d3 310 */
sahilmgandhi 18:6a4db94011d3 311 /* Peripheral State functions *************************************************/
sahilmgandhi 18:6a4db94011d3 312 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac);
sahilmgandhi 18:6a4db94011d3 313 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac);
sahilmgandhi 18:6a4db94011d3 314 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
sahilmgandhi 18:6a4db94011d3 315
sahilmgandhi 18:6a4db94011d3 316 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac);
sahilmgandhi 18:6a4db94011d3 317 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac);
sahilmgandhi 18:6a4db94011d3 318 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
sahilmgandhi 18:6a4db94011d3 319 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
sahilmgandhi 18:6a4db94011d3 320 /**
sahilmgandhi 18:6a4db94011d3 321 * @}
sahilmgandhi 18:6a4db94011d3 322 */
sahilmgandhi 18:6a4db94011d3 323
sahilmgandhi 18:6a4db94011d3 324 /**
sahilmgandhi 18:6a4db94011d3 325 * @}
sahilmgandhi 18:6a4db94011d3 326 */
sahilmgandhi 18:6a4db94011d3 327 /* Private types -------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 328 /* Private variables ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 329 /* Private constants ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 330 /** @defgroup DAC_Private_Constants DAC Private Constants
sahilmgandhi 18:6a4db94011d3 331 * @{
sahilmgandhi 18:6a4db94011d3 332 */
sahilmgandhi 18:6a4db94011d3 333
sahilmgandhi 18:6a4db94011d3 334 /**
sahilmgandhi 18:6a4db94011d3 335 * @}
sahilmgandhi 18:6a4db94011d3 336 */
sahilmgandhi 18:6a4db94011d3 337
sahilmgandhi 18:6a4db94011d3 338 /* Private macros ------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 339 /** @defgroup DAC_Private_Macros DAC Private Macros
sahilmgandhi 18:6a4db94011d3 340 * @{
sahilmgandhi 18:6a4db94011d3 341 */
sahilmgandhi 18:6a4db94011d3 342 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U)
sahilmgandhi 18:6a4db94011d3 343 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
sahilmgandhi 18:6a4db94011d3 344 ((ALIGN) == DAC_ALIGN_12B_L) || \
sahilmgandhi 18:6a4db94011d3 345 ((ALIGN) == DAC_ALIGN_8B_R))
sahilmgandhi 18:6a4db94011d3 346 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
sahilmgandhi 18:6a4db94011d3 347 ((CHANNEL) == DAC_CHANNEL_2))
sahilmgandhi 18:6a4db94011d3 348 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
sahilmgandhi 18:6a4db94011d3 349 ((STATE) == DAC_OUTPUTBUFFER_DISABLE))
sahilmgandhi 18:6a4db94011d3 350
sahilmgandhi 18:6a4db94011d3 351 #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
sahilmgandhi 18:6a4db94011d3 352 ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
sahilmgandhi 18:6a4db94011d3 353 ((TRIGGER) == DAC_TRIGGER_T8_TRGO) || \
sahilmgandhi 18:6a4db94011d3 354 ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
sahilmgandhi 18:6a4db94011d3 355 ((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \
sahilmgandhi 18:6a4db94011d3 356 ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
sahilmgandhi 18:6a4db94011d3 357 ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \
sahilmgandhi 18:6a4db94011d3 358 ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
sahilmgandhi 18:6a4db94011d3 359 ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
sahilmgandhi 18:6a4db94011d3 360
sahilmgandhi 18:6a4db94011d3 361 /** @brief Set DHR12R1 alignment
sahilmgandhi 18:6a4db94011d3 362 * @param __ALIGNMENT__: specifies the DAC alignment
sahilmgandhi 18:6a4db94011d3 363 * @retval None
sahilmgandhi 18:6a4db94011d3 364 */
sahilmgandhi 18:6a4db94011d3 365 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000008U) + (__ALIGNMENT__))
sahilmgandhi 18:6a4db94011d3 366
sahilmgandhi 18:6a4db94011d3 367 /** @brief Set DHR12R2 alignment
sahilmgandhi 18:6a4db94011d3 368 * @param __ALIGNMENT__: specifies the DAC alignment
sahilmgandhi 18:6a4db94011d3 369 * @retval None
sahilmgandhi 18:6a4db94011d3 370 */
sahilmgandhi 18:6a4db94011d3 371 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000014U) + (__ALIGNMENT__))
sahilmgandhi 18:6a4db94011d3 372
sahilmgandhi 18:6a4db94011d3 373 /** @brief Set DHR12RD alignment
sahilmgandhi 18:6a4db94011d3 374 * @param __ALIGNMENT__: specifies the DAC alignment
sahilmgandhi 18:6a4db94011d3 375 * @retval None
sahilmgandhi 18:6a4db94011d3 376 */
sahilmgandhi 18:6a4db94011d3 377 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000020U) + (__ALIGNMENT__))
sahilmgandhi 18:6a4db94011d3 378
sahilmgandhi 18:6a4db94011d3 379 /**
sahilmgandhi 18:6a4db94011d3 380 * @}
sahilmgandhi 18:6a4db94011d3 381 */
sahilmgandhi 18:6a4db94011d3 382
sahilmgandhi 18:6a4db94011d3 383 /* Private functions ---------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 384 /** @defgroup DAC_Private_Functions DAC Private Functions
sahilmgandhi 18:6a4db94011d3 385 * @{
sahilmgandhi 18:6a4db94011d3 386 */
sahilmgandhi 18:6a4db94011d3 387 /**
sahilmgandhi 18:6a4db94011d3 388 * @}
sahilmgandhi 18:6a4db94011d3 389 */
sahilmgandhi 18:6a4db94011d3 390
sahilmgandhi 18:6a4db94011d3 391 /**
sahilmgandhi 18:6a4db94011d3 392 * @}
sahilmgandhi 18:6a4db94011d3 393 */
sahilmgandhi 18:6a4db94011d3 394
sahilmgandhi 18:6a4db94011d3 395 /**
sahilmgandhi 18:6a4db94011d3 396 * @}
sahilmgandhi 18:6a4db94011d3 397 */
sahilmgandhi 18:6a4db94011d3 398
sahilmgandhi 18:6a4db94011d3 399 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 400 }
sahilmgandhi 18:6a4db94011d3 401 #endif
sahilmgandhi 18:6a4db94011d3 402
sahilmgandhi 18:6a4db94011d3 403 #endif /*__STM32F2xx_HAL_DAC_H */
sahilmgandhi 18:6a4db94011d3 404
sahilmgandhi 18:6a4db94011d3 405 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/