MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_ONSEMI/TARGET_NCS36510/uart_16c550.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file uart_16c550.h
sahilmgandhi 18:6a4db94011d3 4 * @brief Definitions and API for the 16c550 driver.
sahilmgandhi 18:6a4db94011d3 5 * @internal
sahilmgandhi 18:6a4db94011d3 6 * @author ON Semiconductor
sahilmgandhi 18:6a4db94011d3 7 * $Rev: 2607 $
sahilmgandhi 18:6a4db94011d3 8 * $Date: 2013-12-06 18:02:43 +0530 (Fri, 06 Dec 2013) $
sahilmgandhi 18:6a4db94011d3 9 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
sahilmgandhi 18:6a4db94011d3 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
sahilmgandhi 18:6a4db94011d3 12 * under limited terms and conditions. The terms and conditions pertaining to the software
sahilmgandhi 18:6a4db94011d3 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
sahilmgandhi 18:6a4db94011d3 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
sahilmgandhi 18:6a4db94011d3 15 * if applicable the software license agreement. Do not use this software and/or
sahilmgandhi 18:6a4db94011d3 16 * documentation unless you have carefully read and you agree to the limited terms and
sahilmgandhi 18:6a4db94011d3 17 * conditions. By using this software and/or documentation, you agree to the limited
sahilmgandhi 18:6a4db94011d3 18 * terms and conditions.
sahilmgandhi 18:6a4db94011d3 19 *
sahilmgandhi 18:6a4db94011d3 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
sahilmgandhi 18:6a4db94011d3 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
sahilmgandhi 18:6a4db94011d3 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
sahilmgandhi 18:6a4db94011d3 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
sahilmgandhi 18:6a4db94011d3 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
sahilmgandhi 18:6a4db94011d3 25 * @endinternal
sahilmgandhi 18:6a4db94011d3 26 *
sahilmgandhi 18:6a4db94011d3 27 * @ingroup uart_16c550
sahilmgandhi 18:6a4db94011d3 28 *
sahilmgandhi 18:6a4db94011d3 29 * @details
sahilmgandhi 18:6a4db94011d3 30 * The driver for the 16c550 UART is a character driver (see char_driver.h).
sahilmgandhi 18:6a4db94011d3 31 * The driver can be accessed via the uart_16c550_driver variable.
sahilmgandhi 18:6a4db94011d3 32 *
sahilmgandhi 18:6a4db94011d3 33 * This file defines the options structure to be passed to the driver when
sahilmgandhi 18:6a4db94011d3 34 * opening a device. The structure depends on the generic uart_options_t
sahilmgandhi 18:6a4db94011d3 35 * options structure for any UART implementation (see uart.h).
sahilmgandhi 18:6a4db94011d3 36 *
sahilmgandhi 18:6a4db94011d3 37 * Any application that uses this driver must define an interrupt handler
sahilmgandhi 18:6a4db94011d3 38 * for the 16C550 interrupt and call the fUart16C550Handler() function from
sahilmgandhi 18:6a4db94011d3 39 * that ISR.
sahilmgandhi 18:6a4db94011d3 40 */
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #ifndef UART_16C550_H_
sahilmgandhi 18:6a4db94011d3 43 #define UART_16C550_H_
sahilmgandhi 18:6a4db94011d3 44
sahilmgandhi 18:6a4db94011d3 45 #include "architecture.h"
sahilmgandhi 18:6a4db94011d3 46 #include "uart.h"
sahilmgandhi 18:6a4db94011d3 47 #include "uart_16c550_map.h"
sahilmgandhi 18:6a4db94011d3 48 #include "memory_map.h"
sahilmgandhi 18:6a4db94011d3 49 #include "crossbar.h"
sahilmgandhi 18:6a4db94011d3 50 #include "types.h"
sahilmgandhi 18:6a4db94011d3 51 #include "clock.h"
sahilmgandhi 18:6a4db94011d3 52 #include "pad.h"
sahilmgandhi 18:6a4db94011d3 53 #include "serial_api.h"
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 /** A set of options to be passed when opening a 16C550 UART device. */
sahilmgandhi 18:6a4db94011d3 56 typedef struct uart_16c550_options {
sahilmgandhi 18:6a4db94011d3 57 uart_options_t uartOptions; /**< The generic UART options. */
sahilmgandhi 18:6a4db94011d3 58 Uart16C550Reg_pt membase; /**< The memory base for the device's registers. */
sahilmgandhi 18:6a4db94011d3 59 uint8_t irq; /**< The IRQ number of the IRQ associated to the device. */
sahilmgandhi 18:6a4db94011d3 60 } uart_16c550_options_t, *uart_16c550_options_pt;
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 #define UART_NUM 2
sahilmgandhi 18:6a4db94011d3 63
sahilmgandhi 18:6a4db94011d3 64 #define CTS_ASSERT 1
sahilmgandhi 18:6a4db94011d3 65 #define CTS_UNASSERT 0
sahilmgandhi 18:6a4db94011d3 66 #define RTS_ASSERT 1
sahilmgandhi 18:6a4db94011d3 67 #define RTS_UNASSERT 0
sahilmgandhi 18:6a4db94011d3 68
sahilmgandhi 18:6a4db94011d3 69 #define UART_ERROR_INSUFFICIENT_SPACE ((uint8_t)0xF0)
sahilmgandhi 18:6a4db94011d3 70 #define UART_ERROR_TOO_BIG ((uint8_t)0xF1)
sahilmgandhi 18:6a4db94011d3 71
sahilmgandhi 18:6a4db94011d3 72 /** The depth of the hardware FIFOs. */
sahilmgandhi 18:6a4db94011d3 73 #define UART_HW_FIFO_DEPTH 16
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 /** The length of the receive buffer in software. */
sahilmgandhi 18:6a4db94011d3 76 #define UART_RX_BUFFER_LENGTH (1<<8)
sahilmgandhi 18:6a4db94011d3 77 #define UART_TX_BUFFER_LENGTH (1<<8)
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 #define STATUS_INVALID_PARAMETER 0x1
sahilmgandhi 18:6a4db94011d3 80 #define STATUS_SUCCESS 0x1
sahilmgandhi 18:6a4db94011d3 81
sahilmgandhi 18:6a4db94011d3 82 #define UART_LCR_DATALEN_BIT_POS 0
sahilmgandhi 18:6a4db94011d3 83 #define UART_LCR_STPBIT_BIT_POS 2
sahilmgandhi 18:6a4db94011d3 84 #define UART_LCR_PARITY_BIT_POS 3
sahilmgandhi 18:6a4db94011d3 85
sahilmgandhi 18:6a4db94011d3 86 #define UART_FCS_RX_FIFO_RST_BIT_POS 1
sahilmgandhi 18:6a4db94011d3 87 #define UART_FCS_TX_FIFO_RST_BIT_POS 2
sahilmgandhi 18:6a4db94011d3 88
sahilmgandhi 18:6a4db94011d3 89 #define UART_RX_IRQ 0x0
sahilmgandhi 18:6a4db94011d3 90 #define UART_TX_IRQ 0x1
sahilmgandhi 18:6a4db94011d3 91
sahilmgandhi 18:6a4db94011d3 92 #define UART_RX_BUFFER_LEN_MAX 16
sahilmgandhi 18:6a4db94011d3 93
sahilmgandhi 18:6a4db94011d3 94 #define UART_LSR_TX_EMPTY_MASK 0x40
sahilmgandhi 18:6a4db94011d3 95 #define UART_LSR_RX_DATA_READY_MASK 0x01
sahilmgandhi 18:6a4db94011d3 96
sahilmgandhi 18:6a4db94011d3 97 #define UART_IER_TX_EMPTY_MASK 0x02
sahilmgandhi 18:6a4db94011d3 98 #define UART_IER_RX_DATA_READY_MASK 0x01
sahilmgandhi 18:6a4db94011d3 99
sahilmgandhi 18:6a4db94011d3 100 #define UART_DEFAULT_BAUD 9600
sahilmgandhi 18:6a4db94011d3 101
sahilmgandhi 18:6a4db94011d3 102 /** Interrupt handler for 16C550 UART devices; to be called from an actual ISR.
sahilmgandhi 18:6a4db94011d3 103 * @param membase The memory base for the device that corresponds to the IRQ.
sahilmgandhi 18:6a4db94011d3 104 */
sahilmgandhi 18:6a4db94011d3 105 void fUart16C550Handler(Uart16C550Reg_pt membase);
sahilmgandhi 18:6a4db94011d3 106
sahilmgandhi 18:6a4db94011d3 107 /** An externally accessible instance of the UART driver implementation. */
sahilmgandhi 18:6a4db94011d3 108 //extern char_driver_t uart_16c550_driver;
sahilmgandhi 18:6a4db94011d3 109 typedef void (*fUartCallBack)(void);
sahilmgandhi 18:6a4db94011d3 110 //void serial_init(serial_t *obj, PinName tx, PinName rx);
sahilmgandhi 18:6a4db94011d3 111 //extern void fSerialInit(Uart16C550Reg_pt UartRegBase, flow_control_t FlowControl);
sahilmgandhi 18:6a4db94011d3 112 extern void fSerialFree(void);
sahilmgandhi 18:6a4db94011d3 113 extern void fSerialBaud(Uart16C550Reg_pt UartRegBase, uint32_t BaudRate);
sahilmgandhi 18:6a4db94011d3 114 extern void fSerialFormat(Uart16C550Reg_pt UartRegBase, uint8_t DataLen, uint8_t Parity, uint8_t StopBit);
sahilmgandhi 18:6a4db94011d3 115 extern void fSerialIrqSet(Uart16C550Reg_pt UartRegBase, fUartCallBack PtrUartCallBack, uint8_t IrqType, boolean Enable);
sahilmgandhi 18:6a4db94011d3 116 extern uint8_t fSerialGetc(Uart16C550Reg_pt UartRegBase);
sahilmgandhi 18:6a4db94011d3 117 extern void fSerialPutc(Uart16C550Reg_pt UartRegBase, uint8_t c);
sahilmgandhi 18:6a4db94011d3 118 extern boolean fSerialReadable(Uart16C550Reg_pt UartRegBase);
sahilmgandhi 18:6a4db94011d3 119 extern boolean fSerialWritable(Uart16C550Reg_pt UartRegBase);
sahilmgandhi 18:6a4db94011d3 120 extern void fSerialClear(Uart16C550Reg_pt UartRegBase);
sahilmgandhi 18:6a4db94011d3 121 extern void fSerialBreakSet(Uart16C550Reg_pt UartRegBase);
sahilmgandhi 18:6a4db94011d3 122 extern void fSerialBreakClear(Uart16C550Reg_pt UartRegBase);
sahilmgandhi 18:6a4db94011d3 123 extern void fSerialPinoutTx(uint8_t PinNo);
sahilmgandhi 18:6a4db94011d3 124
sahilmgandhi 18:6a4db94011d3 125 extern void Uart1_Irq(void);
sahilmgandhi 18:6a4db94011d3 126 extern void Uart2_Irq(void);
sahilmgandhi 18:6a4db94011d3 127
sahilmgandhi 18:6a4db94011d3 128 #endif /* UART_16C550_H_ */