Mouse code for the MacroRat
mbed-dev/targets/TARGET_ONSEMI/TARGET_NCS36510/random_map.h@46:b156ef445742, 2017-06-03 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sat Jun 03 00:22:44 2017 +0000
- Revision:
- 46:b156ef445742
- Parent:
- 18:6a4db94011d3
Final code for internal battlebot competition.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sahilmgandhi | 18:6a4db94011d3 | 1 | /** |
sahilmgandhi | 18:6a4db94011d3 | 2 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 3 | * @file random_map.h |
sahilmgandhi | 18:6a4db94011d3 | 4 | * @brief Randomizer hw module register map |
sahilmgandhi | 18:6a4db94011d3 | 5 | * @internal |
sahilmgandhi | 18:6a4db94011d3 | 6 | * @author ON Semiconductor |
sahilmgandhi | 18:6a4db94011d3 | 7 | * $Rev: 3283 $ |
sahilmgandhi | 18:6a4db94011d3 | 8 | * $Date: 2015-02-26 18:52:22 +0530 (Thu, 26 Feb 2015) $ |
sahilmgandhi | 18:6a4db94011d3 | 9 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 10 | * Copyright 2016 Semiconductor Components Industries LLC (d/b/a ON Semiconductor). |
sahilmgandhi | 18:6a4db94011d3 | 11 | * All rights reserved. This software and/or documentation is licensed by ON Semiconductor |
sahilmgandhi | 18:6a4db94011d3 | 12 | * under limited terms and conditions. The terms and conditions pertaining to the software |
sahilmgandhi | 18:6a4db94011d3 | 13 | * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf |
sahilmgandhi | 18:6a4db94011d3 | 14 | * (ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software) and |
sahilmgandhi | 18:6a4db94011d3 | 15 | * if applicable the software license agreement. Do not use this software and/or |
sahilmgandhi | 18:6a4db94011d3 | 16 | * documentation unless you have carefully read and you agree to the limited terms and |
sahilmgandhi | 18:6a4db94011d3 | 17 | * conditions. By using this software and/or documentation, you agree to the limited |
sahilmgandhi | 18:6a4db94011d3 | 18 | * terms and conditions. |
sahilmgandhi | 18:6a4db94011d3 | 19 | * |
sahilmgandhi | 18:6a4db94011d3 | 20 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
sahilmgandhi | 18:6a4db94011d3 | 21 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
sahilmgandhi | 18:6a4db94011d3 | 22 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
sahilmgandhi | 18:6a4db94011d3 | 23 | * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, |
sahilmgandhi | 18:6a4db94011d3 | 24 | * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
sahilmgandhi | 18:6a4db94011d3 | 25 | * @endinternal |
sahilmgandhi | 18:6a4db94011d3 | 26 | * |
sahilmgandhi | 18:6a4db94011d3 | 27 | * @ingroup random |
sahilmgandhi | 18:6a4db94011d3 | 28 | * |
sahilmgandhi | 18:6a4db94011d3 | 29 | * @details |
sahilmgandhi | 18:6a4db94011d3 | 30 | */ |
sahilmgandhi | 18:6a4db94011d3 | 31 | |
sahilmgandhi | 18:6a4db94011d3 | 32 | #ifndef RANDOM_MAP_H_ |
sahilmgandhi | 18:6a4db94011d3 | 33 | #define RANDOM_MAP_H_ |
sahilmgandhi | 18:6a4db94011d3 | 34 | |
sahilmgandhi | 18:6a4db94011d3 | 35 | /************************************************************************************************* |
sahilmgandhi | 18:6a4db94011d3 | 36 | * * |
sahilmgandhi | 18:6a4db94011d3 | 37 | * Header files * |
sahilmgandhi | 18:6a4db94011d3 | 38 | * * |
sahilmgandhi | 18:6a4db94011d3 | 39 | *************************************************************************************************/ |
sahilmgandhi | 18:6a4db94011d3 | 40 | |
sahilmgandhi | 18:6a4db94011d3 | 41 | #include "architecture.h" |
sahilmgandhi | 18:6a4db94011d3 | 42 | |
sahilmgandhi | 18:6a4db94011d3 | 43 | /************************************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 44 | * * |
sahilmgandhi | 18:6a4db94011d3 | 45 | * Type definitions * |
sahilmgandhi | 18:6a4db94011d3 | 46 | * * |
sahilmgandhi | 18:6a4db94011d3 | 47 | **************************************************************************************************/ |
sahilmgandhi | 18:6a4db94011d3 | 48 | |
sahilmgandhi | 18:6a4db94011d3 | 49 | /** Random Number Generator Control HW Structure Overlay */ |
sahilmgandhi | 18:6a4db94011d3 | 50 | typedef struct { |
sahilmgandhi | 18:6a4db94011d3 | 51 | __IO uint32_t WR_SEED_RD_RAND; /* Seed set & random read reg - 0x40011000 */ |
sahilmgandhi | 18:6a4db94011d3 | 52 | union { |
sahilmgandhi | 18:6a4db94011d3 | 53 | struct { |
sahilmgandhi | 18:6a4db94011d3 | 54 | __IO uint32_t MODE :1; /**<Mode Register, 0 LSFR is updated on every rising edge of PCLK, 1 LSFR is only updated on a read event of the LSFR register */ |
sahilmgandhi | 18:6a4db94011d3 | 55 | __IO uint32_t BYTE_SWAP :1; /**<Byte Swap Control, 0 32-bit byte swap, 1 64-bit byte swap */ |
sahilmgandhi | 18:6a4db94011d3 | 56 | __IO uint32_t MEATSTABLE_SPEED :1; /**<Meta-stable Latch TRNG Speed Control, 0 Slow mode, 1 Fast mode */ |
sahilmgandhi | 18:6a4db94011d3 | 57 | __IO uint32_t WHITENOISE_EN :1; /**<White Noise TRNG Enable, 0 Disabled, 1 Enabled */ |
sahilmgandhi | 18:6a4db94011d3 | 58 | __IO uint32_t METASTABLE_LATCH_EN :1; /**<Meta-stable Latch TRNG Enable, 0 Disabled, 1 Enabled */ |
sahilmgandhi | 18:6a4db94011d3 | 59 | __IO uint32_t JIC :1; /**<JIC */ |
sahilmgandhi | 18:6a4db94011d3 | 60 | } BITS; |
sahilmgandhi | 18:6a4db94011d3 | 61 | __IO uint32_t WORD; |
sahilmgandhi | 18:6a4db94011d3 | 62 | } CONTROL; /* Control register - 0x40011004 */ |
sahilmgandhi | 18:6a4db94011d3 | 63 | union { |
sahilmgandhi | 18:6a4db94011d3 | 64 | struct { |
sahilmgandhi | 18:6a4db94011d3 | 65 | __IO uint32_t BYTE_0 :8; /**<Byte #0*/ |
sahilmgandhi | 18:6a4db94011d3 | 66 | __IO uint32_t BYTE_1 :8; /**<Byte #1*/ |
sahilmgandhi | 18:6a4db94011d3 | 67 | __IO uint32_t BYTE_2 :8; /**<Byte #2*/ |
sahilmgandhi | 18:6a4db94011d3 | 68 | __IO uint32_t BYTE_3 :8; /**<Byte #3*/ |
sahilmgandhi | 18:6a4db94011d3 | 69 | } BITS; |
sahilmgandhi | 18:6a4db94011d3 | 70 | __IO uint32_t WORD; |
sahilmgandhi | 18:6a4db94011d3 | 71 | } WRITE_BUF_LSW; /* Byte swap write buffer Least significant word - 0x40011008 */ |
sahilmgandhi | 18:6a4db94011d3 | 72 | union { |
sahilmgandhi | 18:6a4db94011d3 | 73 | struct { |
sahilmgandhi | 18:6a4db94011d3 | 74 | __IO uint32_t BYTE_4 :8; /**<Byte #4*/ |
sahilmgandhi | 18:6a4db94011d3 | 75 | __IO uint32_t BYTE_5 :8; /**<Byte #5*/ |
sahilmgandhi | 18:6a4db94011d3 | 76 | __IO uint32_t BYTE_6 :8; /**<Byte #6*/ |
sahilmgandhi | 18:6a4db94011d3 | 77 | __IO uint32_t BYTE_7 :8; /**<Byte #7*/ |
sahilmgandhi | 18:6a4db94011d3 | 78 | } BITS; |
sahilmgandhi | 18:6a4db94011d3 | 79 | __IO uint32_t WORD; |
sahilmgandhi | 18:6a4db94011d3 | 80 | } WRITE_BUF_MSW; /* Byte swap write buffer Most significant word - 0x4001100C */ |
sahilmgandhi | 18:6a4db94011d3 | 81 | union { |
sahilmgandhi | 18:6a4db94011d3 | 82 | struct { |
sahilmgandhi | 18:6a4db94011d3 | 83 | __IO uint32_t BYTE_7_3 :8; /**<Byte Swap Control == 1? Byte #7 : Byte #3*/ |
sahilmgandhi | 18:6a4db94011d3 | 84 | __IO uint32_t BYTE_6_2 :8; /**<Byte Swap Control == 1? Byte #6 : Byte #2*/ |
sahilmgandhi | 18:6a4db94011d3 | 85 | __IO uint32_t BYTE_5_1 :8; /**<Byte Swap Control == 1? Byte #5 : Byte #1*/ |
sahilmgandhi | 18:6a4db94011d3 | 86 | __IO uint32_t BYTE_4_0 :8; /**<Byte Swap Control == 1? Byte #4 : Byte #0*/ |
sahilmgandhi | 18:6a4db94011d3 | 87 | } BITS; |
sahilmgandhi | 18:6a4db94011d3 | 88 | __IO uint32_t WORD; |
sahilmgandhi | 18:6a4db94011d3 | 89 | } READ_BUF_LSW; /* Byte swap read buffer Least significant word - 0x40011010 */ |
sahilmgandhi | 18:6a4db94011d3 | 90 | union { |
sahilmgandhi | 18:6a4db94011d3 | 91 | struct { |
sahilmgandhi | 18:6a4db94011d3 | 92 | __IO uint32_t BYTE_3 :8; /**<Byte #3*/ |
sahilmgandhi | 18:6a4db94011d3 | 93 | __IO uint32_t BYTE_2 :8; /**<Byte #2*/ |
sahilmgandhi | 18:6a4db94011d3 | 94 | __IO uint32_t BYTE_1 :8; /**<Byte #1*/ |
sahilmgandhi | 18:6a4db94011d3 | 95 | __IO uint32_t BYTE_0 :8; /**<Byte #0*/ |
sahilmgandhi | 18:6a4db94011d3 | 96 | } BITS; |
sahilmgandhi | 18:6a4db94011d3 | 97 | __IO uint32_t WORD; |
sahilmgandhi | 18:6a4db94011d3 | 98 | } READ_BUF_MSW; /* Byte swap read buffer Most significant word - 0x40011014 */ |
sahilmgandhi | 18:6a4db94011d3 | 99 | __I uint32_t METASTABLE_LATCH_VAL; /* Meta-stable latch TRNG value - 0x40011018 */ |
sahilmgandhi | 18:6a4db94011d3 | 100 | __I uint32_t WHITENOISE_VAL; /* White noise TRNG value - 0x4001101C */ |
sahilmgandhi | 18:6a4db94011d3 | 101 | } RandReg_t, *RandReg_pt; |
sahilmgandhi | 18:6a4db94011d3 | 102 | |
sahilmgandhi | 18:6a4db94011d3 | 103 | #endif /* RANDOM_MAP_H_ */ |