MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_ONSEMI/TARGET_NCS36510/flash_map.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**
sahilmgandhi 18:6a4db94011d3 2 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 3 * @file flash_map.h
sahilmgandhi 18:6a4db94011d3 4 * @brief Flash controller HW register map
sahilmgandhi 18:6a4db94011d3 5 * @internal
sahilmgandhi 18:6a4db94011d3 6 * @author ON Semiconductor
sahilmgandhi 18:6a4db94011d3 7 * $Rev: 2686 $
sahilmgandhi 18:6a4db94011d3 8 * $Date: 2014-01-23 13:31:54 +0530 (Thu, 23 Jan 2014) $
sahilmgandhi 18:6a4db94011d3 9 ******************************************************************************
sahilmgandhi 18:6a4db94011d3 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
sahilmgandhi 18:6a4db94011d3 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
sahilmgandhi 18:6a4db94011d3 12 * under limited terms and conditions. The terms and conditions pertaining to the software
sahilmgandhi 18:6a4db94011d3 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
sahilmgandhi 18:6a4db94011d3 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
sahilmgandhi 18:6a4db94011d3 15 * if applicable the software license agreement. Do not use this software and/or
sahilmgandhi 18:6a4db94011d3 16 * documentation unless you have carefully read and you agree to the limited terms and
sahilmgandhi 18:6a4db94011d3 17 * conditions. By using this software and/or documentation, you agree to the limited
sahilmgandhi 18:6a4db94011d3 18 * terms and conditions.
sahilmgandhi 18:6a4db94011d3 19 *
sahilmgandhi 18:6a4db94011d3 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
sahilmgandhi 18:6a4db94011d3 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
sahilmgandhi 18:6a4db94011d3 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
sahilmgandhi 18:6a4db94011d3 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
sahilmgandhi 18:6a4db94011d3 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
sahilmgandhi 18:6a4db94011d3 25 * @endinternal
sahilmgandhi 18:6a4db94011d3 26 *
sahilmgandhi 18:6a4db94011d3 27 * @ingroup flash
sahilmgandhi 18:6a4db94011d3 28 *
sahilmgandhi 18:6a4db94011d3 29 * @details
sahilmgandhi 18:6a4db94011d3 30 * <p>
sahilmgandhi 18:6a4db94011d3 31 * Flash controller HW register map description
sahilmgandhi 18:6a4db94011d3 32 * </p>
sahilmgandhi 18:6a4db94011d3 33 *
sahilmgandhi 18:6a4db94011d3 34 */
sahilmgandhi 18:6a4db94011d3 35 #ifndef FLASH_MAP_H_
sahilmgandhi 18:6a4db94011d3 36 #define FLASH_MAP_H_
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 #include "architecture.h"
sahilmgandhi 18:6a4db94011d3 39
sahilmgandhi 18:6a4db94011d3 40 /** Flash Control HW Structure Overlay */
sahilmgandhi 18:6a4db94011d3 41 typedef struct {
sahilmgandhi 18:6a4db94011d3 42 union {
sahilmgandhi 18:6a4db94011d3 43 struct {
sahilmgandhi 18:6a4db94011d3 44 __I uint32_t FLASH_A_BUSY:1; /**< Busy A */
sahilmgandhi 18:6a4db94011d3 45 __I uint32_t FLASH_B_BUSY:1; /**< Busy B */
sahilmgandhi 18:6a4db94011d3 46 __I uint32_t FLASH_A_UNLOCK:1; /**< Unlock A */
sahilmgandhi 18:6a4db94011d3 47 __I uint32_t FLASH_B_UNLOCK:1; /**< Unlock B */
sahilmgandhi 18:6a4db94011d3 48 __I uint32_t FLASH_ERROR:3; /**< 000 – No Error, 111 – Attempt to access an array while it is busy powering up, 001 – Attempt to erase bootloader in the field, 010 – Attempt to access array during erase, 100 – Attempt to access array during write */
sahilmgandhi 18:6a4db94011d3 49 } BITS;
sahilmgandhi 18:6a4db94011d3 50 __I uint32_t WORD;
sahilmgandhi 18:6a4db94011d3 51 } STATUS;
sahilmgandhi 18:6a4db94011d3 52 union {
sahilmgandhi 18:6a4db94011d3 53 struct {
sahilmgandhi 18:6a4db94011d3 54 __IO uint32_t FLASHB_PD:1;
sahilmgandhi 18:6a4db94011d3 55 __IO uint32_t FLASHA_PD:1;
sahilmgandhi 18:6a4db94011d3 56 __IO uint32_t REMAP:1;
sahilmgandhi 18:6a4db94011d3 57 __IO uint32_t WR_INT_EN:1;
sahilmgandhi 18:6a4db94011d3 58 __IO uint32_t ERASE_INT_EN:1;
sahilmgandhi 18:6a4db94011d3 59 __IO uint32_t ERROR_INT_EN:1;
sahilmgandhi 18:6a4db94011d3 60 __IO uint32_t WRITE_BLOCK:1;
sahilmgandhi 18:6a4db94011d3 61 } BITS;
sahilmgandhi 18:6a4db94011d3 62 __IO uint32_t WORD;
sahilmgandhi 18:6a4db94011d3 63 } CONTROL;
sahilmgandhi 18:6a4db94011d3 64 union {
sahilmgandhi 18:6a4db94011d3 65 struct {
sahilmgandhi 18:6a4db94011d3 66 __IO uint32_t PAGEERASE:1; /**< Erase a single page */
sahilmgandhi 18:6a4db94011d3 67 __IO uint32_t MASSERASE:1; /**< MASS Erase */
sahilmgandhi 18:6a4db94011d3 68 } BITS;
sahilmgandhi 18:6a4db94011d3 69 __IO uint32_t WORD;
sahilmgandhi 18:6a4db94011d3 70 } COMMAND;
sahilmgandhi 18:6a4db94011d3 71 __IO uint32_t ADDR;
sahilmgandhi 18:6a4db94011d3 72 __IO uint32_t UNLOCK1;
sahilmgandhi 18:6a4db94011d3 73 __IO uint32_t UNLOCKA;
sahilmgandhi 18:6a4db94011d3 74 __IO uint32_t UNLOCKB;
sahilmgandhi 18:6a4db94011d3 75 union {
sahilmgandhi 18:6a4db94011d3 76 struct {
sahilmgandhi 18:6a4db94011d3 77 __I uint32_t INT_PEND:1; // Interrupt pending
sahilmgandhi 18:6a4db94011d3 78 __I uint32_t INT_TYPE:3; // Interrupt type
sahilmgandhi 18:6a4db94011d3 79 } BITS;
sahilmgandhi 18:6a4db94011d3 80 __I uint32_t WORD;
sahilmgandhi 18:6a4db94011d3 81 } INT_STATUS;
sahilmgandhi 18:6a4db94011d3 82 } FlashReg_t, *FlashReg_pt;
sahilmgandhi 18:6a4db94011d3 83
sahilmgandhi 18:6a4db94011d3 84 #endif /* FLASH_MAP_H_ */