Mouse code for the MacroRat
mbed-dev/targets/TARGET_ONSEMI/TARGET_NCS36510/aes_map.h@46:b156ef445742, 2017-06-03 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sat Jun 03 00:22:44 2017 +0000
- Revision:
- 46:b156ef445742
- Parent:
- 18:6a4db94011d3
Final code for internal battlebot competition.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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sahilmgandhi | 18:6a4db94011d3 | 1 | /** |
sahilmgandhi | 18:6a4db94011d3 | 2 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 3 | * @file aes_map.h |
sahilmgandhi | 18:6a4db94011d3 | 4 | * @brief AES HW register map |
sahilmgandhi | 18:6a4db94011d3 | 5 | * @internal |
sahilmgandhi | 18:6a4db94011d3 | 6 | * @author ON Semiconductor. |
sahilmgandhi | 18:6a4db94011d3 | 7 | * $Rev: 2110 $ |
sahilmgandhi | 18:6a4db94011d3 | 8 | * $Date: 2013-07-16 20:13:03 +0530 (Tue, 16 Jul 2013) $ |
sahilmgandhi | 18:6a4db94011d3 | 9 | ****************************************************************************** |
sahilmgandhi | 18:6a4db94011d3 | 10 | * Copyright 2016 Semiconductor Components Industries LLC (d/b/a ON Semiconductor). |
sahilmgandhi | 18:6a4db94011d3 | 11 | * All rights reserved. This software and/or documentation is licensed by ON Semiconductor |
sahilmgandhi | 18:6a4db94011d3 | 12 | * under limited terms and conditions. The terms and conditions pertaining to the software |
sahilmgandhi | 18:6a4db94011d3 | 13 | * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf |
sahilmgandhi | 18:6a4db94011d3 | 14 | * (ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software) and |
sahilmgandhi | 18:6a4db94011d3 | 15 | * if applicable the software license agreement. Do not use this software and/or |
sahilmgandhi | 18:6a4db94011d3 | 16 | * documentation unless you have carefully read and you agree to the limited terms and |
sahilmgandhi | 18:6a4db94011d3 | 17 | * conditions. By using this software and/or documentation, you agree to the limited |
sahilmgandhi | 18:6a4db94011d3 | 18 | * terms and conditions. |
sahilmgandhi | 18:6a4db94011d3 | 19 | * |
sahilmgandhi | 18:6a4db94011d3 | 20 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
sahilmgandhi | 18:6a4db94011d3 | 21 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
sahilmgandhi | 18:6a4db94011d3 | 22 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
sahilmgandhi | 18:6a4db94011d3 | 23 | * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, |
sahilmgandhi | 18:6a4db94011d3 | 24 | * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
sahilmgandhi | 18:6a4db94011d3 | 25 | * @endinternal |
sahilmgandhi | 18:6a4db94011d3 | 26 | * |
sahilmgandhi | 18:6a4db94011d3 | 27 | * @ingroup aes |
sahilmgandhi | 18:6a4db94011d3 | 28 | * |
sahilmgandhi | 18:6a4db94011d3 | 29 | * @details |
sahilmgandhi | 18:6a4db94011d3 | 30 | * <p> |
sahilmgandhi | 18:6a4db94011d3 | 31 | * AES HW register map description |
sahilmgandhi | 18:6a4db94011d3 | 32 | * </p> |
sahilmgandhi | 18:6a4db94011d3 | 33 | */ |
sahilmgandhi | 18:6a4db94011d3 | 34 | |
sahilmgandhi | 18:6a4db94011d3 | 35 | #if defined ( __CC_ARM ) |
sahilmgandhi | 18:6a4db94011d3 | 36 | #pragma anon_unions |
sahilmgandhi | 18:6a4db94011d3 | 37 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 38 | |
sahilmgandhi | 18:6a4db94011d3 | 39 | #ifndef AES_MAP_H_ |
sahilmgandhi | 18:6a4db94011d3 | 40 | #define AES_MAP_H_ |
sahilmgandhi | 18:6a4db94011d3 | 41 | |
sahilmgandhi | 18:6a4db94011d3 | 42 | #include "architecture.h" |
sahilmgandhi | 18:6a4db94011d3 | 43 | |
sahilmgandhi | 18:6a4db94011d3 | 44 | /** AES Encryption HW Structure Overlay */ |
sahilmgandhi | 18:6a4db94011d3 | 45 | typedef struct { |
sahilmgandhi | 18:6a4db94011d3 | 46 | __IO uint32_t KEY0; /**< Bits[31:00] of the 128-bit key */ |
sahilmgandhi | 18:6a4db94011d3 | 47 | __IO uint32_t KEY1; /**< Bits[63:32] of the 128-bit key */ |
sahilmgandhi | 18:6a4db94011d3 | 48 | __IO uint32_t KEY2; /**< Bits[95:64] of the 128-bit key */ |
sahilmgandhi | 18:6a4db94011d3 | 49 | __IO uint32_t KEY3; /**< Bits[127:96] of the 128-bit key */ |
sahilmgandhi | 18:6a4db94011d3 | 50 | __IO uint32_t KEY4; /**< Bits[159:128] of the 256-bit key */ |
sahilmgandhi | 18:6a4db94011d3 | 51 | __IO uint32_t KEY5; /**< Bits[191:160] of the 256-bit key */ |
sahilmgandhi | 18:6a4db94011d3 | 52 | __IO uint32_t KEY6; /**< Bits[223:192] of the 256-bit key */ |
sahilmgandhi | 18:6a4db94011d3 | 53 | __IO uint32_t KEY7; /**< Bits[255:224] of the 256-bit key */ |
sahilmgandhi | 18:6a4db94011d3 | 54 | |
sahilmgandhi | 18:6a4db94011d3 | 55 | __IO uint32_t CNTi0; /**< Bits[31:00] of the 128-bit counter value used in counter mode */ |
sahilmgandhi | 18:6a4db94011d3 | 56 | __IO uint32_t CNTi1; /**< Bits[63:32] of the 128-bit counter value used in counter mode */ |
sahilmgandhi | 18:6a4db94011d3 | 57 | __IO uint32_t CNTi2; /**< Bits[95:64] of the 128-bit counter value used in counter mode */ |
sahilmgandhi | 18:6a4db94011d3 | 58 | __IO uint32_t CNTi3; /**< Bits[127:96] of the 128-bit counter value used in counter mode */ |
sahilmgandhi | 18:6a4db94011d3 | 59 | __I uint32_t CNTo0; /**< Bits[31:00] of the 128-bit counter result */ |
sahilmgandhi | 18:6a4db94011d3 | 60 | __I uint32_t CNTo1; /**< Bits[63:32] of the 128-bit counter result */ |
sahilmgandhi | 18:6a4db94011d3 | 61 | __I uint32_t CNTo2; /**< Bits[95:64] of the 128-bit counter result */ |
sahilmgandhi | 18:6a4db94011d3 | 62 | __I uint32_t CNTo3; /**< Bits[127:96] of the 128-bit counter result */ |
sahilmgandhi | 18:6a4db94011d3 | 63 | |
sahilmgandhi | 18:6a4db94011d3 | 64 | __I uint32_t CBCo0; /**< Bits[31:00] of the 128-bit CBC result */ |
sahilmgandhi | 18:6a4db94011d3 | 65 | __I uint32_t CBCo1; /**< Bits[63:32] of the 128-bit CBC result */ |
sahilmgandhi | 18:6a4db94011d3 | 66 | __I uint32_t CBCo2; /**< Bits[95:64] of the 128-bit CBC result */ |
sahilmgandhi | 18:6a4db94011d3 | 67 | __I uint32_t CBCo3; /**< Bits[127:96] of the 128-bit CBC result */ |
sahilmgandhi | 18:6a4db94011d3 | 68 | union { |
sahilmgandhi | 18:6a4db94011d3 | 69 | struct { |
sahilmgandhi | 18:6a4db94011d3 | 70 | __IO uint32_t START:1; /**< start the encryption : 0 = no-effect , 1 = enable */ |
sahilmgandhi | 18:6a4db94011d3 | 71 | __IO uint32_t ACC_CLR:1; /**< Clear the CBC accumulator : 0 = no-effect 1 = clears the CBC accumulator */ |
sahilmgandhi | 18:6a4db94011d3 | 72 | __IO uint32_t INT_CLEAR:1; /**< interrupt clear : 0 = no-effect 1 = clear the interrupt */ |
sahilmgandhi | 18:6a4db94011d3 | 73 | } BITS; |
sahilmgandhi | 18:6a4db94011d3 | 74 | __IO uint32_t WORD; |
sahilmgandhi | 18:6a4db94011d3 | 75 | } CTL; |
sahilmgandhi | 18:6a4db94011d3 | 76 | union { |
sahilmgandhi | 18:6a4db94011d3 | 77 | struct { |
sahilmgandhi | 18:6a4db94011d3 | 78 | __IO uint32_t CBC_MODE:1; /**< counter mode : 0 = counter mode , 1 = CBC mode */ |
sahilmgandhi | 18:6a4db94011d3 | 79 | __IO uint32_t BYPASS:1; /**< encryption : 0 = Normal Mode , 1 = Bypasss any encryption */ |
sahilmgandhi | 18:6a4db94011d3 | 80 | __IO uint32_t INT_EN:1; /**< interrupt mask : 0 = disabled 1 = enabled */ |
sahilmgandhi | 18:6a4db94011d3 | 81 | __IO uint32_t KEY_LENGTH:1; /**< Key Length: 0 = 128 Bit Encryption 1 = 256 Bit Encryption */ |
sahilmgandhi | 18:6a4db94011d3 | 82 | |
sahilmgandhi | 18:6a4db94011d3 | 83 | } BITS; |
sahilmgandhi | 18:6a4db94011d3 | 84 | __IO uint32_t WORD; |
sahilmgandhi | 18:6a4db94011d3 | 85 | } MODE; |
sahilmgandhi | 18:6a4db94011d3 | 86 | union { |
sahilmgandhi | 18:6a4db94011d3 | 87 | struct { |
sahilmgandhi | 18:6a4db94011d3 | 88 | __I uint32_t COMPLETE:1;/**< status : 0 = not complete , 1 = complete */ |
sahilmgandhi | 18:6a4db94011d3 | 89 | } BITS; |
sahilmgandhi | 18:6a4db94011d3 | 90 | __IO uint32_t WORD; |
sahilmgandhi | 18:6a4db94011d3 | 91 | } STAT; |
sahilmgandhi | 18:6a4db94011d3 | 92 | |
sahilmgandhi | 18:6a4db94011d3 | 93 | __O uint32_t MAC_INIT0; /**< Bits[31:00] of the CBC Initialization Vector */ |
sahilmgandhi | 18:6a4db94011d3 | 94 | __O uint32_t MAC_INIT1; /**< Bits[63:32] of the CBC Initialization Vector */ |
sahilmgandhi | 18:6a4db94011d3 | 95 | __O uint32_t MAC_INIT2; /**< Bits[95:64] of the CBC Initialization Vector */ |
sahilmgandhi | 18:6a4db94011d3 | 96 | __O uint32_t MAC_INIT3; /**< Bits[127:96] of the CBC Initialization Vector */ |
sahilmgandhi | 18:6a4db94011d3 | 97 | |
sahilmgandhi | 18:6a4db94011d3 | 98 | __IO uint32_t RESERVED; |
sahilmgandhi | 18:6a4db94011d3 | 99 | __O uint32_t DATA0; /**< Bits[31:00] of the 128-bit data to encrypt */ |
sahilmgandhi | 18:6a4db94011d3 | 100 | __O uint32_t DATA1; /**< Bits[63:32] of the 128-bit data to encrypt */ |
sahilmgandhi | 18:6a4db94011d3 | 101 | __O uint32_t DATA2; /**< Bits[95:64] of the 128-bit data to encrypt */ |
sahilmgandhi | 18:6a4db94011d3 | 102 | __O uint32_t DATA3; /**< Bits[127:96] of the 128-bit data to encrypt */ |
sahilmgandhi | 18:6a4db94011d3 | 103 | } AesReg_t, *AesReg_pt; |
sahilmgandhi | 18:6a4db94011d3 | 104 | |
sahilmgandhi | 18:6a4db94011d3 | 105 | #endif /* AES_MAP_H_ */ |