MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NXP/TARGET_LPC82X/spi_api.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2006-2013 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16 #include "mbed_assert.h"
sahilmgandhi 18:6a4db94011d3 17
sahilmgandhi 18:6a4db94011d3 18 #include "spi_api.h"
sahilmgandhi 18:6a4db94011d3 19 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 20 #include "pinmap.h"
sahilmgandhi 18:6a4db94011d3 21 #include "mbed_error.h"
sahilmgandhi 18:6a4db94011d3 22
sahilmgandhi 18:6a4db94011d3 23 #if DEVICE_SPI
sahilmgandhi 18:6a4db94011d3 24
sahilmgandhi 18:6a4db94011d3 25 static const SWM_Map SWM_SPI_SSEL[] = {
sahilmgandhi 18:6a4db94011d3 26 {4, 16},
sahilmgandhi 18:6a4db94011d3 27 {6, 8},
sahilmgandhi 18:6a4db94011d3 28 };
sahilmgandhi 18:6a4db94011d3 29
sahilmgandhi 18:6a4db94011d3 30 static const SWM_Map SWM_SPI_SCLK[] = {
sahilmgandhi 18:6a4db94011d3 31 {3, 24},
sahilmgandhi 18:6a4db94011d3 32 {5, 16},
sahilmgandhi 18:6a4db94011d3 33 };
sahilmgandhi 18:6a4db94011d3 34
sahilmgandhi 18:6a4db94011d3 35 static const SWM_Map SWM_SPI_MOSI[] = {
sahilmgandhi 18:6a4db94011d3 36 {4, 0},
sahilmgandhi 18:6a4db94011d3 37 {5, 24},
sahilmgandhi 18:6a4db94011d3 38 };
sahilmgandhi 18:6a4db94011d3 39
sahilmgandhi 18:6a4db94011d3 40 static const SWM_Map SWM_SPI_MISO[] = {
sahilmgandhi 18:6a4db94011d3 41 {4, 8},
sahilmgandhi 18:6a4db94011d3 42 {6, 0},
sahilmgandhi 18:6a4db94011d3 43 };
sahilmgandhi 18:6a4db94011d3 44
sahilmgandhi 18:6a4db94011d3 45 // bit flags for used SPIs
sahilmgandhi 18:6a4db94011d3 46 static unsigned char spi_used = 0;
sahilmgandhi 18:6a4db94011d3 47
sahilmgandhi 18:6a4db94011d3 48 static int get_available_spi(void)
sahilmgandhi 18:6a4db94011d3 49 {
sahilmgandhi 18:6a4db94011d3 50 int i;
sahilmgandhi 18:6a4db94011d3 51 for (i=0; i<2; i++) {
sahilmgandhi 18:6a4db94011d3 52 if ((spi_used & (1 << i)) == 0)
sahilmgandhi 18:6a4db94011d3 53 return i;
sahilmgandhi 18:6a4db94011d3 54 }
sahilmgandhi 18:6a4db94011d3 55 return -1;
sahilmgandhi 18:6a4db94011d3 56 }
sahilmgandhi 18:6a4db94011d3 57
sahilmgandhi 18:6a4db94011d3 58 static inline void spi_disable(spi_t *obj);
sahilmgandhi 18:6a4db94011d3 59 static inline void spi_enable(spi_t *obj);
sahilmgandhi 18:6a4db94011d3 60
sahilmgandhi 18:6a4db94011d3 61 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
sahilmgandhi 18:6a4db94011d3 62 {
sahilmgandhi 18:6a4db94011d3 63 int spi_n = get_available_spi();
sahilmgandhi 18:6a4db94011d3 64 if (spi_n == -1) {
sahilmgandhi 18:6a4db94011d3 65 error("No available SPI");
sahilmgandhi 18:6a4db94011d3 66 }
sahilmgandhi 18:6a4db94011d3 67 obj->spi_n = spi_n;
sahilmgandhi 18:6a4db94011d3 68 spi_used |= (1 << spi_n);
sahilmgandhi 18:6a4db94011d3 69
sahilmgandhi 18:6a4db94011d3 70 obj->spi = (spi_n) ? (LPC_SPI0_Type *)(LPC_SPI1_BASE) : (LPC_SPI0_Type *)(LPC_SPI0_BASE);
sahilmgandhi 18:6a4db94011d3 71
sahilmgandhi 18:6a4db94011d3 72 const SWM_Map *swm;
sahilmgandhi 18:6a4db94011d3 73 uint32_t regVal;
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 if (sclk != (PinName)NC) {
sahilmgandhi 18:6a4db94011d3 76 swm = &SWM_SPI_SCLK[obj->spi_n];
sahilmgandhi 18:6a4db94011d3 77 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
sahilmgandhi 18:6a4db94011d3 78 LPC_SWM->PINASSIGN[swm->n] = regVal | ((sclk >> PIN_SHIFT) << swm->offset);
sahilmgandhi 18:6a4db94011d3 79 }
sahilmgandhi 18:6a4db94011d3 80
sahilmgandhi 18:6a4db94011d3 81 if (mosi != (PinName)NC) {
sahilmgandhi 18:6a4db94011d3 82 swm = &SWM_SPI_MOSI[obj->spi_n];
sahilmgandhi 18:6a4db94011d3 83 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
sahilmgandhi 18:6a4db94011d3 84 LPC_SWM->PINASSIGN[swm->n] = regVal | ((mosi >> PIN_SHIFT) << swm->offset);
sahilmgandhi 18:6a4db94011d3 85 }
sahilmgandhi 18:6a4db94011d3 86
sahilmgandhi 18:6a4db94011d3 87 if (miso != (PinName)NC) {
sahilmgandhi 18:6a4db94011d3 88 swm = &SWM_SPI_MISO[obj->spi_n];
sahilmgandhi 18:6a4db94011d3 89 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
sahilmgandhi 18:6a4db94011d3 90 LPC_SWM->PINASSIGN[swm->n] = regVal | ((miso >> PIN_SHIFT) << swm->offset);
sahilmgandhi 18:6a4db94011d3 91 }
sahilmgandhi 18:6a4db94011d3 92
sahilmgandhi 18:6a4db94011d3 93 if (ssel != (PinName)NC) {
sahilmgandhi 18:6a4db94011d3 94 swm = &SWM_SPI_SSEL[obj->spi_n];
sahilmgandhi 18:6a4db94011d3 95 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
sahilmgandhi 18:6a4db94011d3 96 LPC_SWM->PINASSIGN[swm->n] = regVal | ((ssel >> PIN_SHIFT) << swm->offset);
sahilmgandhi 18:6a4db94011d3 97 }
sahilmgandhi 18:6a4db94011d3 98
sahilmgandhi 18:6a4db94011d3 99 // clear interrupts
sahilmgandhi 18:6a4db94011d3 100 obj->spi->INTENCLR = 0x3f;
sahilmgandhi 18:6a4db94011d3 101
sahilmgandhi 18:6a4db94011d3 102 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << (11 + obj->spi_n));
sahilmgandhi 18:6a4db94011d3 103 LPC_SYSCON->PRESETCTRL &= ~(1 << obj->spi_n);
sahilmgandhi 18:6a4db94011d3 104 LPC_SYSCON->PRESETCTRL |= (1 << obj->spi_n);
sahilmgandhi 18:6a4db94011d3 105
sahilmgandhi 18:6a4db94011d3 106 obj->spi->DLY = 2; // 2 SPI clock times pre-delay
sahilmgandhi 18:6a4db94011d3 107 }
sahilmgandhi 18:6a4db94011d3 108
sahilmgandhi 18:6a4db94011d3 109 void spi_free(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 110 {
sahilmgandhi 18:6a4db94011d3 111 }
sahilmgandhi 18:6a4db94011d3 112
sahilmgandhi 18:6a4db94011d3 113 void spi_format(spi_t *obj, int bits, int mode, int slave)
sahilmgandhi 18:6a4db94011d3 114 {
sahilmgandhi 18:6a4db94011d3 115 MBED_ASSERT(((bits >= 1) && (bits <= 16)) && ((mode >= 0) && (mode <= 3)));
sahilmgandhi 18:6a4db94011d3 116 spi_disable(obj);
sahilmgandhi 18:6a4db94011d3 117
sahilmgandhi 18:6a4db94011d3 118 obj->spi->CFG &= ~((0x3 << 4) | (1 << 2));
sahilmgandhi 18:6a4db94011d3 119 obj->spi->CFG |= ((mode & 0x3) << 4) | ((slave ? 0 : 1) << 2);
sahilmgandhi 18:6a4db94011d3 120
sahilmgandhi 18:6a4db94011d3 121 obj->spi->TXCTL &= ~( 0xF << 24);
sahilmgandhi 18:6a4db94011d3 122 obj->spi->TXCTL |= ((bits - 1) << 24);
sahilmgandhi 18:6a4db94011d3 123
sahilmgandhi 18:6a4db94011d3 124 spi_enable(obj);
sahilmgandhi 18:6a4db94011d3 125 }
sahilmgandhi 18:6a4db94011d3 126
sahilmgandhi 18:6a4db94011d3 127 void spi_frequency(spi_t *obj, int hz)
sahilmgandhi 18:6a4db94011d3 128 {
sahilmgandhi 18:6a4db94011d3 129 spi_disable(obj);
sahilmgandhi 18:6a4db94011d3 130
sahilmgandhi 18:6a4db94011d3 131 // rise DIV value if it cannot be divided
sahilmgandhi 18:6a4db94011d3 132 obj->spi->DIV = (SystemCoreClock + (hz - 1))/hz - 1;
sahilmgandhi 18:6a4db94011d3 133
sahilmgandhi 18:6a4db94011d3 134 spi_enable(obj);
sahilmgandhi 18:6a4db94011d3 135 }
sahilmgandhi 18:6a4db94011d3 136
sahilmgandhi 18:6a4db94011d3 137 static inline void spi_disable(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 138 {
sahilmgandhi 18:6a4db94011d3 139 obj->spi->CFG &= ~(1 << 0);
sahilmgandhi 18:6a4db94011d3 140 }
sahilmgandhi 18:6a4db94011d3 141
sahilmgandhi 18:6a4db94011d3 142 static inline void spi_enable(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 143 {
sahilmgandhi 18:6a4db94011d3 144 obj->spi->CFG |= (1 << 0);
sahilmgandhi 18:6a4db94011d3 145 }
sahilmgandhi 18:6a4db94011d3 146
sahilmgandhi 18:6a4db94011d3 147 static inline int spi_readable(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 148 {
sahilmgandhi 18:6a4db94011d3 149 return obj->spi->STAT & (1 << 0);
sahilmgandhi 18:6a4db94011d3 150 }
sahilmgandhi 18:6a4db94011d3 151
sahilmgandhi 18:6a4db94011d3 152 static inline int spi_writeable(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 153 {
sahilmgandhi 18:6a4db94011d3 154 return obj->spi->STAT & (1 << 1);
sahilmgandhi 18:6a4db94011d3 155 }
sahilmgandhi 18:6a4db94011d3 156
sahilmgandhi 18:6a4db94011d3 157 static inline void spi_write(spi_t *obj, int value)
sahilmgandhi 18:6a4db94011d3 158 {
sahilmgandhi 18:6a4db94011d3 159 while (!spi_writeable(obj));
sahilmgandhi 18:6a4db94011d3 160 // end of transfer
sahilmgandhi 18:6a4db94011d3 161 obj->spi->TXCTL |= (1 << 20);
sahilmgandhi 18:6a4db94011d3 162 obj->spi->TXDAT = (value & 0xffff);
sahilmgandhi 18:6a4db94011d3 163 }
sahilmgandhi 18:6a4db94011d3 164
sahilmgandhi 18:6a4db94011d3 165 static inline int spi_read(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 166 {
sahilmgandhi 18:6a4db94011d3 167 while (!spi_readable(obj));
sahilmgandhi 18:6a4db94011d3 168 return (obj->spi->RXDAT & 0xFFFF);
sahilmgandhi 18:6a4db94011d3 169 }
sahilmgandhi 18:6a4db94011d3 170
sahilmgandhi 18:6a4db94011d3 171 int spi_master_write(spi_t *obj, int value)
sahilmgandhi 18:6a4db94011d3 172 {
sahilmgandhi 18:6a4db94011d3 173 spi_write(obj, value);
sahilmgandhi 18:6a4db94011d3 174 return spi_read(obj);
sahilmgandhi 18:6a4db94011d3 175 }
sahilmgandhi 18:6a4db94011d3 176
sahilmgandhi 18:6a4db94011d3 177 int spi_busy(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 178 {
sahilmgandhi 18:6a4db94011d3 179 // checking RXOV(Receiver Overrun interrupt flag)
sahilmgandhi 18:6a4db94011d3 180 return obj->spi->STAT & (1 << 2);
sahilmgandhi 18:6a4db94011d3 181 }
sahilmgandhi 18:6a4db94011d3 182
sahilmgandhi 18:6a4db94011d3 183 int spi_slave_receive(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 184 {
sahilmgandhi 18:6a4db94011d3 185 return (spi_readable(obj) && !spi_busy(obj)) ? (1) : (0);
sahilmgandhi 18:6a4db94011d3 186 }
sahilmgandhi 18:6a4db94011d3 187
sahilmgandhi 18:6a4db94011d3 188 int spi_slave_read(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 189 {
sahilmgandhi 18:6a4db94011d3 190 return (obj->spi->RXDAT & 0xFFFF);
sahilmgandhi 18:6a4db94011d3 191 }
sahilmgandhi 18:6a4db94011d3 192
sahilmgandhi 18:6a4db94011d3 193 void spi_slave_write(spi_t *obj, int value)
sahilmgandhi 18:6a4db94011d3 194 {
sahilmgandhi 18:6a4db94011d3 195 while (spi_writeable(obj) == 0);
sahilmgandhi 18:6a4db94011d3 196 obj->spi->TXDAT = value;
sahilmgandhi 18:6a4db94011d3 197 }
sahilmgandhi 18:6a4db94011d3 198
sahilmgandhi 18:6a4db94011d3 199 #endif