MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_GCC_CR/startup_LPC824_CR.cpp@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 2 // LPC82x Microcontroller Startup code for use with LPCXpresso IDE
sahilmgandhi 18:6a4db94011d3 3 //
sahilmgandhi 18:6a4db94011d3 4 // Version : 140901
sahilmgandhi 18:6a4db94011d3 5 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 6 //
sahilmgandhi 18:6a4db94011d3 7 // Copyright(C) NXP Semiconductors, 2014
sahilmgandhi 18:6a4db94011d3 8 // All rights reserved.
sahilmgandhi 18:6a4db94011d3 9 //
sahilmgandhi 18:6a4db94011d3 10 // Software that is described herein is for illustrative purposes only
sahilmgandhi 18:6a4db94011d3 11 // which provides customers with programming information regarding the
sahilmgandhi 18:6a4db94011d3 12 // LPC products. This software is supplied "AS IS" without any warranties of
sahilmgandhi 18:6a4db94011d3 13 // any kind, and NXP Semiconductors and its licensor disclaim any and
sahilmgandhi 18:6a4db94011d3 14 // all warranties, express or implied, including all implied warranties of
sahilmgandhi 18:6a4db94011d3 15 // merchantability, fitness for a particular purpose and non-infringement of
sahilmgandhi 18:6a4db94011d3 16 // intellectual property rights. NXP Semiconductors assumes no responsibility
sahilmgandhi 18:6a4db94011d3 17 // or liability for the use of the software, conveys no license or rights under any
sahilmgandhi 18:6a4db94011d3 18 // patent, copyright, mask work right, or any other intellectual property rights in
sahilmgandhi 18:6a4db94011d3 19 // or to any products. NXP Semiconductors reserves the right to make changes
sahilmgandhi 18:6a4db94011d3 20 // in the software without notification. NXP Semiconductors also makes no
sahilmgandhi 18:6a4db94011d3 21 // representation or warranty that such application will be suitable for the
sahilmgandhi 18:6a4db94011d3 22 // specified use without further testing or modification.
sahilmgandhi 18:6a4db94011d3 23 //
sahilmgandhi 18:6a4db94011d3 24 // Permission to use, copy, modify, and distribute this software and its
sahilmgandhi 18:6a4db94011d3 25 // documentation is hereby granted, under NXP Semiconductors' and its
sahilmgandhi 18:6a4db94011d3 26 // licensor's relevant copyrights in the software, without fee, provided that it
sahilmgandhi 18:6a4db94011d3 27 // is used in conjunction with NXP Semiconductors microcontrollers. This
sahilmgandhi 18:6a4db94011d3 28 // copyright, permission, and disclaimer notice must appear in all copies of
sahilmgandhi 18:6a4db94011d3 29 // this code.
sahilmgandhi 18:6a4db94011d3 30 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 31
sahilmgandhi 18:6a4db94011d3 32 #if defined (__cplusplus)
sahilmgandhi 18:6a4db94011d3 33 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 34 //
sahilmgandhi 18:6a4db94011d3 35 // The entry point for the C++ library startup
sahilmgandhi 18:6a4db94011d3 36 //
sahilmgandhi 18:6a4db94011d3 37 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 38 extern "C" {
sahilmgandhi 18:6a4db94011d3 39 extern void __libc_init_array(void);
sahilmgandhi 18:6a4db94011d3 40 }
sahilmgandhi 18:6a4db94011d3 41 #endif
sahilmgandhi 18:6a4db94011d3 42
sahilmgandhi 18:6a4db94011d3 43 #define WEAK __attribute__ ((weak))
sahilmgandhi 18:6a4db94011d3 44 #define ALIAS(f) __attribute__ ((weak, alias (#f)))
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 47 #if defined (__cplusplus)
sahilmgandhi 18:6a4db94011d3 48 extern "C" {
sahilmgandhi 18:6a4db94011d3 49 #endif
sahilmgandhi 18:6a4db94011d3 50
sahilmgandhi 18:6a4db94011d3 51 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 52 // Declaration of external SystemInit function
sahilmgandhi 18:6a4db94011d3 53 extern void SystemInit(void);
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 // Patch the AEABI integer divide functions to use MCU's romdivide library
sahilmgandhi 18:6a4db94011d3 56 #ifdef __USE_ROMDIVIDE
sahilmgandhi 18:6a4db94011d3 57 // Location in memory that holds the address of the ROM Driver table
sahilmgandhi 18:6a4db94011d3 58 #define PTR_ROM_DRIVER_TABLE ((unsigned int *)(0x1FFF1FF8))
sahilmgandhi 18:6a4db94011d3 59 // Variables to store addresses of idiv and udiv functions within MCU ROM
sahilmgandhi 18:6a4db94011d3 60 unsigned int *pDivRom_idiv;
sahilmgandhi 18:6a4db94011d3 61 unsigned int *pDivRom_uidiv;
sahilmgandhi 18:6a4db94011d3 62 #endif
sahilmgandhi 18:6a4db94011d3 63
sahilmgandhi 18:6a4db94011d3 64 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 65 //
sahilmgandhi 18:6a4db94011d3 66 // Forward declaration of the default handlers. These are aliased.
sahilmgandhi 18:6a4db94011d3 67 // When the application defines a handler (with the same name), this will
sahilmgandhi 18:6a4db94011d3 68 // automatically take precedence over these weak definitions
sahilmgandhi 18:6a4db94011d3 69 //
sahilmgandhi 18:6a4db94011d3 70 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 71 void ResetISR(void);
sahilmgandhi 18:6a4db94011d3 72 WEAK void NMI_Handler(void);
sahilmgandhi 18:6a4db94011d3 73 WEAK void HardFault_Handler(void);
sahilmgandhi 18:6a4db94011d3 74 WEAK void SVC_Handler(void);
sahilmgandhi 18:6a4db94011d3 75 WEAK void PendSV_Handler(void);
sahilmgandhi 18:6a4db94011d3 76 WEAK void SysTick_Handler(void);
sahilmgandhi 18:6a4db94011d3 77 WEAK void IntDefaultHandler(void);
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 80 //
sahilmgandhi 18:6a4db94011d3 81 // Forward declaration of the specific IRQ handlers. These are aliased
sahilmgandhi 18:6a4db94011d3 82 // to the IntDefaultHandler, which is a 'forever' loop. When the application
sahilmgandhi 18:6a4db94011d3 83 // defines a handler (with the same name), this will automatically take
sahilmgandhi 18:6a4db94011d3 84 // precedence over these weak definitions
sahilmgandhi 18:6a4db94011d3 85 //
sahilmgandhi 18:6a4db94011d3 86 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 87 void SPI0_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 88 void SPI1_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 89 void UART0_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 90 void UART1_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 91 void UART2_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 92 void I2C1_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 93 void I2C0_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 94 void SCT_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 95 void MRT_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 96 void CMP_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 97 void WDT_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 98 void BOD_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 99 void FLASH_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 100 void WKT_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 101 void ADC_SEQA_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 102 void ADC_SEQB_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 103 void ADC_THCMP_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 104 void ADC_OVR_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 105 void DMA_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 106 void I2C2_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 107 void I2C3_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 108 void PIN_INT0_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 109 void PIN_INT1_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 110 void PIN_INT2_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 111 void PIN_INT3_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 112 void PIN_INT4_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 113 void PIN_INT5_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 114 void PIN_INT6_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 115 void PIN_INT7_IRQHandler(void) ALIAS(IntDefaultHandler);
sahilmgandhi 18:6a4db94011d3 116 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 117 //
sahilmgandhi 18:6a4db94011d3 118 // The entry point for the application.
sahilmgandhi 18:6a4db94011d3 119 // main() is the entry point for Newlib based applications
sahilmgandhi 18:6a4db94011d3 120 //
sahilmgandhi 18:6a4db94011d3 121 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 122 extern int main(void);
sahilmgandhi 18:6a4db94011d3 123 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 124 //
sahilmgandhi 18:6a4db94011d3 125 // External declaration for the pointer to the stack top from the Linker Script
sahilmgandhi 18:6a4db94011d3 126 //
sahilmgandhi 18:6a4db94011d3 127 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 128 extern void _vStackTop(void);
sahilmgandhi 18:6a4db94011d3 129
sahilmgandhi 18:6a4db94011d3 130 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 131 #if defined (__cplusplus)
sahilmgandhi 18:6a4db94011d3 132 } // extern "C"
sahilmgandhi 18:6a4db94011d3 133 #endif
sahilmgandhi 18:6a4db94011d3 134 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 135 //
sahilmgandhi 18:6a4db94011d3 136 // The vector table.
sahilmgandhi 18:6a4db94011d3 137 // This relies on the linker script to place at correct location in memory.
sahilmgandhi 18:6a4db94011d3 138 //
sahilmgandhi 18:6a4db94011d3 139 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 140 extern void (* const g_pfnVectors[])(void);
sahilmgandhi 18:6a4db94011d3 141 __attribute__ ((section(".isr_vector")))
sahilmgandhi 18:6a4db94011d3 142 void (* const g_pfnVectors[])(void) = {
sahilmgandhi 18:6a4db94011d3 143 // Core Level - CM0plus
sahilmgandhi 18:6a4db94011d3 144 &_vStackTop, // The initial stack pointer
sahilmgandhi 18:6a4db94011d3 145 ResetISR, // The reset handler
sahilmgandhi 18:6a4db94011d3 146 NMI_Handler, // The NMI handler
sahilmgandhi 18:6a4db94011d3 147 HardFault_Handler, // The hard fault handler
sahilmgandhi 18:6a4db94011d3 148 0, // Reserved
sahilmgandhi 18:6a4db94011d3 149 0, // Reserved
sahilmgandhi 18:6a4db94011d3 150 0, // Reserved
sahilmgandhi 18:6a4db94011d3 151 0, // Reserved
sahilmgandhi 18:6a4db94011d3 152 0, // Reserved
sahilmgandhi 18:6a4db94011d3 153 0, // Reserved
sahilmgandhi 18:6a4db94011d3 154 0, // Reserved
sahilmgandhi 18:6a4db94011d3 155 SVC_Handler, // SVCall handler
sahilmgandhi 18:6a4db94011d3 156 0, // Reserved
sahilmgandhi 18:6a4db94011d3 157 0, // Reserved
sahilmgandhi 18:6a4db94011d3 158 PendSV_Handler, // The PendSV handler
sahilmgandhi 18:6a4db94011d3 159 SysTick_Handler, // The SysTick handler
sahilmgandhi 18:6a4db94011d3 160
sahilmgandhi 18:6a4db94011d3 161 // Chip Level - LPC82x
sahilmgandhi 18:6a4db94011d3 162 SPI0_IRQHandler, // SPI0 controller
sahilmgandhi 18:6a4db94011d3 163 SPI1_IRQHandler, // SPI1 controller
sahilmgandhi 18:6a4db94011d3 164 0, // Reserved
sahilmgandhi 18:6a4db94011d3 165 UART0_IRQHandler, // UART0
sahilmgandhi 18:6a4db94011d3 166 UART1_IRQHandler, // UART1
sahilmgandhi 18:6a4db94011d3 167 UART2_IRQHandler, // UART2
sahilmgandhi 18:6a4db94011d3 168 0, // Reserved
sahilmgandhi 18:6a4db94011d3 169 I2C1_IRQHandler, // I2C1 controller
sahilmgandhi 18:6a4db94011d3 170 I2C0_IRQHandler, // I2C0 controller
sahilmgandhi 18:6a4db94011d3 171 SCT_IRQHandler, // Smart Counter Timer
sahilmgandhi 18:6a4db94011d3 172 MRT_IRQHandler, // Multi-Rate Timer
sahilmgandhi 18:6a4db94011d3 173 CMP_IRQHandler, // Comparator
sahilmgandhi 18:6a4db94011d3 174 WDT_IRQHandler, // Watchdog
sahilmgandhi 18:6a4db94011d3 175 BOD_IRQHandler, // Brown Out Detect
sahilmgandhi 18:6a4db94011d3 176 FLASH_IRQHandler, // Flash Interrupt
sahilmgandhi 18:6a4db94011d3 177 WKT_IRQHandler, // Wakeup timer
sahilmgandhi 18:6a4db94011d3 178 ADC_SEQA_IRQHandler, // ADC sequence A completion
sahilmgandhi 18:6a4db94011d3 179 ADC_SEQB_IRQHandler, // ADC sequence B completion
sahilmgandhi 18:6a4db94011d3 180 ADC_THCMP_IRQHandler, // ADC threshold compare
sahilmgandhi 18:6a4db94011d3 181 ADC_OVR_IRQHandler, // ADC overrun
sahilmgandhi 18:6a4db94011d3 182 DMA_IRQHandler, // DMA
sahilmgandhi 18:6a4db94011d3 183 I2C2_IRQHandler, // I2C2 controller
sahilmgandhi 18:6a4db94011d3 184 I2C3_IRQHandler, // I2C3 controller
sahilmgandhi 18:6a4db94011d3 185 0, // Reserved
sahilmgandhi 18:6a4db94011d3 186 PIN_INT0_IRQHandler, // PIO INT0
sahilmgandhi 18:6a4db94011d3 187 PIN_INT1_IRQHandler, // PIO INT1
sahilmgandhi 18:6a4db94011d3 188 PIN_INT2_IRQHandler, // PIO INT2
sahilmgandhi 18:6a4db94011d3 189 PIN_INT3_IRQHandler, // PIO INT3
sahilmgandhi 18:6a4db94011d3 190 PIN_INT4_IRQHandler, // PIO INT4
sahilmgandhi 18:6a4db94011d3 191 PIN_INT5_IRQHandler, // PIO INT5
sahilmgandhi 18:6a4db94011d3 192 PIN_INT6_IRQHandler, // PIO INT6
sahilmgandhi 18:6a4db94011d3 193 PIN_INT7_IRQHandler, // PIO INT7
sahilmgandhi 18:6a4db94011d3 194 }; /* End of g_pfnVectors */
sahilmgandhi 18:6a4db94011d3 195
sahilmgandhi 18:6a4db94011d3 196 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 197 // Functions to carry out the initialization of RW and BSS data sections. These
sahilmgandhi 18:6a4db94011d3 198 // are written as separate functions rather than being inlined within the
sahilmgandhi 18:6a4db94011d3 199 // ResetISR() function in order to cope with MCUs with multiple banks of
sahilmgandhi 18:6a4db94011d3 200 // memory.
sahilmgandhi 18:6a4db94011d3 201 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 202 __attribute__ ((section(".after_vectors")))
sahilmgandhi 18:6a4db94011d3 203 void data_init(unsigned int romstart, unsigned int start, unsigned int len) {
sahilmgandhi 18:6a4db94011d3 204 unsigned int *pulDest = (unsigned int*) start;
sahilmgandhi 18:6a4db94011d3 205 unsigned int *pulSrc = (unsigned int*) romstart;
sahilmgandhi 18:6a4db94011d3 206 unsigned int loop;
sahilmgandhi 18:6a4db94011d3 207 for (loop = 0; loop < len; loop = loop + 4)
sahilmgandhi 18:6a4db94011d3 208 *pulDest++ = *pulSrc++;
sahilmgandhi 18:6a4db94011d3 209 }
sahilmgandhi 18:6a4db94011d3 210
sahilmgandhi 18:6a4db94011d3 211 __attribute__ ((section(".after_vectors")))
sahilmgandhi 18:6a4db94011d3 212 void bss_init(unsigned int start, unsigned int len) {
sahilmgandhi 18:6a4db94011d3 213 unsigned int *pulDest = (unsigned int*) start;
sahilmgandhi 18:6a4db94011d3 214 unsigned int loop;
sahilmgandhi 18:6a4db94011d3 215 for (loop = 0; loop < len; loop = loop + 4)
sahilmgandhi 18:6a4db94011d3 216 *pulDest++ = 0;
sahilmgandhi 18:6a4db94011d3 217 }
sahilmgandhi 18:6a4db94011d3 218
sahilmgandhi 18:6a4db94011d3 219 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 220 // The following symbols are constructs generated by the linker, indicating
sahilmgandhi 18:6a4db94011d3 221 // the location of various points in the "Global Section Table". This table is
sahilmgandhi 18:6a4db94011d3 222 // created by the linker via the Code Red managed linker script mechanism. It
sahilmgandhi 18:6a4db94011d3 223 // contains the load address, execution address and length of each RW data
sahilmgandhi 18:6a4db94011d3 224 // section and the execution and length of each BSS (zero initialized) section.
sahilmgandhi 18:6a4db94011d3 225 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 226 extern unsigned int __data_section_table;
sahilmgandhi 18:6a4db94011d3 227 extern unsigned int __data_section_table_end;
sahilmgandhi 18:6a4db94011d3 228 extern unsigned int __bss_section_table;
sahilmgandhi 18:6a4db94011d3 229 extern unsigned int __bss_section_table_end;
sahilmgandhi 18:6a4db94011d3 230
sahilmgandhi 18:6a4db94011d3 231
sahilmgandhi 18:6a4db94011d3 232 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 233 // Reset entry point for your code.
sahilmgandhi 18:6a4db94011d3 234 // Sets up a simple runtime environment and initializes the C/C++
sahilmgandhi 18:6a4db94011d3 235 // library.
sahilmgandhi 18:6a4db94011d3 236 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 237 __attribute__ ((section(".after_vectors")))
sahilmgandhi 18:6a4db94011d3 238 void
sahilmgandhi 18:6a4db94011d3 239 ResetISR(void) {
sahilmgandhi 18:6a4db94011d3 240
sahilmgandhi 18:6a4db94011d3 241 //
sahilmgandhi 18:6a4db94011d3 242 // Copy the data sections from flash to SRAM.
sahilmgandhi 18:6a4db94011d3 243 //
sahilmgandhi 18:6a4db94011d3 244 unsigned int LoadAddr, ExeAddr, SectionLen;
sahilmgandhi 18:6a4db94011d3 245 unsigned int *SectionTableAddr;
sahilmgandhi 18:6a4db94011d3 246
sahilmgandhi 18:6a4db94011d3 247 // Load base address of Global Section Table
sahilmgandhi 18:6a4db94011d3 248 SectionTableAddr = &__data_section_table;
sahilmgandhi 18:6a4db94011d3 249
sahilmgandhi 18:6a4db94011d3 250 // Copy the data sections from flash to SRAM.
sahilmgandhi 18:6a4db94011d3 251 while (SectionTableAddr < &__data_section_table_end) {
sahilmgandhi 18:6a4db94011d3 252 LoadAddr = *SectionTableAddr++;
sahilmgandhi 18:6a4db94011d3 253 ExeAddr = *SectionTableAddr++;
sahilmgandhi 18:6a4db94011d3 254 SectionLen = *SectionTableAddr++;
sahilmgandhi 18:6a4db94011d3 255 data_init(LoadAddr, ExeAddr, SectionLen);
sahilmgandhi 18:6a4db94011d3 256 }
sahilmgandhi 18:6a4db94011d3 257 // At this point, SectionTableAddr = &__bss_section_table;
sahilmgandhi 18:6a4db94011d3 258 // Zero fill the bss segment
sahilmgandhi 18:6a4db94011d3 259 while (SectionTableAddr < &__bss_section_table_end) {
sahilmgandhi 18:6a4db94011d3 260 ExeAddr = *SectionTableAddr++;
sahilmgandhi 18:6a4db94011d3 261 SectionLen = *SectionTableAddr++;
sahilmgandhi 18:6a4db94011d3 262 bss_init(ExeAddr, SectionLen);
sahilmgandhi 18:6a4db94011d3 263 }
sahilmgandhi 18:6a4db94011d3 264
sahilmgandhi 18:6a4db94011d3 265 // Patch the AEABI integer divide functions to use MCU's romdivide library
sahilmgandhi 18:6a4db94011d3 266 #ifdef __USE_ROMDIVIDE
sahilmgandhi 18:6a4db94011d3 267 // Get address of Integer division routines function table in ROM
sahilmgandhi 18:6a4db94011d3 268 unsigned int *div_ptr = (unsigned int *)((unsigned int *)*(PTR_ROM_DRIVER_TABLE))[4];
sahilmgandhi 18:6a4db94011d3 269 // Get addresses of integer divide routines in ROM
sahilmgandhi 18:6a4db94011d3 270 // These address are then used by the code in aeabi_romdiv_patch.s
sahilmgandhi 18:6a4db94011d3 271 pDivRom_idiv = (unsigned int *)div_ptr[0];
sahilmgandhi 18:6a4db94011d3 272 pDivRom_uidiv = (unsigned int *)div_ptr[1];
sahilmgandhi 18:6a4db94011d3 273 #endif
sahilmgandhi 18:6a4db94011d3 274
sahilmgandhi 18:6a4db94011d3 275 SystemInit();
sahilmgandhi 18:6a4db94011d3 276
sahilmgandhi 18:6a4db94011d3 277 #if defined (__cplusplus)
sahilmgandhi 18:6a4db94011d3 278 //
sahilmgandhi 18:6a4db94011d3 279 // Call C++ library initialisation
sahilmgandhi 18:6a4db94011d3 280 //
sahilmgandhi 18:6a4db94011d3 281 __libc_init_array();
sahilmgandhi 18:6a4db94011d3 282 #endif
sahilmgandhi 18:6a4db94011d3 283
sahilmgandhi 18:6a4db94011d3 284 main();
sahilmgandhi 18:6a4db94011d3 285
sahilmgandhi 18:6a4db94011d3 286 //
sahilmgandhi 18:6a4db94011d3 287 // main() shouldn't return, but if it does, we'll just enter an infinite loop
sahilmgandhi 18:6a4db94011d3 288 //
sahilmgandhi 18:6a4db94011d3 289 while (1) {
sahilmgandhi 18:6a4db94011d3 290 ;
sahilmgandhi 18:6a4db94011d3 291 }
sahilmgandhi 18:6a4db94011d3 292 }
sahilmgandhi 18:6a4db94011d3 293
sahilmgandhi 18:6a4db94011d3 294 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 295 // Default exception handlers. Override the ones here by defining your own
sahilmgandhi 18:6a4db94011d3 296 // handler routines in your application code.
sahilmgandhi 18:6a4db94011d3 297 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 298 __attribute__ ((section(".after_vectors")))
sahilmgandhi 18:6a4db94011d3 299 void NMI_Handler(void)
sahilmgandhi 18:6a4db94011d3 300 { while(1) {}
sahilmgandhi 18:6a4db94011d3 301 }
sahilmgandhi 18:6a4db94011d3 302
sahilmgandhi 18:6a4db94011d3 303 __attribute__ ((section(".after_vectors")))
sahilmgandhi 18:6a4db94011d3 304 void HardFault_Handler(void)
sahilmgandhi 18:6a4db94011d3 305 { while(1) {}
sahilmgandhi 18:6a4db94011d3 306 }
sahilmgandhi 18:6a4db94011d3 307
sahilmgandhi 18:6a4db94011d3 308 __attribute__ ((section(".after_vectors")))
sahilmgandhi 18:6a4db94011d3 309 void SVC_Handler(void)
sahilmgandhi 18:6a4db94011d3 310 { while(1) {}
sahilmgandhi 18:6a4db94011d3 311 }
sahilmgandhi 18:6a4db94011d3 312
sahilmgandhi 18:6a4db94011d3 313 __attribute__ ((section(".after_vectors")))
sahilmgandhi 18:6a4db94011d3 314 void PendSV_Handler(void)
sahilmgandhi 18:6a4db94011d3 315 { while(1) {}
sahilmgandhi 18:6a4db94011d3 316 }
sahilmgandhi 18:6a4db94011d3 317
sahilmgandhi 18:6a4db94011d3 318 __attribute__ ((section(".after_vectors")))
sahilmgandhi 18:6a4db94011d3 319 void SysTick_Handler(void)
sahilmgandhi 18:6a4db94011d3 320 { while(1) {}
sahilmgandhi 18:6a4db94011d3 321 }
sahilmgandhi 18:6a4db94011d3 322
sahilmgandhi 18:6a4db94011d3 323 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 324 //
sahilmgandhi 18:6a4db94011d3 325 // Processor ends up here if an unexpected interrupt occurs or a specific
sahilmgandhi 18:6a4db94011d3 326 // handler is not present in the application code.
sahilmgandhi 18:6a4db94011d3 327 //
sahilmgandhi 18:6a4db94011d3 328 //*****************************************************************************
sahilmgandhi 18:6a4db94011d3 329 __attribute__ ((section(".after_vectors")))
sahilmgandhi 18:6a4db94011d3 330 void IntDefaultHandler(void)
sahilmgandhi 18:6a4db94011d3 331 { while(1) {}
sahilmgandhi 18:6a4db94011d3 332 }
sahilmgandhi 18:6a4db94011d3 333