MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NXP/TARGET_LPC43XX/analogin_api.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2006-2013 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 *
sahilmgandhi 18:6a4db94011d3 16 * Ported to NXP LPC43XX by Micromint USA <support@micromint.com>
sahilmgandhi 18:6a4db94011d3 17 */
sahilmgandhi 18:6a4db94011d3 18 #include "mbed_assert.h"
sahilmgandhi 18:6a4db94011d3 19 #include "analogin_api.h"
sahilmgandhi 18:6a4db94011d3 20 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 21 #include "pinmap.h"
sahilmgandhi 18:6a4db94011d3 22 #include "mbed_error.h"
sahilmgandhi 18:6a4db94011d3 23 #include "gpio_api.h"
sahilmgandhi 18:6a4db94011d3 24
sahilmgandhi 18:6a4db94011d3 25 #define ANALOGIN_MEDIAN_FILTER 1
sahilmgandhi 18:6a4db94011d3 26
sahilmgandhi 18:6a4db94011d3 27 static inline int div_round_up(int x, int y) {
sahilmgandhi 18:6a4db94011d3 28 return (x + (y - 1)) / y;
sahilmgandhi 18:6a4db94011d3 29 }
sahilmgandhi 18:6a4db94011d3 30
sahilmgandhi 18:6a4db94011d3 31 static const PinMap PinMap_ADC[] = {
sahilmgandhi 18:6a4db94011d3 32 {P4_3, ADC0_0, 0},
sahilmgandhi 18:6a4db94011d3 33 {P4_1, ADC0_1, 0},
sahilmgandhi 18:6a4db94011d3 34 {PF_8, ADC0_2, 0},
sahilmgandhi 18:6a4db94011d3 35 {P7_5, ADC0_3, 0},
sahilmgandhi 18:6a4db94011d3 36 {P7_4, ADC0_4, 0},
sahilmgandhi 18:6a4db94011d3 37 {PF_10, ADC0_5, 0},
sahilmgandhi 18:6a4db94011d3 38 {PB_6, ADC0_6, 0},
sahilmgandhi 18:6a4db94011d3 39 {PC_3, ADC1_0, 0},
sahilmgandhi 18:6a4db94011d3 40 {PC_0, ADC1_1, 0},
sahilmgandhi 18:6a4db94011d3 41 {PF_9, ADC1_2, 0},
sahilmgandhi 18:6a4db94011d3 42 {PF_6, ADC1_3, 0},
sahilmgandhi 18:6a4db94011d3 43 {PF_5, ADC1_4, 0},
sahilmgandhi 18:6a4db94011d3 44 {PF_11, ADC1_5, 0},
sahilmgandhi 18:6a4db94011d3 45 {P7_7, ADC1_6, 0},
sahilmgandhi 18:6a4db94011d3 46 {PF_7, ADC1_7, 0},
sahilmgandhi 18:6a4db94011d3 47 {adc0_0, ADC_pin0_0, 0},
sahilmgandhi 18:6a4db94011d3 48 {adc0_1, ADC_pin0_1, 0},
sahilmgandhi 18:6a4db94011d3 49 {adc0_2, ADC_pin0_2, 0},
sahilmgandhi 18:6a4db94011d3 50 {adc0_3, ADC_pin0_3, 0},
sahilmgandhi 18:6a4db94011d3 51 {adc0_4, ADC_pin0_4, 0},
sahilmgandhi 18:6a4db94011d3 52 {adc0_5, ADC_pin0_5, 0},
sahilmgandhi 18:6a4db94011d3 53 {adc0_6, ADC_pin0_6, 0},
sahilmgandhi 18:6a4db94011d3 54 {adc0_7, ADC_pin0_7, 0},
sahilmgandhi 18:6a4db94011d3 55 {adc1_0, ADC_pin1_0, 0},
sahilmgandhi 18:6a4db94011d3 56 {adc1_1, ADC_pin1_1, 0},
sahilmgandhi 18:6a4db94011d3 57 {adc1_2, ADC_pin1_2, 0},
sahilmgandhi 18:6a4db94011d3 58 {adc1_3, ADC_pin1_3, 0},
sahilmgandhi 18:6a4db94011d3 59 {adc1_4, ADC_pin1_4, 0},
sahilmgandhi 18:6a4db94011d3 60 {adc1_5, ADC_pin1_5, 0},
sahilmgandhi 18:6a4db94011d3 61 {adc1_6, ADC_pin1_6, 0},
sahilmgandhi 18:6a4db94011d3 62 {adc1_7, ADC_pin1_7, 0},
sahilmgandhi 18:6a4db94011d3 63 {NC, NC, 0 }
sahilmgandhi 18:6a4db94011d3 64 };
sahilmgandhi 18:6a4db94011d3 65
sahilmgandhi 18:6a4db94011d3 66 void analogin_init(analogin_t *obj, PinName pin) {
sahilmgandhi 18:6a4db94011d3 67 ADCName name;
sahilmgandhi 18:6a4db94011d3 68
sahilmgandhi 18:6a4db94011d3 69 name = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
sahilmgandhi 18:6a4db94011d3 70 MBED_ASSERT(obj->adc != (LPC_ADC_T *)NC);
sahilmgandhi 18:6a4db94011d3 71
sahilmgandhi 18:6a4db94011d3 72 // Set ADC number
sahilmgandhi 18:6a4db94011d3 73 if(name < ADC1_0) {
sahilmgandhi 18:6a4db94011d3 74 obj->num = 0;
sahilmgandhi 18:6a4db94011d3 75 } else if(name < ADC_pin0_0 && name > ADC0_6) {
sahilmgandhi 18:6a4db94011d3 76 obj->num = 1;
sahilmgandhi 18:6a4db94011d3 77 } else if(name < ADC_pin1_1 && name > ADC1_7) {
sahilmgandhi 18:6a4db94011d3 78 obj->num = 0;
sahilmgandhi 18:6a4db94011d3 79 } else if(name > ADC_pin0_7) {
sahilmgandhi 18:6a4db94011d3 80 obj->num = 1;
sahilmgandhi 18:6a4db94011d3 81 }
sahilmgandhi 18:6a4db94011d3 82
sahilmgandhi 18:6a4db94011d3 83 //ADC register and channel
sahilmgandhi 18:6a4db94011d3 84 obj->ch = name % (ADC0_7 + 1);
sahilmgandhi 18:6a4db94011d3 85 obj->adc = (LPC_ADC_T *) (obj->num > 0) ? LPC_ADC1 : LPC_ADC0;
sahilmgandhi 18:6a4db94011d3 86
sahilmgandhi 18:6a4db94011d3 87 // Reset pin function to GPIO if it is a GPIO pin. for adc only pins it is not necessary
sahilmgandhi 18:6a4db94011d3 88 if(name < ADC_pin0_0) {
sahilmgandhi 18:6a4db94011d3 89 gpio_set(pin);
sahilmgandhi 18:6a4db94011d3 90 // Select ADC on analog function select register in SCU
sahilmgandhi 18:6a4db94011d3 91 LPC_SCU->ENAIO[obj->num] |= (1 << obj->ch);
sahilmgandhi 18:6a4db94011d3 92 } else {
sahilmgandhi 18:6a4db94011d3 93 LPC_SCU->ENAIO[obj->num] &= ~(1 << obj->ch);
sahilmgandhi 18:6a4db94011d3 94 }
sahilmgandhi 18:6a4db94011d3 95
sahilmgandhi 18:6a4db94011d3 96 // Calculate minimum clock divider
sahilmgandhi 18:6a4db94011d3 97 // clkdiv = divider - 1
sahilmgandhi 18:6a4db94011d3 98 uint32_t PCLK = SystemCoreClock;
sahilmgandhi 18:6a4db94011d3 99 uint32_t adcRate = 400000;
sahilmgandhi 18:6a4db94011d3 100 uint32_t clkdiv = div_round_up(PCLK, adcRate) - 1;
sahilmgandhi 18:6a4db94011d3 101
sahilmgandhi 18:6a4db94011d3 102 // Set the generic software-controlled ADC settings
sahilmgandhi 18:6a4db94011d3 103 obj->adc->CR = (0 << 0) // SEL: 0 = no channels selected
sahilmgandhi 18:6a4db94011d3 104 | (clkdiv << 8) // CLKDIV:
sahilmgandhi 18:6a4db94011d3 105 | (0 << 16) // BURST: 0 = software control
sahilmgandhi 18:6a4db94011d3 106 | (1 << 21) // PDN: 1 = operational
sahilmgandhi 18:6a4db94011d3 107 | (0 << 24) // START: 0 = no start
sahilmgandhi 18:6a4db94011d3 108 | (0 << 27); // EDGE: not applicable
sahilmgandhi 18:6a4db94011d3 109 }
sahilmgandhi 18:6a4db94011d3 110
sahilmgandhi 18:6a4db94011d3 111 static inline uint32_t adc_read(analogin_t *obj) {
sahilmgandhi 18:6a4db94011d3 112 uint32_t temp;
sahilmgandhi 18:6a4db94011d3 113 uint8_t channel = obj->ch;
sahilmgandhi 18:6a4db94011d3 114 LPC_ADC_T *pADC = obj->adc;
sahilmgandhi 18:6a4db94011d3 115
sahilmgandhi 18:6a4db94011d3 116 // Select the appropriate channel and start conversion
sahilmgandhi 18:6a4db94011d3 117 pADC->CR |= ADC_CR_CH_SEL(channel);
sahilmgandhi 18:6a4db94011d3 118 temp = pADC->CR & ~ADC_CR_START_MASK;
sahilmgandhi 18:6a4db94011d3 119 pADC->CR = temp | (ADC_CR_START_MODE_SEL(ADC_START_NOW));
sahilmgandhi 18:6a4db94011d3 120
sahilmgandhi 18:6a4db94011d3 121 // Wait for DONE bit and read data
sahilmgandhi 18:6a4db94011d3 122 while (!(pADC->STAT & ADC_CR_CH_SEL(channel)));
sahilmgandhi 18:6a4db94011d3 123 temp = pADC->DR[channel];
sahilmgandhi 18:6a4db94011d3 124
sahilmgandhi 18:6a4db94011d3 125 // Deselect channel and return result
sahilmgandhi 18:6a4db94011d3 126 pADC->CR &= ~ADC_CR_START_MASK;
sahilmgandhi 18:6a4db94011d3 127 pADC->CR &= ~ADC_CR_CH_SEL(channel);
sahilmgandhi 18:6a4db94011d3 128 return ADC_DR_RESULT(temp);
sahilmgandhi 18:6a4db94011d3 129 }
sahilmgandhi 18:6a4db94011d3 130
sahilmgandhi 18:6a4db94011d3 131 static inline void order(uint32_t *a, uint32_t *b) {
sahilmgandhi 18:6a4db94011d3 132 if (*a > *b) {
sahilmgandhi 18:6a4db94011d3 133 uint32_t t = *a;
sahilmgandhi 18:6a4db94011d3 134 *a = *b;
sahilmgandhi 18:6a4db94011d3 135 *b = t;
sahilmgandhi 18:6a4db94011d3 136 }
sahilmgandhi 18:6a4db94011d3 137 }
sahilmgandhi 18:6a4db94011d3 138
sahilmgandhi 18:6a4db94011d3 139 static inline uint32_t adc_read_u32(analogin_t *obj) {
sahilmgandhi 18:6a4db94011d3 140 uint32_t value;
sahilmgandhi 18:6a4db94011d3 141 #if ANALOGIN_MEDIAN_FILTER
sahilmgandhi 18:6a4db94011d3 142 uint32_t v1 = adc_read(obj);
sahilmgandhi 18:6a4db94011d3 143 uint32_t v2 = adc_read(obj);
sahilmgandhi 18:6a4db94011d3 144 uint32_t v3 = adc_read(obj);
sahilmgandhi 18:6a4db94011d3 145 order(&v1, &v2);
sahilmgandhi 18:6a4db94011d3 146 order(&v2, &v3);
sahilmgandhi 18:6a4db94011d3 147 order(&v1, &v2);
sahilmgandhi 18:6a4db94011d3 148 value = v2;
sahilmgandhi 18:6a4db94011d3 149 #else
sahilmgandhi 18:6a4db94011d3 150 value = adc_read(obj);
sahilmgandhi 18:6a4db94011d3 151 #endif
sahilmgandhi 18:6a4db94011d3 152 return value;
sahilmgandhi 18:6a4db94011d3 153 }
sahilmgandhi 18:6a4db94011d3 154
sahilmgandhi 18:6a4db94011d3 155 uint16_t analogin_read_u16(analogin_t *obj) {
sahilmgandhi 18:6a4db94011d3 156 uint32_t value = adc_read_u32(obj);
sahilmgandhi 18:6a4db94011d3 157
sahilmgandhi 18:6a4db94011d3 158 return (value << 6) | ((value >> 4) & 0x003F); // 10 bit
sahilmgandhi 18:6a4db94011d3 159 }
sahilmgandhi 18:6a4db94011d3 160
sahilmgandhi 18:6a4db94011d3 161 float analogin_read(analogin_t *obj) {
sahilmgandhi 18:6a4db94011d3 162 uint32_t value = adc_read_u32(obj);
sahilmgandhi 18:6a4db94011d3 163 return (float)value * (1.0f / (float)ADC_RANGE);
sahilmgandhi 18:6a4db94011d3 164 }