MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NXP/TARGET_LPC2460/rtc_api.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2006-2015 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16 #include "rtc_api.h"
sahilmgandhi 18:6a4db94011d3 17
sahilmgandhi 18:6a4db94011d3 18 // ensure rtc is running (unchanged if already running)
sahilmgandhi 18:6a4db94011d3 19
sahilmgandhi 18:6a4db94011d3 20 /* Setup the RTC based on a time structure, ensuring RTC is enabled
sahilmgandhi 18:6a4db94011d3 21 *
sahilmgandhi 18:6a4db94011d3 22 * Can be clocked by a 32.768KHz oscillator or prescale divider based on the APB clock
sahilmgandhi 18:6a4db94011d3 23 * - We want to use the 32khz clock, allowing for sleep mode
sahilmgandhi 18:6a4db94011d3 24 *
sahilmgandhi 18:6a4db94011d3 25 * Most registers are not changed by a Reset
sahilmgandhi 18:6a4db94011d3 26 * - We must initialize these registers between power-on and setting the RTC into operation
sahilmgandhi 18:6a4db94011d3 27
sahilmgandhi 18:6a4db94011d3 28 * Clock Control Register
sahilmgandhi 18:6a4db94011d3 29 * RTC_CCR[0] : Enable - 0 = Disabled, 1 = Enabled
sahilmgandhi 18:6a4db94011d3 30 * RTC_CCR[1] : Reset - 0 = Normal, 1 = Reset
sahilmgandhi 18:6a4db94011d3 31 * RTC_CCR[4] : Clock Source - 0 = Prescaler, 1 = 32k Xtal
sahilmgandhi 18:6a4db94011d3 32 *
sahilmgandhi 18:6a4db94011d3 33 * The RTC may already be running, so we should set it up
sahilmgandhi 18:6a4db94011d3 34 * without impacting if it is the case
sahilmgandhi 18:6a4db94011d3 35 */
sahilmgandhi 18:6a4db94011d3 36 void rtc_init(void) {
sahilmgandhi 18:6a4db94011d3 37 LPC_SC->PCONP |= (1 << PCRTC); // Ensure power is on
sahilmgandhi 18:6a4db94011d3 38 LPC_RTC->CCR = 0x00;
sahilmgandhi 18:6a4db94011d3 39
sahilmgandhi 18:6a4db94011d3 40 // clock source on 2368 is special test mode on 1768!
sahilmgandhi 18:6a4db94011d3 41 LPC_RTC->CCR |= 1 << 4; // Ensure clock source is 32KHz Xtal
sahilmgandhi 18:6a4db94011d3 42
sahilmgandhi 18:6a4db94011d3 43 LPC_RTC->CCR |= 1 << 0; // Ensure the RTC is enabled
sahilmgandhi 18:6a4db94011d3 44 }
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 void rtc_free(void) {
sahilmgandhi 18:6a4db94011d3 47 // [TODO]
sahilmgandhi 18:6a4db94011d3 48 }
sahilmgandhi 18:6a4db94011d3 49
sahilmgandhi 18:6a4db94011d3 50 /*
sahilmgandhi 18:6a4db94011d3 51 * Little check routine to see if the RTC has been enabled
sahilmgandhi 18:6a4db94011d3 52 *
sahilmgandhi 18:6a4db94011d3 53 * Clock Control Register
sahilmgandhi 18:6a4db94011d3 54 * RTC_CCR[0] : 0 = Disabled, 1 = Enabled
sahilmgandhi 18:6a4db94011d3 55 *
sahilmgandhi 18:6a4db94011d3 56 */
sahilmgandhi 18:6a4db94011d3 57
sahilmgandhi 18:6a4db94011d3 58 int rtc_isenabled(void) {
sahilmgandhi 18:6a4db94011d3 59 return(((LPC_RTC->CCR) & 0x01) != 0);
sahilmgandhi 18:6a4db94011d3 60 }
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 /*
sahilmgandhi 18:6a4db94011d3 63 * RTC Registers
sahilmgandhi 18:6a4db94011d3 64 * RTC_SEC Seconds 0-59
sahilmgandhi 18:6a4db94011d3 65 * RTC_MIN Minutes 0-59
sahilmgandhi 18:6a4db94011d3 66 * RTC_HOUR Hour 0-23
sahilmgandhi 18:6a4db94011d3 67 * RTC_DOM Day of Month 1-28..31
sahilmgandhi 18:6a4db94011d3 68 * RTC_DOW Day of Week 0-6
sahilmgandhi 18:6a4db94011d3 69 * RTC_DOY Day of Year 1-365
sahilmgandhi 18:6a4db94011d3 70 * RTC_MONTH Month 1-12
sahilmgandhi 18:6a4db94011d3 71 * RTC_YEAR Year 0-4095
sahilmgandhi 18:6a4db94011d3 72 *
sahilmgandhi 18:6a4db94011d3 73 * struct tm
sahilmgandhi 18:6a4db94011d3 74 * tm_sec seconds after the minute 0-61
sahilmgandhi 18:6a4db94011d3 75 * tm_min minutes after the hour 0-59
sahilmgandhi 18:6a4db94011d3 76 * tm_hour hours since midnight 0-23
sahilmgandhi 18:6a4db94011d3 77 * tm_mday day of the month 1-31
sahilmgandhi 18:6a4db94011d3 78 * tm_mon months since January 0-11
sahilmgandhi 18:6a4db94011d3 79 * tm_year years since 1900
sahilmgandhi 18:6a4db94011d3 80 * tm_wday days since Sunday 0-6
sahilmgandhi 18:6a4db94011d3 81 * tm_yday days since January 1 0-365
sahilmgandhi 18:6a4db94011d3 82 * tm_isdst Daylight Saving Time flag
sahilmgandhi 18:6a4db94011d3 83 */
sahilmgandhi 18:6a4db94011d3 84 time_t rtc_read(void) {
sahilmgandhi 18:6a4db94011d3 85 // Setup a tm structure based on the RTC
sahilmgandhi 18:6a4db94011d3 86 struct tm timeinfo;
sahilmgandhi 18:6a4db94011d3 87 timeinfo.tm_sec = LPC_RTC->SEC;
sahilmgandhi 18:6a4db94011d3 88 timeinfo.tm_min = LPC_RTC->MIN;
sahilmgandhi 18:6a4db94011d3 89 timeinfo.tm_hour = LPC_RTC->HOUR;
sahilmgandhi 18:6a4db94011d3 90 timeinfo.tm_mday = LPC_RTC->DOM;
sahilmgandhi 18:6a4db94011d3 91 timeinfo.tm_mon = LPC_RTC->MONTH - 1;
sahilmgandhi 18:6a4db94011d3 92 timeinfo.tm_year = LPC_RTC->YEAR - 1900;
sahilmgandhi 18:6a4db94011d3 93
sahilmgandhi 18:6a4db94011d3 94 // Convert to timestamp
sahilmgandhi 18:6a4db94011d3 95 time_t t = mktime(&timeinfo);
sahilmgandhi 18:6a4db94011d3 96
sahilmgandhi 18:6a4db94011d3 97 return t;
sahilmgandhi 18:6a4db94011d3 98 }
sahilmgandhi 18:6a4db94011d3 99
sahilmgandhi 18:6a4db94011d3 100 void rtc_write(time_t t) {
sahilmgandhi 18:6a4db94011d3 101 // Convert the time in to a tm
sahilmgandhi 18:6a4db94011d3 102 struct tm *timeinfo = localtime(&t);
sahilmgandhi 18:6a4db94011d3 103
sahilmgandhi 18:6a4db94011d3 104 // Pause clock, and clear counter register (clears us count)
sahilmgandhi 18:6a4db94011d3 105 LPC_RTC->CCR |= 2;
sahilmgandhi 18:6a4db94011d3 106
sahilmgandhi 18:6a4db94011d3 107 // Set the RTC
sahilmgandhi 18:6a4db94011d3 108 LPC_RTC->SEC = timeinfo->tm_sec;
sahilmgandhi 18:6a4db94011d3 109 LPC_RTC->MIN = timeinfo->tm_min;
sahilmgandhi 18:6a4db94011d3 110 LPC_RTC->HOUR = timeinfo->tm_hour;
sahilmgandhi 18:6a4db94011d3 111 LPC_RTC->DOM = timeinfo->tm_mday;
sahilmgandhi 18:6a4db94011d3 112 LPC_RTC->MONTH = timeinfo->tm_mon + 1;
sahilmgandhi 18:6a4db94011d3 113 LPC_RTC->YEAR = timeinfo->tm_year + 1900;
sahilmgandhi 18:6a4db94011d3 114
sahilmgandhi 18:6a4db94011d3 115 // Restart clock
sahilmgandhi 18:6a4db94011d3 116 LPC_RTC->CCR &= ~((uint32_t)2);
sahilmgandhi 18:6a4db94011d3 117 }