MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NXP/TARGET_LPC23XX/PeripheralNames.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2006-2013 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16 #ifndef MBED_PERIPHERALNAMES_H
sahilmgandhi 18:6a4db94011d3 17 #define MBED_PERIPHERALNAMES_H
sahilmgandhi 18:6a4db94011d3 18
sahilmgandhi 18:6a4db94011d3 19 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 20
sahilmgandhi 18:6a4db94011d3 21 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 22 extern "C" {
sahilmgandhi 18:6a4db94011d3 23 #endif
sahilmgandhi 18:6a4db94011d3 24
sahilmgandhi 18:6a4db94011d3 25 typedef enum {
sahilmgandhi 18:6a4db94011d3 26 UART_0 = (int)LPC_UART0_BASE,
sahilmgandhi 18:6a4db94011d3 27 UART_1 = (int)LPC_UART1_BASE,
sahilmgandhi 18:6a4db94011d3 28 UART_2 = (int)LPC_UART2_BASE,
sahilmgandhi 18:6a4db94011d3 29 UART_3 = (int)LPC_UART3_BASE
sahilmgandhi 18:6a4db94011d3 30 } UARTName;
sahilmgandhi 18:6a4db94011d3 31
sahilmgandhi 18:6a4db94011d3 32 typedef enum {
sahilmgandhi 18:6a4db94011d3 33 ADC0_0 = 0,
sahilmgandhi 18:6a4db94011d3 34 ADC0_1,
sahilmgandhi 18:6a4db94011d3 35 ADC0_2,
sahilmgandhi 18:6a4db94011d3 36 ADC0_3,
sahilmgandhi 18:6a4db94011d3 37 ADC0_4,
sahilmgandhi 18:6a4db94011d3 38 ADC0_5,
sahilmgandhi 18:6a4db94011d3 39 ADC0_6,
sahilmgandhi 18:6a4db94011d3 40 ADC0_7
sahilmgandhi 18:6a4db94011d3 41 } ADCName;
sahilmgandhi 18:6a4db94011d3 42
sahilmgandhi 18:6a4db94011d3 43 typedef enum {
sahilmgandhi 18:6a4db94011d3 44 DAC_0 = 0
sahilmgandhi 18:6a4db94011d3 45 } DACName;
sahilmgandhi 18:6a4db94011d3 46
sahilmgandhi 18:6a4db94011d3 47 typedef enum {
sahilmgandhi 18:6a4db94011d3 48 SPI_0 = (int)LPC_SSP0_BASE,
sahilmgandhi 18:6a4db94011d3 49 SPI_1 = (int)LPC_SSP1_BASE
sahilmgandhi 18:6a4db94011d3 50 } SPIName;
sahilmgandhi 18:6a4db94011d3 51
sahilmgandhi 18:6a4db94011d3 52 typedef enum {
sahilmgandhi 18:6a4db94011d3 53 I2C_0 = (int)LPC_I2C0_BASE,
sahilmgandhi 18:6a4db94011d3 54 I2C_1 = (int)LPC_I2C1_BASE,
sahilmgandhi 18:6a4db94011d3 55 I2C_2 = (int)LPC_I2C2_BASE
sahilmgandhi 18:6a4db94011d3 56 } I2CName;
sahilmgandhi 18:6a4db94011d3 57
sahilmgandhi 18:6a4db94011d3 58 typedef enum {
sahilmgandhi 18:6a4db94011d3 59 PWM_1 = 1,
sahilmgandhi 18:6a4db94011d3 60 PWM_2,
sahilmgandhi 18:6a4db94011d3 61 PWM_3,
sahilmgandhi 18:6a4db94011d3 62 PWM_4,
sahilmgandhi 18:6a4db94011d3 63 PWM_5,
sahilmgandhi 18:6a4db94011d3 64 PWM_6
sahilmgandhi 18:6a4db94011d3 65 } PWMName;
sahilmgandhi 18:6a4db94011d3 66
sahilmgandhi 18:6a4db94011d3 67 typedef enum {
sahilmgandhi 18:6a4db94011d3 68 CAN_1 = (int)LPC_CAN1_BASE,
sahilmgandhi 18:6a4db94011d3 69 CAN_2 = (int)LPC_CAN2_BASE
sahilmgandhi 18:6a4db94011d3 70 } CANName;
sahilmgandhi 18:6a4db94011d3 71
sahilmgandhi 18:6a4db94011d3 72 #define STDIO_UART_TX USBTX
sahilmgandhi 18:6a4db94011d3 73 #define STDIO_UART_RX USBRX
sahilmgandhi 18:6a4db94011d3 74 #define STDIO_UART UART_0
sahilmgandhi 18:6a4db94011d3 75
sahilmgandhi 18:6a4db94011d3 76 // Default peripherals
sahilmgandhi 18:6a4db94011d3 77 #define MBED_SPI0 p5, p6, p7, p8
sahilmgandhi 18:6a4db94011d3 78 #define MBED_SPI1 p11, p12, p13, p14
sahilmgandhi 18:6a4db94011d3 79
sahilmgandhi 18:6a4db94011d3 80 #define MBED_UART0 p9, p10
sahilmgandhi 18:6a4db94011d3 81 #define MBED_UART1 p13, p14
sahilmgandhi 18:6a4db94011d3 82 #define MBED_UART2 p28, p27
sahilmgandhi 18:6a4db94011d3 83 #define MBED_UARTUSB USBTX, USBRX
sahilmgandhi 18:6a4db94011d3 84
sahilmgandhi 18:6a4db94011d3 85 #define MBED_I2C0 p28, p27
sahilmgandhi 18:6a4db94011d3 86 #define MBED_I2C1 p9, p10
sahilmgandhi 18:6a4db94011d3 87
sahilmgandhi 18:6a4db94011d3 88 #define MBED_CAN0 p30, p29
sahilmgandhi 18:6a4db94011d3 89
sahilmgandhi 18:6a4db94011d3 90 #define MBED_ANALOGOUT0 p18
sahilmgandhi 18:6a4db94011d3 91
sahilmgandhi 18:6a4db94011d3 92 #define MBED_ANALOGIN0 p15
sahilmgandhi 18:6a4db94011d3 93 #define MBED_ANALOGIN1 p16
sahilmgandhi 18:6a4db94011d3 94 #define MBED_ANALOGIN2 p17
sahilmgandhi 18:6a4db94011d3 95 #define MBED_ANALOGIN3 p18
sahilmgandhi 18:6a4db94011d3 96 #define MBED_ANALOGIN4 p19
sahilmgandhi 18:6a4db94011d3 97 #define MBED_ANALOGIN5 p20
sahilmgandhi 18:6a4db94011d3 98
sahilmgandhi 18:6a4db94011d3 99 #define MBED_PWMOUT0 p26
sahilmgandhi 18:6a4db94011d3 100 #define MBED_PWMOUT1 p25
sahilmgandhi 18:6a4db94011d3 101 #define MBED_PWMOUT2 p24
sahilmgandhi 18:6a4db94011d3 102 #define MBED_PWMOUT3 p23
sahilmgandhi 18:6a4db94011d3 103 #define MBED_PWMOUT4 p22
sahilmgandhi 18:6a4db94011d3 104 #define MBED_PWMOUT5 p21
sahilmgandhi 18:6a4db94011d3 105
sahilmgandhi 18:6a4db94011d3 106 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 107 }
sahilmgandhi 18:6a4db94011d3 108 #endif
sahilmgandhi 18:6a4db94011d3 109
sahilmgandhi 18:6a4db94011d3 110 #endif