MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_GCC_ARM/LPC1768.ld@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* Linker script for mbed LPC1768 */
sahilmgandhi 18:6a4db94011d3 2
sahilmgandhi 18:6a4db94011d3 3 /* Linker script to configure memory regions. */
sahilmgandhi 18:6a4db94011d3 4 MEMORY
sahilmgandhi 18:6a4db94011d3 5 {
sahilmgandhi 18:6a4db94011d3 6 FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 512K
sahilmgandhi 18:6a4db94011d3 7 RAM (rwx) : ORIGIN = 0x100000C8, LENGTH = (32K - 0xC8)
sahilmgandhi 18:6a4db94011d3 8
sahilmgandhi 18:6a4db94011d3 9 USB_RAM(rwx) : ORIGIN = 0x2007C000, LENGTH = 16K
sahilmgandhi 18:6a4db94011d3 10 ETH_RAM(rwx) : ORIGIN = 0x20080000, LENGTH = 16K
sahilmgandhi 18:6a4db94011d3 11 }
sahilmgandhi 18:6a4db94011d3 12
sahilmgandhi 18:6a4db94011d3 13 /* Linker script to place sections and symbol values. Should be used together
sahilmgandhi 18:6a4db94011d3 14 * with other linker script that defines memory regions FLASH and RAM.
sahilmgandhi 18:6a4db94011d3 15 * It references following symbols, which must be defined in code:
sahilmgandhi 18:6a4db94011d3 16 * Reset_Handler : Entry of reset handler
sahilmgandhi 18:6a4db94011d3 17 *
sahilmgandhi 18:6a4db94011d3 18 * It defines following symbols, which code can use without definition:
sahilmgandhi 18:6a4db94011d3 19 * __exidx_start
sahilmgandhi 18:6a4db94011d3 20 * __exidx_end
sahilmgandhi 18:6a4db94011d3 21 * __etext
sahilmgandhi 18:6a4db94011d3 22 * __data_start__
sahilmgandhi 18:6a4db94011d3 23 * __preinit_array_start
sahilmgandhi 18:6a4db94011d3 24 * __preinit_array_end
sahilmgandhi 18:6a4db94011d3 25 * __init_array_start
sahilmgandhi 18:6a4db94011d3 26 * __init_array_end
sahilmgandhi 18:6a4db94011d3 27 * __fini_array_start
sahilmgandhi 18:6a4db94011d3 28 * __fini_array_end
sahilmgandhi 18:6a4db94011d3 29 * __data_end__
sahilmgandhi 18:6a4db94011d3 30 * __bss_start__
sahilmgandhi 18:6a4db94011d3 31 * __bss_end__
sahilmgandhi 18:6a4db94011d3 32 * __end__
sahilmgandhi 18:6a4db94011d3 33 * end
sahilmgandhi 18:6a4db94011d3 34 * __HeapLimit
sahilmgandhi 18:6a4db94011d3 35 * __StackLimit
sahilmgandhi 18:6a4db94011d3 36 * __StackTop
sahilmgandhi 18:6a4db94011d3 37 * __stack
sahilmgandhi 18:6a4db94011d3 38 */
sahilmgandhi 18:6a4db94011d3 39 ENTRY(Reset_Handler)
sahilmgandhi 18:6a4db94011d3 40
sahilmgandhi 18:6a4db94011d3 41 SECTIONS
sahilmgandhi 18:6a4db94011d3 42 {
sahilmgandhi 18:6a4db94011d3 43 .text :
sahilmgandhi 18:6a4db94011d3 44 {
sahilmgandhi 18:6a4db94011d3 45 KEEP(*(.isr_vector))
sahilmgandhi 18:6a4db94011d3 46 *(.text*)
sahilmgandhi 18:6a4db94011d3 47
sahilmgandhi 18:6a4db94011d3 48 KEEP(*(.init))
sahilmgandhi 18:6a4db94011d3 49 KEEP(*(.fini))
sahilmgandhi 18:6a4db94011d3 50
sahilmgandhi 18:6a4db94011d3 51 /* .ctors */
sahilmgandhi 18:6a4db94011d3 52 *crtbegin.o(.ctors)
sahilmgandhi 18:6a4db94011d3 53 *crtbegin?.o(.ctors)
sahilmgandhi 18:6a4db94011d3 54 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
sahilmgandhi 18:6a4db94011d3 55 *(SORT(.ctors.*))
sahilmgandhi 18:6a4db94011d3 56 *(.ctors)
sahilmgandhi 18:6a4db94011d3 57
sahilmgandhi 18:6a4db94011d3 58 /* .dtors */
sahilmgandhi 18:6a4db94011d3 59 *crtbegin.o(.dtors)
sahilmgandhi 18:6a4db94011d3 60 *crtbegin?.o(.dtors)
sahilmgandhi 18:6a4db94011d3 61 *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
sahilmgandhi 18:6a4db94011d3 62 *(SORT(.dtors.*))
sahilmgandhi 18:6a4db94011d3 63 *(.dtors)
sahilmgandhi 18:6a4db94011d3 64
sahilmgandhi 18:6a4db94011d3 65 *(.rodata*)
sahilmgandhi 18:6a4db94011d3 66
sahilmgandhi 18:6a4db94011d3 67 KEEP(*(.eh_frame*))
sahilmgandhi 18:6a4db94011d3 68 } > FLASH
sahilmgandhi 18:6a4db94011d3 69
sahilmgandhi 18:6a4db94011d3 70 .ARM.extab :
sahilmgandhi 18:6a4db94011d3 71 {
sahilmgandhi 18:6a4db94011d3 72 *(.ARM.extab* .gnu.linkonce.armextab.*)
sahilmgandhi 18:6a4db94011d3 73 } > FLASH
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 __exidx_start = .;
sahilmgandhi 18:6a4db94011d3 76 .ARM.exidx :
sahilmgandhi 18:6a4db94011d3 77 {
sahilmgandhi 18:6a4db94011d3 78 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
sahilmgandhi 18:6a4db94011d3 79 } > FLASH
sahilmgandhi 18:6a4db94011d3 80 __exidx_end = .;
sahilmgandhi 18:6a4db94011d3 81
sahilmgandhi 18:6a4db94011d3 82 __etext = .;
sahilmgandhi 18:6a4db94011d3 83
sahilmgandhi 18:6a4db94011d3 84 .data : AT (__etext)
sahilmgandhi 18:6a4db94011d3 85 {
sahilmgandhi 18:6a4db94011d3 86 __data_start__ = .;
sahilmgandhi 18:6a4db94011d3 87 Image$$RW_IRAM1$$Base = .;
sahilmgandhi 18:6a4db94011d3 88 *(vtable)
sahilmgandhi 18:6a4db94011d3 89 *(.data*)
sahilmgandhi 18:6a4db94011d3 90
sahilmgandhi 18:6a4db94011d3 91 . = ALIGN(4);
sahilmgandhi 18:6a4db94011d3 92 /* preinit data */
sahilmgandhi 18:6a4db94011d3 93 PROVIDE (__preinit_array_start = .);
sahilmgandhi 18:6a4db94011d3 94 KEEP(*(.preinit_array))
sahilmgandhi 18:6a4db94011d3 95 PROVIDE (__preinit_array_end = .);
sahilmgandhi 18:6a4db94011d3 96
sahilmgandhi 18:6a4db94011d3 97 . = ALIGN(4);
sahilmgandhi 18:6a4db94011d3 98 /* init data */
sahilmgandhi 18:6a4db94011d3 99 PROVIDE (__init_array_start = .);
sahilmgandhi 18:6a4db94011d3 100 KEEP(*(SORT(.init_array.*)))
sahilmgandhi 18:6a4db94011d3 101 KEEP(*(.init_array))
sahilmgandhi 18:6a4db94011d3 102 PROVIDE (__init_array_end = .);
sahilmgandhi 18:6a4db94011d3 103
sahilmgandhi 18:6a4db94011d3 104
sahilmgandhi 18:6a4db94011d3 105 . = ALIGN(4);
sahilmgandhi 18:6a4db94011d3 106 /* finit data */
sahilmgandhi 18:6a4db94011d3 107 PROVIDE (__fini_array_start = .);
sahilmgandhi 18:6a4db94011d3 108 KEEP(*(SORT(.fini_array.*)))
sahilmgandhi 18:6a4db94011d3 109 KEEP(*(.fini_array))
sahilmgandhi 18:6a4db94011d3 110 PROVIDE (__fini_array_end = .);
sahilmgandhi 18:6a4db94011d3 111
sahilmgandhi 18:6a4db94011d3 112 . = ALIGN(4);
sahilmgandhi 18:6a4db94011d3 113 /* All data end */
sahilmgandhi 18:6a4db94011d3 114 __data_end__ = .;
sahilmgandhi 18:6a4db94011d3 115
sahilmgandhi 18:6a4db94011d3 116 } > RAM
sahilmgandhi 18:6a4db94011d3 117
sahilmgandhi 18:6a4db94011d3 118
sahilmgandhi 18:6a4db94011d3 119 .bss :
sahilmgandhi 18:6a4db94011d3 120 {
sahilmgandhi 18:6a4db94011d3 121 __bss_start__ = .;
sahilmgandhi 18:6a4db94011d3 122 *(.bss*)
sahilmgandhi 18:6a4db94011d3 123 *(COMMON)
sahilmgandhi 18:6a4db94011d3 124 __bss_end__ = .;
sahilmgandhi 18:6a4db94011d3 125 Image$$RW_IRAM1$$ZI$$Limit = . ;
sahilmgandhi 18:6a4db94011d3 126 } > RAM
sahilmgandhi 18:6a4db94011d3 127
sahilmgandhi 18:6a4db94011d3 128
sahilmgandhi 18:6a4db94011d3 129 .heap :
sahilmgandhi 18:6a4db94011d3 130 {
sahilmgandhi 18:6a4db94011d3 131 __end__ = .;
sahilmgandhi 18:6a4db94011d3 132 end = __end__;
sahilmgandhi 18:6a4db94011d3 133 *(.heap*)
sahilmgandhi 18:6a4db94011d3 134 __HeapLimit = .;
sahilmgandhi 18:6a4db94011d3 135 } > RAM
sahilmgandhi 18:6a4db94011d3 136
sahilmgandhi 18:6a4db94011d3 137 /* .stack_dummy section doesn't contains any symbols. It is only
sahilmgandhi 18:6a4db94011d3 138 * used for linker to calculate size of stack sections, and assign
sahilmgandhi 18:6a4db94011d3 139 * values to stack symbols later */
sahilmgandhi 18:6a4db94011d3 140 .stack_dummy :
sahilmgandhi 18:6a4db94011d3 141 {
sahilmgandhi 18:6a4db94011d3 142 *(.stack)
sahilmgandhi 18:6a4db94011d3 143 } > RAM
sahilmgandhi 18:6a4db94011d3 144
sahilmgandhi 18:6a4db94011d3 145 /* Set stack top to end of RAM, and stack limit move down by
sahilmgandhi 18:6a4db94011d3 146 * size of stack_dummy section */
sahilmgandhi 18:6a4db94011d3 147 __StackTop = ORIGIN(RAM) + LENGTH(RAM);
sahilmgandhi 18:6a4db94011d3 148 __StackLimit = __StackTop - SIZEOF(.stack_dummy);
sahilmgandhi 18:6a4db94011d3 149 PROVIDE(__stack = __StackTop);
sahilmgandhi 18:6a4db94011d3 150
sahilmgandhi 18:6a4db94011d3 151 /* Check if data + heap + stack exceeds RAM limit */
sahilmgandhi 18:6a4db94011d3 152 ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
sahilmgandhi 18:6a4db94011d3 153
sahilmgandhi 18:6a4db94011d3 154
sahilmgandhi 18:6a4db94011d3 155 /* Code can explicitly ask for data to be
sahilmgandhi 18:6a4db94011d3 156 placed in these higher RAM banks where
sahilmgandhi 18:6a4db94011d3 157 they will be left uninitialized.
sahilmgandhi 18:6a4db94011d3 158 */
sahilmgandhi 18:6a4db94011d3 159 .AHBSRAM0 (NOLOAD):
sahilmgandhi 18:6a4db94011d3 160 {
sahilmgandhi 18:6a4db94011d3 161 Image$$RW_IRAM2$$Base = . ;
sahilmgandhi 18:6a4db94011d3 162 *(AHBSRAM0)
sahilmgandhi 18:6a4db94011d3 163 Image$$RW_IRAM2$$ZI$$Limit = .;
sahilmgandhi 18:6a4db94011d3 164 } > USB_RAM
sahilmgandhi 18:6a4db94011d3 165
sahilmgandhi 18:6a4db94011d3 166 .AHBSRAM1 (NOLOAD):
sahilmgandhi 18:6a4db94011d3 167 {
sahilmgandhi 18:6a4db94011d3 168 Image$$RW_IRAM3$$Base = . ;
sahilmgandhi 18:6a4db94011d3 169 *(AHBSRAM1)
sahilmgandhi 18:6a4db94011d3 170 Image$$RW_IRAM3$$ZI$$Limit = .;
sahilmgandhi 18:6a4db94011d3 171 } > ETH_RAM
sahilmgandhi 18:6a4db94011d3 172 }