Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2006-2013 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16 #include "mbed_assert.h"
sahilmgandhi 18:6a4db94011d3 17 #include "i2c_api.h"
sahilmgandhi 18:6a4db94011d3 18 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 19 #include "pinmap.h"
sahilmgandhi 18:6a4db94011d3 20 #include "mbed_error.h"
sahilmgandhi 18:6a4db94011d3 21
sahilmgandhi 18:6a4db94011d3 22 static const PinMap PinMap_I2C_SDA[] = {
sahilmgandhi 18:6a4db94011d3 23 {P0_5, I2C_0, 1},
sahilmgandhi 18:6a4db94011d3 24 {NC , NC , 0}
sahilmgandhi 18:6a4db94011d3 25 };
sahilmgandhi 18:6a4db94011d3 26
sahilmgandhi 18:6a4db94011d3 27 static const PinMap PinMap_I2C_SCL[] = {
sahilmgandhi 18:6a4db94011d3 28 {P0_4, I2C_0, 1},
sahilmgandhi 18:6a4db94011d3 29 {NC , NC, 0}
sahilmgandhi 18:6a4db94011d3 30 };
sahilmgandhi 18:6a4db94011d3 31
sahilmgandhi 18:6a4db94011d3 32 #define I2C_CONSET(x) (x->i2c->CONSET)
sahilmgandhi 18:6a4db94011d3 33 #define I2C_CONCLR(x) (x->i2c->CONCLR)
sahilmgandhi 18:6a4db94011d3 34 #define I2C_STAT(x) (x->i2c->STAT)
sahilmgandhi 18:6a4db94011d3 35 #define I2C_DAT(x) (x->i2c->DAT)
sahilmgandhi 18:6a4db94011d3 36 #define I2C_SCLL(x, val) (x->i2c->SCLL = val)
sahilmgandhi 18:6a4db94011d3 37 #define I2C_SCLH(x, val) (x->i2c->SCLH = val)
sahilmgandhi 18:6a4db94011d3 38
sahilmgandhi 18:6a4db94011d3 39 static const uint32_t I2C_addr_offset[2][4] = {
sahilmgandhi 18:6a4db94011d3 40 {0x0C, 0x20, 0x24, 0x28},
sahilmgandhi 18:6a4db94011d3 41 {0x30, 0x34, 0x38, 0x3C}
sahilmgandhi 18:6a4db94011d3 42 };
sahilmgandhi 18:6a4db94011d3 43
sahilmgandhi 18:6a4db94011d3 44 static inline void i2c_conclr(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
sahilmgandhi 18:6a4db94011d3 45 I2C_CONCLR(obj) = (start << 5)
sahilmgandhi 18:6a4db94011d3 46 | (stop << 4)
sahilmgandhi 18:6a4db94011d3 47 | (interrupt << 3)
sahilmgandhi 18:6a4db94011d3 48 | (acknowledge << 2);
sahilmgandhi 18:6a4db94011d3 49 }
sahilmgandhi 18:6a4db94011d3 50
sahilmgandhi 18:6a4db94011d3 51 static inline void i2c_conset(i2c_t *obj, int start, int stop, int interrupt, int acknowledge) {
sahilmgandhi 18:6a4db94011d3 52 I2C_CONSET(obj) = (start << 5)
sahilmgandhi 18:6a4db94011d3 53 | (stop << 4)
sahilmgandhi 18:6a4db94011d3 54 | (interrupt << 3)
sahilmgandhi 18:6a4db94011d3 55 | (acknowledge << 2);
sahilmgandhi 18:6a4db94011d3 56 }
sahilmgandhi 18:6a4db94011d3 57
sahilmgandhi 18:6a4db94011d3 58 // Clear the Serial Interrupt (SI)
sahilmgandhi 18:6a4db94011d3 59 static inline void i2c_clear_SI(i2c_t *obj) {
sahilmgandhi 18:6a4db94011d3 60 i2c_conclr(obj, 0, 0, 1, 0);
sahilmgandhi 18:6a4db94011d3 61 }
sahilmgandhi 18:6a4db94011d3 62
sahilmgandhi 18:6a4db94011d3 63 static inline int i2c_status(i2c_t *obj) {
sahilmgandhi 18:6a4db94011d3 64 return I2C_STAT(obj);
sahilmgandhi 18:6a4db94011d3 65 }
sahilmgandhi 18:6a4db94011d3 66
sahilmgandhi 18:6a4db94011d3 67 // Wait until the Serial Interrupt (SI) is set
sahilmgandhi 18:6a4db94011d3 68 static int i2c_wait_SI(i2c_t *obj) {
sahilmgandhi 18:6a4db94011d3 69 int timeout = 0;
sahilmgandhi 18:6a4db94011d3 70 while (!(I2C_CONSET(obj) & (1 << 3))) {
sahilmgandhi 18:6a4db94011d3 71 timeout++;
sahilmgandhi 18:6a4db94011d3 72 if (timeout > 100000) return -1;
sahilmgandhi 18:6a4db94011d3 73 }
sahilmgandhi 18:6a4db94011d3 74 return 0;
sahilmgandhi 18:6a4db94011d3 75 }
sahilmgandhi 18:6a4db94011d3 76
sahilmgandhi 18:6a4db94011d3 77 static inline void i2c_interface_enable(i2c_t *obj) {
sahilmgandhi 18:6a4db94011d3 78 I2C_CONSET(obj) = 0x40;
sahilmgandhi 18:6a4db94011d3 79 }
sahilmgandhi 18:6a4db94011d3 80
sahilmgandhi 18:6a4db94011d3 81 static inline void i2c_power_enable(i2c_t *obj) {
sahilmgandhi 18:6a4db94011d3 82 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 5);
sahilmgandhi 18:6a4db94011d3 83 LPC_SYSCON->PRESETCTRL |= 1 << 1;
sahilmgandhi 18:6a4db94011d3 84 }
sahilmgandhi 18:6a4db94011d3 85
sahilmgandhi 18:6a4db94011d3 86 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
sahilmgandhi 18:6a4db94011d3 87 // determine the SPI to use
sahilmgandhi 18:6a4db94011d3 88 I2CName i2c_sda = (I2CName)pinmap_peripheral(sda, PinMap_I2C_SDA);
sahilmgandhi 18:6a4db94011d3 89 I2CName i2c_scl = (I2CName)pinmap_peripheral(scl, PinMap_I2C_SCL);
sahilmgandhi 18:6a4db94011d3 90 obj->i2c = (LPC_I2C_TypeDef *)pinmap_merge(i2c_sda, i2c_scl);
sahilmgandhi 18:6a4db94011d3 91 MBED_ASSERT((int)obj->i2c != NC);
sahilmgandhi 18:6a4db94011d3 92
sahilmgandhi 18:6a4db94011d3 93 // enable power
sahilmgandhi 18:6a4db94011d3 94 i2c_power_enable(obj);
sahilmgandhi 18:6a4db94011d3 95
sahilmgandhi 18:6a4db94011d3 96 // set default frequency at 100k
sahilmgandhi 18:6a4db94011d3 97 i2c_frequency(obj, 100000);
sahilmgandhi 18:6a4db94011d3 98 i2c_conclr(obj, 1, 1, 1, 1);
sahilmgandhi 18:6a4db94011d3 99 i2c_interface_enable(obj);
sahilmgandhi 18:6a4db94011d3 100
sahilmgandhi 18:6a4db94011d3 101 pinmap_pinout(sda, PinMap_I2C_SDA);
sahilmgandhi 18:6a4db94011d3 102 pinmap_pinout(scl, PinMap_I2C_SCL);
sahilmgandhi 18:6a4db94011d3 103 }
sahilmgandhi 18:6a4db94011d3 104
sahilmgandhi 18:6a4db94011d3 105 inline int i2c_start(i2c_t *obj) {
sahilmgandhi 18:6a4db94011d3 106 int status = 0;
sahilmgandhi 18:6a4db94011d3 107 int isInterrupted = I2C_CONSET(obj) & (1 << 3);
sahilmgandhi 18:6a4db94011d3 108
sahilmgandhi 18:6a4db94011d3 109 // 8.1 Before master mode can be entered, I2CON must be initialised to:
sahilmgandhi 18:6a4db94011d3 110 // - I2EN STA STO SI AA - -
sahilmgandhi 18:6a4db94011d3 111 // - 1 0 0 x x - -
sahilmgandhi 18:6a4db94011d3 112 // if AA = 0, it can't enter slave mode
sahilmgandhi 18:6a4db94011d3 113 i2c_conclr(obj, 1, 1, 0, 1);
sahilmgandhi 18:6a4db94011d3 114
sahilmgandhi 18:6a4db94011d3 115 // The master mode may now be entered by setting the STA bit
sahilmgandhi 18:6a4db94011d3 116 // this will generate a start condition when the bus becomes free
sahilmgandhi 18:6a4db94011d3 117 i2c_conset(obj, 1, 0, 0, 1);
sahilmgandhi 18:6a4db94011d3 118 // Clearing SI bit when it wasn't set on entry can jump past state
sahilmgandhi 18:6a4db94011d3 119 // 0x10 or 0x08 and erroneously send uninitialized slave address.
sahilmgandhi 18:6a4db94011d3 120 if (isInterrupted)
sahilmgandhi 18:6a4db94011d3 121 i2c_clear_SI(obj);
sahilmgandhi 18:6a4db94011d3 122
sahilmgandhi 18:6a4db94011d3 123 i2c_wait_SI(obj);
sahilmgandhi 18:6a4db94011d3 124 status = i2c_status(obj);
sahilmgandhi 18:6a4db94011d3 125
sahilmgandhi 18:6a4db94011d3 126 // Clear start bit now that it's transmitted
sahilmgandhi 18:6a4db94011d3 127 i2c_conclr(obj, 1, 0, 0, 0);
sahilmgandhi 18:6a4db94011d3 128 return status;
sahilmgandhi 18:6a4db94011d3 129 }
sahilmgandhi 18:6a4db94011d3 130
sahilmgandhi 18:6a4db94011d3 131 inline int i2c_stop(i2c_t *obj) {
sahilmgandhi 18:6a4db94011d3 132 int timeout = 0;
sahilmgandhi 18:6a4db94011d3 133
sahilmgandhi 18:6a4db94011d3 134 // write the stop bit
sahilmgandhi 18:6a4db94011d3 135 i2c_conset(obj, 0, 1, 0, 0);
sahilmgandhi 18:6a4db94011d3 136 i2c_clear_SI(obj);
sahilmgandhi 18:6a4db94011d3 137
sahilmgandhi 18:6a4db94011d3 138 // wait for STO bit to reset
sahilmgandhi 18:6a4db94011d3 139 while(I2C_CONSET(obj) & (1 << 4)) {
sahilmgandhi 18:6a4db94011d3 140 timeout ++;
sahilmgandhi 18:6a4db94011d3 141 if (timeout > 100000) return 1;
sahilmgandhi 18:6a4db94011d3 142 }
sahilmgandhi 18:6a4db94011d3 143
sahilmgandhi 18:6a4db94011d3 144 return 0;
sahilmgandhi 18:6a4db94011d3 145 }
sahilmgandhi 18:6a4db94011d3 146
sahilmgandhi 18:6a4db94011d3 147
sahilmgandhi 18:6a4db94011d3 148 static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
sahilmgandhi 18:6a4db94011d3 149 // write the data
sahilmgandhi 18:6a4db94011d3 150 I2C_DAT(obj) = value;
sahilmgandhi 18:6a4db94011d3 151
sahilmgandhi 18:6a4db94011d3 152 // clear SI to init a send
sahilmgandhi 18:6a4db94011d3 153 i2c_clear_SI(obj);
sahilmgandhi 18:6a4db94011d3 154
sahilmgandhi 18:6a4db94011d3 155 // wait and return status
sahilmgandhi 18:6a4db94011d3 156 i2c_wait_SI(obj);
sahilmgandhi 18:6a4db94011d3 157 return i2c_status(obj);
sahilmgandhi 18:6a4db94011d3 158 }
sahilmgandhi 18:6a4db94011d3 159
sahilmgandhi 18:6a4db94011d3 160 static inline int i2c_do_read(i2c_t *obj, int last) {
sahilmgandhi 18:6a4db94011d3 161 // we are in state 0x40 (SLA+R tx'd) or 0x50 (data rx'd and ack)
sahilmgandhi 18:6a4db94011d3 162 if (last) {
sahilmgandhi 18:6a4db94011d3 163 i2c_conclr(obj, 0, 0, 0, 1); // send a NOT ACK
sahilmgandhi 18:6a4db94011d3 164 } else {
sahilmgandhi 18:6a4db94011d3 165 i2c_conset(obj, 0, 0, 0, 1); // send a ACK
sahilmgandhi 18:6a4db94011d3 166 }
sahilmgandhi 18:6a4db94011d3 167
sahilmgandhi 18:6a4db94011d3 168 // accept byte
sahilmgandhi 18:6a4db94011d3 169 i2c_clear_SI(obj);
sahilmgandhi 18:6a4db94011d3 170
sahilmgandhi 18:6a4db94011d3 171 // wait for it to arrive
sahilmgandhi 18:6a4db94011d3 172 i2c_wait_SI(obj);
sahilmgandhi 18:6a4db94011d3 173
sahilmgandhi 18:6a4db94011d3 174 // return the data
sahilmgandhi 18:6a4db94011d3 175 return (I2C_DAT(obj) & 0xFF);
sahilmgandhi 18:6a4db94011d3 176 }
sahilmgandhi 18:6a4db94011d3 177
sahilmgandhi 18:6a4db94011d3 178 void i2c_frequency(i2c_t *obj, int hz) {
sahilmgandhi 18:6a4db94011d3 179 // No peripheral clock divider on the M0
sahilmgandhi 18:6a4db94011d3 180 uint32_t PCLK = SystemCoreClock;
sahilmgandhi 18:6a4db94011d3 181
sahilmgandhi 18:6a4db94011d3 182 uint32_t pulse = PCLK / (hz * 2);
sahilmgandhi 18:6a4db94011d3 183
sahilmgandhi 18:6a4db94011d3 184 // I2C Rate
sahilmgandhi 18:6a4db94011d3 185 I2C_SCLL(obj, pulse);
sahilmgandhi 18:6a4db94011d3 186 I2C_SCLH(obj, pulse);
sahilmgandhi 18:6a4db94011d3 187 }
sahilmgandhi 18:6a4db94011d3 188
sahilmgandhi 18:6a4db94011d3 189 // The I2C does a read or a write as a whole operation
sahilmgandhi 18:6a4db94011d3 190 // There are two types of error conditions it can encounter
sahilmgandhi 18:6a4db94011d3 191 // 1) it can not obtain the bus
sahilmgandhi 18:6a4db94011d3 192 // 2) it gets error responses at part of the transmission
sahilmgandhi 18:6a4db94011d3 193 //
sahilmgandhi 18:6a4db94011d3 194 // We tackle them as follows:
sahilmgandhi 18:6a4db94011d3 195 // 1) we retry until we get the bus. we could have a "timeout" if we can not get it
sahilmgandhi 18:6a4db94011d3 196 // which basically turns it in to a 2)
sahilmgandhi 18:6a4db94011d3 197 // 2) on error, we use the standard error mechanisms to report/debug
sahilmgandhi 18:6a4db94011d3 198 //
sahilmgandhi 18:6a4db94011d3 199 // Therefore an I2C transaction should always complete. If it doesn't it is usually
sahilmgandhi 18:6a4db94011d3 200 // because something is setup wrong (e.g. wiring), and we don't need to programatically
sahilmgandhi 18:6a4db94011d3 201 // check for that
sahilmgandhi 18:6a4db94011d3 202
sahilmgandhi 18:6a4db94011d3 203 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
sahilmgandhi 18:6a4db94011d3 204 int count, status;
sahilmgandhi 18:6a4db94011d3 205
sahilmgandhi 18:6a4db94011d3 206 status = i2c_start(obj);
sahilmgandhi 18:6a4db94011d3 207
sahilmgandhi 18:6a4db94011d3 208 if ((status != 0x10) && (status != 0x08)) {
sahilmgandhi 18:6a4db94011d3 209 i2c_stop(obj);
sahilmgandhi 18:6a4db94011d3 210 return I2C_ERROR_BUS_BUSY;
sahilmgandhi 18:6a4db94011d3 211 }
sahilmgandhi 18:6a4db94011d3 212
sahilmgandhi 18:6a4db94011d3 213 status = i2c_do_write(obj, (address | 0x01), 1);
sahilmgandhi 18:6a4db94011d3 214 if (status != 0x40) {
sahilmgandhi 18:6a4db94011d3 215 i2c_stop(obj);
sahilmgandhi 18:6a4db94011d3 216 return I2C_ERROR_NO_SLAVE;
sahilmgandhi 18:6a4db94011d3 217 }
sahilmgandhi 18:6a4db94011d3 218
sahilmgandhi 18:6a4db94011d3 219 // Read in all except last byte
sahilmgandhi 18:6a4db94011d3 220 for (count = 0; count < (length - 1); count++) {
sahilmgandhi 18:6a4db94011d3 221 int value = i2c_do_read(obj, 0);
sahilmgandhi 18:6a4db94011d3 222 status = i2c_status(obj);
sahilmgandhi 18:6a4db94011d3 223 if (status != 0x50) {
sahilmgandhi 18:6a4db94011d3 224 i2c_stop(obj);
sahilmgandhi 18:6a4db94011d3 225 return count;
sahilmgandhi 18:6a4db94011d3 226 }
sahilmgandhi 18:6a4db94011d3 227 data[count] = (char) value;
sahilmgandhi 18:6a4db94011d3 228 }
sahilmgandhi 18:6a4db94011d3 229
sahilmgandhi 18:6a4db94011d3 230 // read in last byte
sahilmgandhi 18:6a4db94011d3 231 int value = i2c_do_read(obj, 1);
sahilmgandhi 18:6a4db94011d3 232 status = i2c_status(obj);
sahilmgandhi 18:6a4db94011d3 233 if (status != 0x58) {
sahilmgandhi 18:6a4db94011d3 234 i2c_stop(obj);
sahilmgandhi 18:6a4db94011d3 235 return length - 1;
sahilmgandhi 18:6a4db94011d3 236 }
sahilmgandhi 18:6a4db94011d3 237
sahilmgandhi 18:6a4db94011d3 238 data[count] = (char) value;
sahilmgandhi 18:6a4db94011d3 239
sahilmgandhi 18:6a4db94011d3 240 // If not repeated start, send stop.
sahilmgandhi 18:6a4db94011d3 241 if (stop) {
sahilmgandhi 18:6a4db94011d3 242 i2c_stop(obj);
sahilmgandhi 18:6a4db94011d3 243 }
sahilmgandhi 18:6a4db94011d3 244
sahilmgandhi 18:6a4db94011d3 245 return length;
sahilmgandhi 18:6a4db94011d3 246 }
sahilmgandhi 18:6a4db94011d3 247
sahilmgandhi 18:6a4db94011d3 248 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
sahilmgandhi 18:6a4db94011d3 249 int i, status;
sahilmgandhi 18:6a4db94011d3 250
sahilmgandhi 18:6a4db94011d3 251 status = i2c_start(obj);
sahilmgandhi 18:6a4db94011d3 252
sahilmgandhi 18:6a4db94011d3 253 if ((status != 0x10) && (status != 0x08)) {
sahilmgandhi 18:6a4db94011d3 254 i2c_stop(obj);
sahilmgandhi 18:6a4db94011d3 255 return I2C_ERROR_BUS_BUSY;
sahilmgandhi 18:6a4db94011d3 256 }
sahilmgandhi 18:6a4db94011d3 257
sahilmgandhi 18:6a4db94011d3 258 status = i2c_do_write(obj, (address & 0xFE), 1);
sahilmgandhi 18:6a4db94011d3 259 if (status != 0x18) {
sahilmgandhi 18:6a4db94011d3 260 i2c_stop(obj);
sahilmgandhi 18:6a4db94011d3 261 return I2C_ERROR_NO_SLAVE;
sahilmgandhi 18:6a4db94011d3 262 }
sahilmgandhi 18:6a4db94011d3 263
sahilmgandhi 18:6a4db94011d3 264 for (i=0; i<length; i++) {
sahilmgandhi 18:6a4db94011d3 265 status = i2c_do_write(obj, data[i], 0);
sahilmgandhi 18:6a4db94011d3 266 if(status != 0x28) {
sahilmgandhi 18:6a4db94011d3 267 i2c_stop(obj);
sahilmgandhi 18:6a4db94011d3 268 return i;
sahilmgandhi 18:6a4db94011d3 269 }
sahilmgandhi 18:6a4db94011d3 270 }
sahilmgandhi 18:6a4db94011d3 271
sahilmgandhi 18:6a4db94011d3 272 // clearing the serial interrupt here might cause an unintended rewrite of the last byte
sahilmgandhi 18:6a4db94011d3 273 // see also issue report https://mbed.org/users/mbed_official/code/mbed/issues/1
sahilmgandhi 18:6a4db94011d3 274 // i2c_clear_SI(obj);
sahilmgandhi 18:6a4db94011d3 275
sahilmgandhi 18:6a4db94011d3 276 // If not repeated start, send stop.
sahilmgandhi 18:6a4db94011d3 277 if (stop) {
sahilmgandhi 18:6a4db94011d3 278 i2c_stop(obj);
sahilmgandhi 18:6a4db94011d3 279 }
sahilmgandhi 18:6a4db94011d3 280
sahilmgandhi 18:6a4db94011d3 281 return length;
sahilmgandhi 18:6a4db94011d3 282 }
sahilmgandhi 18:6a4db94011d3 283
sahilmgandhi 18:6a4db94011d3 284 void i2c_reset(i2c_t *obj) {
sahilmgandhi 18:6a4db94011d3 285 i2c_stop(obj);
sahilmgandhi 18:6a4db94011d3 286 }
sahilmgandhi 18:6a4db94011d3 287
sahilmgandhi 18:6a4db94011d3 288 int i2c_byte_read(i2c_t *obj, int last) {
sahilmgandhi 18:6a4db94011d3 289 return (i2c_do_read(obj, last) & 0xFF);
sahilmgandhi 18:6a4db94011d3 290 }
sahilmgandhi 18:6a4db94011d3 291
sahilmgandhi 18:6a4db94011d3 292 int i2c_byte_write(i2c_t *obj, int data) {
sahilmgandhi 18:6a4db94011d3 293 int ack;
sahilmgandhi 18:6a4db94011d3 294 int status = i2c_do_write(obj, (data & 0xFF), 0);
sahilmgandhi 18:6a4db94011d3 295
sahilmgandhi 18:6a4db94011d3 296 switch(status) {
sahilmgandhi 18:6a4db94011d3 297 case 0x18: case 0x28: // Master transmit ACKs
sahilmgandhi 18:6a4db94011d3 298 ack = 1;
sahilmgandhi 18:6a4db94011d3 299 break;
sahilmgandhi 18:6a4db94011d3 300 case 0x40: // Master receive address transmitted ACK
sahilmgandhi 18:6a4db94011d3 301 ack = 1;
sahilmgandhi 18:6a4db94011d3 302 break;
sahilmgandhi 18:6a4db94011d3 303 case 0xB8: // Slave transmit ACK
sahilmgandhi 18:6a4db94011d3 304 ack = 1;
sahilmgandhi 18:6a4db94011d3 305 break;
sahilmgandhi 18:6a4db94011d3 306 default:
sahilmgandhi 18:6a4db94011d3 307 ack = 0;
sahilmgandhi 18:6a4db94011d3 308 break;
sahilmgandhi 18:6a4db94011d3 309 }
sahilmgandhi 18:6a4db94011d3 310
sahilmgandhi 18:6a4db94011d3 311 return ack;
sahilmgandhi 18:6a4db94011d3 312 }
sahilmgandhi 18:6a4db94011d3 313
sahilmgandhi 18:6a4db94011d3 314 void i2c_slave_mode(i2c_t *obj, int enable_slave) {
sahilmgandhi 18:6a4db94011d3 315 if (enable_slave != 0) {
sahilmgandhi 18:6a4db94011d3 316 i2c_conclr(obj, 1, 1, 1, 0);
sahilmgandhi 18:6a4db94011d3 317 i2c_conset(obj, 0, 0, 0, 1);
sahilmgandhi 18:6a4db94011d3 318 } else {
sahilmgandhi 18:6a4db94011d3 319 i2c_conclr(obj, 1, 1, 1, 1);
sahilmgandhi 18:6a4db94011d3 320 }
sahilmgandhi 18:6a4db94011d3 321 }
sahilmgandhi 18:6a4db94011d3 322
sahilmgandhi 18:6a4db94011d3 323 int i2c_slave_receive(i2c_t *obj) {
sahilmgandhi 18:6a4db94011d3 324 int status;
sahilmgandhi 18:6a4db94011d3 325 int retval;
sahilmgandhi 18:6a4db94011d3 326
sahilmgandhi 18:6a4db94011d3 327 status = i2c_status(obj);
sahilmgandhi 18:6a4db94011d3 328 switch(status) {
sahilmgandhi 18:6a4db94011d3 329 case 0x60: retval = 3; break;
sahilmgandhi 18:6a4db94011d3 330 case 0x70: retval = 2; break;
sahilmgandhi 18:6a4db94011d3 331 case 0xA8: retval = 1; break;
sahilmgandhi 18:6a4db94011d3 332 default : retval = 0; break;
sahilmgandhi 18:6a4db94011d3 333 }
sahilmgandhi 18:6a4db94011d3 334
sahilmgandhi 18:6a4db94011d3 335 return(retval);
sahilmgandhi 18:6a4db94011d3 336 }
sahilmgandhi 18:6a4db94011d3 337
sahilmgandhi 18:6a4db94011d3 338 int i2c_slave_read(i2c_t *obj, char *data, int length) {
sahilmgandhi 18:6a4db94011d3 339 int count = 0;
sahilmgandhi 18:6a4db94011d3 340 int status;
sahilmgandhi 18:6a4db94011d3 341
sahilmgandhi 18:6a4db94011d3 342 do {
sahilmgandhi 18:6a4db94011d3 343 i2c_clear_SI(obj);
sahilmgandhi 18:6a4db94011d3 344 i2c_wait_SI(obj);
sahilmgandhi 18:6a4db94011d3 345 status = i2c_status(obj);
sahilmgandhi 18:6a4db94011d3 346 if((status == 0x80) || (status == 0x90)) {
sahilmgandhi 18:6a4db94011d3 347 data[count] = I2C_DAT(obj) & 0xFF;
sahilmgandhi 18:6a4db94011d3 348 }
sahilmgandhi 18:6a4db94011d3 349 count++;
sahilmgandhi 18:6a4db94011d3 350 } while (((status == 0x80) || (status == 0x90) ||
sahilmgandhi 18:6a4db94011d3 351 (status == 0x060) || (status == 0x70)) && (count < length));
sahilmgandhi 18:6a4db94011d3 352
sahilmgandhi 18:6a4db94011d3 353 if(status != 0xA0) {
sahilmgandhi 18:6a4db94011d3 354 i2c_stop(obj);
sahilmgandhi 18:6a4db94011d3 355 }
sahilmgandhi 18:6a4db94011d3 356
sahilmgandhi 18:6a4db94011d3 357 i2c_clear_SI(obj);
sahilmgandhi 18:6a4db94011d3 358
sahilmgandhi 18:6a4db94011d3 359 return count;
sahilmgandhi 18:6a4db94011d3 360 }
sahilmgandhi 18:6a4db94011d3 361
sahilmgandhi 18:6a4db94011d3 362 int i2c_slave_write(i2c_t *obj, const char *data, int length) {
sahilmgandhi 18:6a4db94011d3 363 int count = 0;
sahilmgandhi 18:6a4db94011d3 364 int status;
sahilmgandhi 18:6a4db94011d3 365
sahilmgandhi 18:6a4db94011d3 366 if(length <= 0) {
sahilmgandhi 18:6a4db94011d3 367 return(0);
sahilmgandhi 18:6a4db94011d3 368 }
sahilmgandhi 18:6a4db94011d3 369
sahilmgandhi 18:6a4db94011d3 370 do {
sahilmgandhi 18:6a4db94011d3 371 status = i2c_do_write(obj, data[count], 0);
sahilmgandhi 18:6a4db94011d3 372 count++;
sahilmgandhi 18:6a4db94011d3 373 } while ((count < length) && (status == 0xB8));
sahilmgandhi 18:6a4db94011d3 374
sahilmgandhi 18:6a4db94011d3 375 if((status != 0xC0) && (status != 0xC8)) {
sahilmgandhi 18:6a4db94011d3 376 i2c_stop(obj);
sahilmgandhi 18:6a4db94011d3 377 }
sahilmgandhi 18:6a4db94011d3 378
sahilmgandhi 18:6a4db94011d3 379 i2c_clear_SI(obj);
sahilmgandhi 18:6a4db94011d3 380
sahilmgandhi 18:6a4db94011d3 381 return(count);
sahilmgandhi 18:6a4db94011d3 382 }
sahilmgandhi 18:6a4db94011d3 383
sahilmgandhi 18:6a4db94011d3 384 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) {
sahilmgandhi 18:6a4db94011d3 385 uint32_t addr;
sahilmgandhi 18:6a4db94011d3 386
sahilmgandhi 18:6a4db94011d3 387 if ((idx >= 0) && (idx <= 3)) {
sahilmgandhi 18:6a4db94011d3 388 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[0][idx];
sahilmgandhi 18:6a4db94011d3 389 *((uint32_t *) addr) = address & 0xFF;
sahilmgandhi 18:6a4db94011d3 390 addr = ((uint32_t)obj->i2c) + I2C_addr_offset[1][idx];
sahilmgandhi 18:6a4db94011d3 391 *((uint32_t *) addr) = mask & 0xFE;
sahilmgandhi 18:6a4db94011d3 392 }
sahilmgandhi 18:6a4db94011d3 393 }