Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2006-2013 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16 // math.h required for floating point operations for baud rate calculation
sahilmgandhi 18:6a4db94011d3 17 #include <math.h>
sahilmgandhi 18:6a4db94011d3 18 #include <string.h>
sahilmgandhi 18:6a4db94011d3 19 #include <stdlib.h>
sahilmgandhi 18:6a4db94011d3 20
sahilmgandhi 18:6a4db94011d3 21 #include "serial_api.h"
sahilmgandhi 18:6a4db94011d3 22 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 23 #include "pinmap.h"
sahilmgandhi 18:6a4db94011d3 24 #include "PeripheralPins.h" // For the Peripheral to Pin Definitions found in the individual Target's Platform
sahilmgandhi 18:6a4db94011d3 25
sahilmgandhi 18:6a4db94011d3 26 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 27 * INITIALIZATION
sahilmgandhi 18:6a4db94011d3 28 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 29 #define UART_NUM 1
sahilmgandhi 18:6a4db94011d3 30
sahilmgandhi 18:6a4db94011d3 31 static uint32_t serial_irq_ids[UART_NUM] = {0};
sahilmgandhi 18:6a4db94011d3 32 static uart_irq_handler irq_handler;
sahilmgandhi 18:6a4db94011d3 33
sahilmgandhi 18:6a4db94011d3 34 int stdio_uart_inited = 0;
sahilmgandhi 18:6a4db94011d3 35 serial_t stdio_uart;
sahilmgandhi 18:6a4db94011d3 36
sahilmgandhi 18:6a4db94011d3 37 void serial_init(serial_t *obj, PinName tx, PinName rx) {
sahilmgandhi 18:6a4db94011d3 38 int is_stdio_uart = 0;
sahilmgandhi 18:6a4db94011d3 39
sahilmgandhi 18:6a4db94011d3 40 // determine the UART to use
sahilmgandhi 18:6a4db94011d3 41 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 42 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
sahilmgandhi 18:6a4db94011d3 43 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
sahilmgandhi 18:6a4db94011d3 44 MBED_ASSERT((int)uart != NC);
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 obj->uart = (LPC_USART_Type *)uart;
sahilmgandhi 18:6a4db94011d3 47 LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 // [TODO] Consider more elegant approach
sahilmgandhi 18:6a4db94011d3 50 // disconnect USBTX/RX mapping mux, for case when switching ports
sahilmgandhi 18:6a4db94011d3 51 #ifdef USBTX
sahilmgandhi 18:6a4db94011d3 52 pin_function(USBTX, 0);
sahilmgandhi 18:6a4db94011d3 53 pin_function(USBRX, 0);
sahilmgandhi 18:6a4db94011d3 54 #endif
sahilmgandhi 18:6a4db94011d3 55
sahilmgandhi 18:6a4db94011d3 56 // enable fifos and default rx trigger level
sahilmgandhi 18:6a4db94011d3 57 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
sahilmgandhi 18:6a4db94011d3 58 | 0 << 1 // Rx Fifo Reset
sahilmgandhi 18:6a4db94011d3 59 | 0 << 2 // Tx Fifo Reset
sahilmgandhi 18:6a4db94011d3 60 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 // disable irqs
sahilmgandhi 18:6a4db94011d3 63 obj->uart->IER = 0 << 0 // Rx Data available irq enable
sahilmgandhi 18:6a4db94011d3 64 | 0 << 1 // Tx Fifo empty irq enable
sahilmgandhi 18:6a4db94011d3 65 | 0 << 2; // Rx Line Status irq enable
sahilmgandhi 18:6a4db94011d3 66
sahilmgandhi 18:6a4db94011d3 67 // set default baud rate and format
sahilmgandhi 18:6a4db94011d3 68 serial_baud (obj, 9600);
sahilmgandhi 18:6a4db94011d3 69 serial_format(obj, 8, ParityNone, 1);
sahilmgandhi 18:6a4db94011d3 70
sahilmgandhi 18:6a4db94011d3 71 // pinout the chosen uart
sahilmgandhi 18:6a4db94011d3 72 pinmap_pinout(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 73 pinmap_pinout(rx, PinMap_UART_RX);
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 // set rx/tx pins in PullUp mode
sahilmgandhi 18:6a4db94011d3 76 if (tx != NC) {
sahilmgandhi 18:6a4db94011d3 77 pin_mode(tx, PullUp);
sahilmgandhi 18:6a4db94011d3 78 }
sahilmgandhi 18:6a4db94011d3 79 if (rx != NC) {
sahilmgandhi 18:6a4db94011d3 80 pin_mode(rx, PullUp);
sahilmgandhi 18:6a4db94011d3 81 }
sahilmgandhi 18:6a4db94011d3 82
sahilmgandhi 18:6a4db94011d3 83 switch (uart) {
sahilmgandhi 18:6a4db94011d3 84 case UART_0: obj->index = 0; break;
sahilmgandhi 18:6a4db94011d3 85 }
sahilmgandhi 18:6a4db94011d3 86
sahilmgandhi 18:6a4db94011d3 87 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
sahilmgandhi 18:6a4db94011d3 88
sahilmgandhi 18:6a4db94011d3 89 if (is_stdio_uart) {
sahilmgandhi 18:6a4db94011d3 90 stdio_uart_inited = 1;
sahilmgandhi 18:6a4db94011d3 91 memcpy(&stdio_uart, obj, sizeof(serial_t));
sahilmgandhi 18:6a4db94011d3 92 }
sahilmgandhi 18:6a4db94011d3 93 }
sahilmgandhi 18:6a4db94011d3 94
sahilmgandhi 18:6a4db94011d3 95 void serial_free(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 96 serial_irq_ids[obj->index] = 0;
sahilmgandhi 18:6a4db94011d3 97 }
sahilmgandhi 18:6a4db94011d3 98
sahilmgandhi 18:6a4db94011d3 99 // serial_baud
sahilmgandhi 18:6a4db94011d3 100 // set the baud rate, taking in to account the current SystemFrequency
sahilmgandhi 18:6a4db94011d3 101 void serial_baud(serial_t *obj, int baudrate) {
sahilmgandhi 18:6a4db94011d3 102 LPC_SYSCON->UARTCLKDIV = 0x1;
sahilmgandhi 18:6a4db94011d3 103 uint32_t PCLK = SystemCoreClock;
sahilmgandhi 18:6a4db94011d3 104 // First we check to see if the basic divide with no DivAddVal/MulVal
sahilmgandhi 18:6a4db94011d3 105 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
sahilmgandhi 18:6a4db94011d3 106 // MulVal = 1. Otherwise, we search the valid ratio value range to find
sahilmgandhi 18:6a4db94011d3 107 // the closest match. This could be more elegant, using search methods
sahilmgandhi 18:6a4db94011d3 108 // and/or lookup tables, but the brute force method is not that much
sahilmgandhi 18:6a4db94011d3 109 // slower, and is more maintainable.
sahilmgandhi 18:6a4db94011d3 110 uint16_t DL = PCLK / (16 * baudrate);
sahilmgandhi 18:6a4db94011d3 111
sahilmgandhi 18:6a4db94011d3 112 uint8_t DivAddVal = 0;
sahilmgandhi 18:6a4db94011d3 113 uint8_t MulVal = 1;
sahilmgandhi 18:6a4db94011d3 114 int hit = 0;
sahilmgandhi 18:6a4db94011d3 115 uint16_t dlv;
sahilmgandhi 18:6a4db94011d3 116 uint8_t mv, dav;
sahilmgandhi 18:6a4db94011d3 117 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
sahilmgandhi 18:6a4db94011d3 118 int err_best = baudrate, b;
sahilmgandhi 18:6a4db94011d3 119 for (mv = 1; mv < 16 && !hit; mv++)
sahilmgandhi 18:6a4db94011d3 120 {
sahilmgandhi 18:6a4db94011d3 121 for (dav = 0; dav < mv; dav++)
sahilmgandhi 18:6a4db94011d3 122 {
sahilmgandhi 18:6a4db94011d3 123 // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul))
sahilmgandhi 18:6a4db94011d3 124 // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul))
sahilmgandhi 18:6a4db94011d3 125 // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding
sahilmgandhi 18:6a4db94011d3 126 // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision
sahilmgandhi 18:6a4db94011d3 127 // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding
sahilmgandhi 18:6a4db94011d3 128
sahilmgandhi 18:6a4db94011d3 129 if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom
sahilmgandhi 18:6a4db94011d3 130 dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2;
sahilmgandhi 18:6a4db94011d3 131 else // 2 bits headroom, use more precision
sahilmgandhi 18:6a4db94011d3 132 dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2;
sahilmgandhi 18:6a4db94011d3 133
sahilmgandhi 18:6a4db94011d3 134 // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood
sahilmgandhi 18:6a4db94011d3 135 if (dlv == 0)
sahilmgandhi 18:6a4db94011d3 136 dlv = 1;
sahilmgandhi 18:6a4db94011d3 137
sahilmgandhi 18:6a4db94011d3 138 // datasheet says if dav > 0 then DL must be >= 2
sahilmgandhi 18:6a4db94011d3 139 if ((dav > 0) && (dlv < 2))
sahilmgandhi 18:6a4db94011d3 140 dlv = 2;
sahilmgandhi 18:6a4db94011d3 141
sahilmgandhi 18:6a4db94011d3 142 // integer rearrangement of the baudrate equation (with rounding)
sahilmgandhi 18:6a4db94011d3 143 b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2;
sahilmgandhi 18:6a4db94011d3 144
sahilmgandhi 18:6a4db94011d3 145 // check to see how we went
sahilmgandhi 18:6a4db94011d3 146 b = abs(b - baudrate);
sahilmgandhi 18:6a4db94011d3 147 if (b < err_best)
sahilmgandhi 18:6a4db94011d3 148 {
sahilmgandhi 18:6a4db94011d3 149 err_best = b;
sahilmgandhi 18:6a4db94011d3 150
sahilmgandhi 18:6a4db94011d3 151 DL = dlv;
sahilmgandhi 18:6a4db94011d3 152 MulVal = mv;
sahilmgandhi 18:6a4db94011d3 153 DivAddVal = dav;
sahilmgandhi 18:6a4db94011d3 154
sahilmgandhi 18:6a4db94011d3 155 if (b == baudrate)
sahilmgandhi 18:6a4db94011d3 156 {
sahilmgandhi 18:6a4db94011d3 157 hit = 1;
sahilmgandhi 18:6a4db94011d3 158 break;
sahilmgandhi 18:6a4db94011d3 159 }
sahilmgandhi 18:6a4db94011d3 160 }
sahilmgandhi 18:6a4db94011d3 161 }
sahilmgandhi 18:6a4db94011d3 162 }
sahilmgandhi 18:6a4db94011d3 163 }
sahilmgandhi 18:6a4db94011d3 164
sahilmgandhi 18:6a4db94011d3 165 // set LCR[DLAB] to enable writing to divider registers
sahilmgandhi 18:6a4db94011d3 166 obj->uart->LCR |= (1 << 7);
sahilmgandhi 18:6a4db94011d3 167
sahilmgandhi 18:6a4db94011d3 168 // set divider values
sahilmgandhi 18:6a4db94011d3 169 obj->uart->DLM = (DL >> 8) & 0xFF;
sahilmgandhi 18:6a4db94011d3 170 obj->uart->DLL = (DL >> 0) & 0xFF;
sahilmgandhi 18:6a4db94011d3 171 obj->uart->FDR = (uint32_t) DivAddVal << 0
sahilmgandhi 18:6a4db94011d3 172 | (uint32_t) MulVal << 4;
sahilmgandhi 18:6a4db94011d3 173
sahilmgandhi 18:6a4db94011d3 174 // clear LCR[DLAB]
sahilmgandhi 18:6a4db94011d3 175 obj->uart->LCR &= ~(1 << 7);
sahilmgandhi 18:6a4db94011d3 176 }
sahilmgandhi 18:6a4db94011d3 177
sahilmgandhi 18:6a4db94011d3 178 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
sahilmgandhi 18:6a4db94011d3 179 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
sahilmgandhi 18:6a4db94011d3 180 MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 0: 5 data bits ... 3: 8 data bits
sahilmgandhi 18:6a4db94011d3 181 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) ||
sahilmgandhi 18:6a4db94011d3 182 (parity == ParityForced1) || (parity == ParityForced0));
sahilmgandhi 18:6a4db94011d3 183
sahilmgandhi 18:6a4db94011d3 184 stop_bits -= 1;
sahilmgandhi 18:6a4db94011d3 185 data_bits -= 5;
sahilmgandhi 18:6a4db94011d3 186
sahilmgandhi 18:6a4db94011d3 187 int parity_enable = 0, parity_select = 0;
sahilmgandhi 18:6a4db94011d3 188 switch (parity) {
sahilmgandhi 18:6a4db94011d3 189 case ParityNone: parity_enable = 0; parity_select = 0; break;
sahilmgandhi 18:6a4db94011d3 190 case ParityOdd : parity_enable = 1; parity_select = 0; break;
sahilmgandhi 18:6a4db94011d3 191 case ParityEven: parity_enable = 1; parity_select = 1; break;
sahilmgandhi 18:6a4db94011d3 192 case ParityForced1: parity_enable = 1; parity_select = 2; break;
sahilmgandhi 18:6a4db94011d3 193 case ParityForced0: parity_enable = 1; parity_select = 3; break;
sahilmgandhi 18:6a4db94011d3 194 default:
sahilmgandhi 18:6a4db94011d3 195 break;
sahilmgandhi 18:6a4db94011d3 196 }
sahilmgandhi 18:6a4db94011d3 197
sahilmgandhi 18:6a4db94011d3 198 obj->uart->LCR = data_bits << 0
sahilmgandhi 18:6a4db94011d3 199 | stop_bits << 2
sahilmgandhi 18:6a4db94011d3 200 | parity_enable << 3
sahilmgandhi 18:6a4db94011d3 201 | parity_select << 4;
sahilmgandhi 18:6a4db94011d3 202 }
sahilmgandhi 18:6a4db94011d3 203
sahilmgandhi 18:6a4db94011d3 204 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 205 * INTERRUPTS HANDLING
sahilmgandhi 18:6a4db94011d3 206 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 207 static inline void uart_irq(uint32_t iir, uint32_t index) {
sahilmgandhi 18:6a4db94011d3 208 // [Chapter 14] LPC17xx UART0/2/3: UARTn Interrupt Handling
sahilmgandhi 18:6a4db94011d3 209 SerialIrq irq_type;
sahilmgandhi 18:6a4db94011d3 210 switch (iir) {
sahilmgandhi 18:6a4db94011d3 211 case 1: irq_type = TxIrq; break;
sahilmgandhi 18:6a4db94011d3 212 case 2: irq_type = RxIrq; break;
sahilmgandhi 18:6a4db94011d3 213 default: return;
sahilmgandhi 18:6a4db94011d3 214 }
sahilmgandhi 18:6a4db94011d3 215
sahilmgandhi 18:6a4db94011d3 216 if (serial_irq_ids[index] != 0)
sahilmgandhi 18:6a4db94011d3 217 irq_handler(serial_irq_ids[index], irq_type);
sahilmgandhi 18:6a4db94011d3 218 }
sahilmgandhi 18:6a4db94011d3 219
sahilmgandhi 18:6a4db94011d3 220 void uart0_irq() {uart_irq((LPC_USART->IIR >> 1) & 0x7, 0);}
sahilmgandhi 18:6a4db94011d3 221
sahilmgandhi 18:6a4db94011d3 222 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
sahilmgandhi 18:6a4db94011d3 223 irq_handler = handler;
sahilmgandhi 18:6a4db94011d3 224 serial_irq_ids[obj->index] = id;
sahilmgandhi 18:6a4db94011d3 225 }
sahilmgandhi 18:6a4db94011d3 226
sahilmgandhi 18:6a4db94011d3 227 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
sahilmgandhi 18:6a4db94011d3 228 IRQn_Type irq_n = (IRQn_Type)0;
sahilmgandhi 18:6a4db94011d3 229 uint32_t vector = 0;
sahilmgandhi 18:6a4db94011d3 230 switch ((int)obj->uart) {
sahilmgandhi 18:6a4db94011d3 231 case UART_0: irq_n=UART_IRQn ; vector = (uint32_t)&uart0_irq; break;
sahilmgandhi 18:6a4db94011d3 232 }
sahilmgandhi 18:6a4db94011d3 233
sahilmgandhi 18:6a4db94011d3 234 if (enable) {
sahilmgandhi 18:6a4db94011d3 235 obj->uart->IER |= 1 << irq;
sahilmgandhi 18:6a4db94011d3 236 NVIC_SetVector(irq_n, vector);
sahilmgandhi 18:6a4db94011d3 237 NVIC_EnableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 238 } else { // disable
sahilmgandhi 18:6a4db94011d3 239 int all_disabled = 0;
sahilmgandhi 18:6a4db94011d3 240 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
sahilmgandhi 18:6a4db94011d3 241
sahilmgandhi 18:6a4db94011d3 242 obj->uart->IER &= ~(1 << irq);
sahilmgandhi 18:6a4db94011d3 243 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
sahilmgandhi 18:6a4db94011d3 244
sahilmgandhi 18:6a4db94011d3 245 if (all_disabled)
sahilmgandhi 18:6a4db94011d3 246 NVIC_DisableIRQ(irq_n);
sahilmgandhi 18:6a4db94011d3 247 }
sahilmgandhi 18:6a4db94011d3 248 }
sahilmgandhi 18:6a4db94011d3 249
sahilmgandhi 18:6a4db94011d3 250 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 251 * READ/WRITE
sahilmgandhi 18:6a4db94011d3 252 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 253 int serial_getc(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 254 while (!serial_readable(obj));
sahilmgandhi 18:6a4db94011d3 255 return obj->uart->RBR;
sahilmgandhi 18:6a4db94011d3 256 }
sahilmgandhi 18:6a4db94011d3 257
sahilmgandhi 18:6a4db94011d3 258 void serial_putc(serial_t *obj, int c) {
sahilmgandhi 18:6a4db94011d3 259 while (!serial_writable(obj));
sahilmgandhi 18:6a4db94011d3 260 obj->uart->THR = c;
sahilmgandhi 18:6a4db94011d3 261 }
sahilmgandhi 18:6a4db94011d3 262
sahilmgandhi 18:6a4db94011d3 263 int serial_readable(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 264 return obj->uart->LSR & 0x01;
sahilmgandhi 18:6a4db94011d3 265 }
sahilmgandhi 18:6a4db94011d3 266
sahilmgandhi 18:6a4db94011d3 267 int serial_writable(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 268 return obj->uart->LSR & 0x20;
sahilmgandhi 18:6a4db94011d3 269 }
sahilmgandhi 18:6a4db94011d3 270
sahilmgandhi 18:6a4db94011d3 271 void serial_clear(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 272 obj->uart->FCR = 1 << 1 // rx FIFO reset
sahilmgandhi 18:6a4db94011d3 273 | 1 << 2 // tx FIFO reset
sahilmgandhi 18:6a4db94011d3 274 | 0 << 6; // interrupt depth
sahilmgandhi 18:6a4db94011d3 275 }
sahilmgandhi 18:6a4db94011d3 276
sahilmgandhi 18:6a4db94011d3 277 void serial_pinout_tx(PinName tx) {
sahilmgandhi 18:6a4db94011d3 278 pinmap_pinout(tx, PinMap_UART_TX);
sahilmgandhi 18:6a4db94011d3 279 }
sahilmgandhi 18:6a4db94011d3 280
sahilmgandhi 18:6a4db94011d3 281 void serial_break_set(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 282 obj->uart->LCR |= (1 << 6);
sahilmgandhi 18:6a4db94011d3 283 }
sahilmgandhi 18:6a4db94011d3 284
sahilmgandhi 18:6a4db94011d3 285 void serial_break_clear(serial_t *obj) {
sahilmgandhi 18:6a4db94011d3 286 obj->uart->LCR &= ~(1 << 6);
sahilmgandhi 18:6a4db94011d3 287 }
sahilmgandhi 18:6a4db94011d3 288