Mouse code for the MacroRat
mbed-dev/targets/TARGET_NXP/TARGET_LPC11UXX/pinmap.c@46:b156ef445742, 2017-06-03 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sat Jun 03 00:22:44 2017 +0000
- Revision:
- 46:b156ef445742
- Parent:
- 18:6a4db94011d3
Final code for internal battlebot competition.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sahilmgandhi | 18:6a4db94011d3 | 1 | /* mbed Microcontroller Library |
sahilmgandhi | 18:6a4db94011d3 | 2 | * Copyright (c) 2006-2013 ARM Limited |
sahilmgandhi | 18:6a4db94011d3 | 3 | * |
sahilmgandhi | 18:6a4db94011d3 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
sahilmgandhi | 18:6a4db94011d3 | 5 | * you may not use this file except in compliance with the License. |
sahilmgandhi | 18:6a4db94011d3 | 6 | * You may obtain a copy of the License at |
sahilmgandhi | 18:6a4db94011d3 | 7 | * |
sahilmgandhi | 18:6a4db94011d3 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
sahilmgandhi | 18:6a4db94011d3 | 9 | * |
sahilmgandhi | 18:6a4db94011d3 | 10 | * Unless required by applicable law or agreed to in writing, software |
sahilmgandhi | 18:6a4db94011d3 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
sahilmgandhi | 18:6a4db94011d3 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
sahilmgandhi | 18:6a4db94011d3 | 13 | * See the License for the specific language governing permissions and |
sahilmgandhi | 18:6a4db94011d3 | 14 | * limitations under the License. |
sahilmgandhi | 18:6a4db94011d3 | 15 | */ |
sahilmgandhi | 18:6a4db94011d3 | 16 | #include "mbed_assert.h" |
sahilmgandhi | 18:6a4db94011d3 | 17 | #include "pinmap.h" |
sahilmgandhi | 18:6a4db94011d3 | 18 | #include "mbed_error.h" |
sahilmgandhi | 18:6a4db94011d3 | 19 | |
sahilmgandhi | 18:6a4db94011d3 | 20 | #define LPC_IOCON0_BASE (LPC_IOCON_BASE) |
sahilmgandhi | 18:6a4db94011d3 | 21 | #define LPC_IOCON1_BASE (LPC_IOCON_BASE + 0x60) |
sahilmgandhi | 18:6a4db94011d3 | 22 | |
sahilmgandhi | 18:6a4db94011d3 | 23 | void pin_function(PinName pin, int function) { |
sahilmgandhi | 18:6a4db94011d3 | 24 | MBED_ASSERT(pin != (PinName)NC); |
sahilmgandhi | 18:6a4db94011d3 | 25 | if (pin == (PinName)NC) return; |
sahilmgandhi | 18:6a4db94011d3 | 26 | |
sahilmgandhi | 18:6a4db94011d3 | 27 | uint32_t pin_number = (uint32_t)pin; |
sahilmgandhi | 18:6a4db94011d3 | 28 | |
sahilmgandhi | 18:6a4db94011d3 | 29 | __IO uint32_t *reg = (pin_number < 32) ? |
sahilmgandhi | 18:6a4db94011d3 | 30 | (__IO uint32_t*)(LPC_IOCON0_BASE + 4 * pin_number) : |
sahilmgandhi | 18:6a4db94011d3 | 31 | (__IO uint32_t*)(LPC_IOCON1_BASE + 4 * (pin_number - 32)); |
sahilmgandhi | 18:6a4db94011d3 | 32 | |
sahilmgandhi | 18:6a4db94011d3 | 33 | // pin function bits: [2:0] -> 111 = (0x7) |
sahilmgandhi | 18:6a4db94011d3 | 34 | *reg = (*reg & ~0x7) | (function & 0x7); |
sahilmgandhi | 18:6a4db94011d3 | 35 | } |
sahilmgandhi | 18:6a4db94011d3 | 36 | |
sahilmgandhi | 18:6a4db94011d3 | 37 | void pin_mode(PinName pin, PinMode mode) { |
sahilmgandhi | 18:6a4db94011d3 | 38 | MBED_ASSERT(pin != (PinName)NC); |
sahilmgandhi | 18:6a4db94011d3 | 39 | uint32_t pin_number = (uint32_t)pin; |
sahilmgandhi | 18:6a4db94011d3 | 40 | uint32_t drain = ((uint32_t) mode & (uint32_t) OpenDrain) >> 2; |
sahilmgandhi | 18:6a4db94011d3 | 41 | |
sahilmgandhi | 18:6a4db94011d3 | 42 | __IO uint32_t *reg = (pin_number < 32) ? |
sahilmgandhi | 18:6a4db94011d3 | 43 | (__IO uint32_t*)(LPC_IOCON0_BASE + 4 * pin_number) : |
sahilmgandhi | 18:6a4db94011d3 | 44 | (__IO uint32_t*)(LPC_IOCON1_BASE + 4 * (pin_number - 32)); |
sahilmgandhi | 18:6a4db94011d3 | 45 | uint32_t tmp = *reg; |
sahilmgandhi | 18:6a4db94011d3 | 46 | |
sahilmgandhi | 18:6a4db94011d3 | 47 | // pin mode bits: [4:3] -> 11000 = (0x3 << 3) |
sahilmgandhi | 18:6a4db94011d3 | 48 | tmp &= ~(0x3 << 3); |
sahilmgandhi | 18:6a4db94011d3 | 49 | tmp |= (mode & 0x3) << 3; |
sahilmgandhi | 18:6a4db94011d3 | 50 | |
sahilmgandhi | 18:6a4db94011d3 | 51 | // drain |
sahilmgandhi | 18:6a4db94011d3 | 52 | tmp &= ~(0x1 << 10); |
sahilmgandhi | 18:6a4db94011d3 | 53 | tmp |= drain << 10; |
sahilmgandhi | 18:6a4db94011d3 | 54 | |
sahilmgandhi | 18:6a4db94011d3 | 55 | *reg = tmp; |
sahilmgandhi | 18:6a4db94011d3 | 56 | } |