MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NXP/TARGET_LPC11U6X/PeripheralNames.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2006-2013 ARM Limited
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16 #ifndef MBED_PERIPHERALNAMES_H
sahilmgandhi 18:6a4db94011d3 17 #define MBED_PERIPHERALNAMES_H
sahilmgandhi 18:6a4db94011d3 18
sahilmgandhi 18:6a4db94011d3 19 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 20
sahilmgandhi 18:6a4db94011d3 21 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 22 extern "C" {
sahilmgandhi 18:6a4db94011d3 23 #endif
sahilmgandhi 18:6a4db94011d3 24
sahilmgandhi 18:6a4db94011d3 25 typedef enum {
sahilmgandhi 18:6a4db94011d3 26 UART_0 = (int)LPC_USART0_BASE,
sahilmgandhi 18:6a4db94011d3 27 UART_1 = (int)LPC_USART1_BASE,
sahilmgandhi 18:6a4db94011d3 28 UART_2 = (int)LPC_USART2_BASE,
sahilmgandhi 18:6a4db94011d3 29 UART_3 = (int)LPC_USART3_BASE,
sahilmgandhi 18:6a4db94011d3 30 UART_4 = (int)LPC_USART4_BASE,
sahilmgandhi 18:6a4db94011d3 31 } UARTName;
sahilmgandhi 18:6a4db94011d3 32
sahilmgandhi 18:6a4db94011d3 33 typedef enum {
sahilmgandhi 18:6a4db94011d3 34 ADC_0 = 0,
sahilmgandhi 18:6a4db94011d3 35 ADC_1,
sahilmgandhi 18:6a4db94011d3 36 ADC_2,
sahilmgandhi 18:6a4db94011d3 37 ADC_3,
sahilmgandhi 18:6a4db94011d3 38 ADC_4,
sahilmgandhi 18:6a4db94011d3 39 ADC_5,
sahilmgandhi 18:6a4db94011d3 40 ADC_6,
sahilmgandhi 18:6a4db94011d3 41 ADC_7,
sahilmgandhi 18:6a4db94011d3 42 ADC_8,
sahilmgandhi 18:6a4db94011d3 43 ADC_9,
sahilmgandhi 18:6a4db94011d3 44 ADC_10,
sahilmgandhi 18:6a4db94011d3 45 ADC_11,
sahilmgandhi 18:6a4db94011d3 46 } ADCName;
sahilmgandhi 18:6a4db94011d3 47
sahilmgandhi 18:6a4db94011d3 48 typedef enum {
sahilmgandhi 18:6a4db94011d3 49 SPI_0 = (int)LPC_SSP0_BASE,
sahilmgandhi 18:6a4db94011d3 50 SPI_1 = (int)LPC_SSP1_BASE
sahilmgandhi 18:6a4db94011d3 51 } SPIName;
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 typedef enum {
sahilmgandhi 18:6a4db94011d3 54 I2C_0 = (int)LPC_I2C0_BASE,
sahilmgandhi 18:6a4db94011d3 55 I2C_1 = (int)LPC_I2C1_BASE
sahilmgandhi 18:6a4db94011d3 56 } I2CName;
sahilmgandhi 18:6a4db94011d3 57
sahilmgandhi 18:6a4db94011d3 58 typedef enum {
sahilmgandhi 18:6a4db94011d3 59 SCT0_0 = 0,
sahilmgandhi 18:6a4db94011d3 60 SCT0_1,
sahilmgandhi 18:6a4db94011d3 61 SCT0_2,
sahilmgandhi 18:6a4db94011d3 62 SCT0_3,
sahilmgandhi 18:6a4db94011d3 63 SCT1_0,
sahilmgandhi 18:6a4db94011d3 64 SCT1_1,
sahilmgandhi 18:6a4db94011d3 65 SCT1_2,
sahilmgandhi 18:6a4db94011d3 66 SCT1_3,
sahilmgandhi 18:6a4db94011d3 67 } PWMName;
sahilmgandhi 18:6a4db94011d3 68
sahilmgandhi 18:6a4db94011d3 69 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 70 }
sahilmgandhi 18:6a4db94011d3 71 #endif
sahilmgandhi 18:6a4db94011d3 72
sahilmgandhi 18:6a4db94011d3 73 #endif