MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NUVOTON/TARGET_NUC472/device/StdDriver/nuc472_i2s.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /******************************************************************************
sahilmgandhi 18:6a4db94011d3 2 * @file i2s.c
sahilmgandhi 18:6a4db94011d3 3 * @version V0.10
sahilmgandhi 18:6a4db94011d3 4 * $Revision: 14 $
sahilmgandhi 18:6a4db94011d3 5 * $Date: 14/09/30 1:10p $
sahilmgandhi 18:6a4db94011d3 6 * @brief NUC472/NUC442 I2S driver source file
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * @note
sahilmgandhi 18:6a4db94011d3 9 * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
sahilmgandhi 18:6a4db94011d3 10 *****************************************************************************/
sahilmgandhi 18:6a4db94011d3 11
sahilmgandhi 18:6a4db94011d3 12 #include <stdio.h>
sahilmgandhi 18:6a4db94011d3 13 #include "NUC472_442.h"
sahilmgandhi 18:6a4db94011d3 14
sahilmgandhi 18:6a4db94011d3 15 /** @addtogroup NUC472_442_Device_Driver NUC472/NUC442 Device Driver
sahilmgandhi 18:6a4db94011d3 16 @{
sahilmgandhi 18:6a4db94011d3 17 */
sahilmgandhi 18:6a4db94011d3 18
sahilmgandhi 18:6a4db94011d3 19 /** @addtogroup NUC472_442_I2S_Driver I2S Driver
sahilmgandhi 18:6a4db94011d3 20 @{
sahilmgandhi 18:6a4db94011d3 21 */
sahilmgandhi 18:6a4db94011d3 22
sahilmgandhi 18:6a4db94011d3 23 /** @addtogroup NUC472_442_I2S_EXPORTED_FUNCTIONS I2S Exported Functions
sahilmgandhi 18:6a4db94011d3 24 @{
sahilmgandhi 18:6a4db94011d3 25 */
sahilmgandhi 18:6a4db94011d3 26
sahilmgandhi 18:6a4db94011d3 27 /**
sahilmgandhi 18:6a4db94011d3 28 * @brief This function is used to get I2S source clock frequency.
sahilmgandhi 18:6a4db94011d3 29 * @param[in] i2s is the base address of I2S module.
sahilmgandhi 18:6a4db94011d3 30 * @return I2S source clock frequency (Hz).
sahilmgandhi 18:6a4db94011d3 31 */
sahilmgandhi 18:6a4db94011d3 32 static uint32_t I2S_GetSourceClockFreq(I2S_T *i2s)
sahilmgandhi 18:6a4db94011d3 33 {
sahilmgandhi 18:6a4db94011d3 34 uint32_t u32Freq, u32ClkSrcSel;
sahilmgandhi 18:6a4db94011d3 35
sahilmgandhi 18:6a4db94011d3 36 // get I2S selection clock source
sahilmgandhi 18:6a4db94011d3 37 if((uint32_t)i2s == I2S0_BASE)
sahilmgandhi 18:6a4db94011d3 38 u32ClkSrcSel = CLK->CLKSEL3 & CLK_CLKSEL3_I2S0SEL_Msk;
sahilmgandhi 18:6a4db94011d3 39 else
sahilmgandhi 18:6a4db94011d3 40 u32ClkSrcSel = CLK->CLKSEL3 & CLK_CLKSEL3_I2S1SEL_Msk;
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 switch (u32ClkSrcSel) {
sahilmgandhi 18:6a4db94011d3 43 case CLK_CLKSEL3_I2S0SEL_HXT:
sahilmgandhi 18:6a4db94011d3 44 u32Freq = __HXT;
sahilmgandhi 18:6a4db94011d3 45 break;
sahilmgandhi 18:6a4db94011d3 46
sahilmgandhi 18:6a4db94011d3 47 case CLK_CLKSEL3_I2S0SEL_PLL:
sahilmgandhi 18:6a4db94011d3 48 case CLK_CLKSEL3_I2S1SEL_PLL:
sahilmgandhi 18:6a4db94011d3 49 u32Freq = CLK_GetPLLClockFreq();
sahilmgandhi 18:6a4db94011d3 50 break;
sahilmgandhi 18:6a4db94011d3 51
sahilmgandhi 18:6a4db94011d3 52 case CLK_CLKSEL3_I2S0SEL_HIRC:
sahilmgandhi 18:6a4db94011d3 53 case CLK_CLKSEL3_I2S1SEL_HIRC:
sahilmgandhi 18:6a4db94011d3 54 u32Freq = __HIRC;
sahilmgandhi 18:6a4db94011d3 55 break;
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 case CLK_CLKSEL3_I2S0SEL_PCLK:
sahilmgandhi 18:6a4db94011d3 58 case CLK_CLKSEL3_I2S1SEL_PCLK:
sahilmgandhi 18:6a4db94011d3 59 u32Freq = SystemCoreClock;
sahilmgandhi 18:6a4db94011d3 60 break;
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 default:
sahilmgandhi 18:6a4db94011d3 63 u32Freq = __HIRC;
sahilmgandhi 18:6a4db94011d3 64 break;
sahilmgandhi 18:6a4db94011d3 65 }
sahilmgandhi 18:6a4db94011d3 66
sahilmgandhi 18:6a4db94011d3 67 return u32Freq;
sahilmgandhi 18:6a4db94011d3 68 }
sahilmgandhi 18:6a4db94011d3 69
sahilmgandhi 18:6a4db94011d3 70 /**
sahilmgandhi 18:6a4db94011d3 71 * @brief This function configures some parameters of I2S interface for general purpose use.
sahilmgandhi 18:6a4db94011d3 72 * The sample rate may not be used from the parameter, it depends on system's clock settings,
sahilmgandhi 18:6a4db94011d3 73 * but real sample rate used by system will be returned for reference.
sahilmgandhi 18:6a4db94011d3 74 * @param[in] i2s is the base address of I2S module.
sahilmgandhi 18:6a4db94011d3 75 * @param[in] u32MasterSlave I2S operation mode. Valid values are:
sahilmgandhi 18:6a4db94011d3 76 * - \ref I2S_MODE_MASTER
sahilmgandhi 18:6a4db94011d3 77 * - \ref I2S_MODE_SLAVE
sahilmgandhi 18:6a4db94011d3 78 * @param[in] u32SampleRate Sample rate
sahilmgandhi 18:6a4db94011d3 79 * @param[in] u32WordWidth Data length. Valid values are:
sahilmgandhi 18:6a4db94011d3 80 * - \ref I2S_DATABIT_8
sahilmgandhi 18:6a4db94011d3 81 * - \ref I2S_DATABIT_16
sahilmgandhi 18:6a4db94011d3 82 * - \ref I2S_DATABIT_24
sahilmgandhi 18:6a4db94011d3 83 * - \ref I2S_DATABIT_32
sahilmgandhi 18:6a4db94011d3 84 * @param[in] u32Channels: Audio format. Valid values are:
sahilmgandhi 18:6a4db94011d3 85 * - \ref I2S_MONO
sahilmgandhi 18:6a4db94011d3 86 * - \ref I2S_STEREO
sahilmgandhi 18:6a4db94011d3 87 * @param[in] u32DataFormat: Data format. Valid values are:
sahilmgandhi 18:6a4db94011d3 88 * - \ref I2S_FORMAT_I2S
sahilmgandhi 18:6a4db94011d3 89 * - \ref I2S_FORMAT_MSB
sahilmgandhi 18:6a4db94011d3 90 * - \ref I2S_FORMAT_PCMA
sahilmgandhi 18:6a4db94011d3 91 * - \ref I2S_FORMAT_PCMB
sahilmgandhi 18:6a4db94011d3 92 * @param[in] u32AudioInterface: Audio interface. Valid values are:
sahilmgandhi 18:6a4db94011d3 93 * - \ref I2S_I2S
sahilmgandhi 18:6a4db94011d3 94 * - \ref I2S_PCM
sahilmgandhi 18:6a4db94011d3 95 * @return Real sample rate.
sahilmgandhi 18:6a4db94011d3 96 */
sahilmgandhi 18:6a4db94011d3 97 uint32_t I2S_Open(I2S_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32Channels, uint32_t u32DataFormat, uint32_t u32AudioInterface)
sahilmgandhi 18:6a4db94011d3 98 {
sahilmgandhi 18:6a4db94011d3 99 uint16_t u16Divider;
sahilmgandhi 18:6a4db94011d3 100 uint32_t u32BitRate, u32SrcClk;
sahilmgandhi 18:6a4db94011d3 101
sahilmgandhi 18:6a4db94011d3 102 if((uint32_t)i2s == I2S0_BASE) {
sahilmgandhi 18:6a4db94011d3 103 SYS->IPRST1 |= SYS_IPRST1_I2S0RST_Msk;
sahilmgandhi 18:6a4db94011d3 104 SYS->IPRST1 &= ~SYS_IPRST1_I2S0RST_Msk;
sahilmgandhi 18:6a4db94011d3 105 } else {
sahilmgandhi 18:6a4db94011d3 106 SYS->IPRST1 |= SYS_IPRST1_I2S1RST_Msk;
sahilmgandhi 18:6a4db94011d3 107 SYS->IPRST1 &= ~SYS_IPRST1_I2S1RST_Msk;
sahilmgandhi 18:6a4db94011d3 108 }
sahilmgandhi 18:6a4db94011d3 109
sahilmgandhi 18:6a4db94011d3 110 i2s->CTL = u32MasterSlave | u32WordWidth | u32Channels | u32DataFormat | u32AudioInterface | I2S_FIFO_TX_LEVEL_WORD_4 | I2S_FIFO_RX_LEVEL_WORD_4;
sahilmgandhi 18:6a4db94011d3 111
sahilmgandhi 18:6a4db94011d3 112 u32SrcClk = I2S_GetSourceClockFreq(i2s);
sahilmgandhi 18:6a4db94011d3 113
sahilmgandhi 18:6a4db94011d3 114 u32BitRate = u32SampleRate * (((u32WordWidth>>4) & 0x3) + 1) * 16;
sahilmgandhi 18:6a4db94011d3 115 u16Divider = ((u32SrcClk/u32BitRate) >> 1) - 1;
sahilmgandhi 18:6a4db94011d3 116 i2s->CLKDIV = (i2s->CLKDIV & ~I2S_CLKDIV_BCLKDIV_Msk) | (u16Divider << 8);
sahilmgandhi 18:6a4db94011d3 117
sahilmgandhi 18:6a4db94011d3 118 //calculate real sample rate
sahilmgandhi 18:6a4db94011d3 119 u32BitRate = u32SrcClk / (2*(u16Divider+1));
sahilmgandhi 18:6a4db94011d3 120 u32SampleRate = u32BitRate / ((((u32WordWidth>>4) & 0x3) + 1) * 16);
sahilmgandhi 18:6a4db94011d3 121
sahilmgandhi 18:6a4db94011d3 122 i2s->CTL |= I2S_CTL_I2SEN_Msk;
sahilmgandhi 18:6a4db94011d3 123
sahilmgandhi 18:6a4db94011d3 124 return u32SampleRate;
sahilmgandhi 18:6a4db94011d3 125 }
sahilmgandhi 18:6a4db94011d3 126
sahilmgandhi 18:6a4db94011d3 127 /**
sahilmgandhi 18:6a4db94011d3 128 * @brief Disable I2S function and I2S clock.
sahilmgandhi 18:6a4db94011d3 129 * @param[in] i2s is the base address of I2S module.
sahilmgandhi 18:6a4db94011d3 130 * @return none
sahilmgandhi 18:6a4db94011d3 131 */
sahilmgandhi 18:6a4db94011d3 132 void I2S_Close(I2S_T *i2s)
sahilmgandhi 18:6a4db94011d3 133 {
sahilmgandhi 18:6a4db94011d3 134 i2s->CTL &= ~I2S_CTL_I2SEN_Msk;
sahilmgandhi 18:6a4db94011d3 135 }
sahilmgandhi 18:6a4db94011d3 136
sahilmgandhi 18:6a4db94011d3 137 /**
sahilmgandhi 18:6a4db94011d3 138 * @brief This function enables the interrupt according to the mask parameter.
sahilmgandhi 18:6a4db94011d3 139 * @param[in] i2s is the base address of I2S module.
sahilmgandhi 18:6a4db94011d3 140 * @param[in] u32Mask is the combination of all related interrupt enable bits.
sahilmgandhi 18:6a4db94011d3 141 * Each bit corresponds to a interrupt bit.
sahilmgandhi 18:6a4db94011d3 142 * @return none
sahilmgandhi 18:6a4db94011d3 143 */
sahilmgandhi 18:6a4db94011d3 144 void I2S_EnableInt(I2S_T *i2s, uint32_t u32Mask)
sahilmgandhi 18:6a4db94011d3 145 {
sahilmgandhi 18:6a4db94011d3 146 i2s->IEN |= u32Mask;
sahilmgandhi 18:6a4db94011d3 147 }
sahilmgandhi 18:6a4db94011d3 148
sahilmgandhi 18:6a4db94011d3 149 /**
sahilmgandhi 18:6a4db94011d3 150 * @brief This function disables the interrupt according to the mask parameter.
sahilmgandhi 18:6a4db94011d3 151 * @param[in] i2s is the base address of I2S module.
sahilmgandhi 18:6a4db94011d3 152 * @param[in] u32Mask is the combination of all related interrupt enable bits.
sahilmgandhi 18:6a4db94011d3 153 * Each bit corresponds to a interrupt bit.
sahilmgandhi 18:6a4db94011d3 154 * @return none
sahilmgandhi 18:6a4db94011d3 155 */
sahilmgandhi 18:6a4db94011d3 156 void I2S_DisableInt(I2S_T *i2s, uint32_t u32Mask)
sahilmgandhi 18:6a4db94011d3 157 {
sahilmgandhi 18:6a4db94011d3 158 i2s->IEN &= ~u32Mask;
sahilmgandhi 18:6a4db94011d3 159 }
sahilmgandhi 18:6a4db94011d3 160
sahilmgandhi 18:6a4db94011d3 161 /**
sahilmgandhi 18:6a4db94011d3 162 * @brief Enable MCLK .
sahilmgandhi 18:6a4db94011d3 163 * @param[in] i2s is the base address of I2S module.
sahilmgandhi 18:6a4db94011d3 164 * @param[in] u32BusClock is the target MCLK clock
sahilmgandhi 18:6a4db94011d3 165 * @return Actual MCLK clock
sahilmgandhi 18:6a4db94011d3 166 */
sahilmgandhi 18:6a4db94011d3 167 uint32_t I2S_EnableMCLK(I2S_T *i2s, uint32_t u32BusClock)
sahilmgandhi 18:6a4db94011d3 168 {
sahilmgandhi 18:6a4db94011d3 169 uint8_t u8Divider;
sahilmgandhi 18:6a4db94011d3 170 uint32_t u32SrcClk, u32Reg;
sahilmgandhi 18:6a4db94011d3 171
sahilmgandhi 18:6a4db94011d3 172 u32SrcClk = I2S_GetSourceClockFreq(i2s);
sahilmgandhi 18:6a4db94011d3 173 if (u32BusClock == u32SrcClk)
sahilmgandhi 18:6a4db94011d3 174 u8Divider = 0;
sahilmgandhi 18:6a4db94011d3 175 else
sahilmgandhi 18:6a4db94011d3 176 u8Divider = (u32SrcClk/u32BusClock) >> 1;
sahilmgandhi 18:6a4db94011d3 177
sahilmgandhi 18:6a4db94011d3 178 i2s->CLKDIV = (i2s->CLKDIV & ~I2S_CLKDIV_MCLKDIV_Msk) | u8Divider;
sahilmgandhi 18:6a4db94011d3 179
sahilmgandhi 18:6a4db94011d3 180 i2s->CTL |= I2S_CTL_MCLKEN_Msk;
sahilmgandhi 18:6a4db94011d3 181
sahilmgandhi 18:6a4db94011d3 182 u32Reg = i2s->CLKDIV & I2S_CLKDIV_MCLKDIV_Msk;
sahilmgandhi 18:6a4db94011d3 183
sahilmgandhi 18:6a4db94011d3 184 if (u32Reg == 0)
sahilmgandhi 18:6a4db94011d3 185 return u32SrcClk;
sahilmgandhi 18:6a4db94011d3 186 else
sahilmgandhi 18:6a4db94011d3 187 return ((u32SrcClk >> 1) / u32Reg);
sahilmgandhi 18:6a4db94011d3 188 }
sahilmgandhi 18:6a4db94011d3 189
sahilmgandhi 18:6a4db94011d3 190 /**
sahilmgandhi 18:6a4db94011d3 191 * @brief Disable MCLK .
sahilmgandhi 18:6a4db94011d3 192 * @param[in] i2s is the base address of I2S module.
sahilmgandhi 18:6a4db94011d3 193 * @return none
sahilmgandhi 18:6a4db94011d3 194 */
sahilmgandhi 18:6a4db94011d3 195 void I2S_DisableMCLK(I2S_T *i2s)
sahilmgandhi 18:6a4db94011d3 196 {
sahilmgandhi 18:6a4db94011d3 197 i2s->CTL &= ~I2S_CTL_MCLKEN_Msk;
sahilmgandhi 18:6a4db94011d3 198 }
sahilmgandhi 18:6a4db94011d3 199 /*@}*/ /* end of group NUC472_442_I2S_EXPORTED_FUNCTIONS */
sahilmgandhi 18:6a4db94011d3 200
sahilmgandhi 18:6a4db94011d3 201 /*@}*/ /* end of group NUC472_442_I2S_Driver */
sahilmgandhi 18:6a4db94011d3 202
sahilmgandhi 18:6a4db94011d3 203 /*@}*/ /* end of group NUC472_442_Device_Driver */
sahilmgandhi 18:6a4db94011d3 204
sahilmgandhi 18:6a4db94011d3 205 /*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/