Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /****************************************************************************//**
sahilmgandhi 18:6a4db94011d3 2 * @file ebi.c
sahilmgandhi 18:6a4db94011d3 3 * @version V0.10
sahilmgandhi 18:6a4db94011d3 4 * $Revision: 7 $
sahilmgandhi 18:6a4db94011d3 5 * $Date: 14/09/30 1:10p $
sahilmgandhi 18:6a4db94011d3 6 * @brief NUC472/NUC442 EBI driver source file
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * @note
sahilmgandhi 18:6a4db94011d3 9 * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
sahilmgandhi 18:6a4db94011d3 10 *****************************************************************************/
sahilmgandhi 18:6a4db94011d3 11 #include "NUC472_442.h"
sahilmgandhi 18:6a4db94011d3 12 //#include "ebi.h"
sahilmgandhi 18:6a4db94011d3 13
sahilmgandhi 18:6a4db94011d3 14 /** @addtogroup NUC472_442_Device_Driver NUC472/NUC442 Device Driver
sahilmgandhi 18:6a4db94011d3 15 @{
sahilmgandhi 18:6a4db94011d3 16 */
sahilmgandhi 18:6a4db94011d3 17
sahilmgandhi 18:6a4db94011d3 18 /** @addtogroup NUC472_442_EBI_Driver EBI Driver
sahilmgandhi 18:6a4db94011d3 19 @{
sahilmgandhi 18:6a4db94011d3 20 */
sahilmgandhi 18:6a4db94011d3 21
sahilmgandhi 18:6a4db94011d3 22
sahilmgandhi 18:6a4db94011d3 23 /** @addtogroup NUC472_442_EBI_EXPORTED_FUNCTIONS EBI Exported Functions
sahilmgandhi 18:6a4db94011d3 24 @{
sahilmgandhi 18:6a4db94011d3 25 */
sahilmgandhi 18:6a4db94011d3 26
sahilmgandhi 18:6a4db94011d3 27 /**
sahilmgandhi 18:6a4db94011d3 28 * @brief Initialize EBI for Bank 0~3
sahilmgandhi 18:6a4db94011d3 29 * @param[in] u32Bank Bank number for EBI. Valid values are:
sahilmgandhi 18:6a4db94011d3 30 * - \ref EBI_BANK0
sahilmgandhi 18:6a4db94011d3 31 * - \ref EBI_BANK1
sahilmgandhi 18:6a4db94011d3 32 * - \ref EBI_BANK2
sahilmgandhi 18:6a4db94011d3 33 * - \ref EBI_BANK3
sahilmgandhi 18:6a4db94011d3 34 * @param[in] u32DataWidth Data bus width. Valid values are:
sahilmgandhi 18:6a4db94011d3 35 * - \ref EBI_BUSWIDTH_8BIT
sahilmgandhi 18:6a4db94011d3 36 * - \ref EBI_BUSWIDTH_16BIT
sahilmgandhi 18:6a4db94011d3 37 * @param[in] u32TimingClass Default timing configuration. Valid values are:
sahilmgandhi 18:6a4db94011d3 38 * - \ref EBI_TIMING_FASTEST
sahilmgandhi 18:6a4db94011d3 39 * - \ref EBI_TIMING_VERYFAST
sahilmgandhi 18:6a4db94011d3 40 * - \ref EBI_TIMING_FAST
sahilmgandhi 18:6a4db94011d3 41 * - \ref EBI_TIMING_NORMAL
sahilmgandhi 18:6a4db94011d3 42 * - \ref EBI_TIMING_SLOW
sahilmgandhi 18:6a4db94011d3 43 * - \ref EBI_TIMING_VERYSLOW
sahilmgandhi 18:6a4db94011d3 44 * - \ref EBI_TIMING_SLOWEST
sahilmgandhi 18:6a4db94011d3 45 * @param[in] u32BusMode Enable EBI separate mode. Valid values are:
sahilmgandhi 18:6a4db94011d3 46 * - \ref EBI_SEPARATEMODE_ENABLE
sahilmgandhi 18:6a4db94011d3 47 * - \ref EBI_SEPARATEMODE_DISABLE
sahilmgandhi 18:6a4db94011d3 48 * @param[in] u32CSActiveLevel CS is active High/Low. Valid values are:
sahilmgandhi 18:6a4db94011d3 49 * - \ref EBI_CS_ACTIVE_HIGH
sahilmgandhi 18:6a4db94011d3 50 * - \ref EBI_CS_ACTIVE_LOW
sahilmgandhi 18:6a4db94011d3 51 * @return none
sahilmgandhi 18:6a4db94011d3 52 */
sahilmgandhi 18:6a4db94011d3 53 void EBI_Open(uint32_t u32Bank, uint32_t u32DataWidth, uint32_t u32TimingClass, uint32_t u32BusMode, uint32_t u32CSActiveLevel)
sahilmgandhi 18:6a4db94011d3 54 {
sahilmgandhi 18:6a4db94011d3 55 /* Enable EBI channel */
sahilmgandhi 18:6a4db94011d3 56 EBI->TCTL[u32Bank] |= EBI_TCTL_CSEN_Msk;
sahilmgandhi 18:6a4db94011d3 57
sahilmgandhi 18:6a4db94011d3 58 /* Configure data bus to 8 or 16bit */
sahilmgandhi 18:6a4db94011d3 59 if(u32DataWidth == EBI_BUSWIDTH_8BIT)
sahilmgandhi 18:6a4db94011d3 60 EBI->TCTL[u32Bank] &= ~EBI_TCTL_DW16_Msk;
sahilmgandhi 18:6a4db94011d3 61 else
sahilmgandhi 18:6a4db94011d3 62 EBI->TCTL[u32Bank] |= EBI_TCTL_DW16_Msk;
sahilmgandhi 18:6a4db94011d3 63
sahilmgandhi 18:6a4db94011d3 64 /* Enable separate mode */
sahilmgandhi 18:6a4db94011d3 65 if(u32BusMode)
sahilmgandhi 18:6a4db94011d3 66 EBI->TCTL[u32Bank] |= EBI_TCTL_SEPEN_Msk;
sahilmgandhi 18:6a4db94011d3 67 else
sahilmgandhi 18:6a4db94011d3 68 EBI->TCTL[u32Bank] &= ~EBI_TCTL_SEPEN_Msk;
sahilmgandhi 18:6a4db94011d3 69
sahilmgandhi 18:6a4db94011d3 70 /* Setup active level of chip select */
sahilmgandhi 18:6a4db94011d3 71 switch(u32Bank) {
sahilmgandhi 18:6a4db94011d3 72 case EBI_BANK0:
sahilmgandhi 18:6a4db94011d3 73 if(u32CSActiveLevel)
sahilmgandhi 18:6a4db94011d3 74 EBI->CTL |= (0x1ul << EBI_CTL_CSPOLINV_Pos);
sahilmgandhi 18:6a4db94011d3 75 else
sahilmgandhi 18:6a4db94011d3 76 EBI->CTL &= ~(0x1ul << EBI_CTL_CSPOLINV_Pos);
sahilmgandhi 18:6a4db94011d3 77 break;
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 case EBI_BANK1:
sahilmgandhi 18:6a4db94011d3 80 if(u32CSActiveLevel)
sahilmgandhi 18:6a4db94011d3 81 EBI->CTL |= (0x2ul << EBI_CTL_CSPOLINV_Pos);
sahilmgandhi 18:6a4db94011d3 82 else
sahilmgandhi 18:6a4db94011d3 83 EBI->CTL &= ~(0x2ul << EBI_CTL_CSPOLINV_Pos);
sahilmgandhi 18:6a4db94011d3 84 break;
sahilmgandhi 18:6a4db94011d3 85
sahilmgandhi 18:6a4db94011d3 86 case EBI_BANK2:
sahilmgandhi 18:6a4db94011d3 87 if(u32CSActiveLevel)
sahilmgandhi 18:6a4db94011d3 88 EBI->CTL |= (0x4ul << EBI_CTL_CSPOLINV_Pos);
sahilmgandhi 18:6a4db94011d3 89 else
sahilmgandhi 18:6a4db94011d3 90 EBI->CTL &= ~(0x4ul << EBI_CTL_CSPOLINV_Pos);
sahilmgandhi 18:6a4db94011d3 91 break;
sahilmgandhi 18:6a4db94011d3 92
sahilmgandhi 18:6a4db94011d3 93 case EBI_BANK3:
sahilmgandhi 18:6a4db94011d3 94 if(u32CSActiveLevel)
sahilmgandhi 18:6a4db94011d3 95 EBI->CTL |= (0x8ul << EBI_CTL_CSPOLINV_Pos);
sahilmgandhi 18:6a4db94011d3 96 else
sahilmgandhi 18:6a4db94011d3 97 EBI->CTL &= ~(0x8ul << EBI_CTL_CSPOLINV_Pos);
sahilmgandhi 18:6a4db94011d3 98 break;
sahilmgandhi 18:6a4db94011d3 99 }
sahilmgandhi 18:6a4db94011d3 100
sahilmgandhi 18:6a4db94011d3 101 /* Clear R2R/R2W/R2X/TAHD/TACC/TALE entries for safety */
sahilmgandhi 18:6a4db94011d3 102 EBI->TCTL[u32Bank] &= ~0x0F0FF7FF;
sahilmgandhi 18:6a4db94011d3 103
sahilmgandhi 18:6a4db94011d3 104 /* Setup EBI timing */
sahilmgandhi 18:6a4db94011d3 105 switch(u32TimingClass) {
sahilmgandhi 18:6a4db94011d3 106 case EBI_TIMING_FASTEST:
sahilmgandhi 18:6a4db94011d3 107 EBI->CTL = (EBI->CTL & ~EBI_CTL_MCLKDIV_Msk) | ( EBI_MCLKDIV_1 << 8);
sahilmgandhi 18:6a4db94011d3 108 break;
sahilmgandhi 18:6a4db94011d3 109
sahilmgandhi 18:6a4db94011d3 110 case EBI_TIMING_VERYFAST:
sahilmgandhi 18:6a4db94011d3 111 EBI->CTL = (EBI->CTL & ~EBI_CTL_MCLKDIV_Msk) | ( EBI_MCLKDIV_1 << 8);
sahilmgandhi 18:6a4db94011d3 112 EBI->TCTL[u32Bank] |= 0x0303331B;
sahilmgandhi 18:6a4db94011d3 113 break;
sahilmgandhi 18:6a4db94011d3 114
sahilmgandhi 18:6a4db94011d3 115 case EBI_TIMING_FAST:
sahilmgandhi 18:6a4db94011d3 116 EBI->CTL = (EBI->CTL & ~EBI_CTL_MCLKDIV_Msk) | ( EBI_MCLKDIV_2 << 8);
sahilmgandhi 18:6a4db94011d3 117 break;
sahilmgandhi 18:6a4db94011d3 118
sahilmgandhi 18:6a4db94011d3 119 case EBI_TIMING_NORMAL:
sahilmgandhi 18:6a4db94011d3 120 EBI->CTL = (EBI->CTL & ~EBI_CTL_MCLKDIV_Msk) | ( EBI_MCLKDIV_2 << 8);
sahilmgandhi 18:6a4db94011d3 121 EBI->TCTL[u32Bank] |= 0x0303331B;
sahilmgandhi 18:6a4db94011d3 122 break;
sahilmgandhi 18:6a4db94011d3 123
sahilmgandhi 18:6a4db94011d3 124 case EBI_TIMING_SLOW:
sahilmgandhi 18:6a4db94011d3 125 EBI->CTL = (EBI->CTL & ~EBI_CTL_MCLKDIV_Msk) | ( EBI_MCLKDIV_2 << 8);
sahilmgandhi 18:6a4db94011d3 126 EBI->TCTL[u32Bank] |= 0x0707773F;
sahilmgandhi 18:6a4db94011d3 127 break;
sahilmgandhi 18:6a4db94011d3 128
sahilmgandhi 18:6a4db94011d3 129 case EBI_TIMING_VERYSLOW:
sahilmgandhi 18:6a4db94011d3 130 EBI->CTL = (EBI->CTL & ~EBI_CTL_MCLKDIV_Msk) | ( EBI_MCLKDIV_4 << 8);
sahilmgandhi 18:6a4db94011d3 131 EBI->TCTL[u32Bank] |= 0x0707773F;
sahilmgandhi 18:6a4db94011d3 132 break;
sahilmgandhi 18:6a4db94011d3 133
sahilmgandhi 18:6a4db94011d3 134 case EBI_TIMING_SLOWEST:
sahilmgandhi 18:6a4db94011d3 135 EBI->CTL = (EBI->CTL & ~EBI_CTL_MCLKDIV_Msk) | ( EBI_MCLKDIV_8 << 8);
sahilmgandhi 18:6a4db94011d3 136 EBI->TCTL[u32Bank] |= 0x0707773F;
sahilmgandhi 18:6a4db94011d3 137 break;
sahilmgandhi 18:6a4db94011d3 138 }
sahilmgandhi 18:6a4db94011d3 139 }
sahilmgandhi 18:6a4db94011d3 140
sahilmgandhi 18:6a4db94011d3 141 /**
sahilmgandhi 18:6a4db94011d3 142 * @brief Disable EBI for bank 0~3.
sahilmgandhi 18:6a4db94011d3 143 * @param[in] u32Bank Bank number for EBI. Valid values are:
sahilmgandhi 18:6a4db94011d3 144 * - \ref EBI_BANK0
sahilmgandhi 18:6a4db94011d3 145 * - \ref EBI_BANK1
sahilmgandhi 18:6a4db94011d3 146 * - \ref EBI_BANK2
sahilmgandhi 18:6a4db94011d3 147 * - \ref EBI_BANK3
sahilmgandhi 18:6a4db94011d3 148 * @return none
sahilmgandhi 18:6a4db94011d3 149 */
sahilmgandhi 18:6a4db94011d3 150 void EBI_Close(uint32_t u32Bank)
sahilmgandhi 18:6a4db94011d3 151 {
sahilmgandhi 18:6a4db94011d3 152 EBI->TCTL[u32Bank] &= ~EBI_TCTL_CSEN_Msk;
sahilmgandhi 18:6a4db94011d3 153 }
sahilmgandhi 18:6a4db94011d3 154
sahilmgandhi 18:6a4db94011d3 155 /**
sahilmgandhi 18:6a4db94011d3 156 * @brief Set EBI bus timings
sahilmgandhi 18:6a4db94011d3 157 * @param[in] u32Bank Bank number for EBI. Valid values are:
sahilmgandhi 18:6a4db94011d3 158 * - \ref EBI_BANK0
sahilmgandhi 18:6a4db94011d3 159 * - \ref EBI_BANK1
sahilmgandhi 18:6a4db94011d3 160 * - \ref EBI_BANK2
sahilmgandhi 18:6a4db94011d3 161 * - \ref EBI_BANK3
sahilmgandhi 18:6a4db94011d3 162 * @param[in] u32TimingConfig The new EBI timing settings.
sahilmgandhi 18:6a4db94011d3 163 * @param[in] u32MclkDiv Divider for MCLK. Valid values are:
sahilmgandhi 18:6a4db94011d3 164 * - \ref EBI_MCLKDIV_1
sahilmgandhi 18:6a4db94011d3 165 * - \ref EBI_MCLKDIV_2
sahilmgandhi 18:6a4db94011d3 166 * - \ref EBI_MCLKDIV_4
sahilmgandhi 18:6a4db94011d3 167 * - \ref EBI_MCLKDIV_8
sahilmgandhi 18:6a4db94011d3 168 * - \ref EBI_MCLKDIV_16
sahilmgandhi 18:6a4db94011d3 169 * - \ref EBI_MCLKDIV_32
sahilmgandhi 18:6a4db94011d3 170 * @return none
sahilmgandhi 18:6a4db94011d3 171 */
sahilmgandhi 18:6a4db94011d3 172 void EBI_SetBusTiming(uint32_t u32Bank, uint32_t u32TimingConfig, uint32_t u32MclkDiv)
sahilmgandhi 18:6a4db94011d3 173 {
sahilmgandhi 18:6a4db94011d3 174 EBI->CTL = (EBI->CTL & ~EBI_CTL_MCLKDIV_Msk) | (u32MclkDiv << EBI_CTL_MCLKDIV_Pos);
sahilmgandhi 18:6a4db94011d3 175 EBI->TCTL[u32Bank] |= u32TimingConfig;
sahilmgandhi 18:6a4db94011d3 176 }
sahilmgandhi 18:6a4db94011d3 177
sahilmgandhi 18:6a4db94011d3 178 /**
sahilmgandhi 18:6a4db94011d3 179 * @brief Enable encrypt/decrypt function and set key for EBI bank 0~3.
sahilmgandhi 18:6a4db94011d3 180 * @param[in] u32Bank Bank number for EBI. Valid values are:
sahilmgandhi 18:6a4db94011d3 181 * - \ref EBI_BANK0
sahilmgandhi 18:6a4db94011d3 182 * - \ref EBI_BANK1
sahilmgandhi 18:6a4db94011d3 183 * - \ref EBI_BANK2
sahilmgandhi 18:6a4db94011d3 184 * - \ref EBI_BANK3
sahilmgandhi 18:6a4db94011d3 185 * @param[in] *u32Key 128-bits encrypt/decrypt key array.
sahilmgandhi 18:6a4db94011d3 186 * @return none
sahilmgandhi 18:6a4db94011d3 187 */
sahilmgandhi 18:6a4db94011d3 188 void EBI_EnableCrypto(uint32_t u32Bank, uint32_t *u32Key)
sahilmgandhi 18:6a4db94011d3 189 {
sahilmgandhi 18:6a4db94011d3 190 switch(u32Bank) {
sahilmgandhi 18:6a4db94011d3 191 case EBI_BANK0:
sahilmgandhi 18:6a4db94011d3 192 EBI->CTL |= (0x1ul << EBI_CTL_CRYPTOEN_Pos);
sahilmgandhi 18:6a4db94011d3 193 break;
sahilmgandhi 18:6a4db94011d3 194 case EBI_BANK1:
sahilmgandhi 18:6a4db94011d3 195 EBI->CTL |= (0x2ul << EBI_CTL_CRYPTOEN_Pos);
sahilmgandhi 18:6a4db94011d3 196 break;
sahilmgandhi 18:6a4db94011d3 197 case EBI_BANK2:
sahilmgandhi 18:6a4db94011d3 198 EBI->CTL |= (0x4ul << EBI_CTL_CRYPTOEN_Pos);
sahilmgandhi 18:6a4db94011d3 199 break;
sahilmgandhi 18:6a4db94011d3 200 case EBI_BANK3:
sahilmgandhi 18:6a4db94011d3 201 EBI->CTL |= (0x8ul << EBI_CTL_CRYPTOEN_Pos);
sahilmgandhi 18:6a4db94011d3 202 break;
sahilmgandhi 18:6a4db94011d3 203 }
sahilmgandhi 18:6a4db94011d3 204
sahilmgandhi 18:6a4db94011d3 205 /* Setup 128-bits key */
sahilmgandhi 18:6a4db94011d3 206 EBI->KEY0 = u32Key[0];
sahilmgandhi 18:6a4db94011d3 207 EBI->KEY1 = u32Key[1];
sahilmgandhi 18:6a4db94011d3 208 EBI->KEY2 = u32Key[2];
sahilmgandhi 18:6a4db94011d3 209 EBI->KEY3 = u32Key[3];
sahilmgandhi 18:6a4db94011d3 210 }
sahilmgandhi 18:6a4db94011d3 211
sahilmgandhi 18:6a4db94011d3 212 /**
sahilmgandhi 18:6a4db94011d3 213 * @brief Disable encrypt/decrypt function for EBI bank 0~3.
sahilmgandhi 18:6a4db94011d3 214 * @param[in] u32Bank Bank number for EBI. Valid values are:
sahilmgandhi 18:6a4db94011d3 215 * - \ref EBI_BANK0
sahilmgandhi 18:6a4db94011d3 216 * - \ref EBI_BANK1
sahilmgandhi 18:6a4db94011d3 217 * - \ref EBI_BANK2
sahilmgandhi 18:6a4db94011d3 218 * - \ref EBI_BANK3
sahilmgandhi 18:6a4db94011d3 219 * @return none
sahilmgandhi 18:6a4db94011d3 220 */
sahilmgandhi 18:6a4db94011d3 221 void EBI_DisbleCrypto(uint32_t u32Bank)
sahilmgandhi 18:6a4db94011d3 222 {
sahilmgandhi 18:6a4db94011d3 223 switch(u32Bank) {
sahilmgandhi 18:6a4db94011d3 224 case EBI_BANK0:
sahilmgandhi 18:6a4db94011d3 225 EBI->CTL &= ~(0x1ul << EBI_CTL_CRYPTOEN_Pos);
sahilmgandhi 18:6a4db94011d3 226 break;
sahilmgandhi 18:6a4db94011d3 227 case EBI_BANK1:
sahilmgandhi 18:6a4db94011d3 228 EBI->CTL &= ~(0x2ul << EBI_CTL_CRYPTOEN_Pos);
sahilmgandhi 18:6a4db94011d3 229 break;
sahilmgandhi 18:6a4db94011d3 230 case EBI_BANK2:
sahilmgandhi 18:6a4db94011d3 231 EBI->CTL &= ~(0x4ul << EBI_CTL_CRYPTOEN_Pos);
sahilmgandhi 18:6a4db94011d3 232 break;
sahilmgandhi 18:6a4db94011d3 233 case EBI_BANK3:
sahilmgandhi 18:6a4db94011d3 234 EBI->CTL &= ~(0x8ul << EBI_CTL_CRYPTOEN_Pos);
sahilmgandhi 18:6a4db94011d3 235 break;
sahilmgandhi 18:6a4db94011d3 236 }
sahilmgandhi 18:6a4db94011d3 237 }
sahilmgandhi 18:6a4db94011d3 238
sahilmgandhi 18:6a4db94011d3 239 /*@}*/ /* end of group NUC472_442_EBI_EXPORTED_FUNCTIONS */
sahilmgandhi 18:6a4db94011d3 240
sahilmgandhi 18:6a4db94011d3 241 /*@}*/ /* end of group NUC472_442_EBI_Driver */
sahilmgandhi 18:6a4db94011d3 242
sahilmgandhi 18:6a4db94011d3 243 /*@}*/ /* end of group NUC472_442_Device_Driver */
sahilmgandhi 18:6a4db94011d3 244
sahilmgandhi 18:6a4db94011d3 245 /*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/