Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* mbed Microcontroller Library
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2015-2016 Nuvoton
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Licensed under the Apache License, Version 2.0 (the "License");
sahilmgandhi 18:6a4db94011d3 5 * you may not use this file except in compliance with the License.
sahilmgandhi 18:6a4db94011d3 6 * You may obtain a copy of the License at
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * http://www.apache.org/licenses/LICENSE-2.0
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * Unless required by applicable law or agreed to in writing, software
sahilmgandhi 18:6a4db94011d3 11 * distributed under the License is distributed on an "AS IS" BASIS,
sahilmgandhi 18:6a4db94011d3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
sahilmgandhi 18:6a4db94011d3 13 * See the License for the specific language governing permissions and
sahilmgandhi 18:6a4db94011d3 14 * limitations under the License.
sahilmgandhi 18:6a4db94011d3 15 */
sahilmgandhi 18:6a4db94011d3 16
sahilmgandhi 18:6a4db94011d3 17 #include "analogin_api.h"
sahilmgandhi 18:6a4db94011d3 18
sahilmgandhi 18:6a4db94011d3 19 #if DEVICE_ANALOGIN
sahilmgandhi 18:6a4db94011d3 20
sahilmgandhi 18:6a4db94011d3 21 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 22 #include "pinmap.h"
sahilmgandhi 18:6a4db94011d3 23 #include "PeripheralPins.h"
sahilmgandhi 18:6a4db94011d3 24 #include "nu_modutil.h"
sahilmgandhi 18:6a4db94011d3 25
sahilmgandhi 18:6a4db94011d3 26 static uint32_t eadc_modinit_mask = 0;
sahilmgandhi 18:6a4db94011d3 27
sahilmgandhi 18:6a4db94011d3 28 static const struct nu_modinit_s adc_modinit_tab[] = {
sahilmgandhi 18:6a4db94011d3 29 {ADC_0_0, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
sahilmgandhi 18:6a4db94011d3 30 {ADC_0_1, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
sahilmgandhi 18:6a4db94011d3 31 {ADC_0_2, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
sahilmgandhi 18:6a4db94011d3 32 {ADC_0_3, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
sahilmgandhi 18:6a4db94011d3 33 {ADC_0_4, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
sahilmgandhi 18:6a4db94011d3 34 {ADC_0_5, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
sahilmgandhi 18:6a4db94011d3 35 {ADC_0_6, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
sahilmgandhi 18:6a4db94011d3 36 {ADC_0_7, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
sahilmgandhi 18:6a4db94011d3 37
sahilmgandhi 18:6a4db94011d3 38 {ADC_1_0, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
sahilmgandhi 18:6a4db94011d3 39 {ADC_1_1, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
sahilmgandhi 18:6a4db94011d3 40 {ADC_1_2, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
sahilmgandhi 18:6a4db94011d3 41 {ADC_1_3, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
sahilmgandhi 18:6a4db94011d3 42 {ADC_1_4, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
sahilmgandhi 18:6a4db94011d3 43 {ADC_1_5, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
sahilmgandhi 18:6a4db94011d3 44 {ADC_1_6, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL},
sahilmgandhi 18:6a4db94011d3 45 {ADC_1_7, EADC_MODULE, CLK_CLKSEL1_ADCSEL_PLL, CLK_CLKDIV0_ADC(5), ADC_RST, EADC0_IRQn, NULL}
sahilmgandhi 18:6a4db94011d3 46 };
sahilmgandhi 18:6a4db94011d3 47
sahilmgandhi 18:6a4db94011d3 48 void analogin_init(analogin_t *obj, PinName pin)
sahilmgandhi 18:6a4db94011d3 49 {
sahilmgandhi 18:6a4db94011d3 50 obj->adc = (ADCName) pinmap_peripheral(pin, PinMap_ADC);
sahilmgandhi 18:6a4db94011d3 51 MBED_ASSERT(obj->adc != (ADCName) NC);
sahilmgandhi 18:6a4db94011d3 52
sahilmgandhi 18:6a4db94011d3 53 const struct nu_modinit_s *modinit = get_modinit(obj->adc, adc_modinit_tab);
sahilmgandhi 18:6a4db94011d3 54 MBED_ASSERT(modinit != NULL);
sahilmgandhi 18:6a4db94011d3 55 MBED_ASSERT(modinit->modname == obj->adc);
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 EADC_T *eadc_base = (EADC_T *) NU_MODBASE(obj->adc);
sahilmgandhi 18:6a4db94011d3 58
sahilmgandhi 18:6a4db94011d3 59 // NOTE: All channels (identified by ADCName) share a ADC module. This reset will also affect other channels of the same ADC module.
sahilmgandhi 18:6a4db94011d3 60 if (! eadc_modinit_mask) {
sahilmgandhi 18:6a4db94011d3 61 // Reset this module if no channel enabled
sahilmgandhi 18:6a4db94011d3 62 SYS_ResetModule(modinit->rsetidx);
sahilmgandhi 18:6a4db94011d3 63
sahilmgandhi 18:6a4db94011d3 64 // Select clock source of paired channels
sahilmgandhi 18:6a4db94011d3 65 CLK_SetModuleClock(modinit->clkidx, modinit->clksrc, modinit->clkdiv);
sahilmgandhi 18:6a4db94011d3 66 // Enable clock of paired channels
sahilmgandhi 18:6a4db94011d3 67 CLK_EnableModuleClock(modinit->clkidx);
sahilmgandhi 18:6a4db94011d3 68
sahilmgandhi 18:6a4db94011d3 69 // Make EADC_module ready to convert
sahilmgandhi 18:6a4db94011d3 70 EADC_Open(eadc_base, 0);
sahilmgandhi 18:6a4db94011d3 71 }
sahilmgandhi 18:6a4db94011d3 72
sahilmgandhi 18:6a4db94011d3 73 uint32_t smp_chn = NU_MODSUBINDEX(obj->adc);
sahilmgandhi 18:6a4db94011d3 74 uint32_t smp_mod = NU_MODINDEX(obj->adc) * 8 + smp_chn;
sahilmgandhi 18:6a4db94011d3 75
sahilmgandhi 18:6a4db94011d3 76 // Wire pinout
sahilmgandhi 18:6a4db94011d3 77 pinmap_pinout(pin, PinMap_ADC);
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 // Configure the sample module Nmod for analog input channel Nch and software trigger source
sahilmgandhi 18:6a4db94011d3 80 EADC_ConfigSampleModule(eadc_base, smp_mod, EADC_SOFTWARE_TRIGGER, smp_chn);
sahilmgandhi 18:6a4db94011d3 81
sahilmgandhi 18:6a4db94011d3 82 eadc_modinit_mask |= 1 << smp_mod;
sahilmgandhi 18:6a4db94011d3 83 }
sahilmgandhi 18:6a4db94011d3 84
sahilmgandhi 18:6a4db94011d3 85 uint16_t analogin_read_u16(analogin_t *obj)
sahilmgandhi 18:6a4db94011d3 86 {
sahilmgandhi 18:6a4db94011d3 87 EADC_T *eadc_base = (EADC_T *) NU_MODBASE(obj->adc);
sahilmgandhi 18:6a4db94011d3 88 uint32_t smp_chn = NU_MODSUBINDEX(obj->adc);
sahilmgandhi 18:6a4db94011d3 89 uint32_t smp_mod = NU_MODINDEX(obj->adc) * 8 + smp_chn;
sahilmgandhi 18:6a4db94011d3 90
sahilmgandhi 18:6a4db94011d3 91 EADC_START_CONV(eadc_base, 1 << smp_mod);
sahilmgandhi 18:6a4db94011d3 92 while (EADC_GET_DATA_VALID_FLAG(eadc_base, 1 << smp_mod) != (1 << smp_mod));
sahilmgandhi 18:6a4db94011d3 93 uint16_t conv_res_12 = EADC_GET_CONV_DATA(eadc_base, smp_mod);
sahilmgandhi 18:6a4db94011d3 94 // Just 12 bits are effective. Convert to 16 bits.
sahilmgandhi 18:6a4db94011d3 95 // conv_res_12: 0000 b11b10b9b8 b7b6b5b4 b3b2b1b0
sahilmgandhi 18:6a4db94011d3 96 // conv_res_16: b11b10b9b8 b7b6b5b4 b3b2b1b0 b11b10b9b8
sahilmgandhi 18:6a4db94011d3 97 uint16_t conv_res_16 = (conv_res_12 << 4) | (conv_res_12 >> 8);
sahilmgandhi 18:6a4db94011d3 98
sahilmgandhi 18:6a4db94011d3 99 return conv_res_16;
sahilmgandhi 18:6a4db94011d3 100 }
sahilmgandhi 18:6a4db94011d3 101
sahilmgandhi 18:6a4db94011d3 102 float analogin_read(analogin_t *obj)
sahilmgandhi 18:6a4db94011d3 103 {
sahilmgandhi 18:6a4db94011d3 104 uint16_t value = analogin_read_u16(obj);
sahilmgandhi 18:6a4db94011d3 105 return (float) value * (1.0f / (float) 0xFFFF);
sahilmgandhi 18:6a4db94011d3 106 }
sahilmgandhi 18:6a4db94011d3 107
sahilmgandhi 18:6a4db94011d3 108 #endif