MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NUVOTON/TARGET_M451/device/StdDriver/m451_i2c.h@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /**************************************************************************//**
sahilmgandhi 18:6a4db94011d3 2 * @file I2C.h
sahilmgandhi 18:6a4db94011d3 3 * @version V3.0
sahilmgandhi 18:6a4db94011d3 4 * $Revision: 19 $
sahilmgandhi 18:6a4db94011d3 5 * $Date: 15/08/11 10:26a $
sahilmgandhi 18:6a4db94011d3 6 * @brief M451 Series I2C Driver Header File
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * @note
sahilmgandhi 18:6a4db94011d3 9 * Copyright (C) 2014~2015 Nuvoton Technology Corp. All rights reserved.
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 ******************************************************************************/
sahilmgandhi 18:6a4db94011d3 12 #ifndef __I2C_H__
sahilmgandhi 18:6a4db94011d3 13 #define __I2C_H__
sahilmgandhi 18:6a4db94011d3 14
sahilmgandhi 18:6a4db94011d3 15 #include "M451Series.h"
sahilmgandhi 18:6a4db94011d3 16
sahilmgandhi 18:6a4db94011d3 17 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 18 extern "C"
sahilmgandhi 18:6a4db94011d3 19 {
sahilmgandhi 18:6a4db94011d3 20 #endif
sahilmgandhi 18:6a4db94011d3 21
sahilmgandhi 18:6a4db94011d3 22
sahilmgandhi 18:6a4db94011d3 23 /** @addtogroup Standard_Driver Standard Driver
sahilmgandhi 18:6a4db94011d3 24 @{
sahilmgandhi 18:6a4db94011d3 25 */
sahilmgandhi 18:6a4db94011d3 26
sahilmgandhi 18:6a4db94011d3 27 /** @addtogroup I2C_Driver I2C Driver
sahilmgandhi 18:6a4db94011d3 28 @{
sahilmgandhi 18:6a4db94011d3 29 */
sahilmgandhi 18:6a4db94011d3 30
sahilmgandhi 18:6a4db94011d3 31 /** @addtogroup I2C_EXPORTED_CONSTANTS I2C Exported Constants
sahilmgandhi 18:6a4db94011d3 32 @{
sahilmgandhi 18:6a4db94011d3 33 */
sahilmgandhi 18:6a4db94011d3 34
sahilmgandhi 18:6a4db94011d3 35 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 36 /* I2C_CTL constant definitions. */
sahilmgandhi 18:6a4db94011d3 37 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 38 #define I2C_CTL_STA_STO_SI 0x38UL /*!< I2C_CTL setting for I2C control bits. It would set STA, STO and SI bits */
sahilmgandhi 18:6a4db94011d3 39 #define I2C_CTL_STA_STO_SI_AA 0x3CUL /*!< I2C_CTL setting for I2C control bits. It would set STA, STO, SI and AA bits */
sahilmgandhi 18:6a4db94011d3 40 #define I2C_CTL_STA_SI 0x28UL /*!< I2C_CTL setting for I2C control bits. It would set STA and SI bits */
sahilmgandhi 18:6a4db94011d3 41 #define I2C_CTL_STA_SI_AA 0x2CUL /*!< I2C_CTL setting for I2C control bits. It would set STA, SI and AA bits */
sahilmgandhi 18:6a4db94011d3 42 #define I2C_CTL_STO_SI 0x18UL /*!< I2C_CTL setting for I2C control bits. It would set STO and SI bits */
sahilmgandhi 18:6a4db94011d3 43 #define I2C_CTL_STO_SI_AA 0x1CUL /*!< I2C_CTL setting for I2C control bits. It would set STO, SI and AA bits */
sahilmgandhi 18:6a4db94011d3 44 #define I2C_CTL_SI 0x08UL /*!< I2C_CTL setting for I2C control bits. It would set SI bit */
sahilmgandhi 18:6a4db94011d3 45 #define I2C_CTL_SI_AA 0x0CUL /*!< I2C_CTL setting for I2C control bits. It would set SI and AA bits */
sahilmgandhi 18:6a4db94011d3 46 #define I2C_CTL_STA 0x20UL /*!< I2C_CTL setting for I2C control bits. It would set STA bit */
sahilmgandhi 18:6a4db94011d3 47 #define I2C_CTL_STO 0x10UL /*!< I2C_CTL setting for I2C control bits. It would set STO bit */
sahilmgandhi 18:6a4db94011d3 48 #define I2C_CTL_AA 0x04UL /*!< I2C_CTL setting for I2C control bits. It would set AA bit */
sahilmgandhi 18:6a4db94011d3 49
sahilmgandhi 18:6a4db94011d3 50 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 51 /* I2C GCMode constant definitions. */
sahilmgandhi 18:6a4db94011d3 52 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 53 #define I2C_GCMODE_ENABLE 1 /*!< Enable I2C GC Mode */
sahilmgandhi 18:6a4db94011d3 54 #define I2C_GCMODE_DISABLE 0 /*!< Disable I2C GC Mode */
sahilmgandhi 18:6a4db94011d3 55
sahilmgandhi 18:6a4db94011d3 56 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 57 /* I2C SMBUS constant definitions. */
sahilmgandhi 18:6a4db94011d3 58 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 59 #define I2C_SMBH_ENABLE 1 /*!< Enable SMBus Host Mode enable */
sahilmgandhi 18:6a4db94011d3 60 #define I2C_SMBD_ENABLE 0 /*!< Enable SMBus Device Mode enable */
sahilmgandhi 18:6a4db94011d3 61 #define I2C_PECTX_ENABLE 1 /*!< Enable SMBus Packet Error Check Transmit function */
sahilmgandhi 18:6a4db94011d3 62 #define I2C_PECTX_DISABLE 0 /*!< Disable SMBus Packet Error Check Transmit function */
sahilmgandhi 18:6a4db94011d3 63
sahilmgandhi 18:6a4db94011d3 64 /*@}*/ /* end of group I2C_EXPORTED_CONSTANTS */
sahilmgandhi 18:6a4db94011d3 65
sahilmgandhi 18:6a4db94011d3 66 /** @addtogroup I2C_EXPORTED_FUNCTIONS I2C Exported Functions
sahilmgandhi 18:6a4db94011d3 67 @{
sahilmgandhi 18:6a4db94011d3 68 */
sahilmgandhi 18:6a4db94011d3 69 /**
sahilmgandhi 18:6a4db94011d3 70 * @brief The macro is used to set I2C bus condition at One Time
sahilmgandhi 18:6a4db94011d3 71 *
sahilmgandhi 18:6a4db94011d3 72 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 73 * @param[in] u8Ctrl A byte writes to I2C control register
sahilmgandhi 18:6a4db94011d3 74 *
sahilmgandhi 18:6a4db94011d3 75 * @return None
sahilmgandhi 18:6a4db94011d3 76 *
sahilmgandhi 18:6a4db94011d3 77 * @details Set I2C_CTL register to control I2C bus conditions of START, STOP, SI, ACK.
sahilmgandhi 18:6a4db94011d3 78 */
sahilmgandhi 18:6a4db94011d3 79 #define I2C_SET_CONTROL_REG(i2c, u8Ctrl) ((i2c)->CTL = ((i2c)->CTL & ~0x3c) | (u8Ctrl))
sahilmgandhi 18:6a4db94011d3 80
sahilmgandhi 18:6a4db94011d3 81 /**
sahilmgandhi 18:6a4db94011d3 82 * @brief The macro is used to set START condition of I2C Bus
sahilmgandhi 18:6a4db94011d3 83 *
sahilmgandhi 18:6a4db94011d3 84 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 85 *
sahilmgandhi 18:6a4db94011d3 86 * @return None
sahilmgandhi 18:6a4db94011d3 87 *
sahilmgandhi 18:6a4db94011d3 88 * @details Set the I2C bus START condition in I2C_CTL register.
sahilmgandhi 18:6a4db94011d3 89 */
sahilmgandhi 18:6a4db94011d3 90 #define I2C_START(i2c) ((i2c)->CTL = ((i2c)->CTL & ~I2C_CTL_SI_Msk) | I2C_CTL_STA_Msk)
sahilmgandhi 18:6a4db94011d3 91
sahilmgandhi 18:6a4db94011d3 92 /**
sahilmgandhi 18:6a4db94011d3 93 * @brief The macro is used to wait I2C bus status get ready
sahilmgandhi 18:6a4db94011d3 94 *
sahilmgandhi 18:6a4db94011d3 95 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 96 *
sahilmgandhi 18:6a4db94011d3 97 * @return None
sahilmgandhi 18:6a4db94011d3 98 *
sahilmgandhi 18:6a4db94011d3 99 * @details When a new status is presented of I2C bus, the SI flag will be set in I2C_CTL register.
sahilmgandhi 18:6a4db94011d3 100 */
sahilmgandhi 18:6a4db94011d3 101 #define I2C_WAIT_READY(i2c) while(!((i2c)->CTL & I2C_CTL_SI_Msk))
sahilmgandhi 18:6a4db94011d3 102
sahilmgandhi 18:6a4db94011d3 103 /**
sahilmgandhi 18:6a4db94011d3 104 * @brief The macro is used to Read I2C Bus Data Register
sahilmgandhi 18:6a4db94011d3 105 *
sahilmgandhi 18:6a4db94011d3 106 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 107 *
sahilmgandhi 18:6a4db94011d3 108 * @return A byte of I2C data register
sahilmgandhi 18:6a4db94011d3 109 *
sahilmgandhi 18:6a4db94011d3 110 * @details I2C controller read data from bus and save it in I2CDAT register.
sahilmgandhi 18:6a4db94011d3 111 */
sahilmgandhi 18:6a4db94011d3 112 #define I2C_GET_DATA(i2c) ((i2c)->DAT)
sahilmgandhi 18:6a4db94011d3 113
sahilmgandhi 18:6a4db94011d3 114 /**
sahilmgandhi 18:6a4db94011d3 115 * @brief Write a Data to I2C Data Register
sahilmgandhi 18:6a4db94011d3 116 *
sahilmgandhi 18:6a4db94011d3 117 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 118 * @param[in] u8Data A byte that writes to data register
sahilmgandhi 18:6a4db94011d3 119 *
sahilmgandhi 18:6a4db94011d3 120 * @return None
sahilmgandhi 18:6a4db94011d3 121 *
sahilmgandhi 18:6a4db94011d3 122 * @details When write a data to I2C_DAT register, the I2C controller will shift it to I2C bus.
sahilmgandhi 18:6a4db94011d3 123 */
sahilmgandhi 18:6a4db94011d3 124 #define I2C_SET_DATA(i2c, u8Data) ((i2c)->DAT = (u8Data))
sahilmgandhi 18:6a4db94011d3 125
sahilmgandhi 18:6a4db94011d3 126 /**
sahilmgandhi 18:6a4db94011d3 127 * @brief Get I2C Bus status code
sahilmgandhi 18:6a4db94011d3 128 *
sahilmgandhi 18:6a4db94011d3 129 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 130 *
sahilmgandhi 18:6a4db94011d3 131 * @return I2C status code
sahilmgandhi 18:6a4db94011d3 132 *
sahilmgandhi 18:6a4db94011d3 133 * @details To get this status code to monitor I2C bus event.
sahilmgandhi 18:6a4db94011d3 134 */
sahilmgandhi 18:6a4db94011d3 135 #define I2C_GET_STATUS(i2c) ((i2c)->STATUS)
sahilmgandhi 18:6a4db94011d3 136
sahilmgandhi 18:6a4db94011d3 137 /**
sahilmgandhi 18:6a4db94011d3 138 * @brief Get Time-out flag from I2C Bus
sahilmgandhi 18:6a4db94011d3 139 *
sahilmgandhi 18:6a4db94011d3 140 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 141 *
sahilmgandhi 18:6a4db94011d3 142 * @retval 0 I2C Bus time-out is not happened
sahilmgandhi 18:6a4db94011d3 143 * @retval 1 I2C Bus time-out is happened
sahilmgandhi 18:6a4db94011d3 144 *
sahilmgandhi 18:6a4db94011d3 145 * @details When I2C bus occurs time-out event, the time-out flag will be set.
sahilmgandhi 18:6a4db94011d3 146 */
sahilmgandhi 18:6a4db94011d3 147 #define I2C_GET_TIMEOUT_FLAG(i2c) ( ((i2c)->TOCTL & I2C_TOCTL_TOIF_Msk) == I2C_TOCTL_TOIF_Msk ? 1:0 )
sahilmgandhi 18:6a4db94011d3 148
sahilmgandhi 18:6a4db94011d3 149 /**
sahilmgandhi 18:6a4db94011d3 150 * @brief To get wake-up flag from I2C Bus
sahilmgandhi 18:6a4db94011d3 151 *
sahilmgandhi 18:6a4db94011d3 152 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 153 *
sahilmgandhi 18:6a4db94011d3 154 * @retval 0 Chip is not woken-up from power-down mode
sahilmgandhi 18:6a4db94011d3 155 * @retval 1 Chip is woken-up from power-down mode
sahilmgandhi 18:6a4db94011d3 156 *
sahilmgandhi 18:6a4db94011d3 157 * @details I2C bus occurs wake-up event, wake-up flag will be set.
sahilmgandhi 18:6a4db94011d3 158 */
sahilmgandhi 18:6a4db94011d3 159 #define I2C_GET_WAKEUP_FLAG(i2c) ( ((i2c)->WKSTS & I2C_WKSTS_WKIF_Msk) == I2C_WKSTS_WKIF_Msk ? 1:0 )
sahilmgandhi 18:6a4db94011d3 160
sahilmgandhi 18:6a4db94011d3 161 /**
sahilmgandhi 18:6a4db94011d3 162 * @brief To clear wake-up flag
sahilmgandhi 18:6a4db94011d3 163 *
sahilmgandhi 18:6a4db94011d3 164 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 165 *
sahilmgandhi 18:6a4db94011d3 166 * @return None
sahilmgandhi 18:6a4db94011d3 167 *
sahilmgandhi 18:6a4db94011d3 168 * @details If wake-up flag is set, use this macro to clear it.
sahilmgandhi 18:6a4db94011d3 169 */
sahilmgandhi 18:6a4db94011d3 170 #define I2C_CLEAR_WAKEUP_FLAG(i2c) ((i2c)->WKSTS = I2C_WKSTS_WKIF_Msk)
sahilmgandhi 18:6a4db94011d3 171
sahilmgandhi 18:6a4db94011d3 172 /**
sahilmgandhi 18:6a4db94011d3 173 * @brief To get SMBus Status
sahilmgandhi 18:6a4db94011d3 174 *
sahilmgandhi 18:6a4db94011d3 175 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 176 *
sahilmgandhi 18:6a4db94011d3 177 * @return SMBus status
sahilmgandhi 18:6a4db94011d3 178 *
sahilmgandhi 18:6a4db94011d3 179 * @details To get the Bus Management status of I2C_BUSSTS register
sahilmgandhi 18:6a4db94011d3 180 *
sahilmgandhi 18:6a4db94011d3 181 */
sahilmgandhi 18:6a4db94011d3 182 #define I2C_SMBUS_GET_STATUS(i2c) ((i2c)->BUSSTS)
sahilmgandhi 18:6a4db94011d3 183
sahilmgandhi 18:6a4db94011d3 184 /**
sahilmgandhi 18:6a4db94011d3 185 * @brief Get SMBus CRC value
sahilmgandhi 18:6a4db94011d3 186 *
sahilmgandhi 18:6a4db94011d3 187 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 188 *
sahilmgandhi 18:6a4db94011d3 189 * @return Packet error check byte value
sahilmgandhi 18:6a4db94011d3 190 *
sahilmgandhi 18:6a4db94011d3 191 * @details The CRC check value after a transmission or a reception by count by using CRC8
sahilmgandhi 18:6a4db94011d3 192 *
sahilmgandhi 18:6a4db94011d3 193 */
sahilmgandhi 18:6a4db94011d3 194 #define I2C_SMBUS_GET_PEC_VALUE(i2c) ((i2c)->PKTCRC)
sahilmgandhi 18:6a4db94011d3 195
sahilmgandhi 18:6a4db94011d3 196 /**
sahilmgandhi 18:6a4db94011d3 197 * @brief Set SMBus Bytes number of Transmission or reception
sahilmgandhi 18:6a4db94011d3 198 *
sahilmgandhi 18:6a4db94011d3 199 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 200 * @param[in] u32PktSize Transmit / Receive bytes
sahilmgandhi 18:6a4db94011d3 201 *
sahilmgandhi 18:6a4db94011d3 202 * @return None
sahilmgandhi 18:6a4db94011d3 203 *
sahilmgandhi 18:6a4db94011d3 204 * @details The transmission or receive byte number in one transaction when PECEN is set. The maximum is 255 bytes.
sahilmgandhi 18:6a4db94011d3 205 *
sahilmgandhi 18:6a4db94011d3 206 */
sahilmgandhi 18:6a4db94011d3 207 #define I2C_SMBUS_SET_PACKET_BYTE_COUNT(i2c, u32PktSize) ((i2c)->PKTSIZE = (u32PktSize))
sahilmgandhi 18:6a4db94011d3 208
sahilmgandhi 18:6a4db94011d3 209 /**
sahilmgandhi 18:6a4db94011d3 210 * @brief Enable SMBus Alert function
sahilmgandhi 18:6a4db94011d3 211 *
sahilmgandhi 18:6a4db94011d3 212 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 213 *
sahilmgandhi 18:6a4db94011d3 214 * @return None
sahilmgandhi 18:6a4db94011d3 215 *
sahilmgandhi 18:6a4db94011d3 216 * @details Device Mode(BMHEN=0): If ALERTEN(I2C_BUSCTL[4]) is set, the Alert pin will pull lo, and reply ACK when get ARP from host
sahilmgandhi 18:6a4db94011d3 217 * Host Mode(BMHEN=1): If ALERTEN(I2C_BUSCTL[4]) is set, the Alert pin is supported to receive alert state(Lo trigger)
sahilmgandhi 18:6a4db94011d3 218 *
sahilmgandhi 18:6a4db94011d3 219 */
sahilmgandhi 18:6a4db94011d3 220 #define I2C_SMBUS_ENABLE_ALERT(i2c) ((i2c)->BUSCTL |= I2C_BUSCTL_ALERTEN_Msk)
sahilmgandhi 18:6a4db94011d3 221
sahilmgandhi 18:6a4db94011d3 222 /**
sahilmgandhi 18:6a4db94011d3 223 * @brief Disable SMBus Alert pin function
sahilmgandhi 18:6a4db94011d3 224 *
sahilmgandhi 18:6a4db94011d3 225 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 226 *
sahilmgandhi 18:6a4db94011d3 227 * @return None
sahilmgandhi 18:6a4db94011d3 228 *
sahilmgandhi 18:6a4db94011d3 229 * @details Device Mode(BMHEN=0): If ALERTEN(I2C_BUSCTL[4]) is clear, the Alert pin will pull hi, and reply NACK when get ARP from host
sahilmgandhi 18:6a4db94011d3 230 * Host Mode(BMHEN=1): If ALERTEN(I2C_BUSCTL[4]) is clear, the Alert pin is not supported to receive alert state(Lo trigger)
sahilmgandhi 18:6a4db94011d3 231 *
sahilmgandhi 18:6a4db94011d3 232 */
sahilmgandhi 18:6a4db94011d3 233 #define I2C_SMBUS_DISABLE_ALERT(i2c) ((i2c)->BUSCTL &= ~I2C_BUSCTL_ALERTEN_Msk)
sahilmgandhi 18:6a4db94011d3 234
sahilmgandhi 18:6a4db94011d3 235 /**
sahilmgandhi 18:6a4db94011d3 236 * @brief Set SMBus SUSCON pin is output mode
sahilmgandhi 18:6a4db94011d3 237 *
sahilmgandhi 18:6a4db94011d3 238 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 239 *
sahilmgandhi 18:6a4db94011d3 240 * @return None
sahilmgandhi 18:6a4db94011d3 241 *
sahilmgandhi 18:6a4db94011d3 242 * @details This function to set SUSCON(I2C_BUSCTL[6]) pin is output mode.
sahilmgandhi 18:6a4db94011d3 243 *
sahilmgandhi 18:6a4db94011d3 244 *
sahilmgandhi 18:6a4db94011d3 245 */
sahilmgandhi 18:6a4db94011d3 246 #define I2C_SMBUS_SET_SUSCON_OUT(i2c) ((i2c)->BUSCTL |= I2C_BUSCTL_SCTLOEN_Msk)
sahilmgandhi 18:6a4db94011d3 247
sahilmgandhi 18:6a4db94011d3 248 /**
sahilmgandhi 18:6a4db94011d3 249 * @brief Set SMBus SUSCON pin is input mode
sahilmgandhi 18:6a4db94011d3 250 *
sahilmgandhi 18:6a4db94011d3 251 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 252 *
sahilmgandhi 18:6a4db94011d3 253 * @return None
sahilmgandhi 18:6a4db94011d3 254 *
sahilmgandhi 18:6a4db94011d3 255 * @details This function to set SUSCON(I2C_BUSCTL[6]) pin is input mode.
sahilmgandhi 18:6a4db94011d3 256 *
sahilmgandhi 18:6a4db94011d3 257 *
sahilmgandhi 18:6a4db94011d3 258 */
sahilmgandhi 18:6a4db94011d3 259 #define I2C_SMBUS_SET_SUSCON_IN(i2c) ((i2c)->BUSCTL &= ~I2C_BUSCTL_SCTLOEN_Msk)
sahilmgandhi 18:6a4db94011d3 260
sahilmgandhi 18:6a4db94011d3 261 /**
sahilmgandhi 18:6a4db94011d3 262 * @brief Set SMBus SUSCON pin output high state
sahilmgandhi 18:6a4db94011d3 263 *
sahilmgandhi 18:6a4db94011d3 264 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 265 *
sahilmgandhi 18:6a4db94011d3 266 * @return None
sahilmgandhi 18:6a4db94011d3 267 *
sahilmgandhi 18:6a4db94011d3 268 * @details This function to set SUSCON(I2C_BUSCTL[6]) pin is output hi state.
sahilmgandhi 18:6a4db94011d3 269 *
sahilmgandhi 18:6a4db94011d3 270 */
sahilmgandhi 18:6a4db94011d3 271 #define I2C_SMBUS_SET_SUSCON_HIGH(i2c) ((i2c)->BUSCTL |= I2C_BUSCTL_SCTLOSTS_Msk)
sahilmgandhi 18:6a4db94011d3 272
sahilmgandhi 18:6a4db94011d3 273
sahilmgandhi 18:6a4db94011d3 274 /**
sahilmgandhi 18:6a4db94011d3 275 * @brief Set SMBus SUSCON pin output low state
sahilmgandhi 18:6a4db94011d3 276 *
sahilmgandhi 18:6a4db94011d3 277 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 278 *
sahilmgandhi 18:6a4db94011d3 279 * @return None
sahilmgandhi 18:6a4db94011d3 280 *
sahilmgandhi 18:6a4db94011d3 281 * @details This function to set SUSCON(I2C_BUSCTL[6]) pin is output lo state.
sahilmgandhi 18:6a4db94011d3 282 *
sahilmgandhi 18:6a4db94011d3 283 */
sahilmgandhi 18:6a4db94011d3 284 #define I2C_SMBUS_SET_SUSCON_LOW(i2c) ((i2c)->BUSCTL &= ~I2C_BUSCTL_SCTLOSTS_Msk)
sahilmgandhi 18:6a4db94011d3 285
sahilmgandhi 18:6a4db94011d3 286 /**
sahilmgandhi 18:6a4db94011d3 287 * @brief Enable SMBus Acknowledge control by manual
sahilmgandhi 18:6a4db94011d3 288 *
sahilmgandhi 18:6a4db94011d3 289 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 290 *
sahilmgandhi 18:6a4db94011d3 291 * @return None
sahilmgandhi 18:6a4db94011d3 292 *
sahilmgandhi 18:6a4db94011d3 293 * @details The 9th bit can response the ACK or NACK according the received data by user. When the byte is received, SCLK line stretching to low between the 8th and 9th SCLK pulse.
sahilmgandhi 18:6a4db94011d3 294 *
sahilmgandhi 18:6a4db94011d3 295 */
sahilmgandhi 18:6a4db94011d3 296 #define I2C_SMBUS_ACK_MANUAL(i2c) ((i2c)->BUSCTL |= I2C_BUSCTL_ACKMEN_Msk)
sahilmgandhi 18:6a4db94011d3 297
sahilmgandhi 18:6a4db94011d3 298 /**
sahilmgandhi 18:6a4db94011d3 299 * @brief Disable SMBus Acknowledge control by manual
sahilmgandhi 18:6a4db94011d3 300 *
sahilmgandhi 18:6a4db94011d3 301 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 302 *
sahilmgandhi 18:6a4db94011d3 303 * @return None
sahilmgandhi 18:6a4db94011d3 304 *
sahilmgandhi 18:6a4db94011d3 305 * @details Disable acknowledge response control by user.
sahilmgandhi 18:6a4db94011d3 306 *
sahilmgandhi 18:6a4db94011d3 307 */
sahilmgandhi 18:6a4db94011d3 308 #define I2C_SMBUS_ACK_AUTO(i2c) ((i2c)->BUSCTL &= ~I2C_BUSCTL_ACKMEN_Msk)
sahilmgandhi 18:6a4db94011d3 309
sahilmgandhi 18:6a4db94011d3 310 /**
sahilmgandhi 18:6a4db94011d3 311 * @brief Enable SMBus Acknowledge manual interrupt
sahilmgandhi 18:6a4db94011d3 312 *
sahilmgandhi 18:6a4db94011d3 313 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 314 *
sahilmgandhi 18:6a4db94011d3 315 * @return None
sahilmgandhi 18:6a4db94011d3 316 *
sahilmgandhi 18:6a4db94011d3 317 * @details This function is used to enable SMBUS acknowledge manual interrupt on the 9th clock cycle when SMBUS=1 and ACKMEN=1
sahilmgandhi 18:6a4db94011d3 318 *
sahilmgandhi 18:6a4db94011d3 319 */
sahilmgandhi 18:6a4db94011d3 320 #define I2C_SMBUS_9THBIT_INT_ENABLE(i2c) ((i2c)->BUSCTL |= I2C_BUSCTL_ACKM9SI_Msk)
sahilmgandhi 18:6a4db94011d3 321
sahilmgandhi 18:6a4db94011d3 322 /**
sahilmgandhi 18:6a4db94011d3 323 * @brief Disable SMBus Acknowledge manual interrupt
sahilmgandhi 18:6a4db94011d3 324 *
sahilmgandhi 18:6a4db94011d3 325 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 326 *
sahilmgandhi 18:6a4db94011d3 327 * @return None
sahilmgandhi 18:6a4db94011d3 328 *
sahilmgandhi 18:6a4db94011d3 329 * @details This function is used to disable SMBUS acknowledge manual interrupt on the 9th clock cycle when SMBUS=1 and ACKMEN=1
sahilmgandhi 18:6a4db94011d3 330 *
sahilmgandhi 18:6a4db94011d3 331 */
sahilmgandhi 18:6a4db94011d3 332 #define I2C_SMBUS_9THBIT_INT_DISABLE(i2c) ((i2c)->BUSCTL &= ~I2C_BUSCTL_ACKM9SI_Msk)
sahilmgandhi 18:6a4db94011d3 333
sahilmgandhi 18:6a4db94011d3 334 /**
sahilmgandhi 18:6a4db94011d3 335 * @brief Enable SMBus PEC clear at REPEAT START
sahilmgandhi 18:6a4db94011d3 336 *
sahilmgandhi 18:6a4db94011d3 337 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 338 *
sahilmgandhi 18:6a4db94011d3 339 * @return None
sahilmgandhi 18:6a4db94011d3 340 *
sahilmgandhi 18:6a4db94011d3 341 * @details This function is used to enable the condition of REAEAT START can clear the PEC calculation.
sahilmgandhi 18:6a4db94011d3 342 *
sahilmgandhi 18:6a4db94011d3 343 */
sahilmgandhi 18:6a4db94011d3 344 #define I2C_SMBUS_RST_PEC_AT_START_ENABLE(i2c) ((i2c)->BUSCTL |= I2C_BUSCTL_PECCLR_Msk)
sahilmgandhi 18:6a4db94011d3 345
sahilmgandhi 18:6a4db94011d3 346 /**
sahilmgandhi 18:6a4db94011d3 347 * @brief Disable SMBus PEC clear at Repeat START
sahilmgandhi 18:6a4db94011d3 348 *
sahilmgandhi 18:6a4db94011d3 349 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 350 *
sahilmgandhi 18:6a4db94011d3 351 * @return None
sahilmgandhi 18:6a4db94011d3 352 *
sahilmgandhi 18:6a4db94011d3 353 * @details This function is used to disable the condition of Repeat START can clear the PEC calculation.
sahilmgandhi 18:6a4db94011d3 354 *
sahilmgandhi 18:6a4db94011d3 355 */
sahilmgandhi 18:6a4db94011d3 356 #define I2C_SMBUS_RST_PEC_AT_START_DISABLE(i2c) ((i2c)->BUSCTL &= ~I2C_BUSCTL_PECCLR_Msk)
sahilmgandhi 18:6a4db94011d3 357
sahilmgandhi 18:6a4db94011d3 358 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 359 /* inline functions */
sahilmgandhi 18:6a4db94011d3 360 /*---------------------------------------------------------------------------------------------------------*/
sahilmgandhi 18:6a4db94011d3 361 /**
sahilmgandhi 18:6a4db94011d3 362 * @brief The macro is used to set STOP condition of I2C Bus
sahilmgandhi 18:6a4db94011d3 363 *
sahilmgandhi 18:6a4db94011d3 364 * @param[in] i2c Specify I2C port
sahilmgandhi 18:6a4db94011d3 365 *
sahilmgandhi 18:6a4db94011d3 366 * @return None
sahilmgandhi 18:6a4db94011d3 367 *
sahilmgandhi 18:6a4db94011d3 368 * @details Set the I2C bus STOP condition in I2C_CTL register.
sahilmgandhi 18:6a4db94011d3 369 */
sahilmgandhi 18:6a4db94011d3 370 static __INLINE void I2C_STOP(I2C_T *i2c)
sahilmgandhi 18:6a4db94011d3 371 {
sahilmgandhi 18:6a4db94011d3 372
sahilmgandhi 18:6a4db94011d3 373 (i2c)->CTL |= (I2C_CTL_SI_Msk | I2C_CTL_STO_Msk);
sahilmgandhi 18:6a4db94011d3 374 while(i2c->CTL & I2C_CTL_STO_Msk);
sahilmgandhi 18:6a4db94011d3 375 }
sahilmgandhi 18:6a4db94011d3 376
sahilmgandhi 18:6a4db94011d3 377 void I2C_ClearTimeoutFlag(I2C_T *i2c);
sahilmgandhi 18:6a4db94011d3 378 void I2C_Close(I2C_T *i2c);
sahilmgandhi 18:6a4db94011d3 379 void I2C_Trigger(I2C_T *i2c, uint8_t u8Start, uint8_t u8Stop, uint8_t u8Si, uint8_t u8Ack);
sahilmgandhi 18:6a4db94011d3 380 void I2C_DisableInt(I2C_T *i2c);
sahilmgandhi 18:6a4db94011d3 381 void I2C_EnableInt(I2C_T *i2c);
sahilmgandhi 18:6a4db94011d3 382 uint32_t I2C_GetBusClockFreq(I2C_T *i2c);
sahilmgandhi 18:6a4db94011d3 383 uint32_t I2C_GetIntFlag(I2C_T *i2c);
sahilmgandhi 18:6a4db94011d3 384 uint32_t I2C_GetStatus(I2C_T *i2c);
sahilmgandhi 18:6a4db94011d3 385 uint32_t I2C_Open(I2C_T *i2c, uint32_t u32BusClock);
sahilmgandhi 18:6a4db94011d3 386 uint8_t I2C_GetData(I2C_T *i2c);
sahilmgandhi 18:6a4db94011d3 387 void I2C_SetSlaveAddr(I2C_T *i2c, uint8_t u8SlaveNo, uint8_t u8SlaveAddr, uint8_t u8GCMode);
sahilmgandhi 18:6a4db94011d3 388 void I2C_SetSlaveAddrMask(I2C_T *i2c, uint8_t u8SlaveNo, uint8_t u8SlaveAddrMask);
sahilmgandhi 18:6a4db94011d3 389 uint32_t I2C_SetBusClockFreq(I2C_T *i2c, uint32_t u32BusClock);
sahilmgandhi 18:6a4db94011d3 390 void I2C_EnableTimeout(I2C_T *i2c, uint8_t u8LongTimeout);
sahilmgandhi 18:6a4db94011d3 391 void I2C_DisableTimeout(I2C_T *i2c);
sahilmgandhi 18:6a4db94011d3 392 void I2C_EnableWakeup(I2C_T *i2c);
sahilmgandhi 18:6a4db94011d3 393 void I2C_DisableWakeup(I2C_T *i2c);
sahilmgandhi 18:6a4db94011d3 394 void I2C_SetData(I2C_T *i2c, uint8_t u8Data);
sahilmgandhi 18:6a4db94011d3 395
sahilmgandhi 18:6a4db94011d3 396 uint32_t I2C_SMBusGetStatus(I2C_T *i2c);
sahilmgandhi 18:6a4db94011d3 397 void I2C_SMBusClearInterruptFlag(I2C_T *i2c, uint8_t u8ClrSMBusIntFlag);
sahilmgandhi 18:6a4db94011d3 398 void I2C_SMBusSetPacketByteCount(I2C_T *i2c, uint32_t u32PktSize);
sahilmgandhi 18:6a4db94011d3 399 void I2C_SMBusOpen(I2C_T *i2c, uint8_t u8HostDevice);
sahilmgandhi 18:6a4db94011d3 400 void I2C_SMBusClose(I2C_T *i2c);
sahilmgandhi 18:6a4db94011d3 401 void I2C_SMBusPECTxEnable(I2C_T *i2c, uint8_t u8PECTxEn);
sahilmgandhi 18:6a4db94011d3 402 uint8_t I2C_SMBusGetPECValue(I2C_T *i2c);
sahilmgandhi 18:6a4db94011d3 403 void I2C_SMBusIdleTimeout(I2C_T *i2c, uint32_t us, uint32_t u32Hclk);
sahilmgandhi 18:6a4db94011d3 404 void I2C_SMBusTimeout(I2C_T *i2c, uint32_t ms, uint32_t u32Pclk);
sahilmgandhi 18:6a4db94011d3 405 void I2C_SMBusClockLoTimeout(I2C_T *i2c, uint32_t ms, uint32_t u32Pclk);
sahilmgandhi 18:6a4db94011d3 406 /*@}*/ /* end of group I2C_EXPORTED_FUNCTIONS */
sahilmgandhi 18:6a4db94011d3 407
sahilmgandhi 18:6a4db94011d3 408 /*@}*/ /* end of group I2C_Driver */
sahilmgandhi 18:6a4db94011d3 409
sahilmgandhi 18:6a4db94011d3 410 /*@}*/ /* end of group Standard_Driver */
sahilmgandhi 18:6a4db94011d3 411
sahilmgandhi 18:6a4db94011d3 412 #ifdef __cplusplus
sahilmgandhi 18:6a4db94011d3 413 }
sahilmgandhi 18:6a4db94011d3 414 #endif
sahilmgandhi 18:6a4db94011d3 415 #endif //__I2C_H__