MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NORDIC/TARGET_NRF5_SDK13/us_ticker.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /*
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2013 Nordic Semiconductor ASA
sahilmgandhi 18:6a4db94011d3 3 * All rights reserved.
sahilmgandhi 18:6a4db94011d3 4 *
sahilmgandhi 18:6a4db94011d3 5 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 6 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * 1. Redistributions of source code must retain the above copyright notice, this list
sahilmgandhi 18:6a4db94011d3 9 * of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
sahilmgandhi 18:6a4db94011d3 12 * integrated circuit in a product or a software update for such product, must reproduce
sahilmgandhi 18:6a4db94011d3 13 * the above copyright notice, this list of conditions and the following disclaimer in
sahilmgandhi 18:6a4db94011d3 14 * the documentation and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 15 *
sahilmgandhi 18:6a4db94011d3 16 * 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
sahilmgandhi 18:6a4db94011d3 17 * used to endorse or promote products derived from this software without specific prior
sahilmgandhi 18:6a4db94011d3 18 * written permission.
sahilmgandhi 18:6a4db94011d3 19 *
sahilmgandhi 18:6a4db94011d3 20 * 4. This software, with or without modification, must only be used with a
sahilmgandhi 18:6a4db94011d3 21 * Nordic Semiconductor ASA integrated circuit.
sahilmgandhi 18:6a4db94011d3 22 *
sahilmgandhi 18:6a4db94011d3 23 * 5. Any software provided in binary or object form under this license must not be reverse
sahilmgandhi 18:6a4db94011d3 24 * engineered, decompiled, modified and/or disassembled.
sahilmgandhi 18:6a4db94011d3 25 *
sahilmgandhi 18:6a4db94011d3 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
sahilmgandhi 18:6a4db94011d3 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
sahilmgandhi 18:6a4db94011d3 28 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 29 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
sahilmgandhi 18:6a4db94011d3 30 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
sahilmgandhi 18:6a4db94011d3 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
sahilmgandhi 18:6a4db94011d3 32 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
sahilmgandhi 18:6a4db94011d3 33 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
sahilmgandhi 18:6a4db94011d3 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
sahilmgandhi 18:6a4db94011d3 35 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 36 *
sahilmgandhi 18:6a4db94011d3 37 */
sahilmgandhi 18:6a4db94011d3 38
sahilmgandhi 18:6a4db94011d3 39 #include "us_ticker_api.h"
sahilmgandhi 18:6a4db94011d3 40 #include "common_rtc.h"
sahilmgandhi 18:6a4db94011d3 41 #include "app_util.h"
sahilmgandhi 18:6a4db94011d3 42 #include "nrf_drv_common.h"
sahilmgandhi 18:6a4db94011d3 43 #include "lp_ticker_api.h"
sahilmgandhi 18:6a4db94011d3 44 #include "mbed_critical.h"
sahilmgandhi 18:6a4db94011d3 45
sahilmgandhi 18:6a4db94011d3 46 #if defined(NRF52_ERRATA_20)
sahilmgandhi 18:6a4db94011d3 47 #include "softdevice_handler.h"
sahilmgandhi 18:6a4db94011d3 48 #endif
sahilmgandhi 18:6a4db94011d3 49
sahilmgandhi 18:6a4db94011d3 50 //------------------------------------------------------------------------------
sahilmgandhi 18:6a4db94011d3 51 // Common stuff used also by lp_ticker and rtc_api (see "common_rtc.h").
sahilmgandhi 18:6a4db94011d3 52 //
sahilmgandhi 18:6a4db94011d3 53 #include "app_util_platform.h"
sahilmgandhi 18:6a4db94011d3 54
sahilmgandhi 18:6a4db94011d3 55 bool m_common_rtc_enabled = false;
sahilmgandhi 18:6a4db94011d3 56 uint32_t volatile m_common_rtc_overflows = 0;
sahilmgandhi 18:6a4db94011d3 57
sahilmgandhi 18:6a4db94011d3 58 __STATIC_INLINE void rtc_ovf_event_check(void)
sahilmgandhi 18:6a4db94011d3 59 {
sahilmgandhi 18:6a4db94011d3 60 if (nrf_rtc_event_pending(COMMON_RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW)) {
sahilmgandhi 18:6a4db94011d3 61 nrf_rtc_event_clear(COMMON_RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW);
sahilmgandhi 18:6a4db94011d3 62 // Don't disable this event. It shall occur periodically.
sahilmgandhi 18:6a4db94011d3 63
sahilmgandhi 18:6a4db94011d3 64 ++m_common_rtc_overflows;
sahilmgandhi 18:6a4db94011d3 65 }
sahilmgandhi 18:6a4db94011d3 66 }
sahilmgandhi 18:6a4db94011d3 67
sahilmgandhi 18:6a4db94011d3 68 #if defined(TARGET_MCU_NRF51822)
sahilmgandhi 18:6a4db94011d3 69 void common_rtc_irq_handler(void)
sahilmgandhi 18:6a4db94011d3 70 #else
sahilmgandhi 18:6a4db94011d3 71 void COMMON_RTC_IRQ_HANDLER(void)
sahilmgandhi 18:6a4db94011d3 72 #endif
sahilmgandhi 18:6a4db94011d3 73 {
sahilmgandhi 18:6a4db94011d3 74
sahilmgandhi 18:6a4db94011d3 75 rtc_ovf_event_check();
sahilmgandhi 18:6a4db94011d3 76
sahilmgandhi 18:6a4db94011d3 77 if (nrf_rtc_event_pending(COMMON_RTC_INSTANCE, US_TICKER_EVENT)) {
sahilmgandhi 18:6a4db94011d3 78 us_ticker_irq_handler();
sahilmgandhi 18:6a4db94011d3 79 }
sahilmgandhi 18:6a4db94011d3 80
sahilmgandhi 18:6a4db94011d3 81 #if DEVICE_LOWPOWERTIMER
sahilmgandhi 18:6a4db94011d3 82 if (nrf_rtc_event_pending(COMMON_RTC_INSTANCE, LP_TICKER_EVENT)) {
sahilmgandhi 18:6a4db94011d3 83
sahilmgandhi 18:6a4db94011d3 84 lp_ticker_irq_handler();
sahilmgandhi 18:6a4db94011d3 85 }
sahilmgandhi 18:6a4db94011d3 86 #endif
sahilmgandhi 18:6a4db94011d3 87
sahilmgandhi 18:6a4db94011d3 88 }
sahilmgandhi 18:6a4db94011d3 89
sahilmgandhi 18:6a4db94011d3 90 // Function for fix errata 20: RTC Register values are invalid
sahilmgandhi 18:6a4db94011d3 91 __STATIC_INLINE void errata_20(void)
sahilmgandhi 18:6a4db94011d3 92 {
sahilmgandhi 18:6a4db94011d3 93 #if defined(NRF52_ERRATA_20)
sahilmgandhi 18:6a4db94011d3 94 if (!softdevice_handler_is_enabled())
sahilmgandhi 18:6a4db94011d3 95 {
sahilmgandhi 18:6a4db94011d3 96 NRF_CLOCK->EVENTS_LFCLKSTARTED = 0;
sahilmgandhi 18:6a4db94011d3 97 NRF_CLOCK->TASKS_LFCLKSTART = 1;
sahilmgandhi 18:6a4db94011d3 98
sahilmgandhi 18:6a4db94011d3 99 while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0)
sahilmgandhi 18:6a4db94011d3 100 {
sahilmgandhi 18:6a4db94011d3 101 }
sahilmgandhi 18:6a4db94011d3 102 }
sahilmgandhi 18:6a4db94011d3 103 NRF_RTC1->TASKS_STOP = 0;
sahilmgandhi 18:6a4db94011d3 104 #endif
sahilmgandhi 18:6a4db94011d3 105 }
sahilmgandhi 18:6a4db94011d3 106
sahilmgandhi 18:6a4db94011d3 107 #if (defined (__ICCARM__)) && defined(TARGET_MCU_NRF51822)//IAR
sahilmgandhi 18:6a4db94011d3 108 __stackless __task
sahilmgandhi 18:6a4db94011d3 109 #endif
sahilmgandhi 18:6a4db94011d3 110 void RTC1_IRQHandler(void);
sahilmgandhi 18:6a4db94011d3 111
sahilmgandhi 18:6a4db94011d3 112 void common_rtc_init(void)
sahilmgandhi 18:6a4db94011d3 113 {
sahilmgandhi 18:6a4db94011d3 114 if (m_common_rtc_enabled) {
sahilmgandhi 18:6a4db94011d3 115 return;
sahilmgandhi 18:6a4db94011d3 116 }
sahilmgandhi 18:6a4db94011d3 117
sahilmgandhi 18:6a4db94011d3 118 errata_20();
sahilmgandhi 18:6a4db94011d3 119
sahilmgandhi 18:6a4db94011d3 120 NVIC_SetVector(RTC1_IRQn, (uint32_t)RTC1_IRQHandler);
sahilmgandhi 18:6a4db94011d3 121
sahilmgandhi 18:6a4db94011d3 122 // RTC is driven by the low frequency (32.768 kHz) clock, a proper request
sahilmgandhi 18:6a4db94011d3 123 // must be made to have it running.
sahilmgandhi 18:6a4db94011d3 124 // Currently this clock is started in 'SystemInit' (see "system_nrf51.c"
sahilmgandhi 18:6a4db94011d3 125 // or "system_nrf52.c", respectively).
sahilmgandhi 18:6a4db94011d3 126
sahilmgandhi 18:6a4db94011d3 127 nrf_rtc_prescaler_set(COMMON_RTC_INSTANCE, 0);
sahilmgandhi 18:6a4db94011d3 128
sahilmgandhi 18:6a4db94011d3 129 nrf_rtc_event_clear(COMMON_RTC_INSTANCE, US_TICKER_EVENT);
sahilmgandhi 18:6a4db94011d3 130 #if defined(TARGET_MCU_NRF51822)
sahilmgandhi 18:6a4db94011d3 131 nrf_rtc_event_clear(COMMON_RTC_INSTANCE, OS_TICK_EVENT);
sahilmgandhi 18:6a4db94011d3 132 #endif
sahilmgandhi 18:6a4db94011d3 133 #if DEVICE_LOWPOWERTIMER
sahilmgandhi 18:6a4db94011d3 134 nrf_rtc_event_clear(COMMON_RTC_INSTANCE, LP_TICKER_EVENT);
sahilmgandhi 18:6a4db94011d3 135 #endif
sahilmgandhi 18:6a4db94011d3 136 nrf_rtc_event_clear(COMMON_RTC_INSTANCE, NRF_RTC_EVENT_OVERFLOW);
sahilmgandhi 18:6a4db94011d3 137
sahilmgandhi 18:6a4db94011d3 138 // Interrupts on all related events are enabled permanently. Particular
sahilmgandhi 18:6a4db94011d3 139 // events will be enabled or disabled as needed (such approach is more
sahilmgandhi 18:6a4db94011d3 140 // energy efficient).
sahilmgandhi 18:6a4db94011d3 141 nrf_rtc_int_enable(COMMON_RTC_INSTANCE,
sahilmgandhi 18:6a4db94011d3 142 #if DEVICE_LOWPOWERTIMER
sahilmgandhi 18:6a4db94011d3 143 LP_TICKER_INT_MASK |
sahilmgandhi 18:6a4db94011d3 144 #endif
sahilmgandhi 18:6a4db94011d3 145 US_TICKER_INT_MASK |
sahilmgandhi 18:6a4db94011d3 146 NRF_RTC_INT_OVERFLOW_MASK);
sahilmgandhi 18:6a4db94011d3 147
sahilmgandhi 18:6a4db94011d3 148 // This event is enabled permanently, since overflow indications are needed
sahilmgandhi 18:6a4db94011d3 149 // continuously.
sahilmgandhi 18:6a4db94011d3 150 nrf_rtc_event_enable(COMMON_RTC_INSTANCE, NRF_RTC_INT_OVERFLOW_MASK);
sahilmgandhi 18:6a4db94011d3 151 // All other relevant events are initially disabled.
sahilmgandhi 18:6a4db94011d3 152 nrf_rtc_event_disable(COMMON_RTC_INSTANCE,
sahilmgandhi 18:6a4db94011d3 153 #if defined(TARGET_MCU_NRF51822)
sahilmgandhi 18:6a4db94011d3 154 OS_TICK_INT_MASK |
sahilmgandhi 18:6a4db94011d3 155 #endif
sahilmgandhi 18:6a4db94011d3 156 #if DEVICE_LOWPOWERTIMER
sahilmgandhi 18:6a4db94011d3 157 LP_TICKER_INT_MASK |
sahilmgandhi 18:6a4db94011d3 158 #endif
sahilmgandhi 18:6a4db94011d3 159 US_TICKER_INT_MASK);
sahilmgandhi 18:6a4db94011d3 160
sahilmgandhi 18:6a4db94011d3 161 nrf_drv_common_irq_enable(nrf_drv_get_IRQn(COMMON_RTC_INSTANCE),
sahilmgandhi 18:6a4db94011d3 162 #ifdef NRF51
sahilmgandhi 18:6a4db94011d3 163 APP_IRQ_PRIORITY_LOW
sahilmgandhi 18:6a4db94011d3 164 #elif defined(NRF52) || defined(NRF52840_XXAA)
sahilmgandhi 18:6a4db94011d3 165 APP_IRQ_PRIORITY_LOWEST
sahilmgandhi 18:6a4db94011d3 166 #endif
sahilmgandhi 18:6a4db94011d3 167 );
sahilmgandhi 18:6a4db94011d3 168
sahilmgandhi 18:6a4db94011d3 169 nrf_rtc_task_trigger(COMMON_RTC_INSTANCE, NRF_RTC_TASK_START);
sahilmgandhi 18:6a4db94011d3 170
sahilmgandhi 18:6a4db94011d3 171 m_common_rtc_enabled = true;
sahilmgandhi 18:6a4db94011d3 172 }
sahilmgandhi 18:6a4db94011d3 173
sahilmgandhi 18:6a4db94011d3 174 __STATIC_INLINE void rtc_ovf_event_safe_check(void)
sahilmgandhi 18:6a4db94011d3 175 {
sahilmgandhi 18:6a4db94011d3 176 core_util_critical_section_enter();
sahilmgandhi 18:6a4db94011d3 177
sahilmgandhi 18:6a4db94011d3 178 rtc_ovf_event_check();
sahilmgandhi 18:6a4db94011d3 179
sahilmgandhi 18:6a4db94011d3 180 core_util_critical_section_exit();
sahilmgandhi 18:6a4db94011d3 181 }
sahilmgandhi 18:6a4db94011d3 182
sahilmgandhi 18:6a4db94011d3 183
sahilmgandhi 18:6a4db94011d3 184 uint32_t common_rtc_32bit_ticks_get(void)
sahilmgandhi 18:6a4db94011d3 185 {
sahilmgandhi 18:6a4db94011d3 186 uint32_t ticks;
sahilmgandhi 18:6a4db94011d3 187 uint32_t prev_overflows;
sahilmgandhi 18:6a4db94011d3 188
sahilmgandhi 18:6a4db94011d3 189 do {
sahilmgandhi 18:6a4db94011d3 190 prev_overflows = m_common_rtc_overflows;
sahilmgandhi 18:6a4db94011d3 191
sahilmgandhi 18:6a4db94011d3 192 ticks = nrf_rtc_counter_get(COMMON_RTC_INSTANCE);
sahilmgandhi 18:6a4db94011d3 193 // The counter used for time measurements is less than 32 bit wide,
sahilmgandhi 18:6a4db94011d3 194 // so its value is complemented with the number of registered overflows
sahilmgandhi 18:6a4db94011d3 195 // of the counter.
sahilmgandhi 18:6a4db94011d3 196 ticks += (m_common_rtc_overflows << RTC_COUNTER_BITS);
sahilmgandhi 18:6a4db94011d3 197
sahilmgandhi 18:6a4db94011d3 198 // Check in case that OVF occurred during execution of a RTC handler (apply if call was from RTC handler)
sahilmgandhi 18:6a4db94011d3 199 // m_common_rtc_overflows might been updated in this call.
sahilmgandhi 18:6a4db94011d3 200 rtc_ovf_event_safe_check();
sahilmgandhi 18:6a4db94011d3 201
sahilmgandhi 18:6a4db94011d3 202 // If call was made from a low priority level m_common_rtc_overflows might have been updated in RTC handler.
sahilmgandhi 18:6a4db94011d3 203 } while (m_common_rtc_overflows != prev_overflows);
sahilmgandhi 18:6a4db94011d3 204
sahilmgandhi 18:6a4db94011d3 205 return ticks;
sahilmgandhi 18:6a4db94011d3 206 }
sahilmgandhi 18:6a4db94011d3 207
sahilmgandhi 18:6a4db94011d3 208 uint64_t common_rtc_64bit_us_get(void)
sahilmgandhi 18:6a4db94011d3 209 {
sahilmgandhi 18:6a4db94011d3 210 uint32_t ticks = common_rtc_32bit_ticks_get();
sahilmgandhi 18:6a4db94011d3 211 // [ticks -> microseconds]
sahilmgandhi 18:6a4db94011d3 212 return ROUNDED_DIV(((uint64_t)ticks) * 1000000, RTC_INPUT_FREQ);
sahilmgandhi 18:6a4db94011d3 213 }
sahilmgandhi 18:6a4db94011d3 214
sahilmgandhi 18:6a4db94011d3 215 void common_rtc_set_interrupt(uint32_t us_timestamp, uint32_t cc_channel,
sahilmgandhi 18:6a4db94011d3 216 uint32_t int_mask)
sahilmgandhi 18:6a4db94011d3 217 {
sahilmgandhi 18:6a4db94011d3 218 // The internal counter is clocked with a frequency that cannot be easily
sahilmgandhi 18:6a4db94011d3 219 // multiplied to 1 MHz, therefore besides the translation of values
sahilmgandhi 18:6a4db94011d3 220 // (microsecond <-> ticks) a special care of overflows handling must be
sahilmgandhi 18:6a4db94011d3 221 // taken. Here the 32-bit timestamp value is complemented with information
sahilmgandhi 18:6a4db94011d3 222 // about current the system up time of (ticks + number of overflows of tick
sahilmgandhi 18:6a4db94011d3 223 // counter on upper bits, converted to microseconds), and such 64-bit value
sahilmgandhi 18:6a4db94011d3 224 // is then translated to counter ticks. Finally, the lower 24 bits of thus
sahilmgandhi 18:6a4db94011d3 225 // calculated value is written to the counter compare register to prepare
sahilmgandhi 18:6a4db94011d3 226 // the interrupt generation.
sahilmgandhi 18:6a4db94011d3 227 uint64_t current_time64 = common_rtc_64bit_us_get();
sahilmgandhi 18:6a4db94011d3 228 // [add upper 32 bits from the current time to the timestamp value]
sahilmgandhi 18:6a4db94011d3 229 uint64_t timestamp64 = us_timestamp +
sahilmgandhi 18:6a4db94011d3 230 (current_time64 & ~(uint64_t)0xFFFFFFFF);
sahilmgandhi 18:6a4db94011d3 231 // [if the original timestamp value happens to be after the 32 bit counter
sahilmgandhi 18:6a4db94011d3 232 // of microsends overflows, correct the upper 32 bits accordingly]
sahilmgandhi 18:6a4db94011d3 233 if (us_timestamp < (uint32_t)(current_time64 & 0xFFFFFFFF)) {
sahilmgandhi 18:6a4db94011d3 234 timestamp64 += ((uint64_t)1 << 32);
sahilmgandhi 18:6a4db94011d3 235 }
sahilmgandhi 18:6a4db94011d3 236 // [microseconds -> ticks, always round the result up to avoid too early
sahilmgandhi 18:6a4db94011d3 237 // interrupt generation]
sahilmgandhi 18:6a4db94011d3 238 uint32_t compare_value =
sahilmgandhi 18:6a4db94011d3 239 (uint32_t)CEIL_DIV((timestamp64) * RTC_INPUT_FREQ, 1000000);
sahilmgandhi 18:6a4db94011d3 240
sahilmgandhi 18:6a4db94011d3 241 core_util_critical_section_enter();
sahilmgandhi 18:6a4db94011d3 242 // The COMPARE event occurs when the value in compare register is N and
sahilmgandhi 18:6a4db94011d3 243 // the counter value changes from N-1 to N. Therefore, the minimal safe
sahilmgandhi 18:6a4db94011d3 244 // difference between the compare value to be set and the current counter
sahilmgandhi 18:6a4db94011d3 245 // value is 2 ticks. This guarantees that the compare trigger is properly
sahilmgandhi 18:6a4db94011d3 246 // setup before the compare condition occurs.
sahilmgandhi 18:6a4db94011d3 247 uint32_t closest_safe_compare = common_rtc_32bit_ticks_get() + 2;
sahilmgandhi 18:6a4db94011d3 248 if ((int)(compare_value - closest_safe_compare) <= 0) {
sahilmgandhi 18:6a4db94011d3 249 compare_value = closest_safe_compare;
sahilmgandhi 18:6a4db94011d3 250 }
sahilmgandhi 18:6a4db94011d3 251
sahilmgandhi 18:6a4db94011d3 252 nrf_rtc_cc_set(COMMON_RTC_INSTANCE, cc_channel, RTC_WRAP(compare_value));
sahilmgandhi 18:6a4db94011d3 253 nrf_rtc_event_enable(COMMON_RTC_INSTANCE, int_mask);
sahilmgandhi 18:6a4db94011d3 254 core_util_critical_section_exit();
sahilmgandhi 18:6a4db94011d3 255 }
sahilmgandhi 18:6a4db94011d3 256 //------------------------------------------------------------------------------
sahilmgandhi 18:6a4db94011d3 257
sahilmgandhi 18:6a4db94011d3 258
sahilmgandhi 18:6a4db94011d3 259 void us_ticker_init(void)
sahilmgandhi 18:6a4db94011d3 260 {
sahilmgandhi 18:6a4db94011d3 261 common_rtc_init();
sahilmgandhi 18:6a4db94011d3 262 }
sahilmgandhi 18:6a4db94011d3 263
sahilmgandhi 18:6a4db94011d3 264 uint32_t us_ticker_read()
sahilmgandhi 18:6a4db94011d3 265 {
sahilmgandhi 18:6a4db94011d3 266 us_ticker_init();
sahilmgandhi 18:6a4db94011d3 267 return (uint32_t)common_rtc_64bit_us_get();
sahilmgandhi 18:6a4db94011d3 268 }
sahilmgandhi 18:6a4db94011d3 269
sahilmgandhi 18:6a4db94011d3 270 void us_ticker_set_interrupt(timestamp_t timestamp)
sahilmgandhi 18:6a4db94011d3 271 {
sahilmgandhi 18:6a4db94011d3 272 common_rtc_set_interrupt(timestamp,
sahilmgandhi 18:6a4db94011d3 273 US_TICKER_CC_CHANNEL, US_TICKER_INT_MASK);
sahilmgandhi 18:6a4db94011d3 274 }
sahilmgandhi 18:6a4db94011d3 275
sahilmgandhi 18:6a4db94011d3 276 void us_ticker_disable_interrupt(void)
sahilmgandhi 18:6a4db94011d3 277 {
sahilmgandhi 18:6a4db94011d3 278 nrf_rtc_event_disable(COMMON_RTC_INSTANCE, US_TICKER_INT_MASK);
sahilmgandhi 18:6a4db94011d3 279 }
sahilmgandhi 18:6a4db94011d3 280
sahilmgandhi 18:6a4db94011d3 281 void us_ticker_clear_interrupt(void)
sahilmgandhi 18:6a4db94011d3 282 {
sahilmgandhi 18:6a4db94011d3 283 nrf_rtc_event_clear(COMMON_RTC_INSTANCE, US_TICKER_EVENT);
sahilmgandhi 18:6a4db94011d3 284 }
sahilmgandhi 18:6a4db94011d3 285
sahilmgandhi 18:6a4db94011d3 286
sahilmgandhi 18:6a4db94011d3 287 // Since there is no SysTick on NRF51, the RTC1 channel 1 is used as an
sahilmgandhi 18:6a4db94011d3 288 // alternative source of RTOS ticks.
sahilmgandhi 18:6a4db94011d3 289 #if defined(TARGET_MCU_NRF51822)
sahilmgandhi 18:6a4db94011d3 290
sahilmgandhi 18:6a4db94011d3 291 #include "mbed_toolchain.h"
sahilmgandhi 18:6a4db94011d3 292
sahilmgandhi 18:6a4db94011d3 293
sahilmgandhi 18:6a4db94011d3 294 #define MAX_RTC_COUNTER_VAL ((1uL << RTC_COUNTER_BITS) - 1)
sahilmgandhi 18:6a4db94011d3 295
sahilmgandhi 18:6a4db94011d3 296 /**
sahilmgandhi 18:6a4db94011d3 297 * The value previously set in the capture compare register of channel 1
sahilmgandhi 18:6a4db94011d3 298 */
sahilmgandhi 18:6a4db94011d3 299 static uint32_t previous_tick_cc_value = 0;
sahilmgandhi 18:6a4db94011d3 300
sahilmgandhi 18:6a4db94011d3 301 /*
sahilmgandhi 18:6a4db94011d3 302 RTX provide the following definitions which are used by the tick code:
sahilmgandhi 18:6a4db94011d3 303 * os_trv: The number (minus 1) of clock cycle between two tick.
sahilmgandhi 18:6a4db94011d3 304 * os_clockrate: Time duration between two ticks (in us).
sahilmgandhi 18:6a4db94011d3 305 * OS_Tick_Handler: The function which handle a tick event.
sahilmgandhi 18:6a4db94011d3 306 This function is special because it never returns.
sahilmgandhi 18:6a4db94011d3 307 Those definitions are used by the code which handle the os tick.
sahilmgandhi 18:6a4db94011d3 308 To allow compilation of us_ticker programs without RTOS, those symbols are
sahilmgandhi 18:6a4db94011d3 309 exported from this module as weak ones.
sahilmgandhi 18:6a4db94011d3 310 */
sahilmgandhi 18:6a4db94011d3 311 MBED_WEAK uint32_t const os_trv;
sahilmgandhi 18:6a4db94011d3 312 MBED_WEAK uint32_t const os_clockrate;
sahilmgandhi 18:6a4db94011d3 313 MBED_WEAK void OS_Tick_Handler(void)
sahilmgandhi 18:6a4db94011d3 314 {
sahilmgandhi 18:6a4db94011d3 315 }
sahilmgandhi 18:6a4db94011d3 316
sahilmgandhi 18:6a4db94011d3 317
sahilmgandhi 18:6a4db94011d3 318 #if defined (__CC_ARM) /* ARMCC Compiler */
sahilmgandhi 18:6a4db94011d3 319
sahilmgandhi 18:6a4db94011d3 320 __asm void COMMON_RTC_IRQ_HANDLER(void)
sahilmgandhi 18:6a4db94011d3 321 {
sahilmgandhi 18:6a4db94011d3 322 IMPORT OS_Tick_Handler
sahilmgandhi 18:6a4db94011d3 323 IMPORT common_rtc_irq_handler
sahilmgandhi 18:6a4db94011d3 324
sahilmgandhi 18:6a4db94011d3 325 /**
sahilmgandhi 18:6a4db94011d3 326 * Chanel 1 of RTC1 is used by RTX as a systick.
sahilmgandhi 18:6a4db94011d3 327 * If the compare event on channel 1 is set, then branch to OS_Tick_Handler.
sahilmgandhi 18:6a4db94011d3 328 * Otherwise, just execute common_rtc_irq_handler.
sahilmgandhi 18:6a4db94011d3 329 * This function has to be written in assembly and tagged as naked because OS_Tick_Handler
sahilmgandhi 18:6a4db94011d3 330 * will never return.
sahilmgandhi 18:6a4db94011d3 331 * A c function would put lr on the stack before calling OS_Tick_Handler and this value
sahilmgandhi 18:6a4db94011d3 332 * would never been dequeued.
sahilmgandhi 18:6a4db94011d3 333 *
sahilmgandhi 18:6a4db94011d3 334 * \code
sahilmgandhi 18:6a4db94011d3 335 * void COMMON_RTC_IRQ_HANDLER(void) {
sahilmgandhi 18:6a4db94011d3 336 if(NRF_RTC1->EVENTS_COMPARE[1]) {
sahilmgandhi 18:6a4db94011d3 337 // never return...
sahilmgandhi 18:6a4db94011d3 338 OS_Tick_Handler();
sahilmgandhi 18:6a4db94011d3 339 } else {
sahilmgandhi 18:6a4db94011d3 340 common_rtc_irq_handler();
sahilmgandhi 18:6a4db94011d3 341 }
sahilmgandhi 18:6a4db94011d3 342 }
sahilmgandhi 18:6a4db94011d3 343 * \endcode
sahilmgandhi 18:6a4db94011d3 344 */
sahilmgandhi 18:6a4db94011d3 345 ldr r0,=0x40011144
sahilmgandhi 18:6a4db94011d3 346 ldr r1, [r0, #0]
sahilmgandhi 18:6a4db94011d3 347 cmp r1, #0
sahilmgandhi 18:6a4db94011d3 348 beq US_TICKER_HANDLER
sahilmgandhi 18:6a4db94011d3 349 bl OS_Tick_Handler
sahilmgandhi 18:6a4db94011d3 350 US_TICKER_HANDLER
sahilmgandhi 18:6a4db94011d3 351 push {r3, lr}
sahilmgandhi 18:6a4db94011d3 352 bl common_rtc_irq_handler
sahilmgandhi 18:6a4db94011d3 353 pop {r3, pc}
sahilmgandhi 18:6a4db94011d3 354 ; ALIGN ;
sahilmgandhi 18:6a4db94011d3 355 }
sahilmgandhi 18:6a4db94011d3 356
sahilmgandhi 18:6a4db94011d3 357 #elif defined (__GNUC__) /* GNU Compiler */
sahilmgandhi 18:6a4db94011d3 358
sahilmgandhi 18:6a4db94011d3 359 __attribute__((naked)) void COMMON_RTC_IRQ_HANDLER(void)
sahilmgandhi 18:6a4db94011d3 360 {
sahilmgandhi 18:6a4db94011d3 361 /**
sahilmgandhi 18:6a4db94011d3 362 * Chanel 1 of RTC1 is used by RTX as a systick.
sahilmgandhi 18:6a4db94011d3 363 * If the compare event on channel 1 is set, then branch to OS_Tick_Handler.
sahilmgandhi 18:6a4db94011d3 364 * Otherwise, just execute common_rtc_irq_handler.
sahilmgandhi 18:6a4db94011d3 365 * This function has to be written in assembly and tagged as naked because OS_Tick_Handler
sahilmgandhi 18:6a4db94011d3 366 * will never return.
sahilmgandhi 18:6a4db94011d3 367 * A c function would put lr on the stack before calling OS_Tick_Handler and this value
sahilmgandhi 18:6a4db94011d3 368 * would never been dequeued.
sahilmgandhi 18:6a4db94011d3 369 *
sahilmgandhi 18:6a4db94011d3 370 * \code
sahilmgandhi 18:6a4db94011d3 371 * void COMMON_RTC_IRQ_HANDLER(void) {
sahilmgandhi 18:6a4db94011d3 372 if(NRF_RTC1->EVENTS_COMPARE[1]) {
sahilmgandhi 18:6a4db94011d3 373 // never return...
sahilmgandhi 18:6a4db94011d3 374 OS_Tick_Handler();
sahilmgandhi 18:6a4db94011d3 375 } else {
sahilmgandhi 18:6a4db94011d3 376 common_rtc_irq_handler();
sahilmgandhi 18:6a4db94011d3 377 }
sahilmgandhi 18:6a4db94011d3 378 }
sahilmgandhi 18:6a4db94011d3 379 * \endcode
sahilmgandhi 18:6a4db94011d3 380 */
sahilmgandhi 18:6a4db94011d3 381 __asm__ (
sahilmgandhi 18:6a4db94011d3 382 "ldr r0,=0x40011144\n"
sahilmgandhi 18:6a4db94011d3 383 "ldr r1, [r0, #0]\n"
sahilmgandhi 18:6a4db94011d3 384 "cmp r1, #0\n"
sahilmgandhi 18:6a4db94011d3 385 "beq US_TICKER_HANDLER\n"
sahilmgandhi 18:6a4db94011d3 386 "bl OS_Tick_Handler\n"
sahilmgandhi 18:6a4db94011d3 387 "US_TICKER_HANDLER:\n"
sahilmgandhi 18:6a4db94011d3 388 "push {r3, lr}\n"
sahilmgandhi 18:6a4db94011d3 389 "bl common_rtc_irq_handler\n"
sahilmgandhi 18:6a4db94011d3 390 "pop {r3, pc}\n"
sahilmgandhi 18:6a4db94011d3 391 "nop"
sahilmgandhi 18:6a4db94011d3 392 );
sahilmgandhi 18:6a4db94011d3 393 }
sahilmgandhi 18:6a4db94011d3 394
sahilmgandhi 18:6a4db94011d3 395 #elif defined (__ICCARM__)//IAR
sahilmgandhi 18:6a4db94011d3 396 void common_rtc_irq_handler(void);
sahilmgandhi 18:6a4db94011d3 397
sahilmgandhi 18:6a4db94011d3 398 __stackless __task void COMMON_RTC_IRQ_HANDLER(void)
sahilmgandhi 18:6a4db94011d3 399 {
sahilmgandhi 18:6a4db94011d3 400 uint32_t temp;
sahilmgandhi 18:6a4db94011d3 401
sahilmgandhi 18:6a4db94011d3 402 __asm volatile(
sahilmgandhi 18:6a4db94011d3 403 " ldr %[temp], [%[reg2check]] \n"
sahilmgandhi 18:6a4db94011d3 404 " cmp %[temp], #0 \n"
sahilmgandhi 18:6a4db94011d3 405 " beq 1f \n"
sahilmgandhi 18:6a4db94011d3 406 " bl.w OS_Tick_Handler \n"
sahilmgandhi 18:6a4db94011d3 407 "1: \n"
sahilmgandhi 18:6a4db94011d3 408 " push {r3, lr}\n"
sahilmgandhi 18:6a4db94011d3 409 " blx %[rtc_irq] \n"
sahilmgandhi 18:6a4db94011d3 410 " pop {r3, pc}\n"
sahilmgandhi 18:6a4db94011d3 411
sahilmgandhi 18:6a4db94011d3 412 : /* Outputs */
sahilmgandhi 18:6a4db94011d3 413 [temp] "=&r"(temp)
sahilmgandhi 18:6a4db94011d3 414 : /* Inputs */
sahilmgandhi 18:6a4db94011d3 415 [reg2check] "r"(0x40011144),
sahilmgandhi 18:6a4db94011d3 416 [rtc_irq] "r"(common_rtc_irq_handler)
sahilmgandhi 18:6a4db94011d3 417 : /* Clobbers */
sahilmgandhi 18:6a4db94011d3 418 "cc"
sahilmgandhi 18:6a4db94011d3 419 );
sahilmgandhi 18:6a4db94011d3 420 (void)temp;
sahilmgandhi 18:6a4db94011d3 421 }
sahilmgandhi 18:6a4db94011d3 422
sahilmgandhi 18:6a4db94011d3 423
sahilmgandhi 18:6a4db94011d3 424 #else
sahilmgandhi 18:6a4db94011d3 425
sahilmgandhi 18:6a4db94011d3 426 #error Compiler not supported.
sahilmgandhi 18:6a4db94011d3 427 #error Provide a definition of COMMON_RTC_IRQ_HANDLER.
sahilmgandhi 18:6a4db94011d3 428
sahilmgandhi 18:6a4db94011d3 429 /*
sahilmgandhi 18:6a4db94011d3 430 * Chanel 1 of RTC1 is used by RTX as a systick.
sahilmgandhi 18:6a4db94011d3 431 * If the compare event on channel 1 is set, then branch to OS_Tick_Handler.
sahilmgandhi 18:6a4db94011d3 432 * Otherwise, just execute common_rtc_irq_handler.
sahilmgandhi 18:6a4db94011d3 433 * This function has to be written in assembly and tagged as naked because OS_Tick_Handler
sahilmgandhi 18:6a4db94011d3 434 * will never return.
sahilmgandhi 18:6a4db94011d3 435 * A c function would put lr on the stack before calling OS_Tick_Handler and this value
sahilmgandhi 18:6a4db94011d3 436 * will never been dequeued. After a certain time a stack overflow will happen.
sahilmgandhi 18:6a4db94011d3 437 *
sahilmgandhi 18:6a4db94011d3 438 * \code
sahilmgandhi 18:6a4db94011d3 439 * void COMMON_RTC_IRQ_HANDLER(void) {
sahilmgandhi 18:6a4db94011d3 440 if(NRF_RTC1->EVENTS_COMPARE[1]) {
sahilmgandhi 18:6a4db94011d3 441 // never return...
sahilmgandhi 18:6a4db94011d3 442 OS_Tick_Handler();
sahilmgandhi 18:6a4db94011d3 443 } else {
sahilmgandhi 18:6a4db94011d3 444 common_rtc_irq_handler();
sahilmgandhi 18:6a4db94011d3 445 }
sahilmgandhi 18:6a4db94011d3 446 }
sahilmgandhi 18:6a4db94011d3 447 * \endcode
sahilmgandhi 18:6a4db94011d3 448 */
sahilmgandhi 18:6a4db94011d3 449
sahilmgandhi 18:6a4db94011d3 450 #endif
sahilmgandhi 18:6a4db94011d3 451
sahilmgandhi 18:6a4db94011d3 452 /**
sahilmgandhi 18:6a4db94011d3 453 * Return the next number of clock cycle needed for the next tick.
sahilmgandhi 18:6a4db94011d3 454 * @note This function has been carrefuly optimized for a systick occuring every 1000us.
sahilmgandhi 18:6a4db94011d3 455 */
sahilmgandhi 18:6a4db94011d3 456 static uint32_t get_next_tick_cc_delta()
sahilmgandhi 18:6a4db94011d3 457 {
sahilmgandhi 18:6a4db94011d3 458 uint32_t delta = 0;
sahilmgandhi 18:6a4db94011d3 459
sahilmgandhi 18:6a4db94011d3 460 if (os_clockrate != 1000) {
sahilmgandhi 18:6a4db94011d3 461 // In RTX, by default SYSTICK is is used.
sahilmgandhi 18:6a4db94011d3 462 // A tick event is generated every os_trv + 1 clock cycles of the system timer.
sahilmgandhi 18:6a4db94011d3 463 delta = os_trv + 1;
sahilmgandhi 18:6a4db94011d3 464 } else {
sahilmgandhi 18:6a4db94011d3 465 // If the clockrate is set to 1000us then 1000 tick should happen every second.
sahilmgandhi 18:6a4db94011d3 466 // Unfortunatelly, when clockrate is set to 1000, os_trv is equal to 31.
sahilmgandhi 18:6a4db94011d3 467 // If (os_trv + 1) is used as the delta value between two ticks, 1000 ticks will be
sahilmgandhi 18:6a4db94011d3 468 // generated in 32000 clock cycle instead of 32768 clock cycles.
sahilmgandhi 18:6a4db94011d3 469 // As a result, if a user schedule an OS timer to start in 100s, the timer will start
sahilmgandhi 18:6a4db94011d3 470 // instead after 97.656s
sahilmgandhi 18:6a4db94011d3 471 // The code below fix this issue, a clock rate of 1000s will generate 1000 ticks in 32768
sahilmgandhi 18:6a4db94011d3 472 // clock cycles.
sahilmgandhi 18:6a4db94011d3 473 // The strategy is simple, for 1000 ticks:
sahilmgandhi 18:6a4db94011d3 474 // * 768 ticks will occur 33 clock cycles after the previous tick
sahilmgandhi 18:6a4db94011d3 475 // * 232 ticks will occur 32 clock cycles after the previous tick
sahilmgandhi 18:6a4db94011d3 476 // By default every delta is equal to 33.
sahilmgandhi 18:6a4db94011d3 477 // Every five ticks (20%, 200 delta in one second), the delta is equal to 32
sahilmgandhi 18:6a4db94011d3 478 // The remaining (32) deltas equal to 32 are distributed using primes numbers.
sahilmgandhi 18:6a4db94011d3 479 static uint32_t counter = 0;
sahilmgandhi 18:6a4db94011d3 480 if ((counter % 5) == 0 || (counter % 31) == 0 || (counter % 139) == 0 || (counter == 503)) {
sahilmgandhi 18:6a4db94011d3 481 delta = 32;
sahilmgandhi 18:6a4db94011d3 482 } else {
sahilmgandhi 18:6a4db94011d3 483 delta = 33;
sahilmgandhi 18:6a4db94011d3 484 }
sahilmgandhi 18:6a4db94011d3 485 ++counter;
sahilmgandhi 18:6a4db94011d3 486 if (counter == 1000) {
sahilmgandhi 18:6a4db94011d3 487 counter = 0;
sahilmgandhi 18:6a4db94011d3 488 }
sahilmgandhi 18:6a4db94011d3 489 }
sahilmgandhi 18:6a4db94011d3 490 return delta;
sahilmgandhi 18:6a4db94011d3 491 }
sahilmgandhi 18:6a4db94011d3 492
sahilmgandhi 18:6a4db94011d3 493 static inline void clear_tick_interrupt()
sahilmgandhi 18:6a4db94011d3 494 {
sahilmgandhi 18:6a4db94011d3 495 nrf_rtc_event_clear(COMMON_RTC_INSTANCE, OS_TICK_EVENT);
sahilmgandhi 18:6a4db94011d3 496 nrf_rtc_event_disable(COMMON_RTC_INSTANCE, OS_TICK_INT_MASK);
sahilmgandhi 18:6a4db94011d3 497 }
sahilmgandhi 18:6a4db94011d3 498
sahilmgandhi 18:6a4db94011d3 499 /**
sahilmgandhi 18:6a4db94011d3 500 * Indicate if a value is included in a range which can be wrapped.
sahilmgandhi 18:6a4db94011d3 501 * @param begin start of the range
sahilmgandhi 18:6a4db94011d3 502 * @param end end of the range
sahilmgandhi 18:6a4db94011d3 503 * @param val value to check
sahilmgandhi 18:6a4db94011d3 504 * @return true if the value is included in the range and false otherwise.
sahilmgandhi 18:6a4db94011d3 505 */
sahilmgandhi 18:6a4db94011d3 506 static inline bool is_in_wrapped_range(uint32_t begin, uint32_t end, uint32_t val)
sahilmgandhi 18:6a4db94011d3 507 {
sahilmgandhi 18:6a4db94011d3 508 // regular case, begin < end
sahilmgandhi 18:6a4db94011d3 509 // return true if begin <= val < end
sahilmgandhi 18:6a4db94011d3 510 if (begin < end) {
sahilmgandhi 18:6a4db94011d3 511 if (begin <= val && val < end) {
sahilmgandhi 18:6a4db94011d3 512 return true;
sahilmgandhi 18:6a4db94011d3 513 } else {
sahilmgandhi 18:6a4db94011d3 514 return false;
sahilmgandhi 18:6a4db94011d3 515 }
sahilmgandhi 18:6a4db94011d3 516 } else {
sahilmgandhi 18:6a4db94011d3 517 // In this case end < begin because it has wrap around the limits
sahilmgandhi 18:6a4db94011d3 518 // return false if end < val < begin
sahilmgandhi 18:6a4db94011d3 519 if (end < val && val < begin) {
sahilmgandhi 18:6a4db94011d3 520 return false;
sahilmgandhi 18:6a4db94011d3 521 } else {
sahilmgandhi 18:6a4db94011d3 522 return true;
sahilmgandhi 18:6a4db94011d3 523 }
sahilmgandhi 18:6a4db94011d3 524 }
sahilmgandhi 18:6a4db94011d3 525
sahilmgandhi 18:6a4db94011d3 526 }
sahilmgandhi 18:6a4db94011d3 527
sahilmgandhi 18:6a4db94011d3 528 /**
sahilmgandhi 18:6a4db94011d3 529 * Register the next tick.
sahilmgandhi 18:6a4db94011d3 530 */
sahilmgandhi 18:6a4db94011d3 531 static void register_next_tick()
sahilmgandhi 18:6a4db94011d3 532 {
sahilmgandhi 18:6a4db94011d3 533 previous_tick_cc_value = nrf_rtc_cc_get(COMMON_RTC_INSTANCE, OS_TICK_CC_CHANNEL);
sahilmgandhi 18:6a4db94011d3 534 uint32_t delta = get_next_tick_cc_delta();
sahilmgandhi 18:6a4db94011d3 535 uint32_t new_compare_value = (previous_tick_cc_value + delta) & MAX_RTC_COUNTER_VAL;
sahilmgandhi 18:6a4db94011d3 536
sahilmgandhi 18:6a4db94011d3 537 // Disable irq directly for few cycles,
sahilmgandhi 18:6a4db94011d3 538 // Validation of the new CC value against the COUNTER,
sahilmgandhi 18:6a4db94011d3 539 // Setting the new CC value and enabling CC IRQ should be an atomic operation
sahilmgandhi 18:6a4db94011d3 540 // Otherwise, there is a possibility to set an invalid CC value because
sahilmgandhi 18:6a4db94011d3 541 // the RTC1 keeps running.
sahilmgandhi 18:6a4db94011d3 542 // This code is very short 20-38 cycles in the worst case, it shouldn't
sahilmgandhi 18:6a4db94011d3 543 // disturb softdevice.
sahilmgandhi 18:6a4db94011d3 544 core_util_critical_section_enter();
sahilmgandhi 18:6a4db94011d3 545 uint32_t current_counter = nrf_rtc_counter_get(COMMON_RTC_INSTANCE);
sahilmgandhi 18:6a4db94011d3 546
sahilmgandhi 18:6a4db94011d3 547 // If an overflow occur, set the next tick in COUNTER + delta clock cycles
sahilmgandhi 18:6a4db94011d3 548 if (is_in_wrapped_range(previous_tick_cc_value, new_compare_value, current_counter + 1) == false) {
sahilmgandhi 18:6a4db94011d3 549 new_compare_value = current_counter + delta;
sahilmgandhi 18:6a4db94011d3 550 }
sahilmgandhi 18:6a4db94011d3 551 nrf_rtc_cc_set(COMMON_RTC_INSTANCE, OS_TICK_CC_CHANNEL, new_compare_value);
sahilmgandhi 18:6a4db94011d3 552 // Enable generation of the compare event for the value set above (this
sahilmgandhi 18:6a4db94011d3 553 // event will trigger the interrupt).
sahilmgandhi 18:6a4db94011d3 554 nrf_rtc_event_enable(COMMON_RTC_INSTANCE, OS_TICK_INT_MASK);
sahilmgandhi 18:6a4db94011d3 555 core_util_critical_section_exit();
sahilmgandhi 18:6a4db94011d3 556 }
sahilmgandhi 18:6a4db94011d3 557
sahilmgandhi 18:6a4db94011d3 558 /**
sahilmgandhi 18:6a4db94011d3 559 * Initialize alternative hardware timer as RTX kernel timer
sahilmgandhi 18:6a4db94011d3 560 * This function is directly called by RTX.
sahilmgandhi 18:6a4db94011d3 561 * @note this function shouldn't be called directly.
sahilmgandhi 18:6a4db94011d3 562 * @return IRQ number of the alternative hardware timer
sahilmgandhi 18:6a4db94011d3 563 */
sahilmgandhi 18:6a4db94011d3 564 int os_tick_init (void)
sahilmgandhi 18:6a4db94011d3 565 {
sahilmgandhi 18:6a4db94011d3 566 common_rtc_init();
sahilmgandhi 18:6a4db94011d3 567 nrf_rtc_int_enable(COMMON_RTC_INSTANCE, OS_TICK_INT_MASK);
sahilmgandhi 18:6a4db94011d3 568
sahilmgandhi 18:6a4db94011d3 569 nrf_rtc_cc_set(COMMON_RTC_INSTANCE, OS_TICK_CC_CHANNEL, 0);
sahilmgandhi 18:6a4db94011d3 570 register_next_tick();
sahilmgandhi 18:6a4db94011d3 571
sahilmgandhi 18:6a4db94011d3 572 return nrf_drv_get_IRQn(COMMON_RTC_INSTANCE);
sahilmgandhi 18:6a4db94011d3 573 }
sahilmgandhi 18:6a4db94011d3 574
sahilmgandhi 18:6a4db94011d3 575 /**
sahilmgandhi 18:6a4db94011d3 576 * Acknowledge the tick interrupt.
sahilmgandhi 18:6a4db94011d3 577 * This function is called by the function OS_Tick_Handler of RTX.
sahilmgandhi 18:6a4db94011d3 578 * @note this function shouldn't be called directly.
sahilmgandhi 18:6a4db94011d3 579 */
sahilmgandhi 18:6a4db94011d3 580 void os_tick_irqack(void)
sahilmgandhi 18:6a4db94011d3 581 {
sahilmgandhi 18:6a4db94011d3 582 clear_tick_interrupt();
sahilmgandhi 18:6a4db94011d3 583 register_next_tick();
sahilmgandhi 18:6a4db94011d3 584 }
sahilmgandhi 18:6a4db94011d3 585
sahilmgandhi 18:6a4db94011d3 586 /**
sahilmgandhi 18:6a4db94011d3 587 * Returns the overflow flag of the alternative hardware timer.
sahilmgandhi 18:6a4db94011d3 588 * @note This function is exposed by RTX kernel.
sahilmgandhi 18:6a4db94011d3 589 * @return 1 if the timer has overflowed and 0 otherwise.
sahilmgandhi 18:6a4db94011d3 590 */
sahilmgandhi 18:6a4db94011d3 591 uint32_t os_tick_ovf(void)
sahilmgandhi 18:6a4db94011d3 592 {
sahilmgandhi 18:6a4db94011d3 593 uint32_t current_counter = nrf_rtc_counter_get(COMMON_RTC_INSTANCE);
sahilmgandhi 18:6a4db94011d3 594 uint32_t next_tick_cc_value = nrf_rtc_cc_get(COMMON_RTC_INSTANCE, OS_TICK_CC_CHANNEL);
sahilmgandhi 18:6a4db94011d3 595
sahilmgandhi 18:6a4db94011d3 596 return is_in_wrapped_range(previous_tick_cc_value, next_tick_cc_value, current_counter) ? 0 : 1;
sahilmgandhi 18:6a4db94011d3 597 }
sahilmgandhi 18:6a4db94011d3 598
sahilmgandhi 18:6a4db94011d3 599 /**
sahilmgandhi 18:6a4db94011d3 600 * Return the value of the alternative hardware timer.
sahilmgandhi 18:6a4db94011d3 601 * @note The documentation is not very clear about what is expected as a result,
sahilmgandhi 18:6a4db94011d3 602 * is it an ascending counter, a descending one ?
sahilmgandhi 18:6a4db94011d3 603 * None of this is specified.
sahilmgandhi 18:6a4db94011d3 604 * The default systick is a descending counter and this function return values in
sahilmgandhi 18:6a4db94011d3 605 * descending order, even if the internal counter used is an ascending one.
sahilmgandhi 18:6a4db94011d3 606 * @return the value of the alternative hardware timer.
sahilmgandhi 18:6a4db94011d3 607 */
sahilmgandhi 18:6a4db94011d3 608 uint32_t os_tick_val(void)
sahilmgandhi 18:6a4db94011d3 609 {
sahilmgandhi 18:6a4db94011d3 610 uint32_t current_counter = nrf_rtc_counter_get(COMMON_RTC_INSTANCE);
sahilmgandhi 18:6a4db94011d3 611 uint32_t next_tick_cc_value = nrf_rtc_cc_get(COMMON_RTC_INSTANCE, OS_TICK_CC_CHANNEL);
sahilmgandhi 18:6a4db94011d3 612
sahilmgandhi 18:6a4db94011d3 613 // do not use os_tick_ovf because its counter value can be different
sahilmgandhi 18:6a4db94011d3 614 if(is_in_wrapped_range(previous_tick_cc_value, next_tick_cc_value, current_counter)) {
sahilmgandhi 18:6a4db94011d3 615 if (next_tick_cc_value > previous_tick_cc_value) {
sahilmgandhi 18:6a4db94011d3 616 return next_tick_cc_value - current_counter;
sahilmgandhi 18:6a4db94011d3 617 } else if(current_counter <= next_tick_cc_value) {
sahilmgandhi 18:6a4db94011d3 618 return next_tick_cc_value - current_counter;
sahilmgandhi 18:6a4db94011d3 619 } else {
sahilmgandhi 18:6a4db94011d3 620 return next_tick_cc_value + (MAX_RTC_COUNTER_VAL - current_counter);
sahilmgandhi 18:6a4db94011d3 621 }
sahilmgandhi 18:6a4db94011d3 622 } else {
sahilmgandhi 18:6a4db94011d3 623 // use (os_trv + 1) has the base step, can be totally inacurate ...
sahilmgandhi 18:6a4db94011d3 624 uint32_t clock_cycles_by_tick = os_trv + 1;
sahilmgandhi 18:6a4db94011d3 625
sahilmgandhi 18:6a4db94011d3 626 // if current counter has wrap arround, add the limit to it.
sahilmgandhi 18:6a4db94011d3 627 if (current_counter < next_tick_cc_value) {
sahilmgandhi 18:6a4db94011d3 628 current_counter = current_counter + MAX_RTC_COUNTER_VAL;
sahilmgandhi 18:6a4db94011d3 629 }
sahilmgandhi 18:6a4db94011d3 630
sahilmgandhi 18:6a4db94011d3 631 return clock_cycles_by_tick - ((current_counter - next_tick_cc_value) % clock_cycles_by_tick);
sahilmgandhi 18:6a4db94011d3 632 }
sahilmgandhi 18:6a4db94011d3 633
sahilmgandhi 18:6a4db94011d3 634 }
sahilmgandhi 18:6a4db94011d3 635
sahilmgandhi 18:6a4db94011d3 636 #endif // defined(TARGET_MCU_NRF51822)