MacroRat / MouseCode

Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

mbed-dev/targets/TARGET_NORDIC/TARGET_NRF5_SDK13/spi_api.c@46:b156ef445742, 2017-06-03 (annotated)

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3 
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /*
sahilmgandhi 18:6a4db94011d3 2 * Copyright (c) 2013 Nordic Semiconductor ASA
sahilmgandhi 18:6a4db94011d3 3 * All rights reserved.
sahilmgandhi 18:6a4db94011d3 4 *
sahilmgandhi 18:6a4db94011d3 5 * Redistribution and use in source and binary forms, with or without modification,
sahilmgandhi 18:6a4db94011d3 6 * are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 7 *
sahilmgandhi 18:6a4db94011d3 8 * 1. Redistributions of source code must retain the above copyright notice, this list
sahilmgandhi 18:6a4db94011d3 9 * of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 10 *
sahilmgandhi 18:6a4db94011d3 11 * 2. Redistributions in binary form, except as embedded into a Nordic Semiconductor ASA
sahilmgandhi 18:6a4db94011d3 12 * integrated circuit in a product or a software update for such product, must reproduce
sahilmgandhi 18:6a4db94011d3 13 * the above copyright notice, this list of conditions and the following disclaimer in
sahilmgandhi 18:6a4db94011d3 14 * the documentation and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 15 *
sahilmgandhi 18:6a4db94011d3 16 * 3. Neither the name of Nordic Semiconductor ASA nor the names of its contributors may be
sahilmgandhi 18:6a4db94011d3 17 * used to endorse or promote products derived from this software without specific prior
sahilmgandhi 18:6a4db94011d3 18 * written permission.
sahilmgandhi 18:6a4db94011d3 19 *
sahilmgandhi 18:6a4db94011d3 20 * 4. This software, with or without modification, must only be used with a
sahilmgandhi 18:6a4db94011d3 21 * Nordic Semiconductor ASA integrated circuit.
sahilmgandhi 18:6a4db94011d3 22 *
sahilmgandhi 18:6a4db94011d3 23 * 5. Any software provided in binary or object form under this license must not be reverse
sahilmgandhi 18:6a4db94011d3 24 * engineered, decompiled, modified and/or disassembled.
sahilmgandhi 18:6a4db94011d3 25 *
sahilmgandhi 18:6a4db94011d3 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
sahilmgandhi 18:6a4db94011d3 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
sahilmgandhi 18:6a4db94011d3 28 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 29 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
sahilmgandhi 18:6a4db94011d3 30 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
sahilmgandhi 18:6a4db94011d3 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
sahilmgandhi 18:6a4db94011d3 32 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
sahilmgandhi 18:6a4db94011d3 33 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
sahilmgandhi 18:6a4db94011d3 34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
sahilmgandhi 18:6a4db94011d3 35 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 36 *
sahilmgandhi 18:6a4db94011d3 37 */
sahilmgandhi 18:6a4db94011d3 38
sahilmgandhi 18:6a4db94011d3 39
sahilmgandhi 18:6a4db94011d3 40 #include "spi_api.h"
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #if DEVICE_SPI
sahilmgandhi 18:6a4db94011d3 43
sahilmgandhi 18:6a4db94011d3 44 #include "cmsis.h"
sahilmgandhi 18:6a4db94011d3 45 #include "pinmap.h"
sahilmgandhi 18:6a4db94011d3 46 #include "mbed_assert.h"
sahilmgandhi 18:6a4db94011d3 47 #include "mbed_error.h"
sahilmgandhi 18:6a4db94011d3 48 #include "nrf_drv_spi.h"
sahilmgandhi 18:6a4db94011d3 49 #include "nrf_drv_spis.h"
sahilmgandhi 18:6a4db94011d3 50 #include "app_util_platform.h"
sahilmgandhi 18:6a4db94011d3 51
sahilmgandhi 18:6a4db94011d3 52 #if DEVICE_SPI_ASYNCH
sahilmgandhi 18:6a4db94011d3 53 #define SPI_IDX(obj) ((obj)->spi.spi_idx)
sahilmgandhi 18:6a4db94011d3 54 #else
sahilmgandhi 18:6a4db94011d3 55 #define SPI_IDX(obj) ((obj)->spi_idx)
sahilmgandhi 18:6a4db94011d3 56 #endif
sahilmgandhi 18:6a4db94011d3 57 #define SPI_INFO(obj) (&m_spi_info[SPI_IDX(obj)])
sahilmgandhi 18:6a4db94011d3 58 #define MASTER_INST(obj) (&m_instances[SPI_IDX(obj)].master)
sahilmgandhi 18:6a4db94011d3 59 #define SLAVE_INST(obj) (&m_instances[SPI_IDX(obj)].slave)
sahilmgandhi 18:6a4db94011d3 60
sahilmgandhi 18:6a4db94011d3 61 typedef struct
sahilmgandhi 18:6a4db94011d3 62 {
sahilmgandhi 18:6a4db94011d3 63 bool initialized;
sahilmgandhi 18:6a4db94011d3 64 bool master;
sahilmgandhi 18:6a4db94011d3 65 uint8_t sck_pin;
sahilmgandhi 18:6a4db94011d3 66 uint8_t mosi_pin;
sahilmgandhi 18:6a4db94011d3 67 uint8_t miso_pin;
sahilmgandhi 18:6a4db94011d3 68 uint8_t ss_pin;
sahilmgandhi 18:6a4db94011d3 69 uint8_t spi_mode;
sahilmgandhi 18:6a4db94011d3 70 nrf_drv_spi_frequency_t frequency;
sahilmgandhi 18:6a4db94011d3 71 volatile union
sahilmgandhi 18:6a4db94011d3 72 {
sahilmgandhi 18:6a4db94011d3 73 bool busy; // master
sahilmgandhi 18:6a4db94011d3 74 bool readable; // slave
sahilmgandhi 18:6a4db94011d3 75 } flag;
sahilmgandhi 18:6a4db94011d3 76 volatile uint8_t tx_buf;
sahilmgandhi 18:6a4db94011d3 77 volatile uint8_t rx_buf;
sahilmgandhi 18:6a4db94011d3 78
sahilmgandhi 18:6a4db94011d3 79 #if DEVICE_SPI_ASYNCH
sahilmgandhi 18:6a4db94011d3 80 uint32_t handler;
sahilmgandhi 18:6a4db94011d3 81 uint32_t event;
sahilmgandhi 18:6a4db94011d3 82 #endif
sahilmgandhi 18:6a4db94011d3 83 } spi_info_t;
sahilmgandhi 18:6a4db94011d3 84 static spi_info_t m_spi_info[SPI_COUNT];
sahilmgandhi 18:6a4db94011d3 85
sahilmgandhi 18:6a4db94011d3 86 typedef struct
sahilmgandhi 18:6a4db94011d3 87 {
sahilmgandhi 18:6a4db94011d3 88 nrf_drv_spi_t master;
sahilmgandhi 18:6a4db94011d3 89 nrf_drv_spis_t slave;
sahilmgandhi 18:6a4db94011d3 90 } sdk_driver_instances_t;
sahilmgandhi 18:6a4db94011d3 91
sahilmgandhi 18:6a4db94011d3 92 void SPI0_TWI0_IRQHandler(void);
sahilmgandhi 18:6a4db94011d3 93 void SPI1_TWI1_IRQHandler(void);
sahilmgandhi 18:6a4db94011d3 94 void SPIM2_SPIS2_SPI2_IRQHandler(void);
sahilmgandhi 18:6a4db94011d3 95
sahilmgandhi 18:6a4db94011d3 96 static const peripheral_handler_desc_t spi_handler_desc[SPI_COUNT] = {
sahilmgandhi 18:6a4db94011d3 97 #if SPI0_ENABLED
sahilmgandhi 18:6a4db94011d3 98 {
sahilmgandhi 18:6a4db94011d3 99 SPI0_IRQ,
sahilmgandhi 18:6a4db94011d3 100 (uint32_t) SPI0_TWI0_IRQHandler
sahilmgandhi 18:6a4db94011d3 101 },
sahilmgandhi 18:6a4db94011d3 102 #endif
sahilmgandhi 18:6a4db94011d3 103 #if SPI1_ENABLED
sahilmgandhi 18:6a4db94011d3 104 {
sahilmgandhi 18:6a4db94011d3 105 SPI1_IRQ,
sahilmgandhi 18:6a4db94011d3 106 (uint32_t) SPI1_TWI1_IRQHandler
sahilmgandhi 18:6a4db94011d3 107 },
sahilmgandhi 18:6a4db94011d3 108 #endif
sahilmgandhi 18:6a4db94011d3 109 #if SPI2_ENABLED
sahilmgandhi 18:6a4db94011d3 110 {
sahilmgandhi 18:6a4db94011d3 111 SPI2_IRQ,
sahilmgandhi 18:6a4db94011d3 112 (uint32_t) SPIM2_SPIS2_SPI2_IRQHandler
sahilmgandhi 18:6a4db94011d3 113 },
sahilmgandhi 18:6a4db94011d3 114 #endif
sahilmgandhi 18:6a4db94011d3 115 };
sahilmgandhi 18:6a4db94011d3 116
sahilmgandhi 18:6a4db94011d3 117
sahilmgandhi 18:6a4db94011d3 118 static sdk_driver_instances_t m_instances[SPI_COUNT] = {
sahilmgandhi 18:6a4db94011d3 119 #if SPI0_ENABLED
sahilmgandhi 18:6a4db94011d3 120 {
sahilmgandhi 18:6a4db94011d3 121 NRF_DRV_SPI_INSTANCE(0),
sahilmgandhi 18:6a4db94011d3 122 NRF_DRV_SPIS_INSTANCE(0)
sahilmgandhi 18:6a4db94011d3 123 },
sahilmgandhi 18:6a4db94011d3 124 #endif
sahilmgandhi 18:6a4db94011d3 125 #if SPI1_ENABLED
sahilmgandhi 18:6a4db94011d3 126 {
sahilmgandhi 18:6a4db94011d3 127 NRF_DRV_SPI_INSTANCE(1),
sahilmgandhi 18:6a4db94011d3 128 NRF_DRV_SPIS_INSTANCE(1)
sahilmgandhi 18:6a4db94011d3 129 },
sahilmgandhi 18:6a4db94011d3 130 #endif
sahilmgandhi 18:6a4db94011d3 131 #if SPI2_ENABLED
sahilmgandhi 18:6a4db94011d3 132 {
sahilmgandhi 18:6a4db94011d3 133 NRF_DRV_SPI_INSTANCE(2),
sahilmgandhi 18:6a4db94011d3 134 NRF_DRV_SPIS_INSTANCE(2)
sahilmgandhi 18:6a4db94011d3 135 },
sahilmgandhi 18:6a4db94011d3 136 #endif
sahilmgandhi 18:6a4db94011d3 137 };
sahilmgandhi 18:6a4db94011d3 138
sahilmgandhi 18:6a4db94011d3 139 static void master_event_handler(uint8_t spi_idx,
sahilmgandhi 18:6a4db94011d3 140 nrf_drv_spi_evt_t const *p_event)
sahilmgandhi 18:6a4db94011d3 141 {
sahilmgandhi 18:6a4db94011d3 142 spi_info_t *p_spi_info = &m_spi_info[spi_idx];
sahilmgandhi 18:6a4db94011d3 143
sahilmgandhi 18:6a4db94011d3 144 if (p_event->type == NRF_DRV_SPI_EVENT_DONE)
sahilmgandhi 18:6a4db94011d3 145 {
sahilmgandhi 18:6a4db94011d3 146 p_spi_info->flag.busy = false;
sahilmgandhi 18:6a4db94011d3 147 if (p_spi_info->handler)
sahilmgandhi 18:6a4db94011d3 148 {
sahilmgandhi 18:6a4db94011d3 149 void (*handler)(void) = (void (*)(void))p_spi_info->handler;
sahilmgandhi 18:6a4db94011d3 150 p_spi_info->handler = 0;
sahilmgandhi 18:6a4db94011d3 151 handler();
sahilmgandhi 18:6a4db94011d3 152 }
sahilmgandhi 18:6a4db94011d3 153 }
sahilmgandhi 18:6a4db94011d3 154 }
sahilmgandhi 18:6a4db94011d3 155 #define MASTER_EVENT_HANDLER(idx) \
sahilmgandhi 18:6a4db94011d3 156 static void master_event_handler_##idx(nrf_drv_spi_evt_t const *p_event) { \
sahilmgandhi 18:6a4db94011d3 157 master_event_handler(SPI##idx##_INSTANCE_INDEX, p_event); \
sahilmgandhi 18:6a4db94011d3 158 }
sahilmgandhi 18:6a4db94011d3 159 #if SPI0_ENABLED
sahilmgandhi 18:6a4db94011d3 160 MASTER_EVENT_HANDLER(0)
sahilmgandhi 18:6a4db94011d3 161 #endif
sahilmgandhi 18:6a4db94011d3 162 #if SPI1_ENABLED
sahilmgandhi 18:6a4db94011d3 163 MASTER_EVENT_HANDLER(1)
sahilmgandhi 18:6a4db94011d3 164 #endif
sahilmgandhi 18:6a4db94011d3 165 #if SPI2_ENABLED
sahilmgandhi 18:6a4db94011d3 166 MASTER_EVENT_HANDLER(2)
sahilmgandhi 18:6a4db94011d3 167 #endif
sahilmgandhi 18:6a4db94011d3 168
sahilmgandhi 18:6a4db94011d3 169 static nrf_drv_spi_handler_t const m_master_event_handlers[SPI_COUNT] = {
sahilmgandhi 18:6a4db94011d3 170 #if SPI0_ENABLED
sahilmgandhi 18:6a4db94011d3 171 master_event_handler_0,
sahilmgandhi 18:6a4db94011d3 172 #endif
sahilmgandhi 18:6a4db94011d3 173 #if SPI1_ENABLED
sahilmgandhi 18:6a4db94011d3 174 master_event_handler_1,
sahilmgandhi 18:6a4db94011d3 175 #endif
sahilmgandhi 18:6a4db94011d3 176 #if SPI2_ENABLED
sahilmgandhi 18:6a4db94011d3 177 master_event_handler_2,
sahilmgandhi 18:6a4db94011d3 178 #endif
sahilmgandhi 18:6a4db94011d3 179 };
sahilmgandhi 18:6a4db94011d3 180
sahilmgandhi 18:6a4db94011d3 181
sahilmgandhi 18:6a4db94011d3 182 static void slave_event_handler(uint8_t spi_idx,
sahilmgandhi 18:6a4db94011d3 183 nrf_drv_spis_event_t event)
sahilmgandhi 18:6a4db94011d3 184 {
sahilmgandhi 18:6a4db94011d3 185 spi_info_t *p_spi_info = &m_spi_info[spi_idx];
sahilmgandhi 18:6a4db94011d3 186
sahilmgandhi 18:6a4db94011d3 187 if (event.evt_type == NRF_DRV_SPIS_XFER_DONE)
sahilmgandhi 18:6a4db94011d3 188 {
sahilmgandhi 18:6a4db94011d3 189 // Signal that there is some data received that could be read.
sahilmgandhi 18:6a4db94011d3 190 p_spi_info->flag.readable = true;
sahilmgandhi 18:6a4db94011d3 191
sahilmgandhi 18:6a4db94011d3 192 // And prepare for the next transfer.
sahilmgandhi 18:6a4db94011d3 193 // Previous data set in 'spi_slave_write' (if any) has been transmitted,
sahilmgandhi 18:6a4db94011d3 194 // now use the default one, until some new is set by 'spi_slave_write'.
sahilmgandhi 18:6a4db94011d3 195 p_spi_info->tx_buf = SPIS_DEFAULT_ORC;
sahilmgandhi 18:6a4db94011d3 196 nrf_drv_spis_buffers_set(&m_instances[spi_idx].slave,
sahilmgandhi 18:6a4db94011d3 197 (uint8_t const *)&p_spi_info->tx_buf, 1,
sahilmgandhi 18:6a4db94011d3 198 (uint8_t *)&p_spi_info->rx_buf, 1);
sahilmgandhi 18:6a4db94011d3 199 }
sahilmgandhi 18:6a4db94011d3 200 }
sahilmgandhi 18:6a4db94011d3 201 #define SLAVE_EVENT_HANDLER(idx) \
sahilmgandhi 18:6a4db94011d3 202 static void slave_event_handler_##idx(nrf_drv_spis_event_t event) { \
sahilmgandhi 18:6a4db94011d3 203 slave_event_handler(SPIS##idx##_INSTANCE_INDEX, event); \
sahilmgandhi 18:6a4db94011d3 204 }
sahilmgandhi 18:6a4db94011d3 205 #if SPIS0_ENABLED
sahilmgandhi 18:6a4db94011d3 206 SLAVE_EVENT_HANDLER(0)
sahilmgandhi 18:6a4db94011d3 207 #endif
sahilmgandhi 18:6a4db94011d3 208 #if SPIS1_ENABLED
sahilmgandhi 18:6a4db94011d3 209 SLAVE_EVENT_HANDLER(1)
sahilmgandhi 18:6a4db94011d3 210 #endif
sahilmgandhi 18:6a4db94011d3 211 #if SPIS2_ENABLED
sahilmgandhi 18:6a4db94011d3 212 SLAVE_EVENT_HANDLER(2)
sahilmgandhi 18:6a4db94011d3 213 #endif
sahilmgandhi 18:6a4db94011d3 214
sahilmgandhi 18:6a4db94011d3 215 static nrf_drv_spis_event_handler_t const m_slave_event_handlers[SPIS_COUNT] = {
sahilmgandhi 18:6a4db94011d3 216 #if SPIS0_ENABLED
sahilmgandhi 18:6a4db94011d3 217 slave_event_handler_0,
sahilmgandhi 18:6a4db94011d3 218 #endif
sahilmgandhi 18:6a4db94011d3 219 #if SPIS1_ENABLED
sahilmgandhi 18:6a4db94011d3 220 slave_event_handler_1,
sahilmgandhi 18:6a4db94011d3 221 #endif
sahilmgandhi 18:6a4db94011d3 222 #if SPIS2_ENABLED
sahilmgandhi 18:6a4db94011d3 223 slave_event_handler_2,
sahilmgandhi 18:6a4db94011d3 224 #endif
sahilmgandhi 18:6a4db94011d3 225 };
sahilmgandhi 18:6a4db94011d3 226
sahilmgandhi 18:6a4db94011d3 227 static void prepare_master_config(nrf_drv_spi_config_t *p_config,
sahilmgandhi 18:6a4db94011d3 228 spi_info_t const *p_spi_info)
sahilmgandhi 18:6a4db94011d3 229 {
sahilmgandhi 18:6a4db94011d3 230 p_config->sck_pin = p_spi_info->sck_pin;
sahilmgandhi 18:6a4db94011d3 231 p_config->mosi_pin = p_spi_info->mosi_pin;
sahilmgandhi 18:6a4db94011d3 232 p_config->miso_pin = p_spi_info->miso_pin;
sahilmgandhi 18:6a4db94011d3 233 p_config->ss_pin = p_spi_info->ss_pin;
sahilmgandhi 18:6a4db94011d3 234 p_config->frequency = p_spi_info->frequency;
sahilmgandhi 18:6a4db94011d3 235 p_config->mode = (nrf_drv_spi_mode_t)p_spi_info->spi_mode;
sahilmgandhi 18:6a4db94011d3 236
sahilmgandhi 18:6a4db94011d3 237 p_config->irq_priority = SPI_DEFAULT_CONFIG_IRQ_PRIORITY;
sahilmgandhi 18:6a4db94011d3 238 p_config->orc = 0xFF;
sahilmgandhi 18:6a4db94011d3 239 p_config->bit_order = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST;
sahilmgandhi 18:6a4db94011d3 240 }
sahilmgandhi 18:6a4db94011d3 241
sahilmgandhi 18:6a4db94011d3 242 static void prepare_slave_config(nrf_drv_spis_config_t *p_config,
sahilmgandhi 18:6a4db94011d3 243 spi_info_t const *p_spi_info)
sahilmgandhi 18:6a4db94011d3 244 {
sahilmgandhi 18:6a4db94011d3 245 p_config->sck_pin = p_spi_info->sck_pin;
sahilmgandhi 18:6a4db94011d3 246 p_config->mosi_pin = p_spi_info->mosi_pin;
sahilmgandhi 18:6a4db94011d3 247 p_config->miso_pin = p_spi_info->miso_pin;
sahilmgandhi 18:6a4db94011d3 248 p_config->csn_pin = p_spi_info->ss_pin;
sahilmgandhi 18:6a4db94011d3 249 p_config->mode = (nrf_drv_spis_mode_t)p_spi_info->spi_mode;
sahilmgandhi 18:6a4db94011d3 250
sahilmgandhi 18:6a4db94011d3 251 p_config->irq_priority = SPIS_DEFAULT_CONFIG_IRQ_PRIORITY;
sahilmgandhi 18:6a4db94011d3 252 p_config->orc = SPIS_DEFAULT_ORC;
sahilmgandhi 18:6a4db94011d3 253 p_config->def = SPIS_DEFAULT_DEF;
sahilmgandhi 18:6a4db94011d3 254 p_config->bit_order = NRF_DRV_SPIS_BIT_ORDER_MSB_FIRST;
sahilmgandhi 18:6a4db94011d3 255 p_config->csn_pullup = NRF_DRV_SPIS_DEFAULT_CSN_PULLUP;
sahilmgandhi 18:6a4db94011d3 256 p_config->miso_drive = NRF_DRV_SPIS_DEFAULT_MISO_DRIVE;
sahilmgandhi 18:6a4db94011d3 257 }
sahilmgandhi 18:6a4db94011d3 258
sahilmgandhi 18:6a4db94011d3 259 void spi_init(spi_t *obj,
sahilmgandhi 18:6a4db94011d3 260 PinName mosi, PinName miso, PinName sclk, PinName ssel)
sahilmgandhi 18:6a4db94011d3 261 {
sahilmgandhi 18:6a4db94011d3 262 int i;
sahilmgandhi 18:6a4db94011d3 263
sahilmgandhi 18:6a4db94011d3 264 // This block is only a workaround that allows to create SPI object several
sahilmgandhi 18:6a4db94011d3 265 // times, what would be otherwise impossible in the current implementation
sahilmgandhi 18:6a4db94011d3 266 // of mbed driver that does not call spi_free() from SPI destructor.
sahilmgandhi 18:6a4db94011d3 267 // Once this mbed's imperfection is corrected, this block should be removed.
sahilmgandhi 18:6a4db94011d3 268 for (i = 0; i < SPI_COUNT; ++i)
sahilmgandhi 18:6a4db94011d3 269 {
sahilmgandhi 18:6a4db94011d3 270 spi_info_t *p_spi_info = &m_spi_info[i];
sahilmgandhi 18:6a4db94011d3 271
sahilmgandhi 18:6a4db94011d3 272 if (p_spi_info->initialized &&
sahilmgandhi 18:6a4db94011d3 273 p_spi_info->mosi_pin == (uint8_t)mosi &&
sahilmgandhi 18:6a4db94011d3 274 p_spi_info->miso_pin == (uint8_t)miso &&
sahilmgandhi 18:6a4db94011d3 275 p_spi_info->sck_pin == (uint8_t)sclk &&
sahilmgandhi 18:6a4db94011d3 276 p_spi_info->ss_pin == (uint8_t)ssel)
sahilmgandhi 18:6a4db94011d3 277 {
sahilmgandhi 18:6a4db94011d3 278 // Reuse the already allocated SPI instance (instead of allocating
sahilmgandhi 18:6a4db94011d3 279 // a new one), if it appears to be initialized with exactly the same
sahilmgandhi 18:6a4db94011d3 280 // pin assignments.
sahilmgandhi 18:6a4db94011d3 281 SPI_IDX(obj) = i;
sahilmgandhi 18:6a4db94011d3 282 return;
sahilmgandhi 18:6a4db94011d3 283 }
sahilmgandhi 18:6a4db94011d3 284 }
sahilmgandhi 18:6a4db94011d3 285
sahilmgandhi 18:6a4db94011d3 286 for (i = 0; i < SPI_COUNT; ++i)
sahilmgandhi 18:6a4db94011d3 287 {
sahilmgandhi 18:6a4db94011d3 288 spi_info_t *p_spi_info = &m_spi_info[i];
sahilmgandhi 18:6a4db94011d3 289
sahilmgandhi 18:6a4db94011d3 290 if (!p_spi_info->initialized)
sahilmgandhi 18:6a4db94011d3 291 {
sahilmgandhi 18:6a4db94011d3 292 p_spi_info->sck_pin = (uint8_t)sclk;
sahilmgandhi 18:6a4db94011d3 293 p_spi_info->mosi_pin = (mosi != NC) ?
sahilmgandhi 18:6a4db94011d3 294 (uint8_t)mosi : NRF_DRV_SPI_PIN_NOT_USED;
sahilmgandhi 18:6a4db94011d3 295 p_spi_info->miso_pin = (miso != NC) ?
sahilmgandhi 18:6a4db94011d3 296 (uint8_t)miso : NRF_DRV_SPI_PIN_NOT_USED;
sahilmgandhi 18:6a4db94011d3 297 p_spi_info->ss_pin = (ssel != NC) ?
sahilmgandhi 18:6a4db94011d3 298 (uint8_t)ssel : NRF_DRV_SPI_PIN_NOT_USED;
sahilmgandhi 18:6a4db94011d3 299 p_spi_info->spi_mode = (uint8_t)NRF_DRV_SPI_MODE_0;
sahilmgandhi 18:6a4db94011d3 300 p_spi_info->frequency = NRF_DRV_SPI_FREQ_1M;
sahilmgandhi 18:6a4db94011d3 301
sahilmgandhi 18:6a4db94011d3 302 NVIC_SetVector(spi_handler_desc[i].IRQn, spi_handler_desc[i].vector);
sahilmgandhi 18:6a4db94011d3 303
sahilmgandhi 18:6a4db94011d3 304 // By default each SPI instance is initialized to work as a master.
sahilmgandhi 18:6a4db94011d3 305 // Should the slave mode be used, the instance will be reconfigured
sahilmgandhi 18:6a4db94011d3 306 // appropriately in 'spi_format'.
sahilmgandhi 18:6a4db94011d3 307 nrf_drv_spi_config_t config;
sahilmgandhi 18:6a4db94011d3 308 prepare_master_config(&config, p_spi_info);
sahilmgandhi 18:6a4db94011d3 309
sahilmgandhi 18:6a4db94011d3 310 nrf_drv_spi_t const *p_spi = &m_instances[i].master;
sahilmgandhi 18:6a4db94011d3 311 ret_code_t ret_code = nrf_drv_spi_init(p_spi,
sahilmgandhi 18:6a4db94011d3 312 &config, m_master_event_handlers[i]);
sahilmgandhi 18:6a4db94011d3 313 if (ret_code == NRF_SUCCESS)
sahilmgandhi 18:6a4db94011d3 314 {
sahilmgandhi 18:6a4db94011d3 315 p_spi_info->initialized = true;
sahilmgandhi 18:6a4db94011d3 316 p_spi_info->master = true;
sahilmgandhi 18:6a4db94011d3 317 p_spi_info->flag.busy = false;
sahilmgandhi 18:6a4db94011d3 318 #if DEVICE_SPI_ASYNCH
sahilmgandhi 18:6a4db94011d3 319 p_spi_info->handler = 0;
sahilmgandhi 18:6a4db94011d3 320 #endif
sahilmgandhi 18:6a4db94011d3 321 SPI_IDX(obj) = i;
sahilmgandhi 18:6a4db94011d3 322
sahilmgandhi 18:6a4db94011d3 323 return;
sahilmgandhi 18:6a4db94011d3 324 }
sahilmgandhi 18:6a4db94011d3 325 }
sahilmgandhi 18:6a4db94011d3 326 }
sahilmgandhi 18:6a4db94011d3 327
sahilmgandhi 18:6a4db94011d3 328 // No available peripheral
sahilmgandhi 18:6a4db94011d3 329 error("No available SPI peripheral\r\n");
sahilmgandhi 18:6a4db94011d3 330 }
sahilmgandhi 18:6a4db94011d3 331
sahilmgandhi 18:6a4db94011d3 332 void spi_free(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 333 {
sahilmgandhi 18:6a4db94011d3 334 spi_info_t *p_spi_info = SPI_INFO(obj);
sahilmgandhi 18:6a4db94011d3 335
sahilmgandhi 18:6a4db94011d3 336 if (p_spi_info->master)
sahilmgandhi 18:6a4db94011d3 337 {
sahilmgandhi 18:6a4db94011d3 338 nrf_drv_spi_uninit(MASTER_INST(obj));
sahilmgandhi 18:6a4db94011d3 339 }
sahilmgandhi 18:6a4db94011d3 340 else
sahilmgandhi 18:6a4db94011d3 341 {
sahilmgandhi 18:6a4db94011d3 342 nrf_drv_spis_uninit(SLAVE_INST(obj));
sahilmgandhi 18:6a4db94011d3 343 }
sahilmgandhi 18:6a4db94011d3 344 p_spi_info->initialized = false;
sahilmgandhi 18:6a4db94011d3 345 }
sahilmgandhi 18:6a4db94011d3 346
sahilmgandhi 18:6a4db94011d3 347 int spi_busy(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 348 {
sahilmgandhi 18:6a4db94011d3 349 return (int)(SPI_INFO(obj)->flag.busy);
sahilmgandhi 18:6a4db94011d3 350 }
sahilmgandhi 18:6a4db94011d3 351
sahilmgandhi 18:6a4db94011d3 352 void spi_format(spi_t *obj, int bits, int mode, int slave)
sahilmgandhi 18:6a4db94011d3 353 {
sahilmgandhi 18:6a4db94011d3 354 if (bits != 8)
sahilmgandhi 18:6a4db94011d3 355 {
sahilmgandhi 18:6a4db94011d3 356 error("Only 8-bits SPI is supported\r\n");
sahilmgandhi 18:6a4db94011d3 357 }
sahilmgandhi 18:6a4db94011d3 358 if (mode > 3)
sahilmgandhi 18:6a4db94011d3 359 {
sahilmgandhi 18:6a4db94011d3 360 error("SPI format error\r\n");
sahilmgandhi 18:6a4db94011d3 361 }
sahilmgandhi 18:6a4db94011d3 362
sahilmgandhi 18:6a4db94011d3 363 spi_info_t *p_spi_info = SPI_INFO(obj);
sahilmgandhi 18:6a4db94011d3 364
sahilmgandhi 18:6a4db94011d3 365 if (slave)
sahilmgandhi 18:6a4db94011d3 366 {
sahilmgandhi 18:6a4db94011d3 367 nrf_drv_spis_mode_t spi_modes[4] = {
sahilmgandhi 18:6a4db94011d3 368 NRF_DRV_SPIS_MODE_0,
sahilmgandhi 18:6a4db94011d3 369 NRF_DRV_SPIS_MODE_1,
sahilmgandhi 18:6a4db94011d3 370 NRF_DRV_SPIS_MODE_2,
sahilmgandhi 18:6a4db94011d3 371 NRF_DRV_SPIS_MODE_3,
sahilmgandhi 18:6a4db94011d3 372 };
sahilmgandhi 18:6a4db94011d3 373 nrf_drv_spis_mode_t new_mode = spi_modes[mode];
sahilmgandhi 18:6a4db94011d3 374
sahilmgandhi 18:6a4db94011d3 375 // If the peripheral is currently working as a master, the SDK driver
sahilmgandhi 18:6a4db94011d3 376 // it uses needs to be switched from SPI to SPIS.
sahilmgandhi 18:6a4db94011d3 377 if (p_spi_info->master)
sahilmgandhi 18:6a4db94011d3 378 {
sahilmgandhi 18:6a4db94011d3 379 nrf_drv_spi_uninit(MASTER_INST(obj));
sahilmgandhi 18:6a4db94011d3 380 }
sahilmgandhi 18:6a4db94011d3 381 // I the SPI mode has to be changed, the SDK's SPIS driver needs to be
sahilmgandhi 18:6a4db94011d3 382 // re-initialized (there is no other way to change its configuration).
sahilmgandhi 18:6a4db94011d3 383 else if (p_spi_info->spi_mode != (uint8_t)new_mode)
sahilmgandhi 18:6a4db94011d3 384 {
sahilmgandhi 18:6a4db94011d3 385 nrf_drv_spis_uninit(SLAVE_INST(obj));
sahilmgandhi 18:6a4db94011d3 386 }
sahilmgandhi 18:6a4db94011d3 387 else
sahilmgandhi 18:6a4db94011d3 388 {
sahilmgandhi 18:6a4db94011d3 389 return;
sahilmgandhi 18:6a4db94011d3 390 }
sahilmgandhi 18:6a4db94011d3 391
sahilmgandhi 18:6a4db94011d3 392 p_spi_info->spi_mode = (uint8_t)new_mode;
sahilmgandhi 18:6a4db94011d3 393 p_spi_info->master = false;
sahilmgandhi 18:6a4db94011d3 394 p_spi_info->flag.readable = false;
sahilmgandhi 18:6a4db94011d3 395
sahilmgandhi 18:6a4db94011d3 396 // Initialize SDK's SPIS driver with the new configuration.
sahilmgandhi 18:6a4db94011d3 397 nrf_drv_spis_config_t config;
sahilmgandhi 18:6a4db94011d3 398 prepare_slave_config(&config, p_spi_info);
sahilmgandhi 18:6a4db94011d3 399 (void)nrf_drv_spis_init(SLAVE_INST(obj), &config,
sahilmgandhi 18:6a4db94011d3 400 m_slave_event_handlers[SPI_IDX(obj)]);
sahilmgandhi 18:6a4db94011d3 401
sahilmgandhi 18:6a4db94011d3 402 // Prepare the slave for transfer.
sahilmgandhi 18:6a4db94011d3 403 p_spi_info->tx_buf = SPIS_DEFAULT_ORC;
sahilmgandhi 18:6a4db94011d3 404 nrf_drv_spis_buffers_set(SLAVE_INST(obj),
sahilmgandhi 18:6a4db94011d3 405 (uint8_t const *)&p_spi_info->tx_buf, 1,
sahilmgandhi 18:6a4db94011d3 406 (uint8_t *)&p_spi_info->rx_buf, 1);
sahilmgandhi 18:6a4db94011d3 407 }
sahilmgandhi 18:6a4db94011d3 408 else // master
sahilmgandhi 18:6a4db94011d3 409 {
sahilmgandhi 18:6a4db94011d3 410 nrf_drv_spi_mode_t spi_modes[4] = {
sahilmgandhi 18:6a4db94011d3 411 NRF_DRV_SPI_MODE_0,
sahilmgandhi 18:6a4db94011d3 412 NRF_DRV_SPI_MODE_1,
sahilmgandhi 18:6a4db94011d3 413 NRF_DRV_SPI_MODE_2,
sahilmgandhi 18:6a4db94011d3 414 NRF_DRV_SPI_MODE_3,
sahilmgandhi 18:6a4db94011d3 415 };
sahilmgandhi 18:6a4db94011d3 416 nrf_drv_spi_mode_t new_mode = spi_modes[mode];
sahilmgandhi 18:6a4db94011d3 417
sahilmgandhi 18:6a4db94011d3 418 // If the peripheral is currently working as a slave, the SDK driver
sahilmgandhi 18:6a4db94011d3 419 // it uses needs to be switched from SPIS to SPI.
sahilmgandhi 18:6a4db94011d3 420 if (!p_spi_info->master)
sahilmgandhi 18:6a4db94011d3 421 {
sahilmgandhi 18:6a4db94011d3 422 nrf_drv_spis_uninit(SLAVE_INST(obj));
sahilmgandhi 18:6a4db94011d3 423 }
sahilmgandhi 18:6a4db94011d3 424 // I the SPI mode has to be changed, the SDK's SPI driver needs to be
sahilmgandhi 18:6a4db94011d3 425 // re-initialized (there is no other way to change its configuration).
sahilmgandhi 18:6a4db94011d3 426 else if (p_spi_info->spi_mode != (uint8_t)new_mode)
sahilmgandhi 18:6a4db94011d3 427 {
sahilmgandhi 18:6a4db94011d3 428 nrf_drv_spi_uninit(MASTER_INST(obj));
sahilmgandhi 18:6a4db94011d3 429 }
sahilmgandhi 18:6a4db94011d3 430 else
sahilmgandhi 18:6a4db94011d3 431 {
sahilmgandhi 18:6a4db94011d3 432 return;
sahilmgandhi 18:6a4db94011d3 433 }
sahilmgandhi 18:6a4db94011d3 434
sahilmgandhi 18:6a4db94011d3 435 p_spi_info->spi_mode = (uint8_t)new_mode;
sahilmgandhi 18:6a4db94011d3 436 p_spi_info->master = true;
sahilmgandhi 18:6a4db94011d3 437 p_spi_info->flag.busy = false;
sahilmgandhi 18:6a4db94011d3 438
sahilmgandhi 18:6a4db94011d3 439 // Initialize SDK's SPI driver with the new configuration.
sahilmgandhi 18:6a4db94011d3 440 nrf_drv_spi_config_t config;
sahilmgandhi 18:6a4db94011d3 441 prepare_master_config(&config, p_spi_info);
sahilmgandhi 18:6a4db94011d3 442 (void)nrf_drv_spi_init(MASTER_INST(obj), &config,
sahilmgandhi 18:6a4db94011d3 443 m_master_event_handlers[SPI_IDX(obj)]);
sahilmgandhi 18:6a4db94011d3 444 }
sahilmgandhi 18:6a4db94011d3 445 }
sahilmgandhi 18:6a4db94011d3 446
sahilmgandhi 18:6a4db94011d3 447 static nrf_drv_spi_frequency_t freq_translate(int hz)
sahilmgandhi 18:6a4db94011d3 448 {
sahilmgandhi 18:6a4db94011d3 449 nrf_drv_spi_frequency_t frequency;
sahilmgandhi 18:6a4db94011d3 450
sahilmgandhi 18:6a4db94011d3 451 if (hz<250000) //125Kbps
sahilmgandhi 18:6a4db94011d3 452 {
sahilmgandhi 18:6a4db94011d3 453 frequency = NRF_DRV_SPI_FREQ_125K;
sahilmgandhi 18:6a4db94011d3 454 }
sahilmgandhi 18:6a4db94011d3 455 else if (hz<500000) //250Kbps
sahilmgandhi 18:6a4db94011d3 456 {
sahilmgandhi 18:6a4db94011d3 457 frequency = NRF_DRV_SPI_FREQ_250K;
sahilmgandhi 18:6a4db94011d3 458 }
sahilmgandhi 18:6a4db94011d3 459 else if (hz<1000000) //500Kbps
sahilmgandhi 18:6a4db94011d3 460 {
sahilmgandhi 18:6a4db94011d3 461 frequency = NRF_DRV_SPI_FREQ_500K;
sahilmgandhi 18:6a4db94011d3 462 }
sahilmgandhi 18:6a4db94011d3 463 else if (hz<2000000) //1Mbps
sahilmgandhi 18:6a4db94011d3 464 {
sahilmgandhi 18:6a4db94011d3 465 frequency = NRF_DRV_SPI_FREQ_1M;
sahilmgandhi 18:6a4db94011d3 466 }
sahilmgandhi 18:6a4db94011d3 467 else if (hz<4000000) //2Mbps
sahilmgandhi 18:6a4db94011d3 468 {
sahilmgandhi 18:6a4db94011d3 469 frequency = NRF_DRV_SPI_FREQ_2M;
sahilmgandhi 18:6a4db94011d3 470 }
sahilmgandhi 18:6a4db94011d3 471 else if (hz<8000000) //4Mbps
sahilmgandhi 18:6a4db94011d3 472 {
sahilmgandhi 18:6a4db94011d3 473 frequency = NRF_DRV_SPI_FREQ_4M;
sahilmgandhi 18:6a4db94011d3 474 }
sahilmgandhi 18:6a4db94011d3 475 else //8Mbps
sahilmgandhi 18:6a4db94011d3 476 {
sahilmgandhi 18:6a4db94011d3 477 frequency = NRF_DRV_SPI_FREQ_8M;
sahilmgandhi 18:6a4db94011d3 478 }
sahilmgandhi 18:6a4db94011d3 479 return frequency;
sahilmgandhi 18:6a4db94011d3 480 }
sahilmgandhi 18:6a4db94011d3 481
sahilmgandhi 18:6a4db94011d3 482 void spi_frequency(spi_t *obj, int hz)
sahilmgandhi 18:6a4db94011d3 483 {
sahilmgandhi 18:6a4db94011d3 484 spi_info_t *p_spi_info = SPI_INFO(obj);
sahilmgandhi 18:6a4db94011d3 485 nrf_drv_spi_frequency_t new_frequency = freq_translate(hz);
sahilmgandhi 18:6a4db94011d3 486
sahilmgandhi 18:6a4db94011d3 487 if (p_spi_info->master)
sahilmgandhi 18:6a4db94011d3 488 {
sahilmgandhi 18:6a4db94011d3 489 if (p_spi_info->frequency != new_frequency)
sahilmgandhi 18:6a4db94011d3 490 {
sahilmgandhi 18:6a4db94011d3 491 p_spi_info->frequency = new_frequency;
sahilmgandhi 18:6a4db94011d3 492
sahilmgandhi 18:6a4db94011d3 493 nrf_drv_spi_config_t config;
sahilmgandhi 18:6a4db94011d3 494 prepare_master_config(&config, p_spi_info);
sahilmgandhi 18:6a4db94011d3 495
sahilmgandhi 18:6a4db94011d3 496 nrf_drv_spi_t const *p_spi = MASTER_INST(obj);
sahilmgandhi 18:6a4db94011d3 497 nrf_drv_spi_uninit(p_spi);
sahilmgandhi 18:6a4db94011d3 498 (void)nrf_drv_spi_init(p_spi, &config,
sahilmgandhi 18:6a4db94011d3 499 m_master_event_handlers[SPI_IDX(obj)]);
sahilmgandhi 18:6a4db94011d3 500 }
sahilmgandhi 18:6a4db94011d3 501 }
sahilmgandhi 18:6a4db94011d3 502 // There is no need to set anything in slaves when it comes to frequency,
sahilmgandhi 18:6a4db94011d3 503 // since slaves just synchronize with the clock provided by a master.
sahilmgandhi 18:6a4db94011d3 504 }
sahilmgandhi 18:6a4db94011d3 505
sahilmgandhi 18:6a4db94011d3 506 int spi_master_write(spi_t *obj, int value)
sahilmgandhi 18:6a4db94011d3 507 {
sahilmgandhi 18:6a4db94011d3 508 spi_info_t *p_spi_info = SPI_INFO(obj);
sahilmgandhi 18:6a4db94011d3 509
sahilmgandhi 18:6a4db94011d3 510 #if DEVICE_SPI_ASYNCH
sahilmgandhi 18:6a4db94011d3 511
sahilmgandhi 18:6a4db94011d3 512 while (p_spi_info->flag.busy)
sahilmgandhi 18:6a4db94011d3 513 {
sahilmgandhi 18:6a4db94011d3 514 }
sahilmgandhi 18:6a4db94011d3 515 #endif
sahilmgandhi 18:6a4db94011d3 516
sahilmgandhi 18:6a4db94011d3 517 p_spi_info->tx_buf = value;
sahilmgandhi 18:6a4db94011d3 518 p_spi_info->flag.busy = true;
sahilmgandhi 18:6a4db94011d3 519 (void)nrf_drv_spi_transfer(MASTER_INST(obj),
sahilmgandhi 18:6a4db94011d3 520 (uint8_t const *)&p_spi_info->tx_buf, 1,
sahilmgandhi 18:6a4db94011d3 521 (uint8_t *)&p_spi_info->rx_buf, 1);
sahilmgandhi 18:6a4db94011d3 522
sahilmgandhi 18:6a4db94011d3 523 while (p_spi_info->flag.busy)
sahilmgandhi 18:6a4db94011d3 524 {
sahilmgandhi 18:6a4db94011d3 525 }
sahilmgandhi 18:6a4db94011d3 526
sahilmgandhi 18:6a4db94011d3 527 return p_spi_info->rx_buf;
sahilmgandhi 18:6a4db94011d3 528 }
sahilmgandhi 18:6a4db94011d3 529
sahilmgandhi 18:6a4db94011d3 530 int spi_slave_receive(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 531 {
sahilmgandhi 18:6a4db94011d3 532 spi_info_t *p_spi_info = SPI_INFO(obj);
sahilmgandhi 18:6a4db94011d3 533 MBED_ASSERT(!p_spi_info->master);
sahilmgandhi 18:6a4db94011d3 534 return p_spi_info->flag.readable;
sahilmgandhi 18:6a4db94011d3 535 }
sahilmgandhi 18:6a4db94011d3 536
sahilmgandhi 18:6a4db94011d3 537 int spi_slave_read(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 538 {
sahilmgandhi 18:6a4db94011d3 539 spi_info_t *p_spi_info = SPI_INFO(obj);
sahilmgandhi 18:6a4db94011d3 540 MBED_ASSERT(!p_spi_info->master);
sahilmgandhi 18:6a4db94011d3 541
sahilmgandhi 18:6a4db94011d3 542 while (!p_spi_info->flag.readable)
sahilmgandhi 18:6a4db94011d3 543 {
sahilmgandhi 18:6a4db94011d3 544 }
sahilmgandhi 18:6a4db94011d3 545 p_spi_info->flag.readable = false;
sahilmgandhi 18:6a4db94011d3 546 return p_spi_info->rx_buf;
sahilmgandhi 18:6a4db94011d3 547 }
sahilmgandhi 18:6a4db94011d3 548
sahilmgandhi 18:6a4db94011d3 549 void spi_slave_write(spi_t *obj, int value)
sahilmgandhi 18:6a4db94011d3 550 {
sahilmgandhi 18:6a4db94011d3 551 spi_info_t *p_spi_info = SPI_INFO(obj);
sahilmgandhi 18:6a4db94011d3 552 MBED_ASSERT(!p_spi_info->master);
sahilmgandhi 18:6a4db94011d3 553
sahilmgandhi 18:6a4db94011d3 554 p_spi_info->tx_buf = (uint8_t)value;
sahilmgandhi 18:6a4db94011d3 555 }
sahilmgandhi 18:6a4db94011d3 556
sahilmgandhi 18:6a4db94011d3 557 #if DEVICE_SPI_ASYNCH
sahilmgandhi 18:6a4db94011d3 558
sahilmgandhi 18:6a4db94011d3 559 void spi_master_transfer(spi_t *obj,
sahilmgandhi 18:6a4db94011d3 560 const void *tx, size_t tx_length,
sahilmgandhi 18:6a4db94011d3 561 void *rx, size_t rx_length, uint8_t bit_width,
sahilmgandhi 18:6a4db94011d3 562 uint32_t handler, uint32_t event, DMAUsage hint)
sahilmgandhi 18:6a4db94011d3 563 {
sahilmgandhi 18:6a4db94011d3 564 spi_info_t *p_spi_info = SPI_INFO(obj);
sahilmgandhi 18:6a4db94011d3 565 MBED_ASSERT(p_spi_info->master);
sahilmgandhi 18:6a4db94011d3 566 (void)hint;
sahilmgandhi 18:6a4db94011d3 567 (void)bit_width;
sahilmgandhi 18:6a4db94011d3 568
sahilmgandhi 18:6a4db94011d3 569 p_spi_info->handler = handler;
sahilmgandhi 18:6a4db94011d3 570 p_spi_info->event = event;
sahilmgandhi 18:6a4db94011d3 571
sahilmgandhi 18:6a4db94011d3 572 p_spi_info->flag.busy = true;
sahilmgandhi 18:6a4db94011d3 573 (void)nrf_drv_spi_transfer(MASTER_INST(obj),
sahilmgandhi 18:6a4db94011d3 574 (uint8_t const *)tx, tx_length,
sahilmgandhi 18:6a4db94011d3 575 (uint8_t *)rx, rx_length);
sahilmgandhi 18:6a4db94011d3 576 }
sahilmgandhi 18:6a4db94011d3 577
sahilmgandhi 18:6a4db94011d3 578 uint32_t spi_irq_handler_asynch(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 579 {
sahilmgandhi 18:6a4db94011d3 580 spi_info_t *p_spi_info = SPI_INFO(obj);
sahilmgandhi 18:6a4db94011d3 581 MBED_ASSERT(p_spi_info->master);
sahilmgandhi 18:6a4db94011d3 582 return p_spi_info->event & SPI_EVENT_COMPLETE;
sahilmgandhi 18:6a4db94011d3 583 }
sahilmgandhi 18:6a4db94011d3 584
sahilmgandhi 18:6a4db94011d3 585 uint8_t spi_active(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 586 {
sahilmgandhi 18:6a4db94011d3 587 spi_info_t *p_spi_info = SPI_INFO(obj);
sahilmgandhi 18:6a4db94011d3 588 MBED_ASSERT(p_spi_info->master);
sahilmgandhi 18:6a4db94011d3 589 return p_spi_info->flag.busy;
sahilmgandhi 18:6a4db94011d3 590 }
sahilmgandhi 18:6a4db94011d3 591
sahilmgandhi 18:6a4db94011d3 592 void spi_abort_asynch(spi_t *obj)
sahilmgandhi 18:6a4db94011d3 593 {
sahilmgandhi 18:6a4db94011d3 594 MBED_ASSERT(SPI_INFO(obj)->master);
sahilmgandhi 18:6a4db94011d3 595 nrf_drv_spi_abort(MASTER_INST(obj));
sahilmgandhi 18:6a4db94011d3 596 }
sahilmgandhi 18:6a4db94011d3 597
sahilmgandhi 18:6a4db94011d3 598 #endif // DEVICE_SPI_ASYNCH
sahilmgandhi 18:6a4db94011d3 599
sahilmgandhi 18:6a4db94011d3 600 #endif // DEVICE_SPI