Mouse code for the MacroRat
mbed-dev/targets/TARGET_NORDIC/TARGET_MCU_NRF51822/us_ticker.c@46:b156ef445742, 2017-06-03 (annotated)
- Committer:
- sahilmgandhi
- Date:
- Sat Jun 03 00:22:44 2017 +0000
- Revision:
- 46:b156ef445742
- Parent:
- 18:6a4db94011d3
Final code for internal battlebot competition.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
sahilmgandhi | 18:6a4db94011d3 | 1 | /* mbed Microcontroller Library |
sahilmgandhi | 18:6a4db94011d3 | 2 | * Copyright (c) 2013 Nordic Semiconductor |
sahilmgandhi | 18:6a4db94011d3 | 3 | * |
sahilmgandhi | 18:6a4db94011d3 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
sahilmgandhi | 18:6a4db94011d3 | 5 | * you may not use this file except in compliance with the License. |
sahilmgandhi | 18:6a4db94011d3 | 6 | * You may obtain a copy of the License at |
sahilmgandhi | 18:6a4db94011d3 | 7 | * |
sahilmgandhi | 18:6a4db94011d3 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
sahilmgandhi | 18:6a4db94011d3 | 9 | * |
sahilmgandhi | 18:6a4db94011d3 | 10 | * Unless required by applicable law or agreed to in writing, software |
sahilmgandhi | 18:6a4db94011d3 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
sahilmgandhi | 18:6a4db94011d3 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
sahilmgandhi | 18:6a4db94011d3 | 13 | * See the License for the specific language governing permissions and |
sahilmgandhi | 18:6a4db94011d3 | 14 | * limitations under the License. |
sahilmgandhi | 18:6a4db94011d3 | 15 | */ |
sahilmgandhi | 18:6a4db94011d3 | 16 | #include <stddef.h> |
sahilmgandhi | 18:6a4db94011d3 | 17 | #include <stdbool.h> |
sahilmgandhi | 18:6a4db94011d3 | 18 | #include "us_ticker_api.h" |
sahilmgandhi | 18:6a4db94011d3 | 19 | #include "cmsis.h" |
sahilmgandhi | 18:6a4db94011d3 | 20 | #include "PeripheralNames.h" |
sahilmgandhi | 18:6a4db94011d3 | 21 | #include "nrf_delay.h" |
sahilmgandhi | 18:6a4db94011d3 | 22 | #include "mbed_toolchain.h" |
sahilmgandhi | 18:6a4db94011d3 | 23 | |
sahilmgandhi | 18:6a4db94011d3 | 24 | /* |
sahilmgandhi | 18:6a4db94011d3 | 25 | * Note: The micro-second timer API on the nRF51 platform is implemented using |
sahilmgandhi | 18:6a4db94011d3 | 26 | * the RTC counter run at 32kHz (sourced from an external oscillator). This is |
sahilmgandhi | 18:6a4db94011d3 | 27 | * a trade-off between precision and power. Running a normal 32-bit MCU counter |
sahilmgandhi | 18:6a4db94011d3 | 28 | * at high frequency causes the average power consumption to rise to a few |
sahilmgandhi | 18:6a4db94011d3 | 29 | * hundred micro-amps, which is prohibitive for typical low-power BLE |
sahilmgandhi | 18:6a4db94011d3 | 30 | * applications. |
sahilmgandhi | 18:6a4db94011d3 | 31 | * A 32kHz clock doesn't offer the precision needed for keeping u-second time, |
sahilmgandhi | 18:6a4db94011d3 | 32 | * but we're assuming that this will not be a problem for the average user. |
sahilmgandhi | 18:6a4db94011d3 | 33 | */ |
sahilmgandhi | 18:6a4db94011d3 | 34 | |
sahilmgandhi | 18:6a4db94011d3 | 35 | #define MAX_RTC_COUNTER_VAL 0x00FFFFFF /**< Maximum value of the RTC counter. */ |
sahilmgandhi | 18:6a4db94011d3 | 36 | #define RTC_CLOCK_FREQ (uint32_t)(32768) |
sahilmgandhi | 18:6a4db94011d3 | 37 | #define RTC1_IRQ_PRI 3 /**< Priority of the RTC1 interrupt (used |
sahilmgandhi | 18:6a4db94011d3 | 38 | * for checking for timeouts and executing |
sahilmgandhi | 18:6a4db94011d3 | 39 | * timeout handlers). This must be the same |
sahilmgandhi | 18:6a4db94011d3 | 40 | * as APP_IRQ_PRIORITY_LOW; taken from the |
sahilmgandhi | 18:6a4db94011d3 | 41 | * Nordic SDK. */ |
sahilmgandhi | 18:6a4db94011d3 | 42 | #define MAX_RTC_TASKS_DELAY 47 /**< Maximum delay until an RTC task is executed. */ |
sahilmgandhi | 18:6a4db94011d3 | 43 | |
sahilmgandhi | 18:6a4db94011d3 | 44 | #define FUZZY_RTC_TICKS 2 /* RTC COMPARE occurs when a CC register is N and the RTC |
sahilmgandhi | 18:6a4db94011d3 | 45 | * COUNTER value transitions from N-1 to N. If we're trying to |
sahilmgandhi | 18:6a4db94011d3 | 46 | * setup a callback for a time which will arrive very shortly, |
sahilmgandhi | 18:6a4db94011d3 | 47 | * there are limits to how short the callback interval may be for us |
sahilmgandhi | 18:6a4db94011d3 | 48 | * to rely upon the RTC Compare trigger. If the COUNTER is N, |
sahilmgandhi | 18:6a4db94011d3 | 49 | * writing N+2 to a CC register is guaranteed to trigger a COMPARE |
sahilmgandhi | 18:6a4db94011d3 | 50 | * event at N+2. */ |
sahilmgandhi | 18:6a4db94011d3 | 51 | |
sahilmgandhi | 18:6a4db94011d3 | 52 | #define RTC_UNITS_TO_MICROSECONDS(RTC_UNITS) (((RTC_UNITS) * (uint64_t)1000000) / RTC_CLOCK_FREQ) |
sahilmgandhi | 18:6a4db94011d3 | 53 | #define MICROSECONDS_TO_RTC_UNITS(MICROS) ((((uint64_t)(MICROS) * RTC_CLOCK_FREQ) + 999999) / 1000000) |
sahilmgandhi | 18:6a4db94011d3 | 54 | |
sahilmgandhi | 18:6a4db94011d3 | 55 | static bool us_ticker_inited = false; |
sahilmgandhi | 18:6a4db94011d3 | 56 | static volatile uint32_t overflowCount; /**< The number of times the 24-bit RTC counter has overflowed. */ |
sahilmgandhi | 18:6a4db94011d3 | 57 | static volatile bool us_ticker_callbackPending = false; |
sahilmgandhi | 18:6a4db94011d3 | 58 | static uint32_t us_ticker_callbackTimestamp; |
sahilmgandhi | 18:6a4db94011d3 | 59 | static bool os_tick_started = false; /**< flag indicating if the os_tick has started */ |
sahilmgandhi | 18:6a4db94011d3 | 60 | /** |
sahilmgandhi | 18:6a4db94011d3 | 61 | * The value previously set in the capture compare register of channel 1 |
sahilmgandhi | 18:6a4db94011d3 | 62 | */ |
sahilmgandhi | 18:6a4db94011d3 | 63 | static uint32_t previous_tick_cc_value = 0; |
sahilmgandhi | 18:6a4db94011d3 | 64 | |
sahilmgandhi | 18:6a4db94011d3 | 65 | /* |
sahilmgandhi | 18:6a4db94011d3 | 66 | RTX provide the following definitions which are used by the tick code: |
sahilmgandhi | 18:6a4db94011d3 | 67 | * os_trv: The number (minus 1) of clock cycle between two tick. |
sahilmgandhi | 18:6a4db94011d3 | 68 | * os_clockrate: Time duration between two ticks (in us). |
sahilmgandhi | 18:6a4db94011d3 | 69 | * OS_Tick_Handler: The function which handle a tick event. |
sahilmgandhi | 18:6a4db94011d3 | 70 | This function is special because it never returns. |
sahilmgandhi | 18:6a4db94011d3 | 71 | Those definitions are used by the code which handle the os tick. |
sahilmgandhi | 18:6a4db94011d3 | 72 | To allow compilation of us_ticker programs without RTOS, those symbols are |
sahilmgandhi | 18:6a4db94011d3 | 73 | exported from this module as weak ones. |
sahilmgandhi | 18:6a4db94011d3 | 74 | */ |
sahilmgandhi | 18:6a4db94011d3 | 75 | MBED_WEAK uint32_t const os_trv; |
sahilmgandhi | 18:6a4db94011d3 | 76 | MBED_WEAK uint32_t const os_clockrate; |
sahilmgandhi | 18:6a4db94011d3 | 77 | MBED_WEAK void OS_Tick_Handler() { } |
sahilmgandhi | 18:6a4db94011d3 | 78 | |
sahilmgandhi | 18:6a4db94011d3 | 79 | static inline void rtc1_enableCompareInterrupt(void) |
sahilmgandhi | 18:6a4db94011d3 | 80 | { |
sahilmgandhi | 18:6a4db94011d3 | 81 | NRF_RTC1->EVTENCLR = RTC_EVTEN_COMPARE0_Msk; |
sahilmgandhi | 18:6a4db94011d3 | 82 | NRF_RTC1->INTENSET = RTC_INTENSET_COMPARE0_Msk; |
sahilmgandhi | 18:6a4db94011d3 | 83 | } |
sahilmgandhi | 18:6a4db94011d3 | 84 | |
sahilmgandhi | 18:6a4db94011d3 | 85 | static inline void rtc1_disableCompareInterrupt(void) |
sahilmgandhi | 18:6a4db94011d3 | 86 | { |
sahilmgandhi | 18:6a4db94011d3 | 87 | NRF_RTC1->INTENCLR = RTC_INTENSET_COMPARE0_Msk; |
sahilmgandhi | 18:6a4db94011d3 | 88 | NRF_RTC1->EVTENCLR = RTC_EVTEN_COMPARE0_Msk; |
sahilmgandhi | 18:6a4db94011d3 | 89 | } |
sahilmgandhi | 18:6a4db94011d3 | 90 | |
sahilmgandhi | 18:6a4db94011d3 | 91 | static inline void rtc1_enableOverflowInterrupt(void) |
sahilmgandhi | 18:6a4db94011d3 | 92 | { |
sahilmgandhi | 18:6a4db94011d3 | 93 | NRF_RTC1->EVTENCLR = RTC_EVTEN_OVRFLW_Msk; |
sahilmgandhi | 18:6a4db94011d3 | 94 | NRF_RTC1->INTENSET = RTC_INTENSET_OVRFLW_Msk; |
sahilmgandhi | 18:6a4db94011d3 | 95 | } |
sahilmgandhi | 18:6a4db94011d3 | 96 | |
sahilmgandhi | 18:6a4db94011d3 | 97 | static inline void rtc1_disableOverflowInterrupt(void) |
sahilmgandhi | 18:6a4db94011d3 | 98 | { |
sahilmgandhi | 18:6a4db94011d3 | 99 | NRF_RTC1->INTENCLR = RTC_INTENSET_OVRFLW_Msk; |
sahilmgandhi | 18:6a4db94011d3 | 100 | NRF_RTC1->EVTENCLR = RTC_EVTEN_OVRFLW_Msk; |
sahilmgandhi | 18:6a4db94011d3 | 101 | } |
sahilmgandhi | 18:6a4db94011d3 | 102 | |
sahilmgandhi | 18:6a4db94011d3 | 103 | static inline void invokeCallback(void) |
sahilmgandhi | 18:6a4db94011d3 | 104 | { |
sahilmgandhi | 18:6a4db94011d3 | 105 | us_ticker_callbackPending = false; |
sahilmgandhi | 18:6a4db94011d3 | 106 | rtc1_disableCompareInterrupt(); |
sahilmgandhi | 18:6a4db94011d3 | 107 | us_ticker_irq_handler(); |
sahilmgandhi | 18:6a4db94011d3 | 108 | } |
sahilmgandhi | 18:6a4db94011d3 | 109 | |
sahilmgandhi | 18:6a4db94011d3 | 110 | /** |
sahilmgandhi | 18:6a4db94011d3 | 111 | * @brief Function for starting the RTC1 timer. The RTC timer is expected to |
sahilmgandhi | 18:6a4db94011d3 | 112 | * keep running--some interrupts may be disabled temporarily. |
sahilmgandhi | 18:6a4db94011d3 | 113 | */ |
sahilmgandhi | 18:6a4db94011d3 | 114 | static void rtc1_start() |
sahilmgandhi | 18:6a4db94011d3 | 115 | { |
sahilmgandhi | 18:6a4db94011d3 | 116 | NRF_RTC1->PRESCALER = 0; /* for no pre-scaling. */ |
sahilmgandhi | 18:6a4db94011d3 | 117 | |
sahilmgandhi | 18:6a4db94011d3 | 118 | rtc1_enableOverflowInterrupt(); |
sahilmgandhi | 18:6a4db94011d3 | 119 | |
sahilmgandhi | 18:6a4db94011d3 | 120 | NVIC_SetPriority(RTC1_IRQn, RTC1_IRQ_PRI); |
sahilmgandhi | 18:6a4db94011d3 | 121 | NVIC_ClearPendingIRQ(RTC1_IRQn); |
sahilmgandhi | 18:6a4db94011d3 | 122 | NVIC_EnableIRQ(RTC1_IRQn); |
sahilmgandhi | 18:6a4db94011d3 | 123 | |
sahilmgandhi | 18:6a4db94011d3 | 124 | NRF_RTC1->TASKS_START = 1; |
sahilmgandhi | 18:6a4db94011d3 | 125 | nrf_delay_us(MAX_RTC_TASKS_DELAY); |
sahilmgandhi | 18:6a4db94011d3 | 126 | } |
sahilmgandhi | 18:6a4db94011d3 | 127 | |
sahilmgandhi | 18:6a4db94011d3 | 128 | /** |
sahilmgandhi | 18:6a4db94011d3 | 129 | * @brief Function for stopping the RTC1 timer. We don't expect to call this. |
sahilmgandhi | 18:6a4db94011d3 | 130 | */ |
sahilmgandhi | 18:6a4db94011d3 | 131 | void rtc1_stop(void) |
sahilmgandhi | 18:6a4db94011d3 | 132 | { |
sahilmgandhi | 18:6a4db94011d3 | 133 | // If the os tick has been started, RTC1 shouldn't be stopped |
sahilmgandhi | 18:6a4db94011d3 | 134 | // In that case, us ticker and overflow interrupt are disabled. |
sahilmgandhi | 18:6a4db94011d3 | 135 | if (os_tick_started) { |
sahilmgandhi | 18:6a4db94011d3 | 136 | rtc1_disableCompareInterrupt(); |
sahilmgandhi | 18:6a4db94011d3 | 137 | rtc1_disableOverflowInterrupt(); |
sahilmgandhi | 18:6a4db94011d3 | 138 | } else { |
sahilmgandhi | 18:6a4db94011d3 | 139 | NVIC_DisableIRQ(RTC1_IRQn); |
sahilmgandhi | 18:6a4db94011d3 | 140 | rtc1_disableCompareInterrupt(); |
sahilmgandhi | 18:6a4db94011d3 | 141 | rtc1_disableOverflowInterrupt(); |
sahilmgandhi | 18:6a4db94011d3 | 142 | |
sahilmgandhi | 18:6a4db94011d3 | 143 | NRF_RTC1->TASKS_STOP = 1; |
sahilmgandhi | 18:6a4db94011d3 | 144 | nrf_delay_us(MAX_RTC_TASKS_DELAY); |
sahilmgandhi | 18:6a4db94011d3 | 145 | |
sahilmgandhi | 18:6a4db94011d3 | 146 | NRF_RTC1->TASKS_CLEAR = 1; |
sahilmgandhi | 18:6a4db94011d3 | 147 | nrf_delay_us(MAX_RTC_TASKS_DELAY); |
sahilmgandhi | 18:6a4db94011d3 | 148 | } |
sahilmgandhi | 18:6a4db94011d3 | 149 | } |
sahilmgandhi | 18:6a4db94011d3 | 150 | |
sahilmgandhi | 18:6a4db94011d3 | 151 | /** |
sahilmgandhi | 18:6a4db94011d3 | 152 | * @brief Function for returning the current value of the RTC1 counter. |
sahilmgandhi | 18:6a4db94011d3 | 153 | * |
sahilmgandhi | 18:6a4db94011d3 | 154 | * @return Current RTC1 counter as a 64-bit value with 56-bit precision (even |
sahilmgandhi | 18:6a4db94011d3 | 155 | * though the underlying counter is 24-bit) |
sahilmgandhi | 18:6a4db94011d3 | 156 | */ |
sahilmgandhi | 18:6a4db94011d3 | 157 | static inline uint64_t rtc1_getCounter64(void) |
sahilmgandhi | 18:6a4db94011d3 | 158 | { |
sahilmgandhi | 18:6a4db94011d3 | 159 | if (NRF_RTC1->EVENTS_OVRFLW) { |
sahilmgandhi | 18:6a4db94011d3 | 160 | overflowCount++; |
sahilmgandhi | 18:6a4db94011d3 | 161 | NRF_RTC1->EVENTS_OVRFLW = 0; |
sahilmgandhi | 18:6a4db94011d3 | 162 | NRF_RTC1->EVTENCLR = RTC_EVTEN_OVRFLW_Msk; |
sahilmgandhi | 18:6a4db94011d3 | 163 | } |
sahilmgandhi | 18:6a4db94011d3 | 164 | return ((uint64_t)overflowCount << 24) | NRF_RTC1->COUNTER; |
sahilmgandhi | 18:6a4db94011d3 | 165 | } |
sahilmgandhi | 18:6a4db94011d3 | 166 | |
sahilmgandhi | 18:6a4db94011d3 | 167 | /** |
sahilmgandhi | 18:6a4db94011d3 | 168 | * @brief Function for returning the current value of the RTC1 counter. |
sahilmgandhi | 18:6a4db94011d3 | 169 | * |
sahilmgandhi | 18:6a4db94011d3 | 170 | * @return Current RTC1 counter as a 32-bit value (even though the underlying counter is 24-bit) |
sahilmgandhi | 18:6a4db94011d3 | 171 | */ |
sahilmgandhi | 18:6a4db94011d3 | 172 | static inline uint32_t rtc1_getCounter(void) |
sahilmgandhi | 18:6a4db94011d3 | 173 | { |
sahilmgandhi | 18:6a4db94011d3 | 174 | return rtc1_getCounter64(); |
sahilmgandhi | 18:6a4db94011d3 | 175 | } |
sahilmgandhi | 18:6a4db94011d3 | 176 | |
sahilmgandhi | 18:6a4db94011d3 | 177 | /** |
sahilmgandhi | 18:6a4db94011d3 | 178 | * @brief Function for handling the RTC1 interrupt for us ticker (capture compare channel 0 and overflow). |
sahilmgandhi | 18:6a4db94011d3 | 179 | * |
sahilmgandhi | 18:6a4db94011d3 | 180 | * @details Checks for timeouts, and executes timeout handlers for expired timers. |
sahilmgandhi | 18:6a4db94011d3 | 181 | */ |
sahilmgandhi | 18:6a4db94011d3 | 182 | void us_ticker_handler(void) |
sahilmgandhi | 18:6a4db94011d3 | 183 | { |
sahilmgandhi | 18:6a4db94011d3 | 184 | if (NRF_RTC1->EVENTS_OVRFLW) { |
sahilmgandhi | 18:6a4db94011d3 | 185 | overflowCount++; |
sahilmgandhi | 18:6a4db94011d3 | 186 | NRF_RTC1->EVENTS_OVRFLW = 0; |
sahilmgandhi | 18:6a4db94011d3 | 187 | NRF_RTC1->EVTENCLR = RTC_EVTEN_OVRFLW_Msk; |
sahilmgandhi | 18:6a4db94011d3 | 188 | } |
sahilmgandhi | 18:6a4db94011d3 | 189 | if (NRF_RTC1->EVENTS_COMPARE[0]) { |
sahilmgandhi | 18:6a4db94011d3 | 190 | NRF_RTC1->EVENTS_COMPARE[0] = 0; |
sahilmgandhi | 18:6a4db94011d3 | 191 | NRF_RTC1->EVTENCLR = RTC_EVTEN_COMPARE0_Msk; |
sahilmgandhi | 18:6a4db94011d3 | 192 | if (us_ticker_callbackPending && ((int)(us_ticker_callbackTimestamp - rtc1_getCounter()) <= 0)) |
sahilmgandhi | 18:6a4db94011d3 | 193 | invokeCallback(); |
sahilmgandhi | 18:6a4db94011d3 | 194 | } |
sahilmgandhi | 18:6a4db94011d3 | 195 | } |
sahilmgandhi | 18:6a4db94011d3 | 196 | |
sahilmgandhi | 18:6a4db94011d3 | 197 | void us_ticker_init(void) |
sahilmgandhi | 18:6a4db94011d3 | 198 | { |
sahilmgandhi | 18:6a4db94011d3 | 199 | if (us_ticker_inited) { |
sahilmgandhi | 18:6a4db94011d3 | 200 | return; |
sahilmgandhi | 18:6a4db94011d3 | 201 | } |
sahilmgandhi | 18:6a4db94011d3 | 202 | |
sahilmgandhi | 18:6a4db94011d3 | 203 | rtc1_start(); |
sahilmgandhi | 18:6a4db94011d3 | 204 | us_ticker_inited = true; |
sahilmgandhi | 18:6a4db94011d3 | 205 | } |
sahilmgandhi | 18:6a4db94011d3 | 206 | |
sahilmgandhi | 18:6a4db94011d3 | 207 | uint32_t us_ticker_read() |
sahilmgandhi | 18:6a4db94011d3 | 208 | { |
sahilmgandhi | 18:6a4db94011d3 | 209 | if (!us_ticker_inited) { |
sahilmgandhi | 18:6a4db94011d3 | 210 | us_ticker_init(); |
sahilmgandhi | 18:6a4db94011d3 | 211 | } |
sahilmgandhi | 18:6a4db94011d3 | 212 | |
sahilmgandhi | 18:6a4db94011d3 | 213 | /* Return a pseudo microsecond counter value. This is only as precise as the |
sahilmgandhi | 18:6a4db94011d3 | 214 | * 32khz low-freq clock source, but could be adequate.*/ |
sahilmgandhi | 18:6a4db94011d3 | 215 | return RTC_UNITS_TO_MICROSECONDS(rtc1_getCounter64()); |
sahilmgandhi | 18:6a4db94011d3 | 216 | } |
sahilmgandhi | 18:6a4db94011d3 | 217 | |
sahilmgandhi | 18:6a4db94011d3 | 218 | /** |
sahilmgandhi | 18:6a4db94011d3 | 219 | * Setup the us_ticker callback interrupt to go at the given timestamp. |
sahilmgandhi | 18:6a4db94011d3 | 220 | * |
sahilmgandhi | 18:6a4db94011d3 | 221 | * @Note: Only one callback is pending at any time. |
sahilmgandhi | 18:6a4db94011d3 | 222 | * |
sahilmgandhi | 18:6a4db94011d3 | 223 | * @Note: If a callback is pending, and this function is called again, the new |
sahilmgandhi | 18:6a4db94011d3 | 224 | * callback-time overrides the existing callback setting. It is the caller's |
sahilmgandhi | 18:6a4db94011d3 | 225 | * responsibility to ensure that this function is called to setup a callback for |
sahilmgandhi | 18:6a4db94011d3 | 226 | * the earliest timeout. |
sahilmgandhi | 18:6a4db94011d3 | 227 | * |
sahilmgandhi | 18:6a4db94011d3 | 228 | * @Note: If this function is used to setup an interrupt which is immediately |
sahilmgandhi | 18:6a4db94011d3 | 229 | * pending--such as for 'now' or a time in the past,--then the callback is |
sahilmgandhi | 18:6a4db94011d3 | 230 | * invoked a few ticks later. |
sahilmgandhi | 18:6a4db94011d3 | 231 | */ |
sahilmgandhi | 18:6a4db94011d3 | 232 | void us_ticker_set_interrupt(timestamp_t timestamp) |
sahilmgandhi | 18:6a4db94011d3 | 233 | { |
sahilmgandhi | 18:6a4db94011d3 | 234 | if (!us_ticker_inited) { |
sahilmgandhi | 18:6a4db94011d3 | 235 | us_ticker_init(); |
sahilmgandhi | 18:6a4db94011d3 | 236 | } |
sahilmgandhi | 18:6a4db94011d3 | 237 | |
sahilmgandhi | 18:6a4db94011d3 | 238 | /* |
sahilmgandhi | 18:6a4db94011d3 | 239 | * The argument to this function is a 32-bit microsecond timestamp for when |
sahilmgandhi | 18:6a4db94011d3 | 240 | * a callback should be invoked. On the nRF51, we use an RTC timer running |
sahilmgandhi | 18:6a4db94011d3 | 241 | * at 32kHz to implement a low-power us-ticker. This results in a problem |
sahilmgandhi | 18:6a4db94011d3 | 242 | * based on the fact that 1000000 is not a multiple of 32768. |
sahilmgandhi | 18:6a4db94011d3 | 243 | * |
sahilmgandhi | 18:6a4db94011d3 | 244 | * Going from a micro-second based timestamp to a 32kHz based RTC-time is a |
sahilmgandhi | 18:6a4db94011d3 | 245 | * linear mapping; but this mapping doesn't preserve wraparounds--i.e. when |
sahilmgandhi | 18:6a4db94011d3 | 246 | * the 32-bit micro-second timestamp wraps around unfortunately the |
sahilmgandhi | 18:6a4db94011d3 | 247 | * underlying RTC counter doesn't. The result is that timestamp expiry |
sahilmgandhi | 18:6a4db94011d3 | 248 | * checks on micro-second timestamps don't yield the same result when |
sahilmgandhi | 18:6a4db94011d3 | 249 | * applied on the corresponding RTC timestamp values. |
sahilmgandhi | 18:6a4db94011d3 | 250 | * |
sahilmgandhi | 18:6a4db94011d3 | 251 | * One solution is to translate the incoming 32-bit timestamp into a virtual |
sahilmgandhi | 18:6a4db94011d3 | 252 | * 64-bit timestamp based on the knowledge of system-uptime, and then use |
sahilmgandhi | 18:6a4db94011d3 | 253 | * this wraparound-free 64-bit value to do a linear mapping to RTC time. |
sahilmgandhi | 18:6a4db94011d3 | 254 | * System uptime on an nRF is maintained using the 24-bit RTC counter. We |
sahilmgandhi | 18:6a4db94011d3 | 255 | * track the overflow count to extend the 24-bit hardware counter by an |
sahilmgandhi | 18:6a4db94011d3 | 256 | * additional 32 bits. RTC_UNITS_TO_MICROSECONDS() converts this into |
sahilmgandhi | 18:6a4db94011d3 | 257 | * microsecond units (in 64-bits). |
sahilmgandhi | 18:6a4db94011d3 | 258 | */ |
sahilmgandhi | 18:6a4db94011d3 | 259 | const uint64_t currentTime64 = RTC_UNITS_TO_MICROSECONDS(rtc1_getCounter64()); |
sahilmgandhi | 18:6a4db94011d3 | 260 | uint64_t timestamp64 = (currentTime64 & ~(uint64_t)0xFFFFFFFFULL) + timestamp; |
sahilmgandhi | 18:6a4db94011d3 | 261 | if (((uint32_t)currentTime64 > 0x80000000) && (timestamp < 0x80000000)) { |
sahilmgandhi | 18:6a4db94011d3 | 262 | timestamp64 += (uint64_t)0x100000000ULL; |
sahilmgandhi | 18:6a4db94011d3 | 263 | } |
sahilmgandhi | 18:6a4db94011d3 | 264 | uint32_t newCallbackTime = MICROSECONDS_TO_RTC_UNITS(timestamp64); |
sahilmgandhi | 18:6a4db94011d3 | 265 | |
sahilmgandhi | 18:6a4db94011d3 | 266 | /* Check for repeat setup of an existing callback. This is actually not |
sahilmgandhi | 18:6a4db94011d3 | 267 | * important; the following code should work even without this check. */ |
sahilmgandhi | 18:6a4db94011d3 | 268 | if (us_ticker_callbackPending && (newCallbackTime == us_ticker_callbackTimestamp)) { |
sahilmgandhi | 18:6a4db94011d3 | 269 | return; |
sahilmgandhi | 18:6a4db94011d3 | 270 | } |
sahilmgandhi | 18:6a4db94011d3 | 271 | |
sahilmgandhi | 18:6a4db94011d3 | 272 | /* Check for callbacks which are immediately (or will *very* shortly become) pending. |
sahilmgandhi | 18:6a4db94011d3 | 273 | * Even if they are immediately pending, they are scheduled to trigger a few |
sahilmgandhi | 18:6a4db94011d3 | 274 | * ticks later. This keeps things simple by invoking the callback from an |
sahilmgandhi | 18:6a4db94011d3 | 275 | * independent interrupt context. */ |
sahilmgandhi | 18:6a4db94011d3 | 276 | if ((int)(newCallbackTime - rtc1_getCounter()) <= (int)FUZZY_RTC_TICKS) { |
sahilmgandhi | 18:6a4db94011d3 | 277 | newCallbackTime = rtc1_getCounter() + FUZZY_RTC_TICKS; |
sahilmgandhi | 18:6a4db94011d3 | 278 | } |
sahilmgandhi | 18:6a4db94011d3 | 279 | |
sahilmgandhi | 18:6a4db94011d3 | 280 | NRF_RTC1->CC[0] = newCallbackTime & MAX_RTC_COUNTER_VAL; |
sahilmgandhi | 18:6a4db94011d3 | 281 | us_ticker_callbackTimestamp = newCallbackTime; |
sahilmgandhi | 18:6a4db94011d3 | 282 | if (!us_ticker_callbackPending) { |
sahilmgandhi | 18:6a4db94011d3 | 283 | us_ticker_callbackPending = true; |
sahilmgandhi | 18:6a4db94011d3 | 284 | rtc1_enableCompareInterrupt(); |
sahilmgandhi | 18:6a4db94011d3 | 285 | } |
sahilmgandhi | 18:6a4db94011d3 | 286 | } |
sahilmgandhi | 18:6a4db94011d3 | 287 | |
sahilmgandhi | 18:6a4db94011d3 | 288 | void us_ticker_disable_interrupt(void) |
sahilmgandhi | 18:6a4db94011d3 | 289 | { |
sahilmgandhi | 18:6a4db94011d3 | 290 | if (us_ticker_callbackPending) { |
sahilmgandhi | 18:6a4db94011d3 | 291 | rtc1_disableCompareInterrupt(); |
sahilmgandhi | 18:6a4db94011d3 | 292 | us_ticker_callbackPending = false; |
sahilmgandhi | 18:6a4db94011d3 | 293 | } |
sahilmgandhi | 18:6a4db94011d3 | 294 | } |
sahilmgandhi | 18:6a4db94011d3 | 295 | |
sahilmgandhi | 18:6a4db94011d3 | 296 | void us_ticker_clear_interrupt(void) |
sahilmgandhi | 18:6a4db94011d3 | 297 | { |
sahilmgandhi | 18:6a4db94011d3 | 298 | NRF_RTC1->EVENTS_OVRFLW = 0; |
sahilmgandhi | 18:6a4db94011d3 | 299 | NRF_RTC1->EVENTS_COMPARE[0] = 0; |
sahilmgandhi | 18:6a4db94011d3 | 300 | } |
sahilmgandhi | 18:6a4db94011d3 | 301 | |
sahilmgandhi | 18:6a4db94011d3 | 302 | |
sahilmgandhi | 18:6a4db94011d3 | 303 | #if defined (__CC_ARM) /* ARMCC Compiler */ |
sahilmgandhi | 18:6a4db94011d3 | 304 | |
sahilmgandhi | 18:6a4db94011d3 | 305 | __asm void RTC1_IRQHandler(void) |
sahilmgandhi | 18:6a4db94011d3 | 306 | { |
sahilmgandhi | 18:6a4db94011d3 | 307 | IMPORT OS_Tick_Handler |
sahilmgandhi | 18:6a4db94011d3 | 308 | IMPORT us_ticker_handler |
sahilmgandhi | 18:6a4db94011d3 | 309 | |
sahilmgandhi | 18:6a4db94011d3 | 310 | /** |
sahilmgandhi | 18:6a4db94011d3 | 311 | * Chanel 1 of RTC1 is used by RTX as a systick. |
sahilmgandhi | 18:6a4db94011d3 | 312 | * If the compare event on channel 1 is set, then branch to OS_Tick_Handler. |
sahilmgandhi | 18:6a4db94011d3 | 313 | * Otherwise, just execute us_ticker_handler. |
sahilmgandhi | 18:6a4db94011d3 | 314 | * This function has to be written in assembly and tagged as naked because OS_Tick_Handler |
sahilmgandhi | 18:6a4db94011d3 | 315 | * will never return. |
sahilmgandhi | 18:6a4db94011d3 | 316 | * A c function would put lr on the stack before calling OS_Tick_Handler and this value |
sahilmgandhi | 18:6a4db94011d3 | 317 | * would never been dequeued. |
sahilmgandhi | 18:6a4db94011d3 | 318 | * |
sahilmgandhi | 18:6a4db94011d3 | 319 | * \code |
sahilmgandhi | 18:6a4db94011d3 | 320 | * void RTC1_IRQHandler(void) { |
sahilmgandhi | 18:6a4db94011d3 | 321 | if(NRF_RTC1->EVENTS_COMPARE[1]) { |
sahilmgandhi | 18:6a4db94011d3 | 322 | // never return... |
sahilmgandhi | 18:6a4db94011d3 | 323 | OS_Tick_Handler(); |
sahilmgandhi | 18:6a4db94011d3 | 324 | } else { |
sahilmgandhi | 18:6a4db94011d3 | 325 | us_ticker_handler(); |
sahilmgandhi | 18:6a4db94011d3 | 326 | } |
sahilmgandhi | 18:6a4db94011d3 | 327 | } |
sahilmgandhi | 18:6a4db94011d3 | 328 | * \endcode |
sahilmgandhi | 18:6a4db94011d3 | 329 | */ |
sahilmgandhi | 18:6a4db94011d3 | 330 | ldr r0,=0x40011144 |
sahilmgandhi | 18:6a4db94011d3 | 331 | ldr r1, [r0, #0] |
sahilmgandhi | 18:6a4db94011d3 | 332 | cmp r1, #0 |
sahilmgandhi | 18:6a4db94011d3 | 333 | beq US_TICKER_HANDLER |
sahilmgandhi | 18:6a4db94011d3 | 334 | bl OS_Tick_Handler |
sahilmgandhi | 18:6a4db94011d3 | 335 | US_TICKER_HANDLER |
sahilmgandhi | 18:6a4db94011d3 | 336 | push {r3, lr} |
sahilmgandhi | 18:6a4db94011d3 | 337 | bl us_ticker_handler |
sahilmgandhi | 18:6a4db94011d3 | 338 | pop {r3, pc} |
sahilmgandhi | 18:6a4db94011d3 | 339 | nop /* padding */ |
sahilmgandhi | 18:6a4db94011d3 | 340 | } |
sahilmgandhi | 18:6a4db94011d3 | 341 | |
sahilmgandhi | 18:6a4db94011d3 | 342 | #elif defined (__GNUC__) /* GNU Compiler */ |
sahilmgandhi | 18:6a4db94011d3 | 343 | |
sahilmgandhi | 18:6a4db94011d3 | 344 | __attribute__((naked)) void RTC1_IRQHandler(void) |
sahilmgandhi | 18:6a4db94011d3 | 345 | { |
sahilmgandhi | 18:6a4db94011d3 | 346 | /** |
sahilmgandhi | 18:6a4db94011d3 | 347 | * Chanel 1 of RTC1 is used by RTX as a systick. |
sahilmgandhi | 18:6a4db94011d3 | 348 | * If the compare event on channel 1 is set, then branch to OS_Tick_Handler. |
sahilmgandhi | 18:6a4db94011d3 | 349 | * Otherwise, just execute us_ticker_handler. |
sahilmgandhi | 18:6a4db94011d3 | 350 | * This function has to be written in assembly and tagged as naked because OS_Tick_Handler |
sahilmgandhi | 18:6a4db94011d3 | 351 | * will never return. |
sahilmgandhi | 18:6a4db94011d3 | 352 | * A c function would put lr on the stack before calling OS_Tick_Handler and this value |
sahilmgandhi | 18:6a4db94011d3 | 353 | * would never been dequeued. |
sahilmgandhi | 18:6a4db94011d3 | 354 | * |
sahilmgandhi | 18:6a4db94011d3 | 355 | * \code |
sahilmgandhi | 18:6a4db94011d3 | 356 | * void RTC1_IRQHandler(void) { |
sahilmgandhi | 18:6a4db94011d3 | 357 | if(NRF_RTC1->EVENTS_COMPARE[1]) { |
sahilmgandhi | 18:6a4db94011d3 | 358 | // never return... |
sahilmgandhi | 18:6a4db94011d3 | 359 | OS_Tick_Handler(); |
sahilmgandhi | 18:6a4db94011d3 | 360 | } else { |
sahilmgandhi | 18:6a4db94011d3 | 361 | us_ticker_handler(); |
sahilmgandhi | 18:6a4db94011d3 | 362 | } |
sahilmgandhi | 18:6a4db94011d3 | 363 | } |
sahilmgandhi | 18:6a4db94011d3 | 364 | * \endcode |
sahilmgandhi | 18:6a4db94011d3 | 365 | */ |
sahilmgandhi | 18:6a4db94011d3 | 366 | __asm__ ( |
sahilmgandhi | 18:6a4db94011d3 | 367 | "ldr r0,=0x40011144\n" |
sahilmgandhi | 18:6a4db94011d3 | 368 | "ldr r1, [r0, #0]\n" |
sahilmgandhi | 18:6a4db94011d3 | 369 | "cmp r1, #0\n" |
sahilmgandhi | 18:6a4db94011d3 | 370 | "beq US_TICKER_HANDLER\n" |
sahilmgandhi | 18:6a4db94011d3 | 371 | "bl OS_Tick_Handler\n" |
sahilmgandhi | 18:6a4db94011d3 | 372 | "US_TICKER_HANDLER:\n" |
sahilmgandhi | 18:6a4db94011d3 | 373 | "push {r3, lr}\n" |
sahilmgandhi | 18:6a4db94011d3 | 374 | "bl us_ticker_handler\n" |
sahilmgandhi | 18:6a4db94011d3 | 375 | "pop {r3, pc}\n" |
sahilmgandhi | 18:6a4db94011d3 | 376 | "nop" |
sahilmgandhi | 18:6a4db94011d3 | 377 | ); |
sahilmgandhi | 18:6a4db94011d3 | 378 | } |
sahilmgandhi | 18:6a4db94011d3 | 379 | |
sahilmgandhi | 18:6a4db94011d3 | 380 | #else |
sahilmgandhi | 18:6a4db94011d3 | 381 | |
sahilmgandhi | 18:6a4db94011d3 | 382 | #error Compiler not supported. |
sahilmgandhi | 18:6a4db94011d3 | 383 | #error Provide a definition of RTC1_IRQHandler. |
sahilmgandhi | 18:6a4db94011d3 | 384 | |
sahilmgandhi | 18:6a4db94011d3 | 385 | /* |
sahilmgandhi | 18:6a4db94011d3 | 386 | * Chanel 1 of RTC1 is used by RTX as a systick. |
sahilmgandhi | 18:6a4db94011d3 | 387 | * If the compare event on channel 1 is set, then branch to OS_Tick_Handler. |
sahilmgandhi | 18:6a4db94011d3 | 388 | * Otherwise, just execute us_ticker_handler. |
sahilmgandhi | 18:6a4db94011d3 | 389 | * This function has to be written in assembly and tagged as naked because OS_Tick_Handler |
sahilmgandhi | 18:6a4db94011d3 | 390 | * will never return. |
sahilmgandhi | 18:6a4db94011d3 | 391 | * A c function would put lr on the stack before calling OS_Tick_Handler and this value |
sahilmgandhi | 18:6a4db94011d3 | 392 | * will never been dequeued. After a certain time a stack overflow will happen. |
sahilmgandhi | 18:6a4db94011d3 | 393 | * |
sahilmgandhi | 18:6a4db94011d3 | 394 | * \code |
sahilmgandhi | 18:6a4db94011d3 | 395 | * void RTC1_IRQHandler(void) { |
sahilmgandhi | 18:6a4db94011d3 | 396 | if(NRF_RTC1->EVENTS_COMPARE[1]) { |
sahilmgandhi | 18:6a4db94011d3 | 397 | // never return... |
sahilmgandhi | 18:6a4db94011d3 | 398 | OS_Tick_Handler(); |
sahilmgandhi | 18:6a4db94011d3 | 399 | } else { |
sahilmgandhi | 18:6a4db94011d3 | 400 | us_ticker_handler(); |
sahilmgandhi | 18:6a4db94011d3 | 401 | } |
sahilmgandhi | 18:6a4db94011d3 | 402 | } |
sahilmgandhi | 18:6a4db94011d3 | 403 | * \endcode |
sahilmgandhi | 18:6a4db94011d3 | 404 | */ |
sahilmgandhi | 18:6a4db94011d3 | 405 | |
sahilmgandhi | 18:6a4db94011d3 | 406 | #endif |
sahilmgandhi | 18:6a4db94011d3 | 407 | |
sahilmgandhi | 18:6a4db94011d3 | 408 | /** |
sahilmgandhi | 18:6a4db94011d3 | 409 | * Return the next number of clock cycle needed for the next tick. |
sahilmgandhi | 18:6a4db94011d3 | 410 | * @note This function has been carrefuly optimized for a systick occuring every 1000us. |
sahilmgandhi | 18:6a4db94011d3 | 411 | */ |
sahilmgandhi | 18:6a4db94011d3 | 412 | static uint32_t get_next_tick_cc_delta() { |
sahilmgandhi | 18:6a4db94011d3 | 413 | uint32_t delta = 0; |
sahilmgandhi | 18:6a4db94011d3 | 414 | |
sahilmgandhi | 18:6a4db94011d3 | 415 | if (os_clockrate != 1000) { |
sahilmgandhi | 18:6a4db94011d3 | 416 | // In RTX, by default SYSTICK is is used. |
sahilmgandhi | 18:6a4db94011d3 | 417 | // A tick event is generated every os_trv + 1 clock cycles of the system timer. |
sahilmgandhi | 18:6a4db94011d3 | 418 | delta = os_trv + 1; |
sahilmgandhi | 18:6a4db94011d3 | 419 | } else { |
sahilmgandhi | 18:6a4db94011d3 | 420 | // If the clockrate is set to 1000us then 1000 tick should happen every second. |
sahilmgandhi | 18:6a4db94011d3 | 421 | // Unfortunatelly, when clockrate is set to 1000, os_trv is equal to 31. |
sahilmgandhi | 18:6a4db94011d3 | 422 | // If (os_trv + 1) is used as the delta value between two ticks, 1000 ticks will be |
sahilmgandhi | 18:6a4db94011d3 | 423 | // generated in 32000 clock cycle instead of 32768 clock cycles. |
sahilmgandhi | 18:6a4db94011d3 | 424 | // As a result, if a user schedule an OS timer to start in 100s, the timer will start |
sahilmgandhi | 18:6a4db94011d3 | 425 | // instead after 97.656s |
sahilmgandhi | 18:6a4db94011d3 | 426 | // The code below fix this issue, a clock rate of 1000s will generate 1000 ticks in 32768 |
sahilmgandhi | 18:6a4db94011d3 | 427 | // clock cycles. |
sahilmgandhi | 18:6a4db94011d3 | 428 | // The strategy is simple, for 1000 ticks: |
sahilmgandhi | 18:6a4db94011d3 | 429 | // * 768 ticks will occur 33 clock cycles after the previous tick |
sahilmgandhi | 18:6a4db94011d3 | 430 | // * 232 ticks will occur 32 clock cycles after the previous tick |
sahilmgandhi | 18:6a4db94011d3 | 431 | // By default every delta is equal to 33. |
sahilmgandhi | 18:6a4db94011d3 | 432 | // Every five ticks (20%, 200 delta in one second), the delta is equal to 32 |
sahilmgandhi | 18:6a4db94011d3 | 433 | // The remaining (32) deltas equal to 32 are distributed using primes numbers. |
sahilmgandhi | 18:6a4db94011d3 | 434 | static uint32_t counter = 0; |
sahilmgandhi | 18:6a4db94011d3 | 435 | if ((counter % 5) == 0 || (counter % 31) == 0 || (counter % 139) == 0 || (counter == 503)) { |
sahilmgandhi | 18:6a4db94011d3 | 436 | delta = 32; |
sahilmgandhi | 18:6a4db94011d3 | 437 | } else { |
sahilmgandhi | 18:6a4db94011d3 | 438 | delta = 33; |
sahilmgandhi | 18:6a4db94011d3 | 439 | } |
sahilmgandhi | 18:6a4db94011d3 | 440 | ++counter; |
sahilmgandhi | 18:6a4db94011d3 | 441 | if (counter == 1000) { |
sahilmgandhi | 18:6a4db94011d3 | 442 | counter = 0; |
sahilmgandhi | 18:6a4db94011d3 | 443 | } |
sahilmgandhi | 18:6a4db94011d3 | 444 | } |
sahilmgandhi | 18:6a4db94011d3 | 445 | return delta; |
sahilmgandhi | 18:6a4db94011d3 | 446 | } |
sahilmgandhi | 18:6a4db94011d3 | 447 | |
sahilmgandhi | 18:6a4db94011d3 | 448 | static inline void clear_tick_interrupt() { |
sahilmgandhi | 18:6a4db94011d3 | 449 | NRF_RTC1->EVENTS_COMPARE[1] = 0; |
sahilmgandhi | 18:6a4db94011d3 | 450 | NRF_RTC1->EVTENCLR = (1 << 17); |
sahilmgandhi | 18:6a4db94011d3 | 451 | } |
sahilmgandhi | 18:6a4db94011d3 | 452 | |
sahilmgandhi | 18:6a4db94011d3 | 453 | /** |
sahilmgandhi | 18:6a4db94011d3 | 454 | * Indicate if a value is included in a range which can be wrapped. |
sahilmgandhi | 18:6a4db94011d3 | 455 | * @param begin start of the range |
sahilmgandhi | 18:6a4db94011d3 | 456 | * @param end end of the range |
sahilmgandhi | 18:6a4db94011d3 | 457 | * @param val value to check |
sahilmgandhi | 18:6a4db94011d3 | 458 | * @return true if the value is included in the range and false otherwise. |
sahilmgandhi | 18:6a4db94011d3 | 459 | */ |
sahilmgandhi | 18:6a4db94011d3 | 460 | static inline bool is_in_wrapped_range(uint32_t begin, uint32_t end, uint32_t val) { |
sahilmgandhi | 18:6a4db94011d3 | 461 | // regular case, begin < end |
sahilmgandhi | 18:6a4db94011d3 | 462 | // return true if begin <= val < end |
sahilmgandhi | 18:6a4db94011d3 | 463 | if (begin < end) { |
sahilmgandhi | 18:6a4db94011d3 | 464 | if (begin <= val && val < end) { |
sahilmgandhi | 18:6a4db94011d3 | 465 | return true; |
sahilmgandhi | 18:6a4db94011d3 | 466 | } else { |
sahilmgandhi | 18:6a4db94011d3 | 467 | return false; |
sahilmgandhi | 18:6a4db94011d3 | 468 | } |
sahilmgandhi | 18:6a4db94011d3 | 469 | } else { |
sahilmgandhi | 18:6a4db94011d3 | 470 | // In this case end < begin because it has wrap around the limits |
sahilmgandhi | 18:6a4db94011d3 | 471 | // return false if end < val < begin |
sahilmgandhi | 18:6a4db94011d3 | 472 | if (end < val && val < begin) { |
sahilmgandhi | 18:6a4db94011d3 | 473 | return false; |
sahilmgandhi | 18:6a4db94011d3 | 474 | } else { |
sahilmgandhi | 18:6a4db94011d3 | 475 | return true; |
sahilmgandhi | 18:6a4db94011d3 | 476 | } |
sahilmgandhi | 18:6a4db94011d3 | 477 | } |
sahilmgandhi | 18:6a4db94011d3 | 478 | |
sahilmgandhi | 18:6a4db94011d3 | 479 | } |
sahilmgandhi | 18:6a4db94011d3 | 480 | |
sahilmgandhi | 18:6a4db94011d3 | 481 | /** |
sahilmgandhi | 18:6a4db94011d3 | 482 | * Register the next tick. |
sahilmgandhi | 18:6a4db94011d3 | 483 | */ |
sahilmgandhi | 18:6a4db94011d3 | 484 | static void register_next_tick() { |
sahilmgandhi | 18:6a4db94011d3 | 485 | previous_tick_cc_value = NRF_RTC1->CC[1]; |
sahilmgandhi | 18:6a4db94011d3 | 486 | uint32_t delta = get_next_tick_cc_delta(); |
sahilmgandhi | 18:6a4db94011d3 | 487 | uint32_t new_compare_value = (previous_tick_cc_value + delta) & MAX_RTC_COUNTER_VAL; |
sahilmgandhi | 18:6a4db94011d3 | 488 | |
sahilmgandhi | 18:6a4db94011d3 | 489 | // Disable irq directly for few cycles, |
sahilmgandhi | 18:6a4db94011d3 | 490 | // Validation of the new CC value against the COUNTER, |
sahilmgandhi | 18:6a4db94011d3 | 491 | // Setting the new CC value and enabling CC IRQ should be an atomic operation |
sahilmgandhi | 18:6a4db94011d3 | 492 | // Otherwise, there is a possibility to set an invalid CC value because |
sahilmgandhi | 18:6a4db94011d3 | 493 | // the RTC1 keeps running. |
sahilmgandhi | 18:6a4db94011d3 | 494 | // This code is very short 20-38 cycles in the worst case, it shouldn't |
sahilmgandhi | 18:6a4db94011d3 | 495 | // disturb softdevice. |
sahilmgandhi | 18:6a4db94011d3 | 496 | __disable_irq(); |
sahilmgandhi | 18:6a4db94011d3 | 497 | uint32_t current_counter = NRF_RTC1->COUNTER; |
sahilmgandhi | 18:6a4db94011d3 | 498 | |
sahilmgandhi | 18:6a4db94011d3 | 499 | // If an overflow occur, set the next tick in COUNTER + delta clock cycles |
sahilmgandhi | 18:6a4db94011d3 | 500 | if (is_in_wrapped_range(previous_tick_cc_value, new_compare_value, current_counter) == false) { |
sahilmgandhi | 18:6a4db94011d3 | 501 | new_compare_value = current_counter + delta; |
sahilmgandhi | 18:6a4db94011d3 | 502 | } |
sahilmgandhi | 18:6a4db94011d3 | 503 | NRF_RTC1->CC[1] = new_compare_value; |
sahilmgandhi | 18:6a4db94011d3 | 504 | |
sahilmgandhi | 18:6a4db94011d3 | 505 | // set the interrupt of CC channel 1 and reenable IRQs |
sahilmgandhi | 18:6a4db94011d3 | 506 | NRF_RTC1->INTENSET = RTC_INTENSET_COMPARE1_Msk; |
sahilmgandhi | 18:6a4db94011d3 | 507 | __enable_irq(); |
sahilmgandhi | 18:6a4db94011d3 | 508 | } |
sahilmgandhi | 18:6a4db94011d3 | 509 | |
sahilmgandhi | 18:6a4db94011d3 | 510 | /** |
sahilmgandhi | 18:6a4db94011d3 | 511 | * Initialize alternative hardware timer as RTX kernel timer |
sahilmgandhi | 18:6a4db94011d3 | 512 | * This function is directly called by RTX. |
sahilmgandhi | 18:6a4db94011d3 | 513 | * @note this function shouldn't be called directly. |
sahilmgandhi | 18:6a4db94011d3 | 514 | * @return IRQ number of the alternative hardware timer |
sahilmgandhi | 18:6a4db94011d3 | 515 | */ |
sahilmgandhi | 18:6a4db94011d3 | 516 | int os_tick_init (void) |
sahilmgandhi | 18:6a4db94011d3 | 517 | { |
sahilmgandhi | 18:6a4db94011d3 | 518 | // their is no need to start the LF clock, it is already started by SystemInit. |
sahilmgandhi | 18:6a4db94011d3 | 519 | NVIC_SetPriority(RTC1_IRQn, RTC1_IRQ_PRI); |
sahilmgandhi | 18:6a4db94011d3 | 520 | NVIC_ClearPendingIRQ(RTC1_IRQn); |
sahilmgandhi | 18:6a4db94011d3 | 521 | NVIC_EnableIRQ(RTC1_IRQn); |
sahilmgandhi | 18:6a4db94011d3 | 522 | |
sahilmgandhi | 18:6a4db94011d3 | 523 | NRF_RTC1->TASKS_START = 1; |
sahilmgandhi | 18:6a4db94011d3 | 524 | nrf_delay_us(MAX_RTC_TASKS_DELAY); |
sahilmgandhi | 18:6a4db94011d3 | 525 | |
sahilmgandhi | 18:6a4db94011d3 | 526 | NRF_RTC1->CC[1] = 0; |
sahilmgandhi | 18:6a4db94011d3 | 527 | clear_tick_interrupt(); |
sahilmgandhi | 18:6a4db94011d3 | 528 | register_next_tick(); |
sahilmgandhi | 18:6a4db94011d3 | 529 | |
sahilmgandhi | 18:6a4db94011d3 | 530 | os_tick_started = true; |
sahilmgandhi | 18:6a4db94011d3 | 531 | |
sahilmgandhi | 18:6a4db94011d3 | 532 | return RTC1_IRQn; |
sahilmgandhi | 18:6a4db94011d3 | 533 | } |
sahilmgandhi | 18:6a4db94011d3 | 534 | |
sahilmgandhi | 18:6a4db94011d3 | 535 | /** |
sahilmgandhi | 18:6a4db94011d3 | 536 | * Acknowledge the tick interrupt. |
sahilmgandhi | 18:6a4db94011d3 | 537 | * This function is called by the function OS_Tick_Handler of RTX. |
sahilmgandhi | 18:6a4db94011d3 | 538 | * @note this function shouldn't be called directly. |
sahilmgandhi | 18:6a4db94011d3 | 539 | */ |
sahilmgandhi | 18:6a4db94011d3 | 540 | void os_tick_irqack(void) |
sahilmgandhi | 18:6a4db94011d3 | 541 | { |
sahilmgandhi | 18:6a4db94011d3 | 542 | clear_tick_interrupt(); |
sahilmgandhi | 18:6a4db94011d3 | 543 | register_next_tick(); |
sahilmgandhi | 18:6a4db94011d3 | 544 | } |
sahilmgandhi | 18:6a4db94011d3 | 545 | |
sahilmgandhi | 18:6a4db94011d3 | 546 | /** |
sahilmgandhi | 18:6a4db94011d3 | 547 | * Returns the overflow flag of the alternative hardware timer. |
sahilmgandhi | 18:6a4db94011d3 | 548 | * @note This function is exposed by RTX kernel. |
sahilmgandhi | 18:6a4db94011d3 | 549 | * @return 1 if the timer has overflowed and 0 otherwise. |
sahilmgandhi | 18:6a4db94011d3 | 550 | */ |
sahilmgandhi | 18:6a4db94011d3 | 551 | uint32_t os_tick_ovf(void) { |
sahilmgandhi | 18:6a4db94011d3 | 552 | uint32_t current_counter = NRF_RTC1->COUNTER; |
sahilmgandhi | 18:6a4db94011d3 | 553 | uint32_t next_tick_cc_value = NRF_RTC1->CC[1]; |
sahilmgandhi | 18:6a4db94011d3 | 554 | |
sahilmgandhi | 18:6a4db94011d3 | 555 | return is_in_wrapped_range(previous_tick_cc_value, next_tick_cc_value, current_counter) ? 0 : 1; |
sahilmgandhi | 18:6a4db94011d3 | 556 | } |
sahilmgandhi | 18:6a4db94011d3 | 557 | |
sahilmgandhi | 18:6a4db94011d3 | 558 | /** |
sahilmgandhi | 18:6a4db94011d3 | 559 | * Return the value of the alternative hardware timer. |
sahilmgandhi | 18:6a4db94011d3 | 560 | * @note The documentation is not very clear about what is expected as a result, |
sahilmgandhi | 18:6a4db94011d3 | 561 | * is it an ascending counter, a descending one ? |
sahilmgandhi | 18:6a4db94011d3 | 562 | * None of this is specified. |
sahilmgandhi | 18:6a4db94011d3 | 563 | * The default systick is a descending counter and this function return values in |
sahilmgandhi | 18:6a4db94011d3 | 564 | * descending order, even if the internal counter used is an ascending one. |
sahilmgandhi | 18:6a4db94011d3 | 565 | * @return the value of the alternative hardware timer. |
sahilmgandhi | 18:6a4db94011d3 | 566 | */ |
sahilmgandhi | 18:6a4db94011d3 | 567 | uint32_t os_tick_val(void) { |
sahilmgandhi | 18:6a4db94011d3 | 568 | uint32_t current_counter = NRF_RTC1->COUNTER; |
sahilmgandhi | 18:6a4db94011d3 | 569 | uint32_t next_tick_cc_value = NRF_RTC1->CC[1]; |
sahilmgandhi | 18:6a4db94011d3 | 570 | |
sahilmgandhi | 18:6a4db94011d3 | 571 | // do not use os_tick_ovf because its counter value can be different |
sahilmgandhi | 18:6a4db94011d3 | 572 | if(is_in_wrapped_range(previous_tick_cc_value, next_tick_cc_value, current_counter)) { |
sahilmgandhi | 18:6a4db94011d3 | 573 | if (next_tick_cc_value > previous_tick_cc_value) { |
sahilmgandhi | 18:6a4db94011d3 | 574 | return next_tick_cc_value - current_counter; |
sahilmgandhi | 18:6a4db94011d3 | 575 | } else if(current_counter <= next_tick_cc_value) { |
sahilmgandhi | 18:6a4db94011d3 | 576 | return next_tick_cc_value - current_counter; |
sahilmgandhi | 18:6a4db94011d3 | 577 | } else { |
sahilmgandhi | 18:6a4db94011d3 | 578 | return next_tick_cc_value + (MAX_RTC_COUNTER_VAL - current_counter); |
sahilmgandhi | 18:6a4db94011d3 | 579 | } |
sahilmgandhi | 18:6a4db94011d3 | 580 | } else { |
sahilmgandhi | 18:6a4db94011d3 | 581 | // use (os_trv + 1) has the base step, can be totally inacurate ... |
sahilmgandhi | 18:6a4db94011d3 | 582 | uint32_t clock_cycles_by_tick = os_trv + 1; |
sahilmgandhi | 18:6a4db94011d3 | 583 | |
sahilmgandhi | 18:6a4db94011d3 | 584 | // if current counter has wrap arround, add the limit to it. |
sahilmgandhi | 18:6a4db94011d3 | 585 | if (current_counter < next_tick_cc_value) { |
sahilmgandhi | 18:6a4db94011d3 | 586 | current_counter = current_counter + MAX_RTC_COUNTER_VAL; |
sahilmgandhi | 18:6a4db94011d3 | 587 | } |
sahilmgandhi | 18:6a4db94011d3 | 588 | |
sahilmgandhi | 18:6a4db94011d3 | 589 | return clock_cycles_by_tick - ((current_counter - next_tick_cc_value) % clock_cycles_by_tick); |
sahilmgandhi | 18:6a4db94011d3 | 590 | } |
sahilmgandhi | 18:6a4db94011d3 | 591 | } |