Mouse code for the MacroRat

Dependencies:   ITG3200 QEI

Committer:
sahilmgandhi
Date:
Sat Jun 03 00:22:44 2017 +0000
Revision:
46:b156ef445742
Parent:
18:6a4db94011d3
Final code for internal battlebot competition.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
sahilmgandhi 18:6a4db94011d3 1 /* Copyright (c) 2013, Nordic Semiconductor ASA
sahilmgandhi 18:6a4db94011d3 2 * All rights reserved.
sahilmgandhi 18:6a4db94011d3 3 *
sahilmgandhi 18:6a4db94011d3 4 * Redistribution and use in source and binary forms, with or without
sahilmgandhi 18:6a4db94011d3 5 * modification, are permitted provided that the following conditions are met:
sahilmgandhi 18:6a4db94011d3 6 *
sahilmgandhi 18:6a4db94011d3 7 * * Redistributions of source code must retain the above copyright notice, this
sahilmgandhi 18:6a4db94011d3 8 * list of conditions and the following disclaimer.
sahilmgandhi 18:6a4db94011d3 9 *
sahilmgandhi 18:6a4db94011d3 10 * * Redistributions in binary form must reproduce the above copyright notice,
sahilmgandhi 18:6a4db94011d3 11 * this list of conditions and the following disclaimer in the documentation
sahilmgandhi 18:6a4db94011d3 12 * and/or other materials provided with the distribution.
sahilmgandhi 18:6a4db94011d3 13 *
sahilmgandhi 18:6a4db94011d3 14 * * Neither the name of Nordic Semiconductor ASA nor the names of its
sahilmgandhi 18:6a4db94011d3 15 * contributors may be used to endorse or promote products derived from
sahilmgandhi 18:6a4db94011d3 16 * this software without specific prior written permission.
sahilmgandhi 18:6a4db94011d3 17 *
sahilmgandhi 18:6a4db94011d3 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
sahilmgandhi 18:6a4db94011d3 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
sahilmgandhi 18:6a4db94011d3 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
sahilmgandhi 18:6a4db94011d3 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
sahilmgandhi 18:6a4db94011d3 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
sahilmgandhi 18:6a4db94011d3 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
sahilmgandhi 18:6a4db94011d3 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
sahilmgandhi 18:6a4db94011d3 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
sahilmgandhi 18:6a4db94011d3 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
sahilmgandhi 18:6a4db94011d3 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
sahilmgandhi 18:6a4db94011d3 28 *
sahilmgandhi 18:6a4db94011d3 29 */
sahilmgandhi 18:6a4db94011d3 30
sahilmgandhi 18:6a4db94011d3 31 /* NOTE: Template files (including this one) are application specific and therefore expected to
sahilmgandhi 18:6a4db94011d3 32 be copied into the application project folder prior to its use! */
sahilmgandhi 18:6a4db94011d3 33
sahilmgandhi 18:6a4db94011d3 34 #include <stdint.h>
sahilmgandhi 18:6a4db94011d3 35 #include <stdbool.h>
sahilmgandhi 18:6a4db94011d3 36 #include "nrf.h"
sahilmgandhi 18:6a4db94011d3 37 #include "nrf_delay.h"
sahilmgandhi 18:6a4db94011d3 38 #include "system_nrf51.h"
sahilmgandhi 18:6a4db94011d3 39
sahilmgandhi 18:6a4db94011d3 40 /*lint ++flb "Enter library region" */
sahilmgandhi 18:6a4db94011d3 41
sahilmgandhi 18:6a4db94011d3 42 #define __SYSTEM_CLOCK (16000000UL) /*!< nRF51 devices use a fixed System Clock Frequency of 16MHz */
sahilmgandhi 18:6a4db94011d3 43
sahilmgandhi 18:6a4db94011d3 44 static bool is_manual_peripheral_setup_needed(void);
sahilmgandhi 18:6a4db94011d3 45 static bool is_disabled_in_debug_needed(void);
sahilmgandhi 18:6a4db94011d3 46 static void init_clock(void);
sahilmgandhi 18:6a4db94011d3 47
sahilmgandhi 18:6a4db94011d3 48
sahilmgandhi 18:6a4db94011d3 49 #if defined ( __CC_ARM )
sahilmgandhi 18:6a4db94011d3 50 uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
sahilmgandhi 18:6a4db94011d3 51 #elif defined ( __ICCARM__ )
sahilmgandhi 18:6a4db94011d3 52 __root uint32_t SystemCoreClock = __SYSTEM_CLOCK;
sahilmgandhi 18:6a4db94011d3 53 #elif defined ( __GNUC__ )
sahilmgandhi 18:6a4db94011d3 54 uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
sahilmgandhi 18:6a4db94011d3 55 #endif
sahilmgandhi 18:6a4db94011d3 56
sahilmgandhi 18:6a4db94011d3 57 void SystemCoreClockUpdate(void)
sahilmgandhi 18:6a4db94011d3 58 {
sahilmgandhi 18:6a4db94011d3 59 SystemCoreClock = __SYSTEM_CLOCK;
sahilmgandhi 18:6a4db94011d3 60 }
sahilmgandhi 18:6a4db94011d3 61
sahilmgandhi 18:6a4db94011d3 62 void SystemInit(void)
sahilmgandhi 18:6a4db94011d3 63 {
sahilmgandhi 18:6a4db94011d3 64 #if defined(TARGET_NRF_32MHZ_XTAL)
sahilmgandhi 18:6a4db94011d3 65 /* For 32MHz HFCLK XTAL such as Taiyo Yuden
sahilmgandhi 18:6a4db94011d3 66 Physically, tiny footprint XTAL oscillate higher freq. To make BLE modules smaller, some modules
sahilmgandhi 18:6a4db94011d3 67 are using 32MHz XTAL.
sahilmgandhi 18:6a4db94011d3 68 This code wriging the value 0xFFFFFF00 to the UICR (User Information Configuration Register)
sahilmgandhi 18:6a4db94011d3 69 at address 0x10001008, to make nRF51 works with 32MHz system clock. This register will be overwritten
sahilmgandhi 18:6a4db94011d3 70 by SoftDevice to 0xFFFFFFFF, the default value. Each hex files built with mbed classic online compiler
sahilmgandhi 18:6a4db94011d3 71 contain SoftDevice, so that, this code run once just after the hex file will be flashed onto nRF51.
sahilmgandhi 18:6a4db94011d3 72 After changing the value, nRF51 need to reboot. */
sahilmgandhi 18:6a4db94011d3 73 if (*(uint32_t *)0x10001008 == 0xFFFFFFFF)
sahilmgandhi 18:6a4db94011d3 74 {
sahilmgandhi 18:6a4db94011d3 75 NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
sahilmgandhi 18:6a4db94011d3 76 while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
sahilmgandhi 18:6a4db94011d3 77 *(uint32_t *)0x10001008 = 0xFFFFFF00;
sahilmgandhi 18:6a4db94011d3 78 NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
sahilmgandhi 18:6a4db94011d3 79 while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
sahilmgandhi 18:6a4db94011d3 80 NVIC_SystemReset();
sahilmgandhi 18:6a4db94011d3 81 while (true){}
sahilmgandhi 18:6a4db94011d3 82 }
sahilmgandhi 18:6a4db94011d3 83 #endif
sahilmgandhi 18:6a4db94011d3 84
sahilmgandhi 18:6a4db94011d3 85 /* If desired, switch off the unused RAM to lower consumption by the use of RAMON register.
sahilmgandhi 18:6a4db94011d3 86 It can also be done in the application main() function. */
sahilmgandhi 18:6a4db94011d3 87
sahilmgandhi 18:6a4db94011d3 88 /* Prepare the peripherals for use as indicated by the PAN 26 "System: Manual setup is required
sahilmgandhi 18:6a4db94011d3 89 to enable the use of peripherals" found at Product Anomaly document for your device found at
sahilmgandhi 18:6a4db94011d3 90 https://www.nordicsemi.com/. The side effect of executing these instructions in the devices
sahilmgandhi 18:6a4db94011d3 91 that do not need it is that the new peripherals in the second generation devices (LPCOMP for
sahilmgandhi 18:6a4db94011d3 92 example) will not be available. */
sahilmgandhi 18:6a4db94011d3 93 if (is_manual_peripheral_setup_needed())
sahilmgandhi 18:6a4db94011d3 94 {
sahilmgandhi 18:6a4db94011d3 95 *(uint32_t volatile *)0x40000504 = 0xC007FFDF;
sahilmgandhi 18:6a4db94011d3 96 *(uint32_t volatile *)0x40006C18 = 0x00008000;
sahilmgandhi 18:6a4db94011d3 97 }
sahilmgandhi 18:6a4db94011d3 98
sahilmgandhi 18:6a4db94011d3 99 /* Disable PROTENSET registers under debug, as indicated by PAN 59 "MPU: Reset value of DISABLEINDEBUG
sahilmgandhi 18:6a4db94011d3 100 register is incorrect" found at Product Anomaly document four your device found at
sahilmgandhi 18:6a4db94011d3 101 https://www.nordicsemi.com/. There is no side effect of using these instruction if not needed. */
sahilmgandhi 18:6a4db94011d3 102 if (is_disabled_in_debug_needed())
sahilmgandhi 18:6a4db94011d3 103 {
sahilmgandhi 18:6a4db94011d3 104 NRF_MPU->DISABLEINDEBUG = MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled << MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos;
sahilmgandhi 18:6a4db94011d3 105 }
sahilmgandhi 18:6a4db94011d3 106
sahilmgandhi 18:6a4db94011d3 107 // Start the external 32khz crystal oscillator.
sahilmgandhi 18:6a4db94011d3 108 init_clock();
sahilmgandhi 18:6a4db94011d3 109 }
sahilmgandhi 18:6a4db94011d3 110
sahilmgandhi 18:6a4db94011d3 111 void init_clock(void)
sahilmgandhi 18:6a4db94011d3 112 {
sahilmgandhi 18:6a4db94011d3 113 /* For compatibility purpose, the default behaviour is to first attempt to initialise an
sahilmgandhi 18:6a4db94011d3 114 external clock, and after a timeout, use the internal RC one. To avoid this wait, boards that
sahilmgandhi 18:6a4db94011d3 115 don't have an external oscillator can set TARGET_NRF_LFCLK_RC directly. */
sahilmgandhi 18:6a4db94011d3 116 uint32_t i = 0;
sahilmgandhi 18:6a4db94011d3 117 const uint32_t polling_period = 200;
sahilmgandhi 18:6a4db94011d3 118 const uint32_t timeout = 1000000;
sahilmgandhi 18:6a4db94011d3 119
sahilmgandhi 18:6a4db94011d3 120 #if defined(TARGET_NRF_LFCLK_RC)
sahilmgandhi 18:6a4db94011d3 121 NRF_CLOCK->LFCLKSRC = (CLOCK_LFCLKSRC_SRC_RC << CLOCK_LFCLKSRC_SRC_Pos);
sahilmgandhi 18:6a4db94011d3 122 #else
sahilmgandhi 18:6a4db94011d3 123 NRF_CLOCK->LFCLKSRC = (CLOCK_LFCLKSRC_SRC_Xtal << CLOCK_LFCLKSRC_SRC_Pos);
sahilmgandhi 18:6a4db94011d3 124 #endif
sahilmgandhi 18:6a4db94011d3 125 NRF_CLOCK->EVENTS_LFCLKSTARTED = 0;
sahilmgandhi 18:6a4db94011d3 126 NRF_CLOCK->TASKS_LFCLKSTART = 1;
sahilmgandhi 18:6a4db94011d3 127
sahilmgandhi 18:6a4db94011d3 128 /* Wait for the external oscillator to start up.
sahilmgandhi 18:6a4db94011d3 129 nRF51822 product specification (8.1.5) gives a typical value of 300ms for external clock
sahilmgandhi 18:6a4db94011d3 130 startup duration, and a maximum value of 1s. When using the internal RC source, typical delay
sahilmgandhi 18:6a4db94011d3 131 will be 390µs, so we use a polling period of 200µs.
sahilmgandhi 18:6a4db94011d3 132
sahilmgandhi 18:6a4db94011d3 133 We can't use us_ticker at this point, so we have to rely on a less precise method for
sahilmgandhi 18:6a4db94011d3 134 measuring our timeout. Because of this, the actual timeout will be slightly longer than 1
sahilmgandhi 18:6a4db94011d3 135 second, which isn't an issue at all, since this fallback should only be used as a safety net.
sahilmgandhi 18:6a4db94011d3 136 */
sahilmgandhi 18:6a4db94011d3 137 for (i = 0; i < (timeout / polling_period); i++) {
sahilmgandhi 18:6a4db94011d3 138 if (NRF_CLOCK->EVENTS_LFCLKSTARTED != 0)
sahilmgandhi 18:6a4db94011d3 139 return;
sahilmgandhi 18:6a4db94011d3 140 nrf_delay_us(polling_period);
sahilmgandhi 18:6a4db94011d3 141 }
sahilmgandhi 18:6a4db94011d3 142
sahilmgandhi 18:6a4db94011d3 143 /* Fallback to internal clock. Belt and braces, since the internal clock is used by default
sahilmgandhi 18:6a4db94011d3 144 whilst no external source is running. This is not only a sanity check, but it also allows
sahilmgandhi 18:6a4db94011d3 145 code down the road (e.g. ble initialisation) to directly know which clock is used. */
sahilmgandhi 18:6a4db94011d3 146 NRF_CLOCK->LFCLKSRC = (CLOCK_LFCLKSRC_SRC_RC << CLOCK_LFCLKSRC_SRC_Pos);
sahilmgandhi 18:6a4db94011d3 147 NRF_CLOCK->TASKS_LFCLKSTART = 1;
sahilmgandhi 18:6a4db94011d3 148 while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0) {
sahilmgandhi 18:6a4db94011d3 149 // Do nothing.
sahilmgandhi 18:6a4db94011d3 150 }
sahilmgandhi 18:6a4db94011d3 151 }
sahilmgandhi 18:6a4db94011d3 152
sahilmgandhi 18:6a4db94011d3 153 static bool is_manual_peripheral_setup_needed(void)
sahilmgandhi 18:6a4db94011d3 154 {
sahilmgandhi 18:6a4db94011d3 155 if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
sahilmgandhi 18:6a4db94011d3 156 {
sahilmgandhi 18:6a4db94011d3 157 if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x00) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
sahilmgandhi 18:6a4db94011d3 158 {
sahilmgandhi 18:6a4db94011d3 159 return true;
sahilmgandhi 18:6a4db94011d3 160 }
sahilmgandhi 18:6a4db94011d3 161 if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x10) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
sahilmgandhi 18:6a4db94011d3 162 {
sahilmgandhi 18:6a4db94011d3 163 return true;
sahilmgandhi 18:6a4db94011d3 164 }
sahilmgandhi 18:6a4db94011d3 165 if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x30) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
sahilmgandhi 18:6a4db94011d3 166 {
sahilmgandhi 18:6a4db94011d3 167 return true;
sahilmgandhi 18:6a4db94011d3 168 }
sahilmgandhi 18:6a4db94011d3 169 }
sahilmgandhi 18:6a4db94011d3 170
sahilmgandhi 18:6a4db94011d3 171 return false;
sahilmgandhi 18:6a4db94011d3 172 }
sahilmgandhi 18:6a4db94011d3 173
sahilmgandhi 18:6a4db94011d3 174 static bool is_disabled_in_debug_needed(void)
sahilmgandhi 18:6a4db94011d3 175 {
sahilmgandhi 18:6a4db94011d3 176 if ((((*(uint32_t *)0xF0000FE0) & 0x000000FF) == 0x1) && (((*(uint32_t *)0xF0000FE4) & 0x0000000F) == 0x0))
sahilmgandhi 18:6a4db94011d3 177 {
sahilmgandhi 18:6a4db94011d3 178 if ((((*(uint32_t *)0xF0000FE8) & 0x000000F0) == 0x40) && (((*(uint32_t *)0xF0000FEC) & 0x000000F0) == 0x0))
sahilmgandhi 18:6a4db94011d3 179 {
sahilmgandhi 18:6a4db94011d3 180 return true;
sahilmgandhi 18:6a4db94011d3 181 }
sahilmgandhi 18:6a4db94011d3 182 }
sahilmgandhi 18:6a4db94011d3 183
sahilmgandhi 18:6a4db94011d3 184 return false;
sahilmgandhi 18:6a4db94011d3 185 }
sahilmgandhi 18:6a4db94011d3 186
sahilmgandhi 18:6a4db94011d3 187 /*lint --flb "Leave library region" */